diff --git a/vm-superio/CHANGELOG.md b/vm-superio/CHANGELOG.md index eebc5f1..41c9b4d 100644 --- a/vm-superio/CHANGELOG.md +++ b/vm-superio/CHANGELOG.md @@ -9,6 +9,8 @@ - Added three methods to `Serial` to retrieve the `Write` output object. - Derived the `Copy` trait for `RtcState` and other auxiliary types. - Updated vmm-sys-util dependency to 0.12.1 +- Implemented receive FIFO flushing via the FCR register for the `Serial` + device ([#83](https://github.com/rust-vmm/vm-superio/issues/83)). # v0.7.0 diff --git a/vm-superio/src/serial.rs b/vm-superio/src/serial.rs index 2c736a3..7b82e9e 100644 --- a/vm-superio/src/serial.rs +++ b/vm-superio/src/serial.rs @@ -23,6 +23,7 @@ use crate::Trigger; const DATA_OFFSET: u8 = 0; const IER_OFFSET: u8 = 1; const IIR_OFFSET: u8 = 2; +const FCR_OFFSET: u8 = IIR_OFFSET; const LCR_OFFSET: u8 = 3; const MCR_OFFSET: u8 = 4; const LSR_OFFSET: u8 = 5; @@ -48,6 +49,8 @@ const IIR_NONE_BIT: u8 = 0b0000_0001; const IIR_THR_EMPTY_BIT: u8 = 0b0000_0010; const IIR_RDA_BIT: u8 = 0b0000_0100; +const FCR_FLUSH_IN_BIT: u8 = 0b0000_0010; + const LCR_DLAB_BIT: u8 = 0b1000_0000; const LSR_DATA_READY_BIT: u8 = 0b0000_0001; @@ -611,7 +614,14 @@ impl Serial { LCR_OFFSET => self.line_control = value, MCR_OFFSET => self.modem_control = value, SCR_OFFSET => self.scratch = value, - // We are not interested in writing to other offsets (such as FCR offset). + FCR_OFFSET => { + // Clear the receive FIFO + if value & FCR_FLUSH_IN_BIT != 0 { + self.in_buffer.clear(); + self.clear_lsr_rda_bit(); + self.events.in_buffer_empty(); + } + } _ => {} } Ok(())