From d760dfc03370c51b823fc277b8312e44b7d54fc5 Mon Sep 17 00:00:00 2001 From: Denys Zadorozhnyi Date: Wed, 26 Jun 2024 12:54:30 +0300 Subject: [PATCH 1/3] fix: prepend emitted `intrinsics::*` calls with `::` as absolute path. Update VM to include absolute procedure paths support. Add MASM assembly test for `tx_kernel::get_inputs` call. --- Cargo.lock | 10 +- Cargo.toml | 11 +- codegen/masm/intrinsics/mem.masm | 12 + codegen/masm/src/codegen/emit/binary.rs | 20 +- codegen/masm/src/codegen/emit/int32.rs | 46 +-- codegen/masm/src/codegen/emit/mem.rs | 16 +- codegen/masm/src/codegen/emit/unary.rs | 2 +- .../abi_transform_tx_kernel_get_inputs.masm | 288 +++++++++--------- .../abi_transform/tx_kernel.rs | 21 +- tests/rust-apps-wasm/fib/Cargo.lock | 4 +- .../rust-sdk/account-test/Cargo.lock | 6 +- .../wit-sdk/basic-wallet/Cargo.lock | 2 +- .../wit-sdk/p2id-note/Cargo.lock | 2 +- tests/rust-apps-wasm/wit-sdk/sdk/Cargo.lock | 2 +- 14 files changed, 238 insertions(+), 204 deletions(-) diff --git a/Cargo.lock b/Cargo.lock index 1c793f25..43937903 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -2614,7 +2614,7 @@ dependencies = [ [[package]] name = "miden-air" version = "0.9.2" -source = "git+https://github.com/0xPolygonMiden/miden-vm?rev=ddf536cd7157053f0940d7be41998b2a6546b4c1#ddf536cd7157053f0940d7be41998b2a6546b4c1" +source = "git+https://github.com/0xPolygonMiden/miden-vm?rev=49a92a2eddeea7296525ce5ed366ec1d667ac2b6#49a92a2eddeea7296525ce5ed366ec1d667ac2b6" dependencies = [ "miden-core", "winter-air", @@ -2624,7 +2624,7 @@ dependencies = [ [[package]] name = "miden-assembly" version = "0.9.2" -source = "git+https://github.com/0xPolygonMiden/miden-vm?rev=ddf536cd7157053f0940d7be41998b2a6546b4c1#ddf536cd7157053f0940d7be41998b2a6546b4c1" +source = "git+https://github.com/0xPolygonMiden/miden-vm?rev=49a92a2eddeea7296525ce5ed366ec1d667ac2b6#49a92a2eddeea7296525ce5ed366ec1d667ac2b6" dependencies = [ "aho-corasick", "lalrpop", @@ -2641,7 +2641,7 @@ dependencies = [ [[package]] name = "miden-core" version = "0.9.1" -source = "git+https://github.com/0xPolygonMiden/miden-vm?rev=ddf536cd7157053f0940d7be41998b2a6546b4c1#ddf536cd7157053f0940d7be41998b2a6546b4c1" +source = "git+https://github.com/0xPolygonMiden/miden-vm?rev=49a92a2eddeea7296525ce5ed366ec1d667ac2b6#49a92a2eddeea7296525ce5ed366ec1d667ac2b6" dependencies = [ "miden-crypto", "miden-formatting", @@ -2755,7 +2755,7 @@ dependencies = [ [[package]] name = "miden-processor" version = "0.9.2" -source = "git+https://github.com/0xPolygonMiden/miden-vm?rev=ddf536cd7157053f0940d7be41998b2a6546b4c1#ddf536cd7157053f0940d7be41998b2a6546b4c1" +source = "git+https://github.com/0xPolygonMiden/miden-vm?rev=49a92a2eddeea7296525ce5ed366ec1d667ac2b6#49a92a2eddeea7296525ce5ed366ec1d667ac2b6" dependencies = [ "miden-air", "miden-core", @@ -2766,7 +2766,7 @@ dependencies = [ [[package]] name = "miden-stdlib" version = "0.9.2" -source = "git+https://github.com/0xPolygonMiden/miden-vm?rev=ddf536cd7157053f0940d7be41998b2a6546b4c1#ddf536cd7157053f0940d7be41998b2a6546b4c1" +source = "git+https://github.com/0xPolygonMiden/miden-vm?rev=49a92a2eddeea7296525ce5ed366ec1d667ac2b6#49a92a2eddeea7296525ce5ed366ec1d667ac2b6" dependencies = [ "miden-assembly", ] diff --git a/Cargo.toml b/Cargo.toml index 4a8bd0ff..6d23c15c 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -64,11 +64,12 @@ thiserror = { version = "1.0", git = "https://github.com/bitwalker/thiserror", b toml = { version = "0.5", features = ["preserve_order"] } derive_more = "0.99" indexmap = "2.1" -# ddf536cd7157053f0940d7be41998b2a6546b4c1 is the latest commit in 'next' that includes the `if.true` empty blocks support -miden-assembly = { git = "https://github.com/0xPolygonMiden/miden-vm", rev = "ddf536cd7157053f0940d7be41998b2a6546b4c1" } -miden-core = { git = "https://github.com/0xPolygonMiden/miden-vm", rev = "ddf536cd7157053f0940d7be41998b2a6546b4c1" } -miden-processor = { git = "https://github.com/0xPolygonMiden/miden-vm", rev = "ddf536cd7157053f0940d7be41998b2a6546b4c1" } -miden-stdlib = { git = "https://github.com/0xPolygonMiden/miden-vm", rev = "ddf536cd7157053f0940d7be41998b2a6546b4c1" } +# 49a92a2eddeea7296525ce5ed366ec1d667ac2b6 is the latest commit in 'next' that includes +# the absolute paths support +miden-assembly = { git = "https://github.com/0xPolygonMiden/miden-vm", rev = "49a92a2eddeea7296525ce5ed366ec1d667ac2b6" } +miden-core = { git = "https://github.com/0xPolygonMiden/miden-vm", rev = "49a92a2eddeea7296525ce5ed366ec1d667ac2b6" } +miden-processor = { git = "https://github.com/0xPolygonMiden/miden-vm", rev = "49a92a2eddeea7296525ce5ed366ec1d667ac2b6" } +miden-stdlib = { git = "https://github.com/0xPolygonMiden/miden-vm", rev = "49a92a2eddeea7296525ce5ed366ec1d667ac2b6" } midenc-codegen-masm = { path = "codegen/masm" } miden-diagnostics = "0.1" midenc-hir = { path = "hir" } diff --git a/codegen/masm/intrinsics/mem.masm b/codegen/masm/intrinsics/mem.masm index b46f3984..738f2071 100644 --- a/codegen/masm/intrinsics/mem.masm +++ b/codegen/masm/intrinsics/mem.masm @@ -562,3 +562,15 @@ export.store_sw # [waddr, index, offset, value] end end end + +# Store a double 32-bit machine word from the given native pointer triplet. +# +# A native pointer triplet consists of a word address which contains the +# start of the data; an element index, which indicates which element of +# the word the data starts in; and a byte offset, which indicates which +# byte is the start of the data. +export.store_dw # [waddr, index, offset, value] + # TODO: implement + # cleanup the operand stack + dropw +end diff --git a/codegen/masm/src/codegen/emit/binary.rs b/codegen/masm/src/codegen/emit/binary.rs index dba8bca7..9556d345 100644 --- a/codegen/masm/src/codegen/emit/binary.rs +++ b/codegen/masm/src/codegen/emit/binary.rs @@ -166,7 +166,7 @@ impl<'a> OpEmitter<'a> { Type::U32 | Type::U16 | Type::U8 | Type::I1 => { self.emit(Op::U32Gt); } - Type::I32 => self.emit(Op::Exec("intrinsics::i32::is_gt".parse().unwrap())), + Type::I32 => self.emit(Op::Exec("::intrinsics::i32::is_gt".parse().unwrap())), ty => unimplemented!("gt is not yet implemented for {ty}"), } self.push(Type::I1); @@ -186,7 +186,7 @@ impl<'a> OpEmitter<'a> { Type::I32 => { self.emit_all(&[ Op::PushU32(imm.as_i32().unwrap() as u32), - Op::Exec("intrinsics::i32::is_gt".parse().unwrap()), + Op::Exec("::intrinsics::i32::is_gt".parse().unwrap()), ]); } ty => unimplemented!("gt is not yet implemented for {ty}"), @@ -206,7 +206,7 @@ impl<'a> OpEmitter<'a> { Type::U32 | Type::U16 | Type::U8 | Type::I1 => { self.emit(Op::U32Gte); } - Type::I32 => self.emit(Op::Exec("intrinsics::i32::is_gte".parse().unwrap())), + Type::I32 => self.emit(Op::Exec("::intrinsics::i32::is_gte".parse().unwrap())), ty => unimplemented!("gte is not yet implemented for {ty}"), } self.push(Type::I1); @@ -226,7 +226,7 @@ impl<'a> OpEmitter<'a> { Type::I32 => { self.emit_all(&[ Op::PushU32(imm.as_i32().unwrap() as u32), - Op::Exec("intrinsics::i32::is_gte".parse().unwrap()), + Op::Exec("::intrinsics::i32::is_gte".parse().unwrap()), ]); } ty => unimplemented!("gte is not yet implemented for {ty}"), @@ -246,7 +246,7 @@ impl<'a> OpEmitter<'a> { Type::U32 | Type::U16 | Type::U8 | Type::I1 => { self.emit(Op::U32Lt); } - Type::I32 => self.emit(Op::Exec("intrinsics::i32::is_lt".parse().unwrap())), + Type::I32 => self.emit(Op::Exec("::intrinsics::i32::is_lt".parse().unwrap())), ty => unimplemented!("lt is not yet implemented for {ty}"), } self.push(Type::I1); @@ -266,7 +266,7 @@ impl<'a> OpEmitter<'a> { Type::I32 => { self.emit_all(&[ Op::PushU32(imm.as_i32().unwrap() as u32), - Op::Exec("intrinsics::i32::is_lt".parse().unwrap()), + Op::Exec("::intrinsics::i32::is_lt".parse().unwrap()), ]); } ty => unimplemented!("lt is not yet implemented for {ty}"), @@ -286,7 +286,7 @@ impl<'a> OpEmitter<'a> { Type::U32 | Type::U16 | Type::U8 | Type::I1 => { self.emit(Op::U32Lte); } - Type::I32 => self.emit(Op::Exec("intrinsics::i32::is_lte".parse().unwrap())), + Type::I32 => self.emit(Op::Exec("::intrinsics::i32::is_lte".parse().unwrap())), ty => unimplemented!("lte is not yet implemented for {ty}"), } self.push(Type::I1); @@ -306,7 +306,7 @@ impl<'a> OpEmitter<'a> { Type::I32 => { self.emit_all(&[ Op::PushU32(imm.as_i32().unwrap() as u32), - Op::Exec("intrinsics::i32::is_lte".parse().unwrap()), + Op::Exec("::intrinsics::i32::is_lte".parse().unwrap()), ]); } ty => unimplemented!("lte is not yet implemented for {ty}"), @@ -788,7 +788,7 @@ impl<'a> OpEmitter<'a> { self.emit_all(&[Op::Exp, Op::U32Assert]); } Type::I32 => { - self.emit(Op::Exec("intrinsics::i32::ipow".parse().unwrap())); + self.emit(Op::Exec("::intrinsics::i32::ipow".parse().unwrap())); } ty @ (Type::U16 | Type::U8) => { self.emit_all(&[Op::Exp, Op::U32Assert]); @@ -819,7 +819,7 @@ impl<'a> OpEmitter<'a> { Type::I32 => { self.emit_all(&[ Op::PushU8(exp), - Op::Exec("intrinsics::i32::ipow".parse().unwrap()), + Op::Exec("::intrinsics::i32::ipow".parse().unwrap()), ]); } ty @ (Type::U16 | Type::U8) => { diff --git a/codegen/masm/src/codegen/emit/int32.rs b/codegen/masm/src/codegen/emit/int32.rs index 14217c28..e61bb6ee 100644 --- a/codegen/masm/src/codegen/emit/int32.rs +++ b/codegen/masm/src/codegen/emit/int32.rs @@ -386,8 +386,10 @@ impl<'a> OpEmitter<'a> { pub fn add_i32(&mut self, overflow: Overflow) { self.emit(match overflow { Overflow::Unchecked | Overflow::Wrapping => Op::U32WrappingAdd, - Overflow::Checked => Op::Exec("intrinsics::i32::checked_add".parse().unwrap()), - Overflow::Overflowing => Op::Exec("intrinsics::i32::overflowing_add".parse().unwrap()), + Overflow::Checked => Op::Exec("::intrinsics::i32::checked_add".parse().unwrap()), + Overflow::Overflowing => { + Op::Exec("::intrinsics::i32::overflowing_add".parse().unwrap()) + } }) } @@ -427,12 +429,12 @@ impl<'a> OpEmitter<'a> { Overflow::Checked => { self.emit_all(&[ Op::PushU32(imm as u32), - Op::Exec("intrinsics::i32::checked_add".parse().unwrap()), + Op::Exec("::intrinsics::i32::checked_add".parse().unwrap()), ]); } Overflow::Overflowing => self.emit_all(&[ Op::PushU32(imm as u32), - Op::Exec("intrinsics::i32::overflowing_add".parse().unwrap()), + Op::Exec("::intrinsics::i32::overflowing_add".parse().unwrap()), ]), } } @@ -458,10 +460,10 @@ impl<'a> OpEmitter<'a> { match overflow { Overflow::Unchecked | Overflow::Wrapping => self.sub_u32(overflow), Overflow::Checked => { - self.emit(Op::Exec("intrinsics::i32::checked_sub".parse().unwrap())) + self.emit(Op::Exec("::intrinsics::i32::checked_sub".parse().unwrap())) } Overflow::Overflowing => { - self.emit(Op::Exec("intrinsics::i32::overflowing_sub".parse().unwrap())) + self.emit(Op::Exec("::intrinsics::i32::overflowing_sub".parse().unwrap())) } } } @@ -500,11 +502,11 @@ impl<'a> OpEmitter<'a> { Overflow::Unchecked | Overflow::Wrapping => self.sub_imm_u32(imm as u32, overflow), Overflow::Checked => self.emit_all(&[ Op::PushU32(imm as u32), - Op::Exec("intrinsics::i32::checked_sub".parse().unwrap()), + Op::Exec("::intrinsics::i32::checked_sub".parse().unwrap()), ]), Overflow::Overflowing => self.emit_all(&[ Op::PushU32(imm as u32), - Op::Exec("intrinsics::i32::overflowing_sub".parse().unwrap()), + Op::Exec("::intrinsics::i32::overflowing_sub".parse().unwrap()), ]), } } @@ -527,13 +529,13 @@ impl<'a> OpEmitter<'a> { pub fn mul_i32(&mut self, overflow: Overflow) { match overflow { Overflow::Unchecked | Overflow::Wrapping => { - self.emit(Op::Exec("intrinsics::i32::wrapping_mul".parse().unwrap())) + self.emit(Op::Exec("::intrinsics::i32::wrapping_mul".parse().unwrap())) } Overflow::Checked => { - self.emit(Op::Exec("intrinsics::i32::checked_mul".parse().unwrap())) + self.emit(Op::Exec("::intrinsics::i32::checked_mul".parse().unwrap())) } Overflow::Overflowing => { - self.emit(Op::Exec("intrinsics::i32::overflowing_mul".parse().unwrap())) + self.emit(Op::Exec("::intrinsics::i32::overflowing_mul".parse().unwrap())) } } } @@ -584,15 +586,15 @@ impl<'a> OpEmitter<'a> { imm => match overflow { Overflow::Unchecked | Overflow::Wrapping => self.emit_all(&[ Op::PushU32(imm as u32), - Op::Exec("intrinsics::i32::wrapping_mul".parse().unwrap()), + Op::Exec("::intrinsics::i32::wrapping_mul".parse().unwrap()), ]), Overflow::Checked => self.emit_all(&[ Op::PushU32(imm as u32), - Op::Exec("intrinsics::i32::checked_mul".parse().unwrap()), + Op::Exec("::intrinsics::i32::checked_mul".parse().unwrap()), ]), Overflow::Overflowing => self.emit_all(&[ Op::PushU32(imm as u32), - Op::Exec("intrinsics::i32::overflowing_mul".parse().unwrap()), + Op::Exec("::intrinsics::i32::overflowing_mul".parse().unwrap()), ]), }, } @@ -609,7 +611,7 @@ impl<'a> OpEmitter<'a> { /// /// This operation is checked, so if the operands or result are not valid i32, execution traps. pub fn checked_div_i32(&mut self) { - self.emit(Op::Exec("intrinsics::i32::checked_div".parse().unwrap())); + self.emit(Op::Exec("::intrinsics::i32::checked_div".parse().unwrap())); } /// Pops a u32 value off the stack, `a`, and performs `a / `. @@ -631,7 +633,7 @@ impl<'a> OpEmitter<'a> { assert_ne!(imm, 0, "division by zero is not allowed"); self.emit_all(&[ Op::PushU32(imm as u32), - Op::Exec("intrinsics::i32::checked_div".parse().unwrap()), + Op::Exec("::intrinsics::i32::checked_div".parse().unwrap()), ]); } @@ -795,7 +797,7 @@ impl<'a> OpEmitter<'a> { /// /// This operation is checked, if the operands or result are not valid i32, execution traps. pub fn shr_i32(&mut self) { - self.emit(Op::Exec("intrinsics::i32::checked_shr".parse().unwrap())); + self.emit(Op::Exec("::intrinsics::i32::checked_shr".parse().unwrap())); } /// Pops a u32 value off the stack, `a`, and performs `a >> ` @@ -813,7 +815,7 @@ impl<'a> OpEmitter<'a> { assert!(imm < 32, "invalid shift value: must be < 32, got {imm}"); self.emit_all(&[ Op::PushU32(imm as u32), - Op::Exec("intrinsics::i32::checked_shr".parse().unwrap()), + Op::Exec("::intrinsics::i32::checked_shr".parse().unwrap()), ]); } @@ -865,7 +867,7 @@ impl<'a> OpEmitter<'a> { /// /// This operation is checked, if the operands or result are not valid i32, execution traps. pub fn min_i32(&mut self) { - self.emit(Op::Exec("intrinsics::i32::min".parse().unwrap())); + self.emit(Op::Exec("::intrinsics::i32::min".parse().unwrap())); } /// Pops a u32 value off the stack, `a`, and puts the result of `min(a, imm)` on the stack @@ -881,7 +883,7 @@ impl<'a> OpEmitter<'a> { pub fn min_imm_i32(&mut self, imm: i32) { self.emit_all(&[ Op::PushU32(imm as u32), - Op::Exec("intrinsics::i32::min".parse().unwrap()), + Op::Exec("::intrinsics::i32::min".parse().unwrap()), ]); } @@ -898,7 +900,7 @@ impl<'a> OpEmitter<'a> { /// /// This operation is checked, if the operands or result are not valid i32, execution traps. pub fn max_i32(&mut self) { - self.emit(Op::Exec("intrinsics::i32::max".parse().unwrap())); + self.emit(Op::Exec("::intrinsics::i32::max".parse().unwrap())); } /// Pops a u32 value off the stack, `a`, and puts the result of `max(a, imm)` on the stack @@ -914,7 +916,7 @@ impl<'a> OpEmitter<'a> { pub fn max_imm_i32(&mut self, imm: i32) { self.emit_all(&[ Op::PushU32(imm as u32), - Op::Exec("intrinsics::i32::max".parse().unwrap()), + Op::Exec("::intrinsics::i32::max".parse().unwrap()), ]); } } diff --git a/codegen/masm/src/codegen/emit/mem.rs b/codegen/masm/src/codegen/emit/mem.rs index 26f06e61..f255f662 100644 --- a/codegen/masm/src/codegen/emit/mem.rs +++ b/codegen/masm/src/codegen/emit/mem.rs @@ -120,7 +120,7 @@ impl<'a> OpEmitter<'a> { return self.load_felt_imm(imm); } - self.emit(Op::Exec("intrinsics::mem::load_felt".parse().unwrap())); + self.emit(Op::Exec("::intrinsics::mem::load_felt".parse().unwrap())); } fn load_felt_imm(&mut self, ptr: NativePtr) { @@ -170,7 +170,7 @@ impl<'a> OpEmitter<'a> { return self.load_word_imm(imm); } - self.emit(Op::Exec("intrinsics::mem::load_sw".parse().unwrap())); + self.emit(Op::Exec("::intrinsics::mem::load_sw".parse().unwrap())); } /// Loads a single 32-bit machine word from the given immediate address. @@ -307,7 +307,7 @@ impl<'a> OpEmitter<'a> { return self.load_double_word_imm(imm); } - self.emit(Op::Exec("intrinsics::mem::load_dw".parse().unwrap())); + self.emit(Op::Exec("::intrinsics::mem::load_dw".parse().unwrap())); } fn load_double_word_imm(&mut self, ptr: NativePtr) { @@ -436,7 +436,7 @@ impl<'a> OpEmitter<'a> { if let Some(imm) = ptr { return self.load_quad_word_imm(imm); } - self.emit(Op::Exec("intrinsics::mem::load_qw".parse().unwrap())); + self.emit(Op::Exec("::intrinsics::mem::load_qw".parse().unwrap())); } fn load_quad_word_imm(&mut self, ptr: NativePtr) { @@ -908,7 +908,7 @@ impl<'a> OpEmitter<'a> { if let Some(imm) = ptr { return self.store_quad_word_imm(imm); } - self.emit(Op::Exec("intrinsics::mem::store_qw".parse().unwrap())); + self.emit(Op::Exec("::intrinsics::mem::store_qw".parse().unwrap())); } fn store_quad_word_imm(&mut self, ptr: NativePtr) { @@ -929,7 +929,7 @@ impl<'a> OpEmitter<'a> { return self.store_double_word_imm(imm); } - self.emit(Op::Exec("intrinsics::mem::store_dw".parse().unwrap())); + self.emit(Op::Exec("::intrinsics::mem::store_dw".parse().unwrap())); } fn store_double_word_imm(&mut self, ptr: NativePtr) { @@ -953,7 +953,7 @@ impl<'a> OpEmitter<'a> { return self.store_word_imm(imm); } - self.emit(Op::Exec("intrinsics::mem::store_sw".parse().unwrap())); + self.emit(Op::Exec("::intrinsics::mem::store_sw".parse().unwrap())); } /// Stores a single 32-bit machine word to the given immediate address. @@ -1177,7 +1177,7 @@ impl<'a> OpEmitter<'a> { return self.store_felt_imm(imm); } - self.emit(Op::Exec("intrinsics::mem::store_felt".parse().unwrap())); + self.emit(Op::Exec("::intrinsics::mem::store_felt".parse().unwrap())); } fn store_felt_imm(&mut self, ptr: NativePtr) { diff --git a/codegen/masm/src/codegen/emit/unary.rs b/codegen/masm/src/codegen/emit/unary.rs index d30a7eed..368a54ed 100644 --- a/codegen/masm/src/codegen/emit/unary.rs +++ b/codegen/masm/src/codegen/emit/unary.rs @@ -1280,7 +1280,7 @@ impl<'a> OpEmitter<'a> { self.emit_all(&[Op::Pow2, Op::U32Assert]); } Type::I32 => { - self.emit(Op::Exec("intrinsics::i32::pow2".parse().unwrap())); + self.emit(Op::Exec("::intrinsics::i32::pow2".parse().unwrap())); } Type::U8 | Type::U16 => { self.emit_all(&[Op::Pow2, Op::U32Assert]); diff --git a/tests/integration/expected/abi_transform_tx_kernel_get_inputs.masm b/tests/integration/expected/abi_transform_tx_kernel_get_inputs.masm index f8e21b8c..3ad305b7 100644 --- a/tests/integration/expected/abi_transform_tx_kernel_get_inputs.masm +++ b/tests/integration/expected/abi_transform_tx_kernel_get_inputs.masm @@ -46,7 +46,7 @@ export."wee_alloc::neighbors::Neighbors::remove" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw push.2 dup.1 swap.1 @@ -69,7 +69,7 @@ export."wee_alloc::neighbors::Neighbors::remove" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw push.4294967292 dup.1 swap.1 @@ -97,7 +97,7 @@ export."wee_alloc::neighbors::Neighbors::remove" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw push.3 u32and swap.1 @@ -116,7 +116,7 @@ export."wee_alloc::neighbors::Neighbors::remove" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw else swap.1 drop @@ -134,7 +134,7 @@ export."wee_alloc::neighbors::Neighbors::remove" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw push.3 u32and dup.3 @@ -151,7 +151,7 @@ export."wee_alloc::neighbors::Neighbors::remove" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw dup.2 dup.0 push.2147483648 @@ -168,7 +168,7 @@ export."wee_alloc::neighbors::Neighbors::remove" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw push.3 u32and movup.3 @@ -187,7 +187,7 @@ export."wee_alloc::neighbors::Neighbors::remove" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw dup.0 dup.0 push.2147483648 @@ -202,7 +202,7 @@ export."wee_alloc::neighbors::Neighbors::remove" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw push.3 u32and push.4294967292 @@ -224,7 +224,7 @@ export."wee_alloc::neighbors::Neighbors::remove" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw end else push.4294967292 @@ -252,7 +252,7 @@ export."wee_alloc::neighbors::Neighbors::remove" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw push.4294967292 dup.1 swap.1 @@ -280,7 +280,7 @@ export."wee_alloc::neighbors::Neighbors::remove" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw push.3 u32and swap.1 @@ -299,7 +299,7 @@ export."wee_alloc::neighbors::Neighbors::remove" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw else swap.1 drop @@ -317,7 +317,7 @@ export."wee_alloc::neighbors::Neighbors::remove" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw push.3 u32and dup.3 @@ -334,7 +334,7 @@ export."wee_alloc::neighbors::Neighbors::remove" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw dup.2 dup.0 push.2147483648 @@ -351,7 +351,7 @@ export."wee_alloc::neighbors::Neighbors::remove" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw push.3 u32and movup.3 @@ -370,7 +370,7 @@ export."wee_alloc::neighbors::Neighbors::remove" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw dup.0 dup.0 push.2147483648 @@ -385,7 +385,7 @@ export."wee_alloc::neighbors::Neighbors::remove" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw push.3 u32and push.4294967292 @@ -407,7 +407,7 @@ export."wee_alloc::neighbors::Neighbors::remove" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw end else swap.1 @@ -426,7 +426,7 @@ export."wee_alloc::neighbors::Neighbors::remove" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw dup.1 dup.0 push.2147483648 @@ -443,7 +443,7 @@ export."wee_alloc::neighbors::Neighbors::remove" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw push.3 u32and dup.3 @@ -462,7 +462,7 @@ export."wee_alloc::neighbors::Neighbors::remove" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw push.4294967292 u32and u32or @@ -482,7 +482,7 @@ export."wee_alloc::neighbors::Neighbors::remove" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw dup.1 dup.0 push.2147483648 @@ -499,7 +499,7 @@ export."wee_alloc::neighbors::Neighbors::remove" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw push.4294967292 dup.1 swap.1 @@ -527,7 +527,7 @@ export."wee_alloc::neighbors::Neighbors::remove" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw push.3 u32and swap.1 @@ -546,7 +546,7 @@ export."wee_alloc::neighbors::Neighbors::remove" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw else swap.1 drop @@ -564,7 +564,7 @@ export."wee_alloc::neighbors::Neighbors::remove" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw push.3 u32and dup.3 @@ -581,7 +581,7 @@ export."wee_alloc::neighbors::Neighbors::remove" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw dup.2 dup.0 push.2147483648 @@ -598,7 +598,7 @@ export."wee_alloc::neighbors::Neighbors::remove" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw push.3 u32and movup.3 @@ -617,7 +617,7 @@ export."wee_alloc::neighbors::Neighbors::remove" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw dup.0 dup.0 push.2147483648 @@ -632,7 +632,7 @@ export."wee_alloc::neighbors::Neighbors::remove" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw push.3 u32and push.4294967292 @@ -654,7 +654,7 @@ export."wee_alloc::neighbors::Neighbors::remove" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw end end end @@ -715,7 +715,7 @@ export."::new_cell_for_fr u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw movup.2 dup.0 push.2147483648 @@ -734,7 +734,7 @@ export."::new_cell_for_fr u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw push.4294901760 movup.2 swap.1 @@ -758,7 +758,7 @@ export."::new_cell_for_fr u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw push.0.0 movup.2 dup.0 @@ -776,7 +776,7 @@ export."::new_cell_for_fr u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_dw + exec.::intrinsics::mem::store_dw else drop drop @@ -797,7 +797,7 @@ export."::new_cell_for_fr u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw push.0 swap.1 dup.0 @@ -815,7 +815,7 @@ export."::new_cell_for_fr u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw end end @@ -847,7 +847,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw movup.4 swap.5 movdn.4 @@ -875,7 +875,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw push.1 dup.1 swap.1 @@ -902,7 +902,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw dup.0 dup.0 push.2147483648 @@ -919,7 +919,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw push.4294967292 u32and dup.0 @@ -942,7 +942,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw push.128 u32and push.1 @@ -963,7 +963,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw push.128 u32and push.2 @@ -987,7 +987,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw dup.0 dup.0 push.2147483648 @@ -1004,7 +1004,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw push.1 dup.1 swap.1 @@ -1028,7 +1028,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw dup.0 dup.0 push.2147483648 @@ -1043,7 +1043,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw push.2 u32or dup.1 @@ -1060,7 +1060,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw dup.0 dup.0 push.2147483648 @@ -1077,7 +1077,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw push.1 dup.1 swap.1 @@ -1104,7 +1104,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw push.128 u32and push.2 @@ -1128,7 +1128,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw dup.0 dup.0 push.2147483648 @@ -1145,7 +1145,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw push.1 dup.1 swap.1 @@ -1169,7 +1169,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw dup.0 dup.0 push.2147483648 @@ -1184,7 +1184,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw push.2 u32or dup.1 @@ -1201,7 +1201,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw dup.0 dup.0 push.2147483648 @@ -1218,7 +1218,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw push.1 dup.1 swap.1 @@ -1242,7 +1242,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw push.4294967292 u32and push.8 @@ -1288,7 +1288,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw dup.0 eq.0 neq.0 @@ -1353,7 +1353,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw push.4294967292 u32and dup.1 @@ -1370,7 +1370,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw push.0.0 dup.2 dup.0 @@ -1386,7 +1386,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_dw + exec.::intrinsics::mem::store_dw push.0 movup.2 dup.0 @@ -1402,7 +1402,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw push.0 dup.2 dup.0 @@ -1418,7 +1418,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw push.2 dup.1 swap.1 @@ -1440,7 +1440,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw push.3 dup.1 swap.1 @@ -1463,7 +1463,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw dup.4 dup.0 push.2147483648 @@ -1480,7 +1480,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw push.4294967294 u32and dup.5 @@ -1499,7 +1499,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw dup.4 swap.1 swap.3 @@ -1521,7 +1521,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw push.2 u32and neq.0 @@ -1540,7 +1540,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw push.2 u32or push.1 @@ -1559,7 +1559,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw push.4294967293 u32and movup.2 @@ -1576,7 +1576,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw push.8 u32wrapping_add else @@ -1597,7 +1597,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw push.1 u32or dup.1 @@ -1614,7 +1614,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw push.8 u32wrapping_add end @@ -1640,7 +1640,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw push.3 dup.1 swap.1 @@ -1663,7 +1663,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw dup.4 dup.0 push.2147483648 @@ -1680,7 +1680,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw push.4294967294 u32and dup.5 @@ -1699,7 +1699,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw dup.4 swap.1 swap.3 @@ -1721,7 +1721,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw push.2 u32and neq.0 @@ -1740,7 +1740,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw push.2 u32or push.1 @@ -1759,7 +1759,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw push.4294967293 u32and movup.2 @@ -1776,7 +1776,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw push.8 u32wrapping_add else @@ -1797,7 +1797,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw push.1 u32or dup.1 @@ -1814,7 +1814,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw push.8 u32wrapping_add end @@ -1835,7 +1835,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw push.3 dup.1 swap.1 @@ -1858,7 +1858,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw dup.4 dup.0 push.2147483648 @@ -1875,7 +1875,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw push.4294967294 u32and dup.5 @@ -1894,7 +1894,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw dup.3 dup.0 push.2147483648 @@ -1911,7 +1911,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw push.3 u32and dup.5 @@ -1932,7 +1932,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw dup.2 dup.0 push.2147483648 @@ -1949,7 +1949,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw push.3 u32and dup.4 @@ -1970,7 +1970,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw push.2 movup.2 swap.1 @@ -1991,7 +1991,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw push.2 u32or push.1 @@ -2010,7 +2010,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw push.4294967293 u32and movup.2 @@ -2027,7 +2027,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw push.8 u32wrapping_add else @@ -2048,7 +2048,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw push.1 u32or dup.1 @@ -2065,7 +2065,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw push.8 u32wrapping_add end @@ -2096,7 +2096,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw dup.0 eq.0 neq.0 @@ -2125,7 +2125,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw push.1 u32or dup.2 @@ -2142,7 +2142,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw push.4294967292 u32and movup.2 @@ -2159,7 +2159,7 @@ export."wee_alloc::alloc_first_fit" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw push.8 u32wrapping_add push.0 @@ -2206,7 +2206,7 @@ export."::alloc" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw dup.3 eq.0 neq.0 @@ -2227,7 +2227,7 @@ export."::alloc" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw else dup.2 dup.0 @@ -2243,7 +2243,7 @@ export."::alloc" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw dup.1 dup.0 push.2147483648 @@ -2260,7 +2260,7 @@ export."::alloc" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw push.12 dup.1 swap.1 @@ -2317,7 +2317,7 @@ export."::alloc" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw eq.0 neq.0 if.true @@ -2337,7 +2337,7 @@ export."::alloc" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw dup.2 dup.0 push.2147483648 @@ -2354,7 +2354,7 @@ export."::alloc" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw movup.5 dup.0 push.2147483648 @@ -2369,7 +2369,7 @@ export."::alloc" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw dup.2 dup.0 push.2147483648 @@ -2388,7 +2388,7 @@ export."::alloc" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw dup.2 dup.0 push.2147483648 @@ -2405,7 +2405,7 @@ export."::alloc" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw swap.1 dup.0 push.2147483648 @@ -2422,7 +2422,7 @@ export."::alloc" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw push.12 dup.2 swap.1 @@ -2446,7 +2446,7 @@ export."::alloc" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw else drop push.16 @@ -2459,7 +2459,7 @@ export."::alloc" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw push.0 end else @@ -2479,7 +2479,7 @@ export."::alloc" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw dup.0 push.2147483648 u32and @@ -2495,7 +2495,7 @@ export."::alloc" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw swap.1 dup.0 push.2147483648 @@ -2510,7 +2510,7 @@ export."::alloc" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw push.0 end else @@ -2530,7 +2530,7 @@ export."::alloc" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw dup.0 push.2147483648 u32and @@ -2546,7 +2546,7 @@ export."::alloc" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw movup.2 dup.0 push.2147483648 @@ -2561,7 +2561,7 @@ export."::alloc" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw end end end @@ -2587,7 +2587,7 @@ export."miden_tx_kernel_sys::get_inputs" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw dup.1 dup.0 push.2147483648 @@ -2604,7 +2604,7 @@ export."miden_tx_kernel_sys::get_inputs" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw push.0 push.256 push.4 @@ -2622,7 +2622,7 @@ export."miden_tx_kernel_sys::get_inputs" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw dup.2 dup.0 push.2147483648 @@ -2639,7 +2639,7 @@ export."miden_tx_kernel_sys::get_inputs" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::load_sw + exec.::intrinsics::mem::load_sw eq.0 neq.0 if.true @@ -2657,7 +2657,7 @@ export."miden_tx_kernel_sys::get_inputs" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw dup.4 dup.0 push.2147483648 @@ -2674,7 +2674,7 @@ export."miden_tx_kernel_sys::get_inputs" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw dup.3 dup.0 push.2147483648 @@ -2693,7 +2693,7 @@ export."miden_tx_kernel_sys::get_inputs" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw push.0 movup.3 dup.0 @@ -2711,7 +2711,7 @@ export."miden_tx_kernel_sys::get_inputs" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw dropw dropw else @@ -2787,7 +2787,7 @@ export."alloc::raw_vec::RawVec::try_allocate_in" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw push.8 dup.2 dup.0 @@ -2805,7 +2805,7 @@ export."alloc::raw_vec::RawVec::try_allocate_in" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw swap.1 dup.0 push.2147483648 @@ -2822,7 +2822,7 @@ export."alloc::raw_vec::RawVec::try_allocate_in" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw else swap.1 drop @@ -2841,7 +2841,7 @@ export."alloc::raw_vec::RawVec::try_allocate_in" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw dup.1 dup.0 push.2147483648 @@ -2860,7 +2860,7 @@ export."alloc::raw_vec::RawVec::try_allocate_in" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw swap.1 dup.0 push.2147483648 @@ -2877,7 +2877,7 @@ export."alloc::raw_vec::RawVec::try_allocate_in" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw end else push.8 @@ -2906,7 +2906,7 @@ export."alloc::raw_vec::RawVec::try_allocate_in" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw push.8 dup.2 dup.0 @@ -2924,7 +2924,7 @@ export."alloc::raw_vec::RawVec::try_allocate_in" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw swap.1 dup.0 push.2147483648 @@ -2941,7 +2941,7 @@ export."alloc::raw_vec::RawVec::try_allocate_in" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw else swap.1 drop @@ -2960,7 +2960,7 @@ export."alloc::raw_vec::RawVec::try_allocate_in" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw dup.1 dup.0 push.2147483648 @@ -2979,7 +2979,7 @@ export."alloc::raw_vec::RawVec::try_allocate_in" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw swap.1 dup.0 push.2147483648 @@ -2996,7 +2996,7 @@ export."alloc::raw_vec::RawVec::try_allocate_in" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw end end else @@ -3018,7 +3018,7 @@ export."alloc::raw_vec::RawVec::try_allocate_in" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw push.0 swap.1 dup.0 @@ -3036,7 +3036,7 @@ export."alloc::raw_vec::RawVec::try_allocate_in" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw end else movdn.2 @@ -3057,7 +3057,7 @@ export."alloc::raw_vec::RawVec::try_allocate_in" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_sw + exec.::intrinsics::mem::store_sw push.8.0 movup.2 dup.0 @@ -3075,7 +3075,7 @@ export."alloc::raw_vec::RawVec::try_allocate_in" u32div.4 movup.2 u32div.16 - exec.intrinsics::mem::store_dw + exec.::intrinsics::mem::store_dw end end diff --git a/tests/integration/src/rust_masm_tests/abi_transform/tx_kernel.rs b/tests/integration/src/rust_masm_tests/abi_transform/tx_kernel.rs index 6f225820..b2360dba 100644 --- a/tests/integration/src/rust_masm_tests/abi_transform/tx_kernel.rs +++ b/tests/integration/src/rust_masm_tests/abi_transform/tx_kernel.rs @@ -12,7 +12,26 @@ fn setup_log() { .try_init(); } -#[ignore = "until https://github.com/0xPolygonMiden/compiler/issues/207 is resolved"] +#[test] +fn test_get_inputs_masm_assembly() { + // setup_log(); + let main_fn = "() -> Vec { get_inputs() }"; + let artifact_name = "abi_transform_tx_kernel_get_inputs"; + let mut test = CompilerTest::rust_fn_body_with_sdk(artifact_name, main_fn, true); + // Test expected compilation artifacts + test.expect_wasm(expect_file![format!("../../../expected/{artifact_name}.wat")]); + test.expect_ir(expect_file![format!("../../../expected/{artifact_name}.hir")]); + test.expect_masm(expect_file![format!("../../../expected/{artifact_name}.masm")]); + + let assembly_res = test.compile_wasm_to_masm_program().0; + assert!(assembly_res.is_err()); + // until `miden::note.get_inputs` code injection is implemented lets just check that the masm + // assembly goes all the way to its resolution + let expected_error_msg = "undefined module 'miden::note'"; + assert_eq!(expected_error_msg, assembly_res.unwrap_err().to_string()); +} + +#[ignore = "until `miden::note.get_inputs` code injection is implemented"] #[test] fn test_get_inputs() { // setup_log(); diff --git a/tests/rust-apps-wasm/fib/Cargo.lock b/tests/rust-apps-wasm/fib/Cargo.lock index f5791d91..bc2f3262 100644 --- a/tests/rust-apps-wasm/fib/Cargo.lock +++ b/tests/rust-apps-wasm/fib/Cargo.lock @@ -19,11 +19,11 @@ checksum = "a08173bc88b7955d1b3145aa561539096c421ac8debde8cbc3612ec635fee29b" [[package]] name = "miden-integration-tests-rust-fib" -version = "0.1.0" +version = "0.0.0" [[package]] name = "miden-integration-tests-rust-fib-wasm" -version = "0.1.0" +version = "0.0.0" dependencies = [ "dlmalloc", "miden-integration-tests-rust-fib", diff --git a/tests/rust-apps-wasm/rust-sdk/account-test/Cargo.lock b/tests/rust-apps-wasm/rust-sdk/account-test/Cargo.lock index b1c398ea..1c0deedb 100644 --- a/tests/rust-apps-wasm/rust-sdk/account-test/Cargo.lock +++ b/tests/rust-apps-wasm/rust-sdk/account-test/Cargo.lock @@ -22,7 +22,7 @@ checksum = "8452105ba047068f40ff7093dd1d9da90898e63dd61736462e9cdda6a90ad3c3" [[package]] name = "miden-sdk" -version = "0.1.0" +version = "0.0.0" dependencies = [ "miden-stdlib-sys", "miden-tx-kernel-sys", @@ -38,11 +38,11 @@ dependencies = [ [[package]] name = "miden-stdlib-sys" -version = "0.1.0" +version = "0.0.0" [[package]] name = "miden-tx-kernel-sys" -version = "0.1.0" +version = "0.0.0" dependencies = [ "miden-stdlib-sys", ] diff --git a/tests/rust-apps-wasm/wit-sdk/basic-wallet/Cargo.lock b/tests/rust-apps-wasm/wit-sdk/basic-wallet/Cargo.lock index 5d20bff2..dcc21871 100644 --- a/tests/rust-apps-wasm/wit-sdk/basic-wallet/Cargo.lock +++ b/tests/rust-apps-wasm/wit-sdk/basic-wallet/Cargo.lock @@ -4,7 +4,7 @@ version = 3 [[package]] name = "basic-wallet" -version = "0.1.0" +version = "0.0.0" dependencies = [ "wee_alloc", "wit-bindgen", diff --git a/tests/rust-apps-wasm/wit-sdk/p2id-note/Cargo.lock b/tests/rust-apps-wasm/wit-sdk/p2id-note/Cargo.lock index 989db9e2..b44ec7e7 100644 --- a/tests/rust-apps-wasm/wit-sdk/p2id-note/Cargo.lock +++ b/tests/rust-apps-wasm/wit-sdk/p2id-note/Cargo.lock @@ -4,7 +4,7 @@ version = 3 [[package]] name = "basic-wallet-p2id-note" -version = "0.1.0" +version = "0.0.0" dependencies = [ "wee_alloc", "wit-bindgen", diff --git a/tests/rust-apps-wasm/wit-sdk/sdk/Cargo.lock b/tests/rust-apps-wasm/wit-sdk/sdk/Cargo.lock index 8d3c1ab1..d7955e46 100644 --- a/tests/rust-apps-wasm/wit-sdk/sdk/Cargo.lock +++ b/tests/rust-apps-wasm/wit-sdk/sdk/Cargo.lock @@ -28,7 +28,7 @@ checksum = "8452105ba047068f40ff7093dd1d9da90898e63dd61736462e9cdda6a90ad3c3" [[package]] name = "miden-sdk" -version = "0.1.0" +version = "0.0.0" dependencies = [ "wee_alloc", "wit-bindgen", From 4c9819b4e10904cbd72b89845b6b578ab18c2ee0 Mon Sep 17 00:00:00 2001 From: Denys Zadorozhnyi Date: Thu, 27 Jun 2024 08:40:35 +0300 Subject: [PATCH 2/3] test: workaround for calling the absolute path functions in the emulator --- codegen/masm/src/emulator/mod.rs | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/codegen/masm/src/emulator/mod.rs b/codegen/masm/src/emulator/mod.rs index 5f626ec4..42cdb574 100644 --- a/codegen/masm/src/emulator/mod.rs +++ b/codegen/masm/src/emulator/mod.rs @@ -6,7 +6,9 @@ mod functions; use std::{cell::RefCell, cmp, rc::Rc, sync::Arc}; use miden_assembly::{ast::ProcedureName, LibraryNamespace}; -use midenc_hir::{assert_matches, Felt, FieldElement, FunctionIdent, Ident, OperandStack, Stack}; +use midenc_hir::{ + assert_matches, Felt, FieldElement, FunctionIdent, Ident, OperandStack, Stack, Symbol, +}; use rustc_hash::{FxHashMap, FxHashSet}; use self::functions::{Activation, Stub}; @@ -1547,6 +1549,19 @@ impl Emulator { return Ok(EmulatorEvent::EnterLoop(body_blk)); } Op::Exec(callee) => { + // remove the `::` prefix (absolute path) if any from the + // callee.module + let callee = if callee.module.as_str().starts_with("::") { + FunctionIdent { + module: Ident::with_empty_span(Symbol::intern( + &callee.module.as_str()[2..], + )), + function: callee.function, + } + } else { + callee + }; + dbg!(&callee); let fun = self .functions .get(&callee) From 77aa3acd30dd86048b13597a0a6ca1a652dc141d Mon Sep 17 00:00:00 2001 From: Denys Zadorozhnyi Date: Wed, 3 Jul 2024 12:46:11 +0300 Subject: [PATCH 3/3] update VM to the commit in next branch after the merge --- Cargo.lock | 10 +++++----- Cargo.toml | 10 +++++----- codegen/masm/src/emulator/mod.rs | 1 - 3 files changed, 10 insertions(+), 11 deletions(-) diff --git a/Cargo.lock b/Cargo.lock index 43937903..22ac5441 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -2614,7 +2614,7 @@ dependencies = [ [[package]] name = "miden-air" version = "0.9.2" -source = "git+https://github.com/0xPolygonMiden/miden-vm?rev=49a92a2eddeea7296525ce5ed366ec1d667ac2b6#49a92a2eddeea7296525ce5ed366ec1d667ac2b6" +source = "git+https://github.com/0xPolygonMiden/miden-vm?rev=2da11ad0a975d2e5d6a2582871f0c89b820b3ffa#2da11ad0a975d2e5d6a2582871f0c89b820b3ffa" dependencies = [ "miden-core", "winter-air", @@ -2624,7 +2624,7 @@ dependencies = [ [[package]] name = "miden-assembly" version = "0.9.2" -source = "git+https://github.com/0xPolygonMiden/miden-vm?rev=49a92a2eddeea7296525ce5ed366ec1d667ac2b6#49a92a2eddeea7296525ce5ed366ec1d667ac2b6" +source = "git+https://github.com/0xPolygonMiden/miden-vm?rev=2da11ad0a975d2e5d6a2582871f0c89b820b3ffa#2da11ad0a975d2e5d6a2582871f0c89b820b3ffa" dependencies = [ "aho-corasick", "lalrpop", @@ -2641,7 +2641,7 @@ dependencies = [ [[package]] name = "miden-core" version = "0.9.1" -source = "git+https://github.com/0xPolygonMiden/miden-vm?rev=49a92a2eddeea7296525ce5ed366ec1d667ac2b6#49a92a2eddeea7296525ce5ed366ec1d667ac2b6" +source = "git+https://github.com/0xPolygonMiden/miden-vm?rev=2da11ad0a975d2e5d6a2582871f0c89b820b3ffa#2da11ad0a975d2e5d6a2582871f0c89b820b3ffa" dependencies = [ "miden-crypto", "miden-formatting", @@ -2755,7 +2755,7 @@ dependencies = [ [[package]] name = "miden-processor" version = "0.9.2" -source = "git+https://github.com/0xPolygonMiden/miden-vm?rev=49a92a2eddeea7296525ce5ed366ec1d667ac2b6#49a92a2eddeea7296525ce5ed366ec1d667ac2b6" +source = "git+https://github.com/0xPolygonMiden/miden-vm?rev=2da11ad0a975d2e5d6a2582871f0c89b820b3ffa#2da11ad0a975d2e5d6a2582871f0c89b820b3ffa" dependencies = [ "miden-air", "miden-core", @@ -2766,7 +2766,7 @@ dependencies = [ [[package]] name = "miden-stdlib" version = "0.9.2" -source = "git+https://github.com/0xPolygonMiden/miden-vm?rev=49a92a2eddeea7296525ce5ed366ec1d667ac2b6#49a92a2eddeea7296525ce5ed366ec1d667ac2b6" +source = "git+https://github.com/0xPolygonMiden/miden-vm?rev=2da11ad0a975d2e5d6a2582871f0c89b820b3ffa#2da11ad0a975d2e5d6a2582871f0c89b820b3ffa" dependencies = [ "miden-assembly", ] diff --git a/Cargo.toml b/Cargo.toml index 6d23c15c..e333030e 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -64,12 +64,12 @@ thiserror = { version = "1.0", git = "https://github.com/bitwalker/thiserror", b toml = { version = "0.5", features = ["preserve_order"] } derive_more = "0.99" indexmap = "2.1" -# 49a92a2eddeea7296525ce5ed366ec1d667ac2b6 is the latest commit in 'next' that includes +# 2da11ad0a975d2e5d6a2582871f0c89b820b3ffa is the latest commit in 'next' that includes # the absolute paths support -miden-assembly = { git = "https://github.com/0xPolygonMiden/miden-vm", rev = "49a92a2eddeea7296525ce5ed366ec1d667ac2b6" } -miden-core = { git = "https://github.com/0xPolygonMiden/miden-vm", rev = "49a92a2eddeea7296525ce5ed366ec1d667ac2b6" } -miden-processor = { git = "https://github.com/0xPolygonMiden/miden-vm", rev = "49a92a2eddeea7296525ce5ed366ec1d667ac2b6" } -miden-stdlib = { git = "https://github.com/0xPolygonMiden/miden-vm", rev = "49a92a2eddeea7296525ce5ed366ec1d667ac2b6" } +miden-assembly = { git = "https://github.com/0xPolygonMiden/miden-vm", rev = "2da11ad0a975d2e5d6a2582871f0c89b820b3ffa" } +miden-core = { git = "https://github.com/0xPolygonMiden/miden-vm", rev = "2da11ad0a975d2e5d6a2582871f0c89b820b3ffa" } +miden-processor = { git = "https://github.com/0xPolygonMiden/miden-vm", rev = "2da11ad0a975d2e5d6a2582871f0c89b820b3ffa" } +miden-stdlib = { git = "https://github.com/0xPolygonMiden/miden-vm", rev = "2da11ad0a975d2e5d6a2582871f0c89b820b3ffa" } midenc-codegen-masm = { path = "codegen/masm" } miden-diagnostics = "0.1" midenc-hir = { path = "hir" } diff --git a/codegen/masm/src/emulator/mod.rs b/codegen/masm/src/emulator/mod.rs index 42cdb574..bdca4952 100644 --- a/codegen/masm/src/emulator/mod.rs +++ b/codegen/masm/src/emulator/mod.rs @@ -1561,7 +1561,6 @@ impl Emulator { } else { callee }; - dbg!(&callee); let fun = self .functions .get(&callee)