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    (title "Top Sheet")
    (date "2023-12-21")
    (rev "1.00")
    (company "ApotheoTech LLC")
    (comment 1 "SCH: APT-KRIA-FMC")
    (comment 2 "Author: Chance Reimer")
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  (text "New Note: Looks like on Kria board they put 1.8V LVDS signal to the input pins of FPGA\nHPC side even if it isn't right standard. Use the programmable for HPC where 1.8V will \nsupport LVDS 1.8V, and we'll just use the 200MHz for HPB, which will be at 1.2V"
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  (text "Must power TCA to 1.8V so all Highs are Recorded\n(Mix of 1.8V and 3.3V)"
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  (text "Page 27 of DS987\nRefers that MIO banks are fixed at 1.8V,\nMIO banks are supplied by Kria SOM"
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  (text "Added DNP in case we run into part shortages" (at 286.131 269.875 0)
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