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Is your feature request essential for your project?
Describe the workflow you want to enable
I wish we had one or more algorithms which would take information about a Grid (and profiles?) and produce a spatial mapping which will feed #92 to develop Switch inputs, and potential feed an output processing step to 'un-reduce' the Grid.
This is the spatial analog to #60, which produces temporal mapping.
Describe your proposed implementation
Algorithm TBD. We could start by reducing our nodal network to a zonal one using our pre-defined Grid zones, or by using user-supplied zones, or by generating a user-supplied number of zones using some sort of heuristic.
Mapping plants and buses to a zone will be fairly simple, mapping transmission capacity will be tougher.
Describe alternatives you've considered, if relevant
In the interim, we can manually or semi-manually create these mappings, and test their performance, once we have #92.
Additional context
This is probably a v0.3 or beyond task, but I wanted to get an issue started to collect discussion on high-level design (e.g. data structures for inputs & outputs).
The text was updated successfully, but these errors were encountered:
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Describe the workflow you want to enable
I wish we had one or more algorithms which would take information about a Grid (and profiles?) and produce a spatial mapping which will feed #92 to develop Switch inputs, and potential feed an output processing step to 'un-reduce' the Grid.
This is the spatial analog to #60, which produces temporal mapping.
Describe your proposed implementation
Algorithm TBD. We could start by reducing our nodal network to a zonal one using our pre-defined Grid zones, or by using user-supplied zones, or by generating a user-supplied number of zones using some sort of heuristic.
Mapping plants and buses to a zone will be fairly simple, mapping transmission capacity will be tougher.
Describe alternatives you've considered, if relevant
In the interim, we can manually or semi-manually create these mappings, and test their performance, once we have #92.
Additional context
This is probably a
v0.3
or beyond task, but I wanted to get an issue started to collect discussion on high-level design (e.g. data structures for inputs & outputs).The text was updated successfully, but these errors were encountered: