Using a Custom FemtoRV Device Implementation with a LiteX Generated Version of FemtoRV

[JamesTimothyMeech]

I created a custom ADC peripheral for FemtoRV based off of the other peripherals in the DEVICES folder.

I then wrote some C code (which I want to use to interact with my custom peripheral) that I am running over LiteOs on a LiteX generated instance of FemtoRV Gracilis. Taking a look at the FemtoRV code that LiteX uses here: https://github.com/enjoy-digital/litex/blob/master/litex/soc/cores/cpu/femtorv/core.py it only pulls in the core and not the verilog which describes the peripherals in the DEVICES folder.

If I also want my peripheral in the DEVICES folder to be put into the LiteX generated instance of FemtoRV Gracilis. Would it be best to paste the femtosoc.v file and all of the relevant files I want it to include into the directory where I run the LiteX command to build the system on chip?

I would leave out the files for the SD card, SPI flash and other verilog files as LiteX is handling the SD card and flash.

Does this sound like a sensible approach for getting my custom design up and running?

Or should I try to copy the way LiteX implements peripherals such as DRAM and include my ADC peripheral in the same way that LiteX includes DRAM as a peripheral?

I am asking this question here because I believe that if I take the wrong approach I could burn a lot of time getting my design running and I am keen to get some advice on the most sensible approach.

[BrunoLevy]

Hi,
Super happy that it works !
If you want to integrate it in LiteX, I think the best way of doing it is respecting the LiteX way (that is, core.py only pulls the processor, and devices are implemented elsewhere). Then you can write an Amaranth class that inherits the class that you are using and insert your stuff there. This is what I'm doing here. To write your ADC control logic, you can either write it in VERILOG and glue it to Amaranth (as it is done in core.py for FemtoRV), or you can write everything in Amaranth. LiteX has a lot of helper classes. In particular, it can generate CSRs (not to be comfused with Risc-V CSR, it is a different things). These CSR are special addresses mapped in memory that correspond to the devices. In addition, LiteX generates header files and macros to access these CSRs, very convenient. For instance, you can have such a CSR for reading the value sampled by your ADC.

[JamesTimothyMeech]

Thanks for the tips so far! I have tried this: orangecrab-fpga/production-test-sw#2 (comment) and got the ADC related code into the csr.h file. Unfortunately in the process I broke the SPI SD card functionality. What is the most sensible way to debug this?

[JamesTimothyMeech]

I have tried to get around my problem by switching to the Arty which has an ADC hardware block that LiteX supports

[BrunoLevy]

It is probably the same problem here as your other message: each time you change the SOC, you need to recompile all the software as well (boot.bin and all your programs). Do not forget to make clean before, to make sure than no old .o file remains. Also, make sure that LITEX_PLATFORM is correct in makefile.inc.