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Hi,
According to FDS hardware ,it reads and writes data through only one wire,it converts one byte of parallel data into 1-bit serial data during each transmission(It looks like this),
I want to create a cloned version of an FDS RAM adapter using CPLD,I searched for relevant information online,but there was no result. I also reviewed the source code of simulators such as fceux and mesen,but the simulator ignored the detailed information of the hardware part,so I would like to know more detailed information about this section,Can you help me provide more detailed information
(The source code of the fdskey project contains relevant information, but I don't quite understand it,It seems that DMA and Timer were used)
Thank you.
The text was updated successfully, but these errors were encountered:
Hi,
According to FDS hardware ,it reads and writes data through only one wire,it converts one byte of parallel data into 1-bit serial data during each transmission(It looks like this),
I want to create a cloned version of an FDS RAM adapter using CPLD,I searched for relevant information online,but there was no result. I also reviewed the source code of simulators such as fceux and mesen,but the simulator ignored the detailed information of the hardware part,so I would like to know more detailed information about this section,Can you help me provide more detailed information
(The source code of the fdskey project contains relevant information, but I don't quite understand it,It seems that DMA and Timer were used)
Thank you.
The text was updated successfully, but these errors were encountered: