diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index dfea63a9707a..f9026830bb05 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -255,10 +255,13 @@ jobs: wget --no-verbose -O gcc-arm.zip https://developer.arm.com/-/media/Files/downloads/gnu/13.2.rel1/binrel/arm-gnu-toolchain-13.2.rel1-mingw-w64-i686-arm-none-eabi.zip unzip -q -d /tmp gcc-arm.zip tar -C /tmp/arm-gnu-toolchain* -cf - . | tar -C /usr/local -xf - - pip install wheel - # requirements_dev.txt doesn't install on windows. (with msys2 python) + # We could use a venv instead, but that requires entering the venv on each run step + # that runs in its own shell. There are some actions that help with that, but not for msys2 + # that I can find. (dhalbert) + pip install --break-system-packages wheel + # requirements-dev.txt doesn't install on windows. (with msys2 python) # instead, pick a subset for what we want to do - pip install cascadetoml jinja2 typer click intelhex + pip install --break-system-packages cascadetoml jinja2 typer click intelhex # check that installed packages work....? which python; python --version; python -c "import cascadetoml" which python3; python3 --version; python3 -c "import cascadetoml" diff --git a/.gitmodules b/.gitmodules index 1c523aa76d53..f8ad481cba13 100644 --- a/.gitmodules +++ b/.gitmodules @@ -68,8 +68,8 @@ url = https://github.com/adafruit/nrfx.git [submodule "lib/tinyusb"] path = lib/tinyusb - url = https://github.com/hathach/tinyusb.git - branch = master + url = https://github.com/tannewt/tinyusb.git + branch = esp_fix fetchRecurseSubmodules = false [submodule "tools/huffman"] path = tools/huffman @@ -344,8 +344,8 @@ url = https://github.com/adafruit/Adafruit_CircuitPython_Wave.git [submodule "ports/raspberrypi/lib/Pico-PIO-USB"] path = ports/raspberrypi/lib/Pico-PIO-USB - url = https://github.com/sekigon-gonnoc/Pico-PIO-USB.git - branch = main + url = https://github.com/adafruit/Pico-PIO-USB.git + branch = sdk2_fix [submodule "lib/micropython-lib"] path = lib/micropython-lib url = https://github.com/micropython/micropython-lib.git diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml index dc8382f2205f..e74785aaf444 100644 --- a/.pre-commit-config.yaml +++ b/.pre-commit-config.yaml @@ -8,9 +8,9 @@ repos: hooks: - id: check-yaml - id: end-of-file-fixer - exclude: '^(tests/.*\.exp|tests/cmdline/.*|tests/.*/data/.*)' + exclude: '^(tests/.*\.exp|tests/cmdline/.*|tests/.*/data/.*|ports/raspberrypi/sdk|lib/tinyusb)' - id: trailing-whitespace - exclude: '^(tests/.*\.exp|tests/cmdline/.*|tests/.*/data/.*|lib/mbedtls_errors/generate_errors.diff)' + exclude: '^(tests/.*\.exp|tests/cmdline/.*|tests/.*/data/.*|lib/mbedtls_errors/generate_errors.diff|ports/raspberrypi/sdk|lib/tinyusb)' - repo: https://github.com/codespell-project/codespell rev: v2.2.4 hooks: @@ -22,7 +22,8 @@ repos: lib/| tests/unicode/data/utf-8_invalid.txt| tests/extmod/data/qr.pgm| - tests/basics/bytearray_byte_operations.py + tests/basics/bytearray_byte_operations.py| + ports/raspberrypi/sdk ) - repo: local hooks: @@ -37,3 +38,8 @@ repos: entry: python3 tools/codeformat.py types_or: [c, python] language: system + exclude: | + (?x)^( + lib/tinyusb| + ports/raspberrypi/sdk + ) diff --git a/lib/tinyusb b/lib/tinyusb index ccc7a36043e0..00eb0144cbb1 160000 --- a/lib/tinyusb +++ b/lib/tinyusb @@ -1 +1 @@ -Subproject commit ccc7a36043e055ded1f478a979a303e694123187 +Subproject commit 00eb0144cbb11d1c37dcce5cd8ba8afe10e1b6b5 diff --git a/lib/tlsf b/lib/tlsf index 875a162884b5..108a2a7dfcea 160000 --- a/lib/tlsf +++ b/lib/tlsf @@ -1 +1 @@ -Subproject commit 875a162884b5cd3f56ddf9ce33563620687d7335 +Subproject commit 108a2a7dfcea72006f74aa69128fcb3bd64d9634 diff --git a/locale/circuitpython.pot b/locale/circuitpython.pot index ed8975e5c0b8..e7a54e2d3cca 100644 --- a/locale/circuitpython.pot +++ b/locale/circuitpython.pot @@ -109,7 +109,8 @@ msgstr "" #: ports/espressif/common-hal/espulp/ULP.c #: ports/mimxrt10xx/common-hal/audiobusio/__init__.c #: ports/mimxrt10xx/common-hal/usb_host/Port.c -#: ports/raspberrypi/common-hal/picodvi/Framebuffer.c +#: ports/raspberrypi/common-hal/picodvi/Framebuffer_RP2040.c +#: ports/raspberrypi/common-hal/picodvi/Framebuffer_RP2350.c #: ports/raspberrypi/common-hal/rp2pio/StateMachine.c #: ports/raspberrypi/common-hal/usb_host/Port.c #: shared-bindings/digitalio/DigitalInOut.c @@ -153,7 +154,7 @@ msgstr "" msgid "%q length must be >= %d" msgstr "" -#: py/objmodule.c py/runtime.c +#: py/modsys.c py/objmodule.c py/runtime.c msgid "%q moved from %q to %q" msgstr "" @@ -509,7 +510,7 @@ msgid "All event channels in use" msgstr "" #: ports/raspberrypi/common-hal/floppyio/__init__.c -#: ports/raspberrypi/common-hal/picodvi/Framebuffer.c +#: ports/raspberrypi/common-hal/picodvi/Framebuffer_RP2040.c #: ports/raspberrypi/common-hal/rp2pio/StateMachine.c #: ports/raspberrypi/common-hal/usb_host/Port.c msgid "All state machines in use" @@ -519,7 +520,7 @@ msgstr "" msgid "All sync event channels in use" msgstr "" -#: ports/raspberrypi/common-hal/picodvi/Framebuffer.c +#: ports/raspberrypi/common-hal/picodvi/Framebuffer_RP2040.c msgid "All timers for this pin are in use" msgstr "" @@ -1160,7 +1161,9 @@ msgstr "" #: ports/atmel-samd/common-hal/ps2io/Ps2.c #: ports/atmel-samd/common-hal/pulseio/PulseIn.c #: ports/atmel-samd/common-hal/rotaryio/IncrementalEncoder.c -#: ports/cxd56/common-hal/pulseio/PulseIn.c shared-bindings/pwmio/PWMOut.c +#: ports/cxd56/common-hal/pulseio/PulseIn.c +#: ports/raspberrypi/common-hal/picodvi/Framebuffer_RP2350.c +#: shared-bindings/pwmio/PWMOut.c msgid "Internal resource(s) in use" msgstr "" @@ -1181,12 +1184,16 @@ msgstr "" #: ports/mimxrt10xx/common-hal/audiobusio/__init__.c #: ports/mimxrt10xx/common-hal/pwmio/PWMOut.c #: ports/raspberrypi/bindings/picodvi/Framebuffer.c -#: ports/raspberrypi/common-hal/picodvi/Framebuffer.c py/argcheck.c +#: ports/raspberrypi/common-hal/picodvi/Framebuffer_RP2040.c py/argcheck.c #: shared-bindings/digitalio/DigitalInOut.c #: shared-bindings/epaperdisplay/EPaperDisplay.c shared-bindings/pwmio/PWMOut.c msgid "Invalid %q" msgstr "" +#: ports/raspberrypi/common-hal/picodvi/Framebuffer_RP2350.c +msgid "Invalid %q and %q" +msgstr "" + #: ports/atmel-samd/common-hal/microcontroller/Pin.c #: ports/espressif/common-hal/dotclockframebuffer/DotClockFramebuffer.c #: ports/mimxrt10xx/common-hal/microcontroller/Pin.c @@ -2329,6 +2336,7 @@ msgid "You pressed the SW38 button at start up." msgstr "" #: ports/espressif/boards/hardkernel_odroid_go/mpconfigboard.h +#: ports/espressif/boards/vidi_x/mpconfigboard.h msgid "You pressed the VOLUME button at start up." msgstr "" diff --git a/ports/espressif/Makefile b/ports/espressif/Makefile index 9f2c32e412ba..bb66a4b836e7 100644 --- a/ports/espressif/Makefile +++ b/ports/espressif/Makefile @@ -181,7 +181,10 @@ ifneq ($(IDF_TARGET),esp32c6) endif ifeq ($(IDF_TARGET_ARCH),xtensa) -CFLAGS += -mlongcalls +# Remove the last two flags once TinyUSB is updated with the `#include ` instead of +# `#include "xtensa/xtensa_api.h"`. + +CFLAGS += -mlongcalls -isystem esp-idf/components/xtensa/deprecated_include/ -Wno-error=cpp else ifeq ($(IDF_TARGET_ARCH),riscv) CFLAGS += -march=rv32imac_zicsr_zifencei endif diff --git a/ports/raspberrypi/Makefile b/ports/raspberrypi/Makefile index 4d4f6695c4c7..29fba20e55f9 100644 --- a/ports/raspberrypi/Makefile +++ b/ports/raspberrypi/Makefile @@ -51,11 +51,11 @@ SRC_CYW43 := \ lib/cyw43-driver/src/cyw43_lwip.c \ PIOASM = $(BUILD)/pioasm/pioasm/pioasm -.PHONY: PioasmBuild -PioasmBuild: $(PIOASM) +.PHONY: pioasmBuild +pioasmBuild: $(PIOASM) $(PIOASM): $(Q)cmake -S pioasm -B $(BUILD)/pioasm - $(Q)$(MAKE) -C $(BUILD)/pioasm PioasmBuild + $(Q)$(MAKE) -C $(BUILD)/pioasm pioasmBuild $(BUILD)/cyw43_bus_pio_spi.pio.h: sdk/src/rp2_common/pico_cyw43_driver/cyw43_bus_pio_spi.pio $(PIOASM) $(Q)$(PIOASM) -o c-sdk $< $@ @@ -69,68 +69,115 @@ SRC_CYW43 := SRC_LWIP := endif +CHIP_VARIANT_LOWER = $(shell echo $(CHIP_VARIANT) | tr '[:upper:]' '[:lower:]') + INC += \ - -I. \ - -Ilwip_inc \ - -I../.. \ - -I../lib/mp-readline \ - -I../shared/timeutils \ - -Iboards/$(BOARD) \ - -Iboards/ \ - -isystem ./../../lib/cmsis/inc \ - -isystem sdk/ \ - -isystem sdk/src/common/pico_base/include/ \ - -isystem sdk/src/common/pico_binary_info/include/ \ - -isystem sdk/src/common/pico_stdlib/include/ \ - -isystem sdk/src/common/pico_sync/include/ \ - -isystem sdk/src/common/pico_time/include/ \ - -isystem sdk/src/common/pico_util/include/ \ - -isystem sdk/src/rp2040/hardware_regs/include/ \ - -isystem sdk/src/rp2040/hardware_structs/include/ \ - -isystem sdk/src/rp2_common/cmsis/ \ - -isystem sdk/src/rp2_common/hardware_adc/include/ \ - -isystem sdk/src/rp2_common/hardware_base/include/ \ - -isystem sdk/src/rp2_common/hardware_claim/include/ \ - -isystem sdk/src/rp2_common/hardware_clocks/include/ \ - -isystem sdk/src/rp2_common/hardware_divider/include/ \ - -isystem sdk/src/rp2_common/hardware_dma/include/ \ - -isystem sdk/src/rp2_common/hardware_flash/include/ \ - -isystem sdk/src/rp2_common/hardware_gpio/include/ \ - -isystem sdk/src/rp2_common/hardware_interp/include/ \ - -isystem sdk/src/rp2_common/hardware_irq/include/ \ - -isystem sdk/src/rp2_common/hardware_i2c/include/ \ - -isystem sdk/src/rp2_common/hardware_pio/include/ \ - -isystem sdk/src/rp2_common/hardware_pll/include/ \ - -isystem sdk/src/rp2_common/hardware_pwm/include/ \ - -isystem sdk/src/rp2_common/hardware_resets/include/ \ - -isystem sdk/src/rp2_common/hardware_rtc/include/ \ - -isystem sdk/src/rp2_common/hardware_spi/include/ \ - -isystem sdk/src/rp2_common/hardware_sync/include/ \ - -isystem sdk/src/rp2_common/hardware_timer/include/ \ - -isystem sdk/src/rp2_common/hardware_uart/include/ \ - -isystem sdk/src/rp2_common/hardware_vreg/include/ \ - -isystem sdk/src/rp2_common/hardware_watchdog/include/ \ - -isystem sdk/src/rp2_common/hardware_xosc/include/ \ - -isystem sdk/src/rp2_common/pico_multicore/include/ \ - -isystem sdk/src/rp2_common/pico_fix/rp2040_usb_device_enumeration/include/ \ - -isystem sdk/src/rp2_common/pico_stdio/include/ \ - -isystem sdk/src/rp2_common/pico_printf/include/ \ - -isystem sdk/src/rp2_common/pico_float/include/ \ - -isystem sdk/src/rp2_common/pico_platform/include/ \ - -isystem sdk/src/rp2_common/pico_runtime/include/ \ - -isystem sdk/src/rp2_common/pico_bootrom/include/ \ - -isystem sdk/src/rp2_common/pico_unique_id/include/ \ - $(INC_CYW43) \ - -Isdk_config \ - -I../../lib/tinyusb/src \ - -I../../supervisor/shared/usb \ - -I$(BUILD) + -I. \ + -Ilwip_inc \ + -I../.. \ + -I../lib/mp-readline \ + -I../shared/timeutils \ + -Iboards/$(BOARD) \ + -Iboards/ \ + -isystem ./../../lib/cmsis/inc \ + -isystem sdk/ \ + -isystem sdk/src/common/boot_picobin_headers/include/ \ + -isystem sdk/src/common/boot_picoboot_headers/include/ \ + -isystem sdk/src/common/hardware_claim/include/ \ + -isystem sdk/src/common/pico_base_headers/include/ \ + -isystem sdk/src/common/pico_binary_info/include/ \ + -isystem sdk/src/common/pico_stdlib_headers/include/ \ + -isystem sdk/src/common/pico_sync/include/ \ + -isystem sdk/src/common/pico_time/include/ \ + -isystem sdk/src/common/pico_util/include/ \ + -isystem sdk/src/$(CHIP_VARIANT_LOWER)/hardware_regs/include/ \ + -isystem sdk/src/$(CHIP_VARIANT_LOWER)/hardware_structs/include/ \ + -isystem sdk/src/$(CHIP_VARIANT_LOWER)/pico_platform/include/ \ + -isystem sdk/src/rp2_common/cmsis/ \ + -isystem sdk/src/rp2_common/hardware_adc/include/ \ + -isystem sdk/src/rp2_common/hardware_base/include/ \ + -isystem sdk/src/rp2_common/hardware_boot_lock/include/ \ + -isystem sdk/src/rp2_common/hardware_clocks/include/ \ + -isystem sdk/src/rp2_common/hardware_divider/include/ \ + -isystem sdk/src/rp2_common/hardware_dma/include/ \ + -isystem sdk/src/rp2_common/hardware_flash/include/ \ + -isystem sdk/src/rp2_common/hardware_gpio/include/ \ + -isystem sdk/src/rp2_common/hardware_interp/include/ \ + -isystem sdk/src/rp2_common/hardware_irq/include/ \ + -isystem sdk/src/rp2_common/hardware_i2c/include/ \ + -isystem sdk/src/rp2_common/hardware_pio/include/ \ + -isystem sdk/src/rp2_common/hardware_pll/include/ \ + -isystem sdk/src/rp2_common/hardware_powman/include/ \ + -isystem sdk/src/rp2_common/hardware_pwm/include/ \ + -isystem sdk/src/rp2_common/hardware_resets/include/ \ + -isystem sdk/src/rp2_common/hardware_rtc/include/ \ + -isystem sdk/src/rp2_common/hardware_spi/include/ \ + -isystem sdk/src/rp2_common/hardware_sync/include/ \ + -isystem sdk/src/rp2_common/hardware_sync_spin_lock/include/ \ + -isystem sdk/src/rp2_common/hardware_ticks/include/ \ + -isystem sdk/src/rp2_common/hardware_timer/include/ \ + -isystem sdk/src/rp2_common/hardware_uart/include/ \ + -isystem sdk/src/rp2_common/hardware_vreg/include/ \ + -isystem sdk/src/rp2_common/hardware_watchdog/include/ \ + -isystem sdk/src/rp2_common/hardware_xosc/include/ \ + -isystem sdk/src/rp2_common/pico_aon_timer/include/ \ + -isystem sdk/src/rp2_common/pico_atomic/include/ \ + -isystem sdk/src/rp2_common/pico_bootrom/include/ \ + -isystem sdk/src/rp2_common/pico_double/include/ \ + -isystem sdk/src/rp2_common/pico_multicore/include/ \ + -isystem sdk/src/rp2_common/pico_fix/rp2040_usb_device_enumeration/include/ \ + -isystem sdk/src/rp2_common/pico_stdio/include/ \ + -isystem sdk/src/rp2_common/pico_printf/include/ \ + -isystem sdk/src/rp2_common/pico_float/include/ \ + -isystem sdk/src/rp2_common/pico_runtime/include/ \ + -isystem sdk/src/rp2_common/pico_runtime_init/include/ \ + -isystem sdk/src/rp2_common/pico_platform_compiler/include/ \ + -isystem sdk/src/rp2_common/pico_platform_sections/include/ \ + -isystem sdk/src/rp2_common/pico_platform_panic/include/ \ + -isystem sdk/src/rp2_common/pico_time_adapter/include/ \ + -isystem sdk/src/rp2_common/pico_unique_id/include/ \ +$(INC_CYW43) \ + -Isdk_config \ + -I../../lib/tinyusb/src \ + -I../../supervisor/shared/usb \ + -I$(BUILD) # Pico specific configuration -CFLAGS += -DRASPBERRYPI -DPICO_ON_DEVICE=1 -DPICO_NO_BINARY_INFO=0 -DPICO_TIME_DEFAULT_ALARM_POOL_DISABLED=0 -DPICO_DIVIDER_CALL_IDIV0=0 -DPICO_DIVIDER_CALL_LDIV0=0 -DPICO_DIVIDER_HARDWARE=1 -DPICO_DOUBLE_ROM=1 -DPICO_FLOAT_ROM=1 -DPICO_MULTICORE=1 -DPICO_BITS_IN_RAM=0 -DPICO_DIVIDER_IN_RAM=0 -DPICO_DOUBLE_PROPAGATE_NANS=0 -DPICO_DOUBLE_IN_RAM=0 -DPICO_MEM_IN_RAM=0 -DPICO_FLOAT_IN_RAM=0 -DPICO_FLOAT_PROPAGATE_NANS=1 -DPICO_NO_FLASH=0 -DPICO_COPY_TO_RAM=0 -DPICO_DISABLE_SHARED_IRQ_HANDLERS=0 -DPICO_NO_BI_BOOTSEL_VIA_DOUBLE_RESET=0 -DDVI_1BPP_BIT_REVERSE=0 +CFLAGS += \ + -DRASPBERRYPI \ + -DPICO_ON_DEVICE=1 \ + -DPICO_NO_BINARY_INFO=0 \ + -DPICO_TIME_DEFAULT_ALARM_POOL_DISABLED=0 \ + -DPICO_DIVIDER_CALL_IDIV0=0 \ + -DPICO_DIVIDER_CALL_LDIV0=0 \ + -DPICO_DIVIDER_HARDWARE=1 \ + -DPICO_DOUBLE_ROM=1 \ + -DPICO_FLOAT_ROM=1 \ + -DLIB_PICO_MULTICORE=1 \ + -DPICO_BITS_IN_RAM=0 \ + -DPICO_DIVIDER_IN_RAM=0 \ + -DPICO_DOUBLE_PROPAGATE_NANS=0 \ + -DPICO_DOUBLE_IN_RAM=0 \ + -DPICO_MEM_IN_RAM=0 \ + -DPICO_FLOAT_IN_RAM=0 \ + -DPICO_FLOAT_PROPAGATE_NANS=1 \ + -DPICO_NO_FLASH=0 \ + -DPICO_COPY_TO_RAM=0 \ + -DPICO_DISABLE_SHARED_IRQ_HANDLERS=0 \ + -DPICO_NO_BI_BOOTSEL_VIA_DOUBLE_RESET=0 \ + -DDVI_1BPP_BIT_REVERSE=0 + OPTIMIZATION_FLAGS ?= -O3 # TinyUSB defines -CFLAGS += -DCFG_TUSB_OS=OPT_OS_PICO -DTUD_OPT_RP2040_USB_DEVICE_ENUMERATION_FIX=1 -DCFG_TUSB_MCU=OPT_MCU_RP2040 -DCFG_TUD_MIDI_RX_BUFSIZE=128 -DCFG_TUD_CDC_RX_BUFSIZE=256 -DCFG_TUD_MIDI_TX_BUFSIZE=128 -DCFG_TUD_CDC_TX_BUFSIZE=256 -DCFG_TUD_MSC_BUFSIZE=1024 +CFLAGS += \ + -DCFG_TUSB_OS=OPT_OS_PICO \ + -DTUD_OPT_RP2040_USB_DEVICE_ENUMERATION_FIX=1 \ + -DCFG_TUSB_MCU=OPT_MCU_RP2040 \ + -DCFG_TUD_MIDI_RX_BUFSIZE=128 \ + -DCFG_TUD_CDC_RX_BUFSIZE=256 \ + -DCFG_TUD_MIDI_TX_BUFSIZE=128 \ + -DCFG_TUD_CDC_TX_BUFSIZE=256 \ + -DCFG_TUD_MSC_BUFSIZE=1024 # option to override default optimization level, set in boards/$(BOARD)/mpconfigboard.mk CFLAGS += $(OPTIMIZATION_FLAGS) @@ -157,6 +204,16 @@ DISABLE_WARNINGS = -Wno-stringop-overflow -Wno-cast-align CFLAGS += $(INC) -Wall -Werror -std=gnu11 -fshort-enums $(BASE_CFLAGS) $(CFLAGS_MOD) $(COPT) $(DISABLE_WARNINGS) -Werror=missing-prototypes +PICO_LDFLAGS = --specs=nosys.specs --specs=nano.specs + +# Use toolchain libm if we're not using our own. +ifndef INTERNAL_LIBM +LIBS += -lm +endif + +LIBS += -lc + +ifeq ($(CHIP_VARIANT),RP2040) CFLAGS += \ -march=armv6-m \ -mthumb \ @@ -165,25 +222,220 @@ CFLAGS += \ -msoft-float \ -mfloat-abi=soft -PICO_LDFLAGS = --specs=nosys.specs --specs=nano.specs -Wl,--wrap=__aeabi_ldiv0 -Wl,--wrap=__aeabi_idiv0 -Wl,--wrap=__aeabi_lmul -Wl,--wrap=__clzsi2 -Wl,--wrap=__clzdi2 -Wl,--wrap=__ctzsi2 -Wl,--wrap=__ctzdi2 -Wl,--wrap=__popcountsi2 -Wl,--wrap=__popcountdi2 -Wl,--wrap=__clz -Wl,--wrap=__clzl -Wl,--wrap=__clzll -Wl,--wrap=__aeabi_idiv -Wl,--wrap=__aeabi_idivmod -Wl,--wrap=__aeabi_ldivmod -Wl,--wrap=__aeabi_uidiv -Wl,--wrap=__aeabi_uidivmod -Wl,--wrap=__aeabi_uldivmod -Wl,--wrap=__aeabi_dadd -Wl,--wrap=__aeabi_ddiv -Wl,--wrap=__aeabi_dmul -Wl,--wrap=__aeabi_drsub -Wl,--wrap=__aeabi_dsub -Wl,--wrap=__aeabi_cdcmpeq -Wl,--wrap=__aeabi_cdrcmple -Wl,--wrap=__aeabi_cdcmple -Wl,--wrap=__aeabi_dcmpeq -Wl,--wrap=__aeabi_dcmplt -Wl,--wrap=__aeabi_dcmple -Wl,--wrap=__aeabi_dcmpge -Wl,--wrap=__aeabi_dcmpgt -Wl,--wrap=__aeabi_dcmpun -Wl,--wrap=__aeabi_i2d -Wl,--wrap=__aeabi_l2d -Wl,--wrap=__aeabi_ui2d -Wl,--wrap=__aeabi_ul2d -Wl,--wrap=__aeabi_d2iz -Wl,--wrap=__aeabi_d2lz -Wl,--wrap=__aeabi_d2uiz -Wl,--wrap=__aeabi_d2ulz -Wl,--wrap=__aeabi_d2f -Wl,--wrap=sqrt -Wl,--wrap=cos -Wl,--wrap=sin -Wl,--wrap=tan -Wl,--wrap=atan2 -Wl,--wrap=exp -Wl,--wrap=log -Wl,--wrap=ldexp -Wl,--wrap=copysign -Wl,--wrap=trunc -Wl,--wrap=floor -Wl,--wrap=ceil -Wl,--wrap=round -Wl,--wrap=sincos -Wl,--wrap=asin -Wl,--wrap=acos -Wl,--wrap=atan -Wl,--wrap=sinh -Wl,--wrap=cosh -Wl,--wrap=tanh -Wl,--wrap=asinh -Wl,--wrap=acosh -Wl,--wrap=atanh -Wl,--wrap=exp2 -Wl,--wrap=log2 -Wl,--wrap=exp10 -Wl,--wrap=log10 -Wl,--wrap=pow -Wl,--wrap=powint -Wl,--wrap=hypot -Wl,--wrap=cbrt -Wl,--wrap=fmod -Wl,--wrap=drem -Wl,--wrap=remainder -Wl,--wrap=remquo -Wl,--wrap=expm1 -Wl,--wrap=log1p -Wl,--wrap=fma -Wl,--wrap=__aeabi_fadd -Wl,--wrap=__aeabi_fdiv -Wl,--wrap=__aeabi_fmul -Wl,--wrap=__aeabi_frsub -Wl,--wrap=__aeabi_fsub -Wl,--wrap=__aeabi_cfcmpeq -Wl,--wrap=__aeabi_cfrcmple -Wl,--wrap=__aeabi_cfcmple -Wl,--wrap=__aeabi_fcmpeq -Wl,--wrap=__aeabi_fcmplt -Wl,--wrap=__aeabi_fcmple -Wl,--wrap=__aeabi_fcmpge -Wl,--wrap=__aeabi_fcmpgt -Wl,--wrap=__aeabi_fcmpun -Wl,--wrap=__aeabi_i2f -Wl,--wrap=__aeabi_l2f -Wl,--wrap=__aeabi_ui2f -Wl,--wrap=__aeabi_ul2f -Wl,--wrap=__aeabi_f2iz -Wl,--wrap=__aeabi_f2lz -Wl,--wrap=__aeabi_f2uiz -Wl,--wrap=__aeabi_f2ulz -Wl,--wrap=__aeabi_f2d -Wl,--wrap=sqrtf -Wl,--wrap=cosf -Wl,--wrap=sinf -Wl,--wrap=tanf -Wl,--wrap=atan2f -Wl,--wrap=expf -Wl,--wrap=logf -Wl,--wrap=ldexpf -Wl,--wrap=copysignf -Wl,--wrap=truncf -Wl,--wrap=floorf -Wl,--wrap=ceilf -Wl,--wrap=roundf -Wl,--wrap=sincosf -Wl,--wrap=asinf -Wl,--wrap=acosf -Wl,--wrap=atanf -Wl,--wrap=sinhf -Wl,--wrap=coshf -Wl,--wrap=tanhf -Wl,--wrap=asinhf -Wl,--wrap=acoshf -Wl,--wrap=atanhf -Wl,--wrap=exp2f -Wl,--wrap=log2f -Wl,--wrap=exp10f -Wl,--wrap=log10f -Wl,--wrap=powf -Wl,--wrap=powintf -Wl,--wrap=hypotf -Wl,--wrap=cbrtf -Wl,--wrap=fmodf -Wl,--wrap=dremf -Wl,--wrap=remainderf -Wl,--wrap=remquof -Wl,--wrap=expm1f -Wl,--wrap=log1pf -Wl,--wrap=fmaf -Wl,--wrap=memcpy -Wl,--wrap=memset -Wl,--wrap=__aeabi_memcpy -Wl,--wrap=__aeabi_memset -Wl,--wrap=__aeabi_memcpy4 -Wl,--wrap=__aeabi_memset4 -Wl,--wrap=__aeabi_memcpy8 -Wl,--wrap=__aeabi_memset8 +CFLAGS += \ + -DPICO_RP2040 + +SRC_SDK_CHIP_VARIANT := \ + src/rp2_common/hardware_rtc/rtc.c \ + src/rp2_common/pico_double/double_init_rom_rp2040.c \ + src/rp2_common/pico_float/float_init_rom_rp2040.c \ + src/rp2_common/pico_float/float_math.c \ + +SRC_S_UPPER_CHIP_VARIANT := \ + sdk/src/rp2_common/hardware_divider/divider.S \ + sdk/src/rp2_common/pico_divider/divider_hardware.S \ + sdk/src/rp2_common/pico_double/double_v1_rom_shim_rp2040.S \ + sdk/src/rp2_common/pico_float/float_v1_rom_shim_rp2040.S \ + sdk/src/rp2_common/pico_float/float_aeabi_rp2040.S \ + sdk/src/rp2_common/pico_mem_ops/mem_ops_aeabi.S \ + +# Wrap a bunch of math stuff to use the Pico SDK divider +PICO_LDFLAGS += -Wl,--wrap=__aeabi_ldiv0 \ + -Wl,--wrap=__aeabi_idiv0 \ + -Wl,--wrap=__aeabi_lmul \ + -Wl,--wrap=__clzsi2 \ + -Wl,--wrap=__clzdi2 \ + -Wl,--wrap=__ctzsi2 \ + -Wl,--wrap=__ctzdi2 \ + -Wl,--wrap=__popcountsi2 \ + -Wl,--wrap=__popcountdi2 \ + -Wl,--wrap=__clz \ + -Wl,--wrap=__clzl \ + -Wl,--wrap=__clzll \ + -Wl,--wrap=__aeabi_idiv \ + -Wl,--wrap=__aeabi_idivmod \ + -Wl,--wrap=__aeabi_ldivmod \ + -Wl,--wrap=__aeabi_uidiv \ + -Wl,--wrap=__aeabi_uidivmod \ + -Wl,--wrap=__aeabi_uldivmod \ + -Wl,--wrap=__aeabi_dadd \ + -Wl,--wrap=__aeabi_ddiv \ + -Wl,--wrap=__aeabi_dmul \ + -Wl,--wrap=__aeabi_drsub \ + -Wl,--wrap=__aeabi_dsub \ + -Wl,--wrap=__aeabi_cdcmpeq \ + -Wl,--wrap=__aeabi_cdrcmple \ + -Wl,--wrap=__aeabi_cdcmple \ + -Wl,--wrap=__aeabi_dcmpeq \ + -Wl,--wrap=__aeabi_dcmplt \ + -Wl,--wrap=__aeabi_dcmple \ + -Wl,--wrap=__aeabi_dcmpge \ + -Wl,--wrap=__aeabi_dcmpgt \ + -Wl,--wrap=__aeabi_dcmpun \ + -Wl,--wrap=__aeabi_i2d \ + -Wl,--wrap=__aeabi_l2d \ + -Wl,--wrap=__aeabi_ui2d \ + -Wl,--wrap=__aeabi_ul2d \ + -Wl,--wrap=__aeabi_d2iz \ + -Wl,--wrap=__aeabi_d2lz \ + -Wl,--wrap=__aeabi_d2uiz \ + -Wl,--wrap=__aeabi_d2ulz \ + -Wl,--wrap=__aeabi_d2f \ + -Wl,--wrap=sqrt \ + -Wl,--wrap=cos \ + -Wl,--wrap=sin \ + -Wl,--wrap=tan \ + -Wl,--wrap=atan2 \ + -Wl,--wrap=exp \ + -Wl,--wrap=log \ + -Wl,--wrap=ldexp \ + -Wl,--wrap=copysign \ + -Wl,--wrap=trunc \ + -Wl,--wrap=floor \ + -Wl,--wrap=ceil \ + -Wl,--wrap=round \ + -Wl,--wrap=sincos \ + -Wl,--wrap=asin \ + -Wl,--wrap=acos \ + -Wl,--wrap=atan \ + -Wl,--wrap=sinh \ + -Wl,--wrap=cosh \ + -Wl,--wrap=tanh \ + -Wl,--wrap=asinh \ + -Wl,--wrap=acosh \ + -Wl,--wrap=atanh \ + -Wl,--wrap=exp2 \ + -Wl,--wrap=log2 \ + -Wl,--wrap=exp10 \ + -Wl,--wrap=log10 \ + -Wl,--wrap=pow \ + -Wl,--wrap=powint \ + -Wl,--wrap=hypot \ + -Wl,--wrap=cbrt \ + -Wl,--wrap=fmod \ + -Wl,--wrap=drem \ + -Wl,--wrap=remainder \ + -Wl,--wrap=remquo \ + -Wl,--wrap=expm1 \ + -Wl,--wrap=log1p \ + -Wl,--wrap=fma \ + -Wl,--wrap=__aeabi_fadd \ + -Wl,--wrap=__aeabi_fdiv \ + -Wl,--wrap=__aeabi_fmul \ + -Wl,--wrap=__aeabi_frsub \ + -Wl,--wrap=__aeabi_fsub \ + -Wl,--wrap=__aeabi_cfcmpeq \ + -Wl,--wrap=__aeabi_cfrcmple \ + -Wl,--wrap=__aeabi_cfcmple \ + -Wl,--wrap=__aeabi_fcmpeq \ + -Wl,--wrap=__aeabi_fcmplt \ + -Wl,--wrap=__aeabi_fcmple \ + -Wl,--wrap=__aeabi_fcmpge \ + -Wl,--wrap=__aeabi_fcmpgt \ + -Wl,--wrap=__aeabi_fcmpun \ + -Wl,--wrap=__aeabi_i2f \ + -Wl,--wrap=__aeabi_l2f \ + -Wl,--wrap=__aeabi_ui2f \ + -Wl,--wrap=__aeabi_ul2f \ + -Wl,--wrap=__aeabi_f2iz \ + -Wl,--wrap=__aeabi_f2lz \ + -Wl,--wrap=__aeabi_f2uiz \ + -Wl,--wrap=__aeabi_f2ulz \ + -Wl,--wrap=__aeabi_f2d \ + -Wl,--wrap=sqrtf \ + -Wl,--wrap=cosf \ + -Wl,--wrap=sinf \ + -Wl,--wrap=tanf \ + -Wl,--wrap=atan2f \ + -Wl,--wrap=expf \ + -Wl,--wrap=logf \ + -Wl,--wrap=ldexpf \ + -Wl,--wrap=copysignf \ + -Wl,--wrap=truncf \ + -Wl,--wrap=floorf \ + -Wl,--wrap=ceilf \ + -Wl,--wrap=roundf \ + -Wl,--wrap=sincosf \ + -Wl,--wrap=asinf \ + -Wl,--wrap=acosf \ + -Wl,--wrap=atanf \ + -Wl,--wrap=sinhf \ + -Wl,--wrap=coshf \ + -Wl,--wrap=tanhf \ + -Wl,--wrap=asinhf \ + -Wl,--wrap=acoshf \ + -Wl,--wrap=atanhf \ + -Wl,--wrap=exp2f \ + -Wl,--wrap=log2f \ + -Wl,--wrap=exp10f \ + -Wl,--wrap=log10f \ + -Wl,--wrap=powf \ + -Wl,--wrap=powintf \ + -Wl,--wrap=hypotf \ + -Wl,--wrap=cbrtf \ + -Wl,--wrap=fmodf \ + -Wl,--wrap=dremf \ + -Wl,--wrap=remainderf \ + -Wl,--wrap=remquof \ + -Wl,--wrap=expm1f \ + -Wl,--wrap=log1pf \ + -Wl,--wrap=fmaf \ + -Wl,--wrap=memcpy \ + -Wl,--wrap=memset \ + -Wl,--wrap=__aeabi_memcpy \ + -Wl,--wrap=__aeabi_memset \ + -Wl,--wrap=__aeabi_memcpy4 \ + -Wl,--wrap=__aeabi_memset4 \ + -Wl,--wrap=__aeabi_memcpy8 \ + -Wl,--wrap=__aeabi_memset8 + +UF2_ID = 0xE48BFF56 + +DOUBLE_EABI = rp2040 +endif +ifeq ($(CHIP_VARIANT),RP2350) +CFLAGS += \ + -march=armv8-m.main+fp+dsp \ + -mthumb \ + -mabi=aapcs-linux \ + -mcpu=cortex-m33 \ + -mfloat-abi=softfp + +# ARM Secure family id +UF2_ID = 0xe48bff59 + +# Double coprocessor is only available on the ARM core. +DOUBLE_EABI = dcp +INC += \ + -isystem sdk/src/rp2_common/hardware_dcp/include/ + +CFLAGS += -DPICO_RP2350=1 + +SRC_SDK_CHIP_VARIANT := \ + src/rp2_common/hardware_powman/powman.c \ + +ifeq ($(CHIP_PACKAGE),A) +CFLAGS += -DPICO_RP2350A=1 +CFLAGS += -DPICO_RP2350B=0 +else +CFLAGS += -DPICO_RP2350A=0 +CFLAGS += -DPICO_RP2350B=1 +endif -# Use toolchain libm if we're not using our own. -ifndef INTERNAL_LIBM -LIBS += -lm endif -LIBS += -lc SRC_SDK := \ + src/common/hardware_claim/claim.c \ src/common/pico_sync/critical_section.c \ src/common/pico_sync/lock_core.c \ src/common/pico_sync/mutex.c \ src/common/pico_time/time.c \ src/common/pico_time/timeout_helper.c \ + src/common/pico_util/datetime.c \ src/common/pico_util/pheap.c \ src/common/pico_util/queue.c \ src/rp2_common/hardware_adc/adc.c \ - src/rp2_common/hardware_claim/claim.c \ src/rp2_common/hardware_clocks/clocks.c \ src/rp2_common/hardware_dma/dma.c \ src/rp2_common/hardware_flash/flash.c \ @@ -193,32 +445,37 @@ SRC_SDK := \ src/rp2_common/hardware_irq/irq.c \ src/rp2_common/hardware_pio/pio.c \ src/rp2_common/hardware_pll/pll.c \ - src/rp2_common/hardware_rtc/rtc.c \ src/rp2_common/hardware_spi/spi.c \ src/rp2_common/hardware_sync/sync.c \ + src/rp2_common/hardware_sync_spin_lock/sync_spin_lock.c \ + src/rp2_common/hardware_ticks/ticks.c \ src/rp2_common/hardware_timer/timer.c \ src/rp2_common/hardware_uart/uart.c \ src/rp2_common/hardware_vreg/vreg.c \ src/rp2_common/hardware_watchdog/watchdog.c \ src/rp2_common/hardware_xosc/xosc.c \ + src/rp2_common/pico_aon_timer/aon_timer.c \ + src/rp2_common/pico_atomic/atomic.c \ src/rp2_common/pico_bootrom/bootrom.c \ src/rp2_common/pico_bootsel_via_double_reset/pico_bootsel_via_double_reset.c \ - src/rp2_common/pico_double/double_init_rom.c \ + src/rp2_common/pico_clib_interface/newlib_interface.c \ src/rp2_common/pico_fix/rp2040_usb_device_enumeration/rp2040_usb_device_enumeration.c \ - src/rp2_common/pico_float/float_init_rom.c \ - src/rp2_common/pico_float/float_math.c \ src/rp2_common/pico_multicore/multicore.c \ - src/rp2_common/pico_platform/platform.c \ + src/rp2_common/pico_platform_panic/panic.c \ src/rp2_common/pico_printf/printf.c \ src/rp2_common/pico_runtime/runtime.c \ + src/rp2_common/pico_runtime_init/runtime_init.c \ + src/rp2_common/pico_runtime_init/runtime_init_clocks.c \ + src/rp2_common/pico_runtime_init/runtime_init_stack_guard.c \ src/rp2_common/pico_stdio/stdio.c \ src/rp2_common/pico_stdlib/stdlib.c \ src/rp2_common/pico_unique_id/unique_id.c \ + src/$(CHIP_VARIANT_LOWER)/pico_platform/platform.c \ $(SRC_SDK_CYW43) \ + $(SRC_SDK_CHIP_VARIANT) \ SRC_SDK := $(addprefix sdk/, $(SRC_SDK)) $(patsubst %.c,$(BUILD)/%.o,$(SRC_SDK) $(SRC_CYW43)): CFLAGS += -Wno-missing-prototypes -Wno-undef -Wno-unused-function -Wno-nested-externs -Wno-strict-prototypes -Wno-double-promotion -Wno-sign-compare -Wno-unused-variable -Wno-strict-overflow -Ilib/cyw43-driver -$(BUILD)/sdk/src/rp2_common/pico_standard_link/crt0.o: CFLAGS += -Wno-undef SRC_C += \ boards/$(BOARD)/board.c \ @@ -240,101 +497,106 @@ SRC_C += \ ifeq ($(CIRCUITPY_USB_HOST), 1) SRC_C += \ - lib/tinyusb/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c \ - lib/Pico-PIO-USB/src/pio_usb.c \ - lib/Pico-PIO-USB/src/pio_usb_host.c \ - lib/Pico-PIO-USB/src/usb_crc.c \ + lib/tinyusb/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c \ + lib/Pico-PIO-USB/src/pio_usb.c \ + lib/Pico-PIO-USB/src/pio_usb_host.c \ + lib/Pico-PIO-USB/src/usb_crc.c \ INC += \ - -isystem lib/Pico-PIO-USB/src + -isystem lib/Pico-PIO-USB/src endif ifeq ($(CIRCUITPY_PICODVI),1) +SRC_C += \ + bindings/picodvi/__init__.c \ + bindings/picodvi/Framebuffer.c \ + common-hal/picodvi/Framebuffer_$(CHIP_VARIANT).c \ + +ifeq ($(CHIP_VARIANT),RP2040) SRC_C += \ lib/PicoDVI/software/libdvi/dvi.c \ lib/PicoDVI/software/libdvi/dvi_serialiser.c \ lib/PicoDVI/software/libdvi/dvi_timing.c \ lib/PicoDVI/software/libdvi/tmds_encode.c \ - bindings/picodvi/__init__.c \ - bindings/picodvi/Framebuffer.c \ - common-hal/picodvi/Framebuffer.c \ + +endif endif ifeq ($(CIRCUITPY_SSL),1) CFLAGS += -isystem $(TOP)/mbedtls/include SRC_MBEDTLS := $(addprefix lib/mbedtls/library/, \ - aes.c \ - aesni.c \ - arc4.c \ - asn1parse.c \ - asn1write.c \ - base64.c \ - bignum.c \ - blowfish.c \ - camellia.c \ - ccm.c \ - certs.c \ - chacha20.c \ - chachapoly.c \ - cipher.c \ - cipher_wrap.c \ - cmac.c \ - constant_time.c \ - ctr_drbg.c \ - debug.c \ - des.c \ - dhm.c \ - ecdh.c \ - ecdsa.c \ - ecjpake.c \ - ecp.c \ - ecp_curves.c \ - entropy.c \ - entropy_poll.c \ - gcm.c \ - havege.c \ - hmac_drbg.c \ - md2.c \ - md4.c \ - md5.c \ - md.c \ - oid.c \ - padlock.c \ - pem.c \ - pk.c \ - pkcs11.c \ - pkcs12.c \ - pkcs5.c \ - pkparse.c \ - pk_wrap.c \ - pkwrite.c \ - platform.c \ - platform_util.c \ - poly1305.c \ - ripemd160.c \ - rsa.c \ - rsa_internal.c \ - sha1.c \ - sha256.c \ - sha512.c \ - ssl_cache.c \ - ssl_ciphersuites.c \ - ssl_cli.c \ - ssl_cookie.c \ - ssl_msg.c \ - ssl_srv.c \ - ssl_ticket.c \ - ssl_tls.c \ - timing.c \ - x509.c \ - x509_create.c \ - x509_crl.c \ - x509_crt.c \ - x509_csr.c \ - x509write_crt.c \ - x509write_csr.c \ - xtea.c \ + aes.c \ + aesni.c \ + arc4.c \ + asn1parse.c \ + asn1write.c \ + base64.c \ + bignum.c \ + blowfish.c \ + camellia.c \ + ccm.c \ + certs.c \ + chacha20.c \ + chachapoly.c \ + cipher.c \ + cipher_wrap.c \ + cmac.c \ + constant_time.c \ + ctr_drbg.c \ + debug.c \ + des.c \ + dhm.c \ + ecdh.c \ + ecdsa.c \ + ecjpake.c \ + ecp.c \ + ecp_curves.c \ + entropy.c \ + entropy_poll.c \ + gcm.c \ + havege.c \ + hmac_drbg.c \ + md2.c \ + md4.c \ + md5.c \ + md.c \ + oid.c \ + padlock.c \ + pem.c \ + pk.c \ + pkcs11.c \ + pkcs12.c \ + pkcs5.c \ + pkparse.c \ + pk_wrap.c \ + pkwrite.c \ + platform.c \ + platform_util.c \ + poly1305.c \ + ripemd160.c \ + rsa.c \ + rsa_internal.c \ + sha1.c \ + sha256.c \ + sha512.c \ + ssl_cache.c \ + ssl_ciphersuites.c \ + ssl_cli.c \ + ssl_cookie.c \ + ssl_msg.c \ + ssl_srv.c \ + ssl_ticket.c \ + ssl_tls.c \ + timing.c \ + x509.c \ + x509_create.c \ + x509_crl.c \ + x509_crt.c \ + x509_csr.c \ + x509write_crt.c \ + x509write_csr.c \ + xtea.c \ ) SRC_C += $(SRC_MBEDTLS) lib/mbedtls_config/mbedtls_port.c lib/mbedtls_config/crt_bundle.c CFLAGS += \ @@ -365,23 +627,20 @@ SRC_COMMON_HAL_SHARED_MODULE_EXPANDED = $(sort $(SRC_COMMON_HAL_EXPANDED) $(SRC_ SRC_S = supervisor/$(CHIP_FAMILY)_cpu.s BOOT2_S_CFLAGS ?= -DPICO_FLASH_SPI_CLKDIV=4 -SRC_S_UPPER = sdk/src/rp2_common/hardware_divider/divider.S \ - sdk/src/rp2_common/hardware_irq/irq_handler_chain.S \ +SRC_S_UPPER = sdk/src/rp2_common/hardware_irq/irq_handler_chain.S \ sdk/src/rp2_common/pico_bit_ops/bit_ops_aeabi.S \ - sdk/src/rp2_common/pico_double/double_aeabi.S \ - sdk/src/rp2_common/pico_double/double_v1_rom_shim.S \ - sdk/src/rp2_common/pico_divider/divider.S \ - sdk/src/rp2_common/pico_float/float_aeabi.S \ - sdk/src/rp2_common/pico_float/float_v1_rom_shim.S \ + sdk/src/rp2_common/pico_double/double_aeabi_$(DOUBLE_EABI).S \ sdk/src/rp2_common/pico_int64_ops/pico_int64_ops_aeabi.S \ - sdk/src/rp2_common/pico_mem_ops/mem_ops_aeabi.S \ - sdk/src/rp2_common/pico_standard_link/crt0.S \ + sdk/src/rp2_common/pico_crt0/crt0.S \ + $(SRC_S_UPPER_CHIP_VARIANT) ifeq ($(CIRCUITPY_PICODVI),1) SRC_S_UPPER += lib/PicoDVI/software/libdvi/tmds_encode_asm.S \ endif +$(patsubst %.S,$(BUILD)/%.o,$(SRC_S_UPPER)): CFLAGS += -Wno-undef + OBJ = $(PY_O) $(SUPERVISOR_O) $(addprefix $(BUILD)/, $(SRC_C:.c=.o)) OBJ += $(addprefix $(BUILD)/, $(SRC_SDK:.c=.o)) OBJ += $(addprefix $(BUILD)/, $(SRC_COMMON_HAL_SHARED_MODULE_EXPANDED:.c=.o)) @@ -401,14 +660,14 @@ $(BUILD)/%.o: $(BUILD)/%.S $(BUILD)/boot2_padded_checksummed.S: $(BUILD)/boot2.bin $(STEPECHO) "PAD_CHECKSUM $<" - $(Q)$(PYTHON) sdk/src/rp2_common/boot_stage2/pad_checksum -s 0xffffffff $< $@ + $(Q)$(PYTHON) sdk/src/rp2040/boot_stage2/pad_checksum -s 0xffffffff $< $@ $(BUILD)/boot2.bin: $(BUILD)/boot2.elf $(STEPECHO) "OBJCOPY $<" $(Q)$(OBJCOPY) -O binary $< $@ -$(BUILD)/stage2.c: stage2.c.jinja gen_stage2.py | $(BUILD)/ +$(BUILD)/stage2.c: boot_stage2/$(CHIP_VARIANT).c.jinja gen_stage2.py | $(BUILD)/ $(STEPECHO) "GEN $<" $(Q)$(PYTHON) gen_stage2.py $< $@ $(EXTERNAL_FLASH_DEVICES) @@ -421,7 +680,7 @@ $(BUILD)/supervisor/internal_flash.o: $(HEADER_BUILD)/flash_info.h $(BUILD)/boot2.elf: $(BUILD)/stage2.c $(STEPECHO) "BOOT $<" - $(Q)$(CC) $(CFLAGS) $(BOOT2_S_CFLAGS) -Os -ggdb3 -I. -fPIC --specs=nosys.specs -nostartfiles -Wl,-T,boot_stage2.ld -Wl,-Map=$@.map -o $@ $< + $(Q)$(CC) $(CFLAGS) $(BOOT2_S_CFLAGS) -Os -ggdb3 -I. -fPIC --specs=nosys.specs -nostartfiles -Wl,-T,boot_stage2/$(CHIP_VARIANT).ld -Wl,-Map=$@.map -o $@ $< $(Q)$(SIZE) $@ SRC_QSTR += $(SRC_C) $(SRC_SUPERVISOR) $(SRC_COMMON_HAL_EXPANDED) $(SRC_SHARED_MODULE_EXPANDED) $(SRC_CIRCUITPY_COMMON) @@ -434,12 +693,12 @@ ifneq ($(BOARD_LD),) LINKER_SCRIPTS = -Wl,-T,$(BOARD_LD) endif -LINKER_SCRIPTS += -Wl,-T,link.ld +LINKER_SCRIPTS += -Wl,-T,link-$(CHIP_VARIANT_LOWER).ld ifeq ($(VALID_BOARD),) $(BUILD)/firmware.elf: invalid-board else -$(BUILD)/firmware.elf: $(OBJ) $(BOARD_LD) link.ld +$(BUILD)/firmware.elf: $(OBJ) $(BOARD_LD) link-$(CHIP_VARIANT_LOWER).ld $(STEPECHO) "LINK $@" $(Q)echo $(OBJ) > $(BUILD)/firmware.objs $(Q)echo $(PICO_LDFLAGS) > $(BUILD)/firmware.ldflags @@ -452,6 +711,6 @@ $(BUILD)/firmware.bin: $(BUILD)/firmware.elf $(BUILD)/firmware.uf2: $(BUILD)/firmware.bin $(STEPECHO) "Create $@" - $(Q)$(PYTHON) $(TOP)/tools/uf2/utils/uf2conv.py -f 0xe48bff56 -b 0x10000000 -c -o $@ $^ + $(Q)$(PYTHON) $(TOP)/tools/uf2/utils/uf2conv.py -f $(UF2_ID) -b 0x10000000 -c -o $@ $^ include $(TOP)/py/mkrules.mk diff --git a/ports/raspberrypi/bindings/picodvi/Framebuffer.c b/ports/raspberrypi/bindings/picodvi/Framebuffer.c index b0ea6ef43f82..7a8ca40f9f61 100644 --- a/ports/raspberrypi/bindings/picodvi/Framebuffer.c +++ b/ports/raspberrypi/bindings/picodvi/Framebuffer.c @@ -32,9 +32,9 @@ //| color_depth: int = 8, //| ) -> None: //| """Create a Framebuffer object with the given dimensions. Memory is -//| allocated outside of onto the heap and then moved outside on VM end. +//| allocated onto the heap and then moved outside on VM end. //| -//| .. warning:: This will change the system clock speed to match the DVI signal. +//| .. warning:: This may change the system clock speed to match the DVI signal. //| Make sure to initialize other objects after this one so they account //| for the changed clock. //| @@ -49,6 +49,7 @@ //| //| * 1 - Each bit is a pixel. Either white (1) or black (0). //| * 2 - Each 2 bits is a pixels. Grayscale between white (0x3) and black (0x0). +//| * 4 - Each nibble is a pixels in RGB format. The fourth bit is ignored. (RP2350 only) //| * 8 - Each byte is a pixels in RGB332 format. //| * 16 - Each two bytes are a pixel in RGB565 format. //| @@ -101,7 +102,7 @@ static mp_obj_t picodvi_framebuffer_make_new(const mp_obj_type_t *type, size_t n mp_uint_t width = (mp_uint_t)mp_arg_validate_int_min(args[ARG_width].u_int, 0, MP_QSTR_width); mp_uint_t height = (mp_uint_t)mp_arg_validate_int_min(args[ARG_height].u_int, 0, MP_QSTR_height); mp_uint_t color_depth = args[ARG_color_depth].u_int; - if (color_depth != 1 && color_depth != 2 && color_depth != 8 && color_depth != 16) { + if (color_depth != 1 && color_depth != 2 && color_depth != 4 && color_depth != 8 && color_depth != 16) { mp_raise_ValueError_varg(MP_ERROR_TEXT("Invalid %q"), MP_QSTR_color_depth); } common_hal_picodvi_framebuffer_construct(self, @@ -195,7 +196,10 @@ static int picodvi_framebuffer_get_height_proto(mp_obj_t self_in) { static int picodvi_framebuffer_get_color_depth_proto(mp_obj_t self_in) { return common_hal_picodvi_framebuffer_get_color_depth(self_in); - ; +} + +static bool picodvi_framebuffer_get_grayscale_proto(mp_obj_t self_in) { + return common_hal_picodvi_framebuffer_get_grayscale(self_in); } static int picodvi_framebuffer_get_bytes_per_cell_proto(mp_obj_t self_in) { @@ -220,6 +224,7 @@ static const framebuffer_p_t picodvi_framebuffer_proto = { .get_width = picodvi_framebuffer_get_width_proto, .get_height = picodvi_framebuffer_get_height_proto, .get_color_depth = picodvi_framebuffer_get_color_depth_proto, + .get_grayscale = picodvi_framebuffer_get_grayscale_proto, .get_row_stride = picodvi_framebuffer_get_row_stride_proto, .get_bytes_per_cell = picodvi_framebuffer_get_bytes_per_cell_proto, .get_native_frames_per_second = picodvi_framebuffer_get_native_frames_per_second_proto, diff --git a/ports/raspberrypi/bindings/picodvi/Framebuffer.h b/ports/raspberrypi/bindings/picodvi/Framebuffer.h index 7c23fd0eaa60..7cb335e91e76 100644 --- a/ports/raspberrypi/bindings/picodvi/Framebuffer.h +++ b/ports/raspberrypi/bindings/picodvi/Framebuffer.h @@ -26,4 +26,5 @@ int common_hal_picodvi_framebuffer_get_width(picodvi_framebuffer_obj_t *self); int common_hal_picodvi_framebuffer_get_height(picodvi_framebuffer_obj_t *self); int common_hal_picodvi_framebuffer_get_row_stride(picodvi_framebuffer_obj_t *self); int common_hal_picodvi_framebuffer_get_color_depth(picodvi_framebuffer_obj_t *self); +bool common_hal_picodvi_framebuffer_get_grayscale(picodvi_framebuffer_obj_t *self); mp_int_t common_hal_picodvi_framebuffer_get_buffer(mp_obj_t self_in, mp_buffer_info_t *bufinfo, mp_uint_t flags); diff --git a/ports/raspberrypi/boards/adafruit_feather_rp2350/board.c b/ports/raspberrypi/boards/adafruit_feather_rp2350/board.c new file mode 100644 index 000000000000..331653173ecd --- /dev/null +++ b/ports/raspberrypi/boards/adafruit_feather_rp2350/board.c @@ -0,0 +1,29 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2021 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "supervisor/board.h" + +// Use the MP_WEAK supervisor/shared/board.c versions of routines not defined here. diff --git a/ports/raspberrypi/boards/adafruit_feather_rp2350/mpconfigboard.h b/ports/raspberrypi/boards/adafruit_feather_rp2350/mpconfigboard.h new file mode 100644 index 000000000000..37d4c7884ab6 --- /dev/null +++ b/ports/raspberrypi/boards/adafruit_feather_rp2350/mpconfigboard.h @@ -0,0 +1,16 @@ +#define MICROPY_HW_BOARD_NAME "Adafruit Feather RP2350" +#define MICROPY_HW_MCU_NAME "rp2350a" + +#define MICROPY_HW_NEOPIXEL (&pin_GPIO21) + +#define DEFAULT_I2C_BUS_SCL (&pin_GPIO3) +#define DEFAULT_I2C_BUS_SDA (&pin_GPIO2) + +#define DEFAULT_SPI_BUS_SCK (&pin_GPIO22) +#define DEFAULT_SPI_BUS_MOSI (&pin_GPIO23) +#define DEFAULT_SPI_BUS_MISO (&pin_GPIO20) + +#define DEFAULT_UART_BUS_RX (&pin_GPIO1) +#define DEFAULT_UART_BUS_TX (&pin_GPIO0) + +#define CIRCUITPY_PSRAM_CHIP_SELECT (&pin_GPIO8) diff --git a/ports/raspberrypi/boards/adafruit_feather_rp2350/mpconfigboard.mk b/ports/raspberrypi/boards/adafruit_feather_rp2350/mpconfigboard.mk new file mode 100644 index 000000000000..f584f94bb693 --- /dev/null +++ b/ports/raspberrypi/boards/adafruit_feather_rp2350/mpconfigboard.mk @@ -0,0 +1,17 @@ +USB_VID = 0x239A +USB_PID = 0x8150 +USB_PRODUCT = "Feather RP2350" +USB_MANUFACTURER = "Adafruit" + +CHIP_VARIANT = RP2350 +CHIP_PACKAGE = A +CHIP_FAMILY = rp2 + +EXTERNAL_FLASH_DEVICES = "GD25Q64C,W25Q64JVxQ" + +CIRCUITPY_ALARM = 0 +CIRCUITPY_RGBMATRIX = 0 +CIRCUITPY_USB_HOST = 0 + +CIRCUITPY_FLOPPYIO = 0 +CIRCUITPY_PICODVI = 1 diff --git a/ports/raspberrypi/boards/adafruit_feather_rp2350/pico-sdk-configboard.h b/ports/raspberrypi/boards/adafruit_feather_rp2350/pico-sdk-configboard.h new file mode 100644 index 000000000000..a41131dd22b7 --- /dev/null +++ b/ports/raspberrypi/boards/adafruit_feather_rp2350/pico-sdk-configboard.h @@ -0,0 +1,4 @@ +// Put board-specific pico-sdk definitions here. This file must exist. + +// Allow extra time for xosc to start. +#define PICO_XOSC_STARTUP_DELAY_MULTIPLIER 64 diff --git a/ports/raspberrypi/boards/adafruit_feather_rp2350/pins.c b/ports/raspberrypi/boards/adafruit_feather_rp2350/pins.c new file mode 100644 index 000000000000..8a3e4e291a97 --- /dev/null +++ b/ports/raspberrypi/boards/adafruit_feather_rp2350/pins.c @@ -0,0 +1,47 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + CIRCUITPYTHON_BOARD_DICT_STANDARD_ITEMS + + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO26) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO27) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO28) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO29) }, + { MP_ROM_QSTR(MP_QSTR_D24), MP_ROM_PTR(&pin_GPIO24) }, + { MP_ROM_QSTR(MP_QSTR_D25), MP_ROM_PTR(&pin_GPIO25) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO22) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO23) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO20) }, + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_GPIO1) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO1) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO0) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO0) }, + + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO2) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO3) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO5) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO6) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO9) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO10) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO11) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO4) }, + { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_GPIO7) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO7) }, + + { MP_ROM_QSTR(MP_QSTR_CKN), MP_ROM_PTR(&pin_GPIO15) }, + { MP_ROM_QSTR(MP_QSTR_CKP), MP_ROM_PTR(&pin_GPIO14) }, + { MP_ROM_QSTR(MP_QSTR_D0N), MP_ROM_PTR(&pin_GPIO19) }, + { MP_ROM_QSTR(MP_QSTR_D0P), MP_ROM_PTR(&pin_GPIO18) }, + { MP_ROM_QSTR(MP_QSTR_D1N), MP_ROM_PTR(&pin_GPIO17) }, + { MP_ROM_QSTR(MP_QSTR_D1P), MP_ROM_PTR(&pin_GPIO16) }, + { MP_ROM_QSTR(MP_QSTR_D2N), MP_ROM_PTR(&pin_GPIO13) }, + { MP_ROM_QSTR(MP_QSTR_D2P), MP_ROM_PTR(&pin_GPIO12) }, + + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO21) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_STEMMA_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/raspberrypi/boards/adafruit_metro_rp2350/board.c b/ports/raspberrypi/boards/adafruit_metro_rp2350/board.c new file mode 100644 index 000000000000..331653173ecd --- /dev/null +++ b/ports/raspberrypi/boards/adafruit_metro_rp2350/board.c @@ -0,0 +1,29 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2021 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "supervisor/board.h" + +// Use the MP_WEAK supervisor/shared/board.c versions of routines not defined here. diff --git a/ports/raspberrypi/boards/adafruit_metro_rp2350/mpconfigboard.h b/ports/raspberrypi/boards/adafruit_metro_rp2350/mpconfigboard.h new file mode 100644 index 000000000000..a46a657b6963 --- /dev/null +++ b/ports/raspberrypi/boards/adafruit_metro_rp2350/mpconfigboard.h @@ -0,0 +1,19 @@ +#define MICROPY_HW_BOARD_NAME "Adafruit Metro RP2350" +#define MICROPY_HW_MCU_NAME "rp2350a" + +#define MICROPY_HW_NEOPIXEL (&pin_GPIO14) + +#define DEFAULT_I2C_BUS_SCL (&pin_GPIO24) +#define DEFAULT_I2C_BUS_SDA (&pin_GPIO25) + +#define DEFAULT_SPI_BUS_SCK (&pin_GPIO22) +#define DEFAULT_SPI_BUS_MOSI (&pin_GPIO23) +#define DEFAULT_SPI_BUS_MISO (&pin_GPIO20) + +#define DEFAULT_UART_BUS_RX (&pin_GPIO1) +#define DEFAULT_UART_BUS_TX (&pin_GPIO0) + +// #define CIRCUITPY_CONSOLE_UART_RX DEFAULT_UART_BUS_RX +// #define CIRCUITPY_CONSOLE_UART_TX DEFAULT_UART_BUS_TX + +#define CIRCUITPY_PSRAM_CHIP_SELECT (&pin_GPIO8) diff --git a/ports/raspberrypi/boards/adafruit_metro_rp2350/mpconfigboard.mk b/ports/raspberrypi/boards/adafruit_metro_rp2350/mpconfigboard.mk new file mode 100644 index 000000000000..6c0f4f7233c6 --- /dev/null +++ b/ports/raspberrypi/boards/adafruit_metro_rp2350/mpconfigboard.mk @@ -0,0 +1,14 @@ +USB_VID = 0x239A +USB_PID = 0x814E +USB_PRODUCT = "Metro RP2350" +USB_MANUFACTURER = "Adafruit" + +CHIP_VARIANT = RP2350 +CHIP_PACKAGE = A +CHIP_FAMILY = rp2 + +EXTERNAL_FLASH_DEVICES = "W25Q128JVxQ" + +CIRCUITPY_ALARM = 0 +CIRCUITPY_RGBMATRIX = 0 +CIRCUITPY_USB_HOST = 0 diff --git a/ports/raspberrypi/boards/adafruit_metro_rp2350/pico-sdk-configboard.h b/ports/raspberrypi/boards/adafruit_metro_rp2350/pico-sdk-configboard.h new file mode 100644 index 000000000000..a41131dd22b7 --- /dev/null +++ b/ports/raspberrypi/boards/adafruit_metro_rp2350/pico-sdk-configboard.h @@ -0,0 +1,4 @@ +// Put board-specific pico-sdk definitions here. This file must exist. + +// Allow extra time for xosc to start. +#define PICO_XOSC_STARTUP_DELAY_MULTIPLIER 64 diff --git a/ports/raspberrypi/boards/adafruit_metro_rp2350/pins.c b/ports/raspberrypi/boards/adafruit_metro_rp2350/pins.c new file mode 100644 index 000000000000..b5a5d21f5229 --- /dev/null +++ b/ports/raspberrypi/boards/adafruit_metro_rp2350/pins.c @@ -0,0 +1,54 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + CIRCUITPYTHON_BOARD_DICT_STANDARD_ITEMS + + { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO26) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO27) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO28) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO29) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_D24), MP_ROM_PTR(&pin_GPIO24) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D25), MP_ROM_PTR(&pin_GPIO25) }, + + // On-board switch reverses D0 and D1 connections to RX and TX. + + { MP_OBJ_NEW_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_GPIO0) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_RX_D0_SWITCH_LEFT), MP_ROM_PTR(&pin_GPIO0) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TX_D0_SWITCH_RIGHT), MP_ROM_PTR(&pin_GPIO0) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO1) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TX_D1_SWITCH_LEFT), MP_ROM_PTR(&pin_GPIO1) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_RX_D1_SWITCH_RIGHT), MP_ROM_PTR(&pin_GPIO1) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_GPIO2) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_GPIO3) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_GPIO4) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO5) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO6) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_GPIO7) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_GPIO8) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO9) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO11) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO12) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_GPIO13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO13) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO24) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO25) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO14) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO22) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO23) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO20) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_CS), MP_ROM_PTR(&pin_GPIO21) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_STEMMA_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/raspberrypi/boards/bradanlanestudio_explorer_rp2040/board.c b/ports/raspberrypi/boards/bradanlanestudio_explorer_rp2040/board.c index a863c2b1228a..60efe1e28225 100644 --- a/ports/raspberrypi/boards/bradanlanestudio_explorer_rp2040/board.c +++ b/ports/raspberrypi/boards/bradanlanestudio_explorer_rp2040/board.c @@ -192,7 +192,7 @@ bool board_reset_pin_number(uint8_t pin_number) { // glitch. gpio_put(pin_number, 1); gpio_set_dir(pin_number, GPIO_OUT); - hw_write_masked(&padsbank0_hw->io[pin_number], PADS_BANK0_GPIO0_DRIVE_VALUE_12MA << PADS_BANK0_GPIO0_DRIVE_LSB, PADS_BANK0_GPIO0_DRIVE_BITS); + hw_write_masked(&pads_bank0_hw->io[pin_number], PADS_BANK0_GPIO0_DRIVE_VALUE_12MA << PADS_BANK0_GPIO0_DRIVE_LSB, PADS_BANK0_GPIO0_DRIVE_BITS); gpio_set_function(pin_number, GPIO_FUNC_SIO); } return true; diff --git a/ports/raspberrypi/boards/cytron_motion_2350_pro/board.c b/ports/raspberrypi/boards/cytron_motion_2350_pro/board.c new file mode 100644 index 000000000000..331653173ecd --- /dev/null +++ b/ports/raspberrypi/boards/cytron_motion_2350_pro/board.c @@ -0,0 +1,29 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2021 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "supervisor/board.h" + +// Use the MP_WEAK supervisor/shared/board.c versions of routines not defined here. diff --git a/ports/raspberrypi/boards/cytron_motion_2350_pro/mpconfigboard.h b/ports/raspberrypi/boards/cytron_motion_2350_pro/mpconfigboard.h new file mode 100644 index 000000000000..1d64d6f8a864 --- /dev/null +++ b/ports/raspberrypi/boards/cytron_motion_2350_pro/mpconfigboard.h @@ -0,0 +1,9 @@ +#define MICROPY_HW_BOARD_NAME "Cytron MOTION 2350 Pro" +#define MICROPY_HW_MCU_NAME "rp2350" + +#define DEFAULT_I2C_BUS_SCL (&pin_GPIO17) +#define DEFAULT_I2C_BUS_SDA (&pin_GPIO16) + +#define DEFAULT_SPI_BUS_SCK (&pin_GPIO18) +#define DEFAULT_SPI_BUS_MOSI (&pin_GPIO19) +#define DEFAULT_SPI_BUS_MISO (&pin_GPIO16) diff --git a/ports/raspberrypi/boards/cytron_motion_2350_pro/mpconfigboard.mk b/ports/raspberrypi/boards/cytron_motion_2350_pro/mpconfigboard.mk new file mode 100644 index 000000000000..fe36ed3b8da6 --- /dev/null +++ b/ports/raspberrypi/boards/cytron_motion_2350_pro/mpconfigboard.mk @@ -0,0 +1,20 @@ +USB_VID = 0x2E8A +USB_PID = 0x1096 +USB_PRODUCT = "MOTION 2350 Pro" +USB_MANUFACTURER = "Cytron" + +CHIP_VARIANT = RP2350 +CHIP_PACKAGE = A +CHIP_FAMILY = rp2 + +EXTERNAL_FLASH_DEVICES = "W25Q16JVxQ" + +CIRCUITPY__EVE = 1 +CIRCUITPY_ALARM = 0 +CIRCUITPY_RGBMATRIX = 0 +CIRCUITPY_USB_HOST = 0 + +# Include these Python libraries in firmware. +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_NeoPixel +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_Motor +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_SimpleIO diff --git a/ports/raspberrypi/boards/cytron_motion_2350_pro/pico-sdk-configboard.h b/ports/raspberrypi/boards/cytron_motion_2350_pro/pico-sdk-configboard.h new file mode 100644 index 000000000000..a41131dd22b7 --- /dev/null +++ b/ports/raspberrypi/boards/cytron_motion_2350_pro/pico-sdk-configboard.h @@ -0,0 +1,4 @@ +// Put board-specific pico-sdk definitions here. This file must exist. + +// Allow extra time for xosc to start. +#define PICO_XOSC_STARTUP_DELAY_MULTIPLIER 64 diff --git a/ports/raspberrypi/boards/cytron_motion_2350_pro/pins.c b/ports/raspberrypi/boards/cytron_motion_2350_pro/pins.c new file mode 100644 index 000000000000..37ac1fac19e4 --- /dev/null +++ b/ports/raspberrypi/boards/cytron_motion_2350_pro/pins.c @@ -0,0 +1,71 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + CIRCUITPYTHON_BOARD_DICT_STANDARD_ITEMS + + { MP_OBJ_NEW_QSTR(MP_QSTR_GP0), MP_ROM_PTR(&pin_GPIO0) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_GP1), MP_ROM_PTR(&pin_GPIO1) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_GP2), MP_ROM_PTR(&pin_GPIO2) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_GP3), MP_ROM_PTR(&pin_GPIO3) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_GP4), MP_ROM_PTR(&pin_GPIO4) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_GP5), MP_ROM_PTR(&pin_GPIO5) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_GP6), MP_ROM_PTR(&pin_GPIO6) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_GP7), MP_ROM_PTR(&pin_GPIO7) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_GP8), MP_ROM_PTR(&pin_GPIO8) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_GP9), MP_ROM_PTR(&pin_GPIO9) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_GP10), MP_ROM_PTR(&pin_GPIO10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_GP11), MP_ROM_PTR(&pin_GPIO11) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_GP12), MP_ROM_PTR(&pin_GPIO12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_GP13), MP_ROM_PTR(&pin_GPIO13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_GP14), MP_ROM_PTR(&pin_GPIO14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_GP15), MP_ROM_PTR(&pin_GPIO15) }, + + // Motor Controls + { MP_OBJ_NEW_QSTR(MP_QSTR_M1A), MP_ROM_PTR(&pin_GPIO8) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_M1B), MP_ROM_PTR(&pin_GPIO9) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_M2A), MP_ROM_PTR(&pin_GPIO10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_M2B), MP_ROM_PTR(&pin_GPIO11) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_M3A), MP_ROM_PTR(&pin_GPIO12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_M3B), MP_ROM_PTR(&pin_GPIO13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_M4A), MP_ROM_PTR(&pin_GPIO14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_M4B), MP_ROM_PTR(&pin_GPIO15) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_GP16), MP_ROM_PTR(&pin_GPIO16) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_GP17), MP_ROM_PTR(&pin_GPIO17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_GP18), MP_ROM_PTR(&pin_GPIO18) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_GP19), MP_ROM_PTR(&pin_GPIO19) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_GP20), MP_ROM_PTR(&pin_GPIO20) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_GP21), MP_ROM_PTR(&pin_GPIO21) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_GP22), MP_ROM_PTR(&pin_GPIO22) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_GP23), MP_ROM_PTR(&pin_GPIO23) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_GP24), MP_ROM_PTR(&pin_GPIO24) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_GP25), MP_ROM_PTR(&pin_GPIO25) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_GP26), MP_ROM_PTR(&pin_GPIO26) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO26) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_GP27), MP_ROM_PTR(&pin_GPIO27) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO27) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_GP28), MP_ROM_PTR(&pin_GPIO28) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO28) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_GP29), MP_ROM_PTR(&pin_GPIO29) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO29) }, + { MP_ROM_QSTR(MP_QSTR_VOLTAGE_MONITOR), MP_ROM_PTR(&pin_GPIO29) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO23) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO16) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO17) }, + + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO16) }, + { MP_ROM_QSTR(MP_QSTR_CS), MP_ROM_PTR(&pin_GPIO17) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO18) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO19) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_STEMMA_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/raspberrypi/boards/raspberry_pi_pico2/board.c b/ports/raspberrypi/boards/raspberry_pi_pico2/board.c new file mode 100644 index 000000000000..331653173ecd --- /dev/null +++ b/ports/raspberrypi/boards/raspberry_pi_pico2/board.c @@ -0,0 +1,29 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2021 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "supervisor/board.h" + +// Use the MP_WEAK supervisor/shared/board.c versions of routines not defined here. diff --git a/ports/raspberrypi/boards/raspberry_pi_pico2/mpconfigboard.h b/ports/raspberrypi/boards/raspberry_pi_pico2/mpconfigboard.h new file mode 100644 index 000000000000..f7b4baa04d48 --- /dev/null +++ b/ports/raspberrypi/boards/raspberry_pi_pico2/mpconfigboard.h @@ -0,0 +1,7 @@ +#define MICROPY_HW_BOARD_NAME "Raspberry Pi Pico 2" +#define MICROPY_HW_MCU_NAME "rp2350a" + +#define MICROPY_HW_LED_STATUS (&pin_GPIO25) + +#define CIRCUITPY_BOARD_I2C (1) +#define CIRCUITPY_BOARD_I2C_PIN {{.scl = &pin_GPIO5, .sda = &pin_GPIO4}} diff --git a/ports/raspberrypi/boards/raspberry_pi_pico2/mpconfigboard.mk b/ports/raspberrypi/boards/raspberry_pi_pico2/mpconfigboard.mk new file mode 100644 index 000000000000..34191686b42a --- /dev/null +++ b/ports/raspberrypi/boards/raspberry_pi_pico2/mpconfigboard.mk @@ -0,0 +1,15 @@ +USB_VID = 0x2E8A +USB_PID = 0x000B +USB_PRODUCT = "Pico 2" +USB_MANUFACTURER = "Raspberry Pi" + +CHIP_VARIANT = RP2350 +CHIP_PACKAGE = A +CHIP_FAMILY = rp2 + +EXTERNAL_FLASH_DEVICES = "W25Q32JVxQ" + +CIRCUITPY__EVE = 1 +CIRCUITPY_ALARM = 0 +CIRCUITPY_RGBMATRIX = 0 +CIRCUITPY_USB_HOST = 0 diff --git a/ports/raspberrypi/boards/raspberry_pi_pico2/pico-sdk-configboard.h b/ports/raspberrypi/boards/raspberry_pi_pico2/pico-sdk-configboard.h new file mode 100644 index 000000000000..36da55d45719 --- /dev/null +++ b/ports/raspberrypi/boards/raspberry_pi_pico2/pico-sdk-configboard.h @@ -0,0 +1 @@ +// Put board-specific pico-sdk definitions here. This file must exist. diff --git a/ports/raspberrypi/boards/raspberry_pi_pico2/pins.c b/ports/raspberrypi/boards/raspberry_pi_pico2/pins.c new file mode 100644 index 000000000000..2d56b9375752 --- /dev/null +++ b/ports/raspberrypi/boards/raspberry_pi_pico2/pins.c @@ -0,0 +1,56 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + CIRCUITPYTHON_BOARD_DICT_STANDARD_ITEMS + + { MP_ROM_QSTR(MP_QSTR_GP0), MP_ROM_PTR(&pin_GPIO0) }, + { MP_ROM_QSTR(MP_QSTR_GP1), MP_ROM_PTR(&pin_GPIO1) }, + { MP_ROM_QSTR(MP_QSTR_GP2), MP_ROM_PTR(&pin_GPIO2) }, + { MP_ROM_QSTR(MP_QSTR_GP3), MP_ROM_PTR(&pin_GPIO3) }, + { MP_ROM_QSTR(MP_QSTR_GP4), MP_ROM_PTR(&pin_GPIO4) }, + { MP_ROM_QSTR(MP_QSTR_GP5), MP_ROM_PTR(&pin_GPIO5) }, + { MP_ROM_QSTR(MP_QSTR_GP6), MP_ROM_PTR(&pin_GPIO6) }, + { MP_ROM_QSTR(MP_QSTR_GP7), MP_ROM_PTR(&pin_GPIO7) }, + { MP_ROM_QSTR(MP_QSTR_GP8), MP_ROM_PTR(&pin_GPIO8) }, + { MP_ROM_QSTR(MP_QSTR_GP9), MP_ROM_PTR(&pin_GPIO9) }, + { MP_ROM_QSTR(MP_QSTR_GP10), MP_ROM_PTR(&pin_GPIO10) }, + { MP_ROM_QSTR(MP_QSTR_GP11), MP_ROM_PTR(&pin_GPIO11) }, + { MP_ROM_QSTR(MP_QSTR_GP12), MP_ROM_PTR(&pin_GPIO12) }, + { MP_ROM_QSTR(MP_QSTR_GP13), MP_ROM_PTR(&pin_GPIO13) }, + { MP_ROM_QSTR(MP_QSTR_GP14), MP_ROM_PTR(&pin_GPIO14) }, + { MP_ROM_QSTR(MP_QSTR_GP15), MP_ROM_PTR(&pin_GPIO15) }, + { MP_ROM_QSTR(MP_QSTR_GP16), MP_ROM_PTR(&pin_GPIO16) }, + { MP_ROM_QSTR(MP_QSTR_GP17), MP_ROM_PTR(&pin_GPIO17) }, + { MP_ROM_QSTR(MP_QSTR_GP18), MP_ROM_PTR(&pin_GPIO18) }, + { MP_ROM_QSTR(MP_QSTR_GP19), MP_ROM_PTR(&pin_GPIO19) }, + { MP_ROM_QSTR(MP_QSTR_GP20), MP_ROM_PTR(&pin_GPIO20) }, + { MP_ROM_QSTR(MP_QSTR_GP21), MP_ROM_PTR(&pin_GPIO21) }, + { MP_ROM_QSTR(MP_QSTR_GP22), MP_ROM_PTR(&pin_GPIO22) }, + + { MP_ROM_QSTR(MP_QSTR_SMPS_MODE), MP_ROM_PTR(&pin_GPIO23) }, + { MP_ROM_QSTR(MP_QSTR_GP23), MP_ROM_PTR(&pin_GPIO23) }, + + { MP_ROM_QSTR(MP_QSTR_VBUS_SENSE), MP_ROM_PTR(&pin_GPIO24) }, + { MP_ROM_QSTR(MP_QSTR_GP24), MP_ROM_PTR(&pin_GPIO24) }, + + { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_GPIO25) }, + { MP_ROM_QSTR(MP_QSTR_GP25), MP_ROM_PTR(&pin_GPIO25) }, + + { MP_ROM_QSTR(MP_QSTR_GP26_A0), MP_ROM_PTR(&pin_GPIO26) }, + { MP_ROM_QSTR(MP_QSTR_GP26), MP_ROM_PTR(&pin_GPIO26) }, + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO26) }, + + { MP_ROM_QSTR(MP_QSTR_GP27_A1), MP_ROM_PTR(&pin_GPIO27) }, + { MP_ROM_QSTR(MP_QSTR_GP27), MP_ROM_PTR(&pin_GPIO27) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO27) }, + + { MP_ROM_QSTR(MP_QSTR_GP28_A2), MP_ROM_PTR(&pin_GPIO28) }, + { MP_ROM_QSTR(MP_QSTR_GP28), MP_ROM_PTR(&pin_GPIO28) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO28) }, + + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO29) }, + { MP_ROM_QSTR(MP_QSTR_VOLTAGE_MONITOR), MP_ROM_PTR(&pin_GPIO29) }, + + { MP_ROM_QSTR(MP_QSTR_STEMMA_I2C), MP_ROM_PTR(&board_i2c_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/raspberrypi/boards/solderparty_rp2040_stamp/mpconfigboard.mk b/ports/raspberrypi/boards/solderparty_rp2040_stamp/mpconfigboard.mk index 1954b12415ca..fec64b4224be 100644 --- a/ports/raspberrypi/boards/solderparty_rp2040_stamp/mpconfigboard.mk +++ b/ports/raspberrypi/boards/solderparty_rp2040_stamp/mpconfigboard.mk @@ -9,6 +9,7 @@ CHIP_FAMILY = rp2 EXTERNAL_FLASH_DEVICES = "GD25Q64C" CIRCUITPY__EVE = 1 +CIRCUITPY_PICODVI = 1 FROZEN_MPY_DIRS += $(TOP)/ports/raspberrypi/boards/solderparty_rp2040_stamp FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_HID diff --git a/ports/raspberrypi/boards/solderparty_rp2040_stamp/stamp_carrier_board_xl.py b/ports/raspberrypi/boards/solderparty_rp2040_stamp/stamp_carrier_board_xl.py new file mode 100644 index 000000000000..eeeb0c755b74 --- /dev/null +++ b/ports/raspberrypi/boards/solderparty_rp2040_stamp/stamp_carrier_board_xl.py @@ -0,0 +1,57 @@ +from board import * +import busio + + +_SPI = None +_UART = None +_I2C = None + + +SCL = GP5 +SDA = GP4 +SCK = GP22 +CIPO = GP20 +MISO = GP20 +COPI = GP23 +MOSI = GP23 +CS = GP21 +TX = GP0 +RX = GP1 +LED = GP3 +VOLTAGE_MONITOR = A0 +BATTERY = A0 +USB_SWITCH = GP7 +CARD_SCK = GP10 +CARD_CIPO = GP8 +CARD_MISO = GP8 +CARD_COPI = GP11 +CARD_MOSI = GP11 +CARD_CS = GP9 +CARD_DETECT = GP2 + + +def SPI(): + global _SPI + + if not _SPI: + _SPI = busio.SPI(SCK, COPI, CIPO) + + return _SPI + + +def UART(): + global _UART + + if not _UART: + _UART = busio.UART(TX, RX) + + return _UART + + +def I2C(): + global _I2C + + if not _I2C: + _I2C = busio.I2C(SCL, SDA) + + return _I2C diff --git a/ports/raspberrypi/boards/solderparty_rp2350_stamp/board.c b/ports/raspberrypi/boards/solderparty_rp2350_stamp/board.c new file mode 100644 index 000000000000..331653173ecd --- /dev/null +++ b/ports/raspberrypi/boards/solderparty_rp2350_stamp/board.c @@ -0,0 +1,29 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2021 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "supervisor/board.h" + +// Use the MP_WEAK supervisor/shared/board.c versions of routines not defined here. diff --git a/ports/raspberrypi/boards/solderparty_rp2350_stamp/mpconfigboard.h b/ports/raspberrypi/boards/solderparty_rp2350_stamp/mpconfigboard.h new file mode 100644 index 000000000000..0214e63c57f0 --- /dev/null +++ b/ports/raspberrypi/boards/solderparty_rp2350_stamp/mpconfigboard.h @@ -0,0 +1,2 @@ +#define MICROPY_HW_BOARD_NAME "RP2350 Stamp" +#define MICROPY_HW_MCU_NAME "rp2350a" diff --git a/ports/raspberrypi/boards/solderparty_rp2350_stamp/mpconfigboard.mk b/ports/raspberrypi/boards/solderparty_rp2350_stamp/mpconfigboard.mk new file mode 100644 index 000000000000..a18c12a25181 --- /dev/null +++ b/ports/raspberrypi/boards/solderparty_rp2350_stamp/mpconfigboard.mk @@ -0,0 +1,21 @@ +USB_VID = 0x1209 +USB_PID = 0xA183 +USB_PRODUCT = "RP2350 Stamp" +USB_MANUFACTURER = "Solder Party" + +CHIP_VARIANT = RP2350 +CHIP_PACKAGE = A +CHIP_FAMILY = rp2 + +EXTERNAL_FLASH_DEVICES = "W25Q128JVxQ" + +CIRCUITPY__EVE = 1 +CIRCUITPY_ALARM = 0 +CIRCUITPY_RGBMATRIX = 0 +CIRCUITPY_USB_HOST = 0 +CIRCUITPY_PICODVI = 1 + +FROZEN_MPY_DIRS += $(TOP)/ports/raspberrypi/boards/solderparty_rp2040_stamp +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_HID +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_NeoPixel +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_Register diff --git a/ports/raspberrypi/boards/solderparty_rp2350_stamp/pico-sdk-configboard.h b/ports/raspberrypi/boards/solderparty_rp2350_stamp/pico-sdk-configboard.h new file mode 100644 index 000000000000..36da55d45719 --- /dev/null +++ b/ports/raspberrypi/boards/solderparty_rp2350_stamp/pico-sdk-configboard.h @@ -0,0 +1 @@ +// Put board-specific pico-sdk definitions here. This file must exist. diff --git a/ports/raspberrypi/boards/solderparty_rp2350_stamp/pins.c b/ports/raspberrypi/boards/solderparty_rp2350_stamp/pins.c new file mode 100644 index 000000000000..d93ed61962c4 --- /dev/null +++ b/ports/raspberrypi/boards/solderparty_rp2350_stamp/pins.c @@ -0,0 +1,45 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + CIRCUITPYTHON_BOARD_DICT_STANDARD_ITEMS + + { MP_ROM_QSTR(MP_QSTR_GP0), MP_ROM_PTR(&pin_GPIO0) }, + { MP_ROM_QSTR(MP_QSTR_GP1), MP_ROM_PTR(&pin_GPIO1) }, + { MP_ROM_QSTR(MP_QSTR_GP2), MP_ROM_PTR(&pin_GPIO2) }, + { MP_ROM_QSTR(MP_QSTR_GP3), MP_ROM_PTR(&pin_GPIO3) }, + { MP_ROM_QSTR(MP_QSTR_GP4), MP_ROM_PTR(&pin_GPIO4) }, + { MP_ROM_QSTR(MP_QSTR_GP5), MP_ROM_PTR(&pin_GPIO5) }, + { MP_ROM_QSTR(MP_QSTR_GP6), MP_ROM_PTR(&pin_GPIO6) }, + { MP_ROM_QSTR(MP_QSTR_GP7), MP_ROM_PTR(&pin_GPIO7) }, + { MP_ROM_QSTR(MP_QSTR_GP8), MP_ROM_PTR(&pin_GPIO8) }, + { MP_ROM_QSTR(MP_QSTR_GP9), MP_ROM_PTR(&pin_GPIO9) }, + { MP_ROM_QSTR(MP_QSTR_GP10), MP_ROM_PTR(&pin_GPIO10) }, + { MP_ROM_QSTR(MP_QSTR_GP11), MP_ROM_PTR(&pin_GPIO11) }, + { MP_ROM_QSTR(MP_QSTR_GP12), MP_ROM_PTR(&pin_GPIO12) }, + { MP_ROM_QSTR(MP_QSTR_GP13), MP_ROM_PTR(&pin_GPIO13) }, + { MP_ROM_QSTR(MP_QSTR_GP14), MP_ROM_PTR(&pin_GPIO14) }, + { MP_ROM_QSTR(MP_QSTR_GP15), MP_ROM_PTR(&pin_GPIO15) }, + { MP_ROM_QSTR(MP_QSTR_GP16), MP_ROM_PTR(&pin_GPIO16) }, + { MP_ROM_QSTR(MP_QSTR_GP17), MP_ROM_PTR(&pin_GPIO17) }, + { MP_ROM_QSTR(MP_QSTR_GP18), MP_ROM_PTR(&pin_GPIO18) }, + { MP_ROM_QSTR(MP_QSTR_GP19), MP_ROM_PTR(&pin_GPIO19) }, + { MP_ROM_QSTR(MP_QSTR_GP20), MP_ROM_PTR(&pin_GPIO20) }, + { MP_ROM_QSTR(MP_QSTR_GP21), MP_ROM_PTR(&pin_GPIO21) }, + { MP_ROM_QSTR(MP_QSTR_GP22), MP_ROM_PTR(&pin_GPIO22) }, + { MP_ROM_QSTR(MP_QSTR_GP23), MP_ROM_PTR(&pin_GPIO23) }, + { MP_ROM_QSTR(MP_QSTR_GP24), MP_ROM_PTR(&pin_GPIO24) }, + { MP_ROM_QSTR(MP_QSTR_GP25), MP_ROM_PTR(&pin_GPIO25) }, + + { MP_ROM_QSTR(MP_QSTR_GP26), MP_ROM_PTR(&pin_GPIO26) }, + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO26) }, + + { MP_ROM_QSTR(MP_QSTR_GP27), MP_ROM_PTR(&pin_GPIO27) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO27) }, + + { MP_ROM_QSTR(MP_QSTR_GP28), MP_ROM_PTR(&pin_GPIO28) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO28) }, + + { MP_ROM_QSTR(MP_QSTR_GP29), MP_ROM_PTR(&pin_GPIO29) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO29) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/raspberrypi/boards/solderparty_rp2350_stamp_xl/board.c b/ports/raspberrypi/boards/solderparty_rp2350_stamp_xl/board.c new file mode 100644 index 000000000000..331653173ecd --- /dev/null +++ b/ports/raspberrypi/boards/solderparty_rp2350_stamp_xl/board.c @@ -0,0 +1,29 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2021 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "supervisor/board.h" + +// Use the MP_WEAK supervisor/shared/board.c versions of routines not defined here. diff --git a/ports/raspberrypi/boards/solderparty_rp2350_stamp_xl/mpconfigboard.h b/ports/raspberrypi/boards/solderparty_rp2350_stamp_xl/mpconfigboard.h new file mode 100644 index 000000000000..2239b526c0ed --- /dev/null +++ b/ports/raspberrypi/boards/solderparty_rp2350_stamp_xl/mpconfigboard.h @@ -0,0 +1,2 @@ +#define MICROPY_HW_BOARD_NAME "RP2350 Stamp XL" +#define MICROPY_HW_MCU_NAME "rp2350b" diff --git a/ports/raspberrypi/boards/solderparty_rp2350_stamp_xl/mpconfigboard.mk b/ports/raspberrypi/boards/solderparty_rp2350_stamp_xl/mpconfigboard.mk new file mode 100644 index 000000000000..e8d3aaa5d055 --- /dev/null +++ b/ports/raspberrypi/boards/solderparty_rp2350_stamp_xl/mpconfigboard.mk @@ -0,0 +1,21 @@ +USB_VID = 0x1209 +USB_PID = 0xA184 +USB_PRODUCT = "RP2350 Stamp XL" +USB_MANUFACTURER = "Solder Party" + +CHIP_VARIANT = RP2350 +CHIP_PACKAGE = B +CHIP_FAMILY = rp2 + +EXTERNAL_FLASH_DEVICES = "W25Q128JVxQ" + +CIRCUITPY__EVE = 1 +CIRCUITPY_ALARM = 0 +CIRCUITPY_RGBMATRIX = 0 +CIRCUITPY_USB_HOST = 0 +CIRCUITPY_PICODVI = 1 + +FROZEN_MPY_DIRS += $(TOP)/ports/raspberrypi/boards/solderparty_rp2040_stamp +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_HID +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_NeoPixel +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_Register diff --git a/ports/raspberrypi/boards/solderparty_rp2350_stamp_xl/pico-sdk-configboard.h b/ports/raspberrypi/boards/solderparty_rp2350_stamp_xl/pico-sdk-configboard.h new file mode 100644 index 000000000000..36da55d45719 --- /dev/null +++ b/ports/raspberrypi/boards/solderparty_rp2350_stamp_xl/pico-sdk-configboard.h @@ -0,0 +1 @@ +// Put board-specific pico-sdk definitions here. This file must exist. diff --git a/ports/raspberrypi/boards/solderparty_rp2350_stamp_xl/pins.c b/ports/raspberrypi/boards/solderparty_rp2350_stamp_xl/pins.c new file mode 100644 index 000000000000..cffefc63545a --- /dev/null +++ b/ports/raspberrypi/boards/solderparty_rp2350_stamp_xl/pins.c @@ -0,0 +1,71 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + CIRCUITPYTHON_BOARD_DICT_STANDARD_ITEMS + + { MP_ROM_QSTR(MP_QSTR_GP0), MP_ROM_PTR(&pin_GPIO0) }, + { MP_ROM_QSTR(MP_QSTR_GP1), MP_ROM_PTR(&pin_GPIO1) }, + { MP_ROM_QSTR(MP_QSTR_GP2), MP_ROM_PTR(&pin_GPIO2) }, + { MP_ROM_QSTR(MP_QSTR_GP3), MP_ROM_PTR(&pin_GPIO3) }, + { MP_ROM_QSTR(MP_QSTR_GP4), MP_ROM_PTR(&pin_GPIO4) }, + { MP_ROM_QSTR(MP_QSTR_GP5), MP_ROM_PTR(&pin_GPIO5) }, + { MP_ROM_QSTR(MP_QSTR_GP6), MP_ROM_PTR(&pin_GPIO6) }, + { MP_ROM_QSTR(MP_QSTR_GP7), MP_ROM_PTR(&pin_GPIO7) }, + { MP_ROM_QSTR(MP_QSTR_GP8), MP_ROM_PTR(&pin_GPIO8) }, + { MP_ROM_QSTR(MP_QSTR_GP9), MP_ROM_PTR(&pin_GPIO9) }, + { MP_ROM_QSTR(MP_QSTR_GP10), MP_ROM_PTR(&pin_GPIO10) }, + { MP_ROM_QSTR(MP_QSTR_GP11), MP_ROM_PTR(&pin_GPIO11) }, + { MP_ROM_QSTR(MP_QSTR_GP12), MP_ROM_PTR(&pin_GPIO12) }, + { MP_ROM_QSTR(MP_QSTR_GP13), MP_ROM_PTR(&pin_GPIO13) }, + { MP_ROM_QSTR(MP_QSTR_GP14), MP_ROM_PTR(&pin_GPIO14) }, + { MP_ROM_QSTR(MP_QSTR_GP15), MP_ROM_PTR(&pin_GPIO15) }, + { MP_ROM_QSTR(MP_QSTR_GP16), MP_ROM_PTR(&pin_GPIO16) }, + { MP_ROM_QSTR(MP_QSTR_GP17), MP_ROM_PTR(&pin_GPIO17) }, + { MP_ROM_QSTR(MP_QSTR_GP18), MP_ROM_PTR(&pin_GPIO18) }, + { MP_ROM_QSTR(MP_QSTR_GP19), MP_ROM_PTR(&pin_GPIO19) }, + { MP_ROM_QSTR(MP_QSTR_GP20), MP_ROM_PTR(&pin_GPIO20) }, + { MP_ROM_QSTR(MP_QSTR_GP21), MP_ROM_PTR(&pin_GPIO21) }, + { MP_ROM_QSTR(MP_QSTR_GP22), MP_ROM_PTR(&pin_GPIO22) }, + { MP_ROM_QSTR(MP_QSTR_GP23), MP_ROM_PTR(&pin_GPIO23) }, + { MP_ROM_QSTR(MP_QSTR_GP24), MP_ROM_PTR(&pin_GPIO24) }, + { MP_ROM_QSTR(MP_QSTR_GP25), MP_ROM_PTR(&pin_GPIO25) }, + { MP_ROM_QSTR(MP_QSTR_GP26), MP_ROM_PTR(&pin_GPIO26) }, + { MP_ROM_QSTR(MP_QSTR_GP27), MP_ROM_PTR(&pin_GPIO27) }, + { MP_ROM_QSTR(MP_QSTR_GP28), MP_ROM_PTR(&pin_GPIO28) }, + { MP_ROM_QSTR(MP_QSTR_GP29), MP_ROM_PTR(&pin_GPIO29) }, + { MP_ROM_QSTR(MP_QSTR_GP30), MP_ROM_PTR(&pin_GPIO30) }, + { MP_ROM_QSTR(MP_QSTR_GP31), MP_ROM_PTR(&pin_GPIO31) }, + { MP_ROM_QSTR(MP_QSTR_GP32), MP_ROM_PTR(&pin_GPIO32) }, + { MP_ROM_QSTR(MP_QSTR_GP33), MP_ROM_PTR(&pin_GPIO33) }, + { MP_ROM_QSTR(MP_QSTR_GP34), MP_ROM_PTR(&pin_GPIO34) }, + { MP_ROM_QSTR(MP_QSTR_GP35), MP_ROM_PTR(&pin_GPIO35) }, + { MP_ROM_QSTR(MP_QSTR_GP36), MP_ROM_PTR(&pin_GPIO36) }, + { MP_ROM_QSTR(MP_QSTR_GP37), MP_ROM_PTR(&pin_GPIO37) }, + { MP_ROM_QSTR(MP_QSTR_GP38), MP_ROM_PTR(&pin_GPIO38) }, + { MP_ROM_QSTR(MP_QSTR_GP39), MP_ROM_PTR(&pin_GPIO39) }, + + { MP_ROM_QSTR(MP_QSTR_GP40), MP_ROM_PTR(&pin_GPIO40) }, + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO40) }, + + { MP_ROM_QSTR(MP_QSTR_GP41), MP_ROM_PTR(&pin_GPIO41) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO41) }, + + { MP_ROM_QSTR(MP_QSTR_GP42), MP_ROM_PTR(&pin_GPIO42) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO42) }, + + { MP_ROM_QSTR(MP_QSTR_GP43), MP_ROM_PTR(&pin_GPIO43) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO43) }, + + { MP_ROM_QSTR(MP_QSTR_GP44), MP_ROM_PTR(&pin_GPIO44) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO44) }, + + { MP_ROM_QSTR(MP_QSTR_GP45), MP_ROM_PTR(&pin_GPIO45) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO45) }, + + { MP_ROM_QSTR(MP_QSTR_GP46), MP_ROM_PTR(&pin_GPIO46) }, + { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_GPIO46) }, + + { MP_ROM_QSTR(MP_QSTR_GP47), MP_ROM_PTR(&pin_GPIO47) }, + { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_GPIO47) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/raspberrypi/stage2.c.jinja b/ports/raspberrypi/boot_stage2/RP2040.c.jinja similarity index 100% rename from ports/raspberrypi/stage2.c.jinja rename to ports/raspberrypi/boot_stage2/RP2040.c.jinja diff --git a/ports/raspberrypi/boot_stage2.ld b/ports/raspberrypi/boot_stage2/RP2040.ld similarity index 100% rename from ports/raspberrypi/boot_stage2.ld rename to ports/raspberrypi/boot_stage2/RP2040.ld diff --git a/ports/raspberrypi/boot_stage2/RP2350.c.jinja b/ports/raspberrypi/boot_stage2/RP2350.c.jinja new file mode 100644 index 000000000000..77969f9fcae9 --- /dev/null +++ b/ports/raspberrypi/boot_stage2/RP2350.c.jinja @@ -0,0 +1,162 @@ +#include "sdk/src/rp2350/hardware_structs/include/hardware/structs/qmi.h" +#include "sdk/src/rp2350/hardware_structs/include/hardware/structs/pads_qspi.h" +#include "sdk/src/rp2350/hardware_regs/include/hardware/regs/addressmap.h" +// #include "sdk/src/rp2040/hardware_regs/include/hardware/regs/m0plus.h" + +// "Mode bits" are 8 special bits sent immediately after +// the address bits in a "Read Data Fast Quad I/O" command sequence. +// On W25Q080, the four LSBs are don't care, and if MSBs == 0xa, the +// next read does not require the 0xeb instruction prefix. +#define MODE_CONTINUOUS_READ 0xa0 + +// Define interface width: single/dual/quad IO +{% if quad_ok %} +#define RFMT \ + (QMI_M0_RFMT_PREFIX_WIDTH_VALUE_S << QMI_M0_RFMT_PREFIX_WIDTH_LSB | \ + QMI_M0_RFMT_ADDR_WIDTH_VALUE_Q << QMI_M0_RFMT_ADDR_WIDTH_LSB | \ + QMI_M0_RFMT_SUFFIX_WIDTH_VALUE_Q << QMI_M0_RFMT_SUFFIX_WIDTH_LSB | \ + QMI_M0_RFMT_DUMMY_WIDTH_VALUE_Q << QMI_M0_RFMT_DUMMY_WIDTH_LSB | \ + QMI_M0_RFMT_DATA_WIDTH_VALUE_Q << QMI_M0_RFMT_DATA_WIDTH_LSB | \ + QMI_M0_RFMT_PREFIX_LEN_VALUE_8 << QMI_M0_RFMT_PREFIX_LEN_LSB | \ + QMI_M0_RFMT_SUFFIX_LEN_VALUE_8 << QMI_M0_RFMT_SUFFIX_LEN_LSB) +{% else %} +#define RFMT \ + (QMI_M0_RFMT_PREFIX_WIDTH_VALUE_S << QMI_M0_RFMT_PREFIX_WIDTH_LSB | \ + QMI_M0_RFMT_ADDR_WIDTH_VALUE_S << QMI_M0_RFMT_ADDR_WIDTH_LSB | \ + QMI_M0_RFMT_SUFFIX_WIDTH_VALUE_S << QMI_M0_RFMT_SUFFIX_WIDTH_LSB | \ + QMI_M0_RFMT_DUMMY_WIDTH_VALUE_S << QMI_M0_RFMT_DUMMY_WIDTH_LSB | \ + QMI_M0_RFMT_DATA_WIDTH_VALUE_S << QMI_M0_RFMT_DATA_WIDTH_LSB | \ + QMI_M0_RFMT_PREFIX_LEN_VALUE_8 << QMI_M0_RFMT_PREFIX_LEN_LSB) +{% endif %} + +#define READ_INSTRUCTION (0x{{ '%02x' % read_command }}) + +#define CMD_READ_STATUS1 0x05 +#define CMD_READ_STATUS2 0x35 +#define CMD_WRITE_ENABLE 0x06 +#define CMD_WRITE_STATUS1 0x01 +#define CMD_WRITE_STATUS2 0x31 + +#define SREG_DATA 0x02 + +static uint32_t wait_and_read(uint8_t); +static uint8_t read_flash_sreg(uint8_t status_command); + +// This function is use by the bootloader to enable the XIP flash. It is also +// used by the SDK to reinit XIP after doing non-read flash interactions such as +// writing or erasing. This code must compile down to position independent +// assembly because we don't know where in RAM it'll be when run. + +// This must be the first defined function so that it is placed at the start of +// memory where the bootloader jumps to! +extern void _stage2_boot(void); +void __attribute__((section(".entry._stage2_boot"), used)) _stage2_boot(void) { + uint32_t lr; + asm ("MOV %0, LR\n" : "=r" (lr) ); + + // Set aggressive pad configuration for QSPI + // - SCLK 8mA drive, no slew limiting + // - SDx disable input Schmitt to reduce delay + + // SCLK + pads_qspi_hw->io[0] = PADS_QSPI_GPIO_QSPI_SCLK_DRIVE_VALUE_8MA << PADS_QSPI_GPIO_QSPI_SCLK_DRIVE_LSB | + PADS_QSPI_GPIO_QSPI_SCLK_SLEWFAST_BITS; + + // Data lines + uint32_t data_settings = pads_qspi_hw->io[1]; + data_settings &= ~PADS_QSPI_GPIO_QSPI_SCLK_SCHMITT_BITS; + pads_qspi_hw->io[2] = data_settings; + {% if quad_ok %} + pads_qspi_hw->io[1] = data_settings; + pads_qspi_hw->io[3] = data_settings; + pads_qspi_hw->io[4] = data_settings; + {% endif %} + + // QMI config + + // Need to use direct serial mode to send SR commands. Choose a + // conservative direct-mode divisor (5 MHz at 150 MHz clk_sys) + // since the XIP-mode divisor may be unsafe without an RX delay. + qmi_hw->direct_csr = 30 << QMI_DIRECT_CSR_CLKDIV_LSB | + QMI_DIRECT_CSR_EN_BITS | + QMI_DIRECT_CSR_AUTO_CS0N_BITS; + + // Need to poll for the cooldown on the last XIP transfer to expire + // (via direct-mode BUSY flag) before it is safe to perform the first + // direct-mode operation + while ((qmi_hw->direct_csr & QMI_DIRECT_CSR_BUSY_BITS) != 0) {} + + {% if quad_ok %} + // Program status register. + // Enable SSI and select slave 0 + {% if quad_enable_status_byte == 1 %} + uint8_t result = read_flash_sreg(CMD_READ_STATUS1); + {% elif quad_enable_status_byte == 2 %} + uint8_t result = read_flash_sreg(CMD_READ_STATUS2); + {% endif %} + if (result != {{ quad_enable_bit_mask }}) { + qmi_hw->direct_tx = (uint8_t) CMD_WRITE_ENABLE; + wait_and_read(1); + + {% if split_status_write %} + {% if quad_enable_status_byte == 1 %} + qmi_hw->direct_tx = (uint8_t) CMD_WRITE_STATUS1; + {% elif quad_enable_status_byte == 2 %} + qmi_hw->direct_tx = (uint8_t) CMD_WRITE_STATUS2; + {% endif %} + qmi_hw->direct_tx = {{ quad_enable_bit_mask }}; + wait_and_read(2); + {% else %} + qmi_hw->direct_tx = (uint8_t) CMD_WRITE_STATUS1; + {% if quad_enable_status_byte == 2 %} + qmi_hw->direct_tx = 0x0; + {% endif %} + qmi_hw->direct_tx = {{ quad_enable_bit_mask }}; + wait_and_read({{ quad_enable_status_byte + 1 }}); + {% endif %} + // Wait for the write to complete. + while ((read_flash_sreg(CMD_READ_STATUS1) & 0x1) != 0) {} + } + {% endif %} + + // Disable direct mode + qmi_hw->direct_csr &= ~QMI_DIRECT_CSR_EN_BITS; + + qmi_hw->m[0].timing = + 1 << QMI_M0_TIMING_COOLDOWN_LSB | + 1 << QMI_M0_TIMING_RXDELAY_LSB | + {{ clock_divider }} << QMI_M0_TIMING_CLKDIV_LSB; + qmi_hw->m[0].rcmd = + READ_INSTRUCTION << QMI_M0_RCMD_PREFIX_LSB | + MODE_CONTINUOUS_READ << QMI_M0_RCMD_SUFFIX_LSB; + qmi_hw->m[0].rfmt = + RFMT | + {{ wait_cycles }} << QMI_M0_RFMT_DUMMY_LEN_LSB; + + {% if quad_ok %} + // Dummy transfer to get into continuous mode. + (void) *((uint32_t*) XIP_NOCACHE_NOALLOC_BASE); + + // Set prefix to 0 to skip the command portion. + qmi_hw->m[0].rfmt &= ~QMI_M0_RFMT_PREFIX_LEN_BITS; + {% endif %} + // Stage 2 never goes straight to the program image on RP2350. So, we always return. +} + +static uint32_t wait_and_read(uint8_t count) { + while ((qmi_hw->direct_csr & QMI_DIRECT_CSR_TXEMPTY_BITS) == 0) {} + while ((qmi_hw->direct_csr & QMI_DIRECT_CSR_BUSY_BITS) != 0) {} + uint32_t result = 0; + while (count > 0) { + result = qmi_hw->direct_rx; + count--; + } + return result; +} + +static uint8_t read_flash_sreg(uint8_t status_command) { + qmi_hw->direct_tx = status_command; + qmi_hw->direct_tx = status_command; + + return wait_and_read(2); +} diff --git a/ports/raspberrypi/boot_stage2/RP2350.ld b/ports/raspberrypi/boot_stage2/RP2350.ld new file mode 100644 index 000000000000..c29429062c1c --- /dev/null +++ b/ports/raspberrypi/boot_stage2/RP2350.ld @@ -0,0 +1,13 @@ +MEMORY { + /* We are loaded to the top 256 bytes of SRAM, which is above the bootrom + stack. Note 4 bytes occupied by checksum. */ + SRAM(rx) : ORIGIN = 0x20041f00, LENGTH = 252 +} + +SECTIONS { + . = ORIGIN(SRAM); + .text : { + *(.entry.*) + *(.text.*) + } >SRAM +} diff --git a/ports/raspberrypi/common-hal/analogbufio/BufferedIn.c b/ports/raspberrypi/common-hal/analogbufio/BufferedIn.c index daa502fc64a7..7385b21ea95e 100644 --- a/ports/raspberrypi/common-hal/analogbufio/BufferedIn.c +++ b/ports/raspberrypi/common-hal/analogbufio/BufferedIn.c @@ -13,7 +13,7 @@ #include "py/runtime.h" #include "src/rp2_common/hardware_adc/include/hardware/adc.h" #include "src/rp2_common/hardware_dma/include/hardware/dma.h" -#include "src/common/pico_stdlib/include/pico/stdlib.h" +#include "src/common/pico_stdlib_headers/include/pico/stdlib.h" #define ADC_FIRST_PIN_NUMBER 26 #define ADC_PIN_COUNT 4 diff --git a/ports/raspberrypi/common-hal/analogio/AnalogIn.c b/ports/raspberrypi/common-hal/analogio/AnalogIn.c index 9af1fd9cedd3..301b965c86c1 100644 --- a/ports/raspberrypi/common-hal/analogio/AnalogIn.c +++ b/ports/raspberrypi/common-hal/analogio/AnalogIn.c @@ -12,8 +12,13 @@ #include "src/rp2_common/hardware_adc/include/hardware/adc.h" +#define ADC_PIN_COUNT (NUM_ADC_CHANNELS - 1) + +#if ADC_PIN_COUNT == 4 #define ADC_FIRST_PIN_NUMBER 26 -#define ADC_PIN_COUNT 4 +#else +#define ADC_FIRST_PIN_NUMBER 40 +#endif // Voltage monitor is special on Pico W, because this pin is shared between the // voltage monitor function and the wifi function. Special handling is required @@ -62,15 +67,15 @@ uint16_t common_hal_analogio_analogin_get_value(analogio_analogin_obj_t *self) { uint16_t value; if (SPECIAL_PIN(self->pin)) { common_hal_mcu_disable_interrupts(); - uint32_t old_pad = padsbank0_hw->io[self->pin->number]; - uint32_t old_ctrl = iobank0_hw->io[self->pin->number].ctrl; + uint32_t old_pad = pads_bank0_hw->io[self->pin->number]; + uint32_t old_ctrl = io_bank0_hw->io[self->pin->number].ctrl; adc_gpio_init(self->pin->number); adc_select_input(self->pin->number - ADC_FIRST_PIN_NUMBER); common_hal_mcu_delay_us(100); value = adc_read(); gpio_init(self->pin->number); - padsbank0_hw->io[self->pin->number] = old_pad; - iobank0_hw->io[self->pin->number].ctrl = old_ctrl; + pads_bank0_hw->io[self->pin->number] = old_pad; + io_bank0_hw->io[self->pin->number].ctrl = old_ctrl; common_hal_mcu_enable_interrupts(); } else { adc_select_input(self->pin->number - ADC_FIRST_PIN_NUMBER); diff --git a/ports/raspberrypi/common-hal/busio/UART.c b/ports/raspberrypi/common-hal/busio/UART.c index aa4575841c3c..13a27beb4d91 100644 --- a/ports/raspberrypi/common-hal/busio/UART.c +++ b/ports/raspberrypi/common-hal/busio/UART.c @@ -122,7 +122,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, gpio_disable_pulls(pin); // Turn on "strong" pin driving (more current available). - hw_write_masked(&padsbank0_hw->io[pin], + hw_write_masked(&pads_bank0_hw->io[pin], PADS_BANK0_GPIO0_DRIVE_VALUE_12MA << PADS_BANK0_GPIO0_DRIVE_LSB, PADS_BANK0_GPIO0_DRIVE_BITS); diff --git a/ports/raspberrypi/common-hal/digitalio/DigitalInOut.c b/ports/raspberrypi/common-hal/digitalio/DigitalInOut.c index 099e060997dd..60849eb120af 100644 --- a/ports/raspberrypi/common-hal/digitalio/DigitalInOut.c +++ b/ports/raspberrypi/common-hal/digitalio/DigitalInOut.c @@ -86,7 +86,7 @@ digitalinout_result_t common_hal_digitalio_digitalinout_switch_to_output( gpio_disable_pulls(pin); // Turn on "strong" pin driving (more current available). - hw_write_masked(&padsbank0_hw->io[pin], + hw_write_masked(&pads_bank0_hw->io[pin], PADS_BANK0_GPIO0_DRIVE_VALUE_12MA << PADS_BANK0_GPIO0_DRIVE_LSB, PADS_BANK0_GPIO0_DRIVE_BITS); diff --git a/ports/raspberrypi/common-hal/memorymap/AddressRange.c b/ports/raspberrypi/common-hal/memorymap/AddressRange.c index 1959ec41a35a..0796a3b860bf 100644 --- a/ports/raspberrypi/common-hal/memorymap/AddressRange.c +++ b/ports/raspberrypi/common-hal/memorymap/AddressRange.c @@ -14,6 +14,7 @@ #include "hardware/regs/addressmap.h" // RP2 address map ranges, must be arranged in order by ascending start address +#ifdef PICO_RP2040 addressmap_rp2_range_t rp2_ranges[] = { {(uint8_t *)ROM_BASE, 0x00004000, ROM}, // boot ROM {(uint8_t *)XIP_BASE, 0x00100000, XIP}, // XIP normal cache operation @@ -34,6 +35,28 @@ addressmap_rp2_range_t rp2_ranges[] = { {(uint8_t *)SIO_BASE, 0x00001000, IO}, // SIO registers, no aliases {(uint8_t *)PPB_BASE, 0x00004000, IO} // PPB registers }; +#endif +#ifdef PICO_RP2350 +addressmap_rp2_range_t rp2_ranges[] = { + {(uint8_t *)ROM_BASE, 0x00004000, ROM}, // boot ROM + {(uint8_t *)XIP_BASE, 0x00100000, XIP}, // XIP normal cache operation + {(uint8_t *)XIP_NOCACHE_NOALLOC_BASE, 0x00100000, XIP}, // XIP bypass cache completely + {(uint8_t *)XIP_MAINTENANCE_BASE, 0x00100000, XIP}, // XIP cache maintenance based on lower 3 address bits. Data is ignored + {(uint8_t *)XIP_NOCACHE_NOALLOC_NOTRANSLATE_BASE, 0x00100000, XIP}, // XIP skip cache and address translation + {(uint8_t *)SRAM_BASE, SRAM_END - SRAM_BASE, SRAM}, // SRAM 256KB striped plus 16KB contiguous + {(uint8_t *)SYSINFO_BASE, 0x00070000, IO}, // APB peripherals + {(uint8_t *)XIP_CTRL_BASE, 0x00004000, IO}, // XIP control registers + {(uint8_t *)XIP_QMI_BASE, 0x00004000, IO}, // XIP QMI registers + {(uint8_t *)DMA_BASE, 0x00004000, IO}, // DMA registers + {(uint8_t *)USBCTRL_DPRAM_BASE, 0x00001000, SRAM}, // USB DPSRAM 4KB + {(uint8_t *)USBCTRL_REGS_BASE, 0x00004000, IO}, // USB registers + {(uint8_t *)PIO0_BASE, 0x00004000, IO}, // PIO0 registers + {(uint8_t *)PIO1_BASE, 0x00004000, IO}, // PIO1 registers + {(uint8_t *)PIO2_BASE, 0x00004000, IO}, // PIO2 registers + {(uint8_t *)SIO_BASE, 0x00001000, IO}, // SIO registers, no aliases + {(uint8_t *)PPB_BASE, 0x00004000, IO} // PPB registers +}; +#endif void common_hal_memorymap_addressrange_construct(memorymap_addressrange_obj_t *self, uint8_t *start_address, size_t length) { diff --git a/ports/raspberrypi/common-hal/microcontroller/Pin.c b/ports/raspberrypi/common-hal/microcontroller/Pin.c index 01526ebac3e1..4ea7516d7091 100644 --- a/ports/raspberrypi/common-hal/microcontroller/Pin.c +++ b/ports/raspberrypi/common-hal/microcontroller/Pin.c @@ -11,7 +11,7 @@ #include "src/rp2_common/hardware_gpio/include/hardware/gpio.h" -static uint32_t gpio_bank0_pin_claimed; +static uint64_t gpio_bank0_pin_claimed; #if CIRCUITPY_CYW43 #include "bindings/cyw43/__init__.h" @@ -21,15 +21,15 @@ bool cyw_ever_init; static uint32_t cyw_pin_claimed; void reset_pin_number_cyw(uint8_t pin_no) { - cyw_pin_claimed &= ~(1 << pin_no); + cyw_pin_claimed &= ~(1LL << pin_no); } #endif -static uint32_t never_reset_pins; +static uint64_t never_reset_pins; void reset_all_pins(void) { for (size_t i = 0; i < NUM_BANK0_GPIOS; i++) { - if ((never_reset_pins & (1 << i)) != 0) { + if ((never_reset_pins & (1LL << i)) != 0) { continue; } reset_pin_number(i); @@ -50,7 +50,7 @@ void never_reset_pin_number(uint8_t pin_number) { return; } - never_reset_pins |= 1 << pin_number; + never_reset_pins |= 1LL << pin_number; } // By default, all pins get reset in the same way @@ -63,8 +63,8 @@ void reset_pin_number(uint8_t pin_number) { return; } - gpio_bank0_pin_claimed &= ~(1 << pin_number); - never_reset_pins &= ~(1 << pin_number); + gpio_bank0_pin_claimed &= ~(1LL << pin_number); + never_reset_pins &= ~(1LL << pin_number); // Allow the board to override the reset state of any pin if (board_reset_pin_number(pin_number)) { @@ -74,10 +74,10 @@ void reset_pin_number(uint8_t pin_number) { // We are very aggressive in shutting down the pad fully. Both pulls are // disabled and both buffers are as well. gpio_init(pin_number); - hw_clear_bits(&padsbank0_hw->io[pin_number], PADS_BANK0_GPIO0_IE_BITS | + hw_clear_bits(&pads_bank0_hw->io[pin_number], PADS_BANK0_GPIO0_IE_BITS | PADS_BANK0_GPIO0_PUE_BITS | PADS_BANK0_GPIO0_PDE_BITS); - hw_set_bits(&padsbank0_hw->io[pin_number], PADS_BANK0_GPIO0_OD_BITS); + hw_set_bits(&pads_bank0_hw->io[pin_number], PADS_BANK0_GPIO0_OD_BITS); } void common_hal_never_reset_pin(const mcu_pin_obj_t *pin) { @@ -97,27 +97,27 @@ void common_hal_reset_pin(const mcu_pin_obj_t *pin) { void claim_pin(const mcu_pin_obj_t *pin) { #if CIRCUITPY_CYW43 if (pin->base.type == &cyw43_pin_type) { - cyw_pin_claimed |= (1 << pin->number); + cyw_pin_claimed |= (1LL << pin->number); return; } #endif if (pin->number >= NUM_BANK0_GPIOS) { return; } - gpio_bank0_pin_claimed |= (1 << pin->number); + gpio_bank0_pin_claimed |= (1LL << pin->number); } bool pin_number_is_free(uint8_t pin_number) { if (pin_number >= NUM_BANK0_GPIOS) { return false; } - return !(gpio_bank0_pin_claimed & (1 << pin_number)); + return !(gpio_bank0_pin_claimed & (1LL << pin_number)); } bool common_hal_mcu_pin_is_free(const mcu_pin_obj_t *pin) { #if CIRCUITPY_CYW43 if (pin->base.type == &cyw43_pin_type) { - return !(cyw_pin_claimed & (1 << pin->number)); + return !(cyw_pin_claimed & (1LL << pin->number)); } #endif return pin_number_is_free(pin->number); diff --git a/ports/raspberrypi/common-hal/microcontroller/Processor.c b/ports/raspberrypi/common-hal/microcontroller/Processor.c index 8e3636fcc3aa..678ceefbf92f 100644 --- a/ports/raspberrypi/common-hal/microcontroller/Processor.c +++ b/ports/raspberrypi/common-hal/microcontroller/Processor.c @@ -20,9 +20,20 @@ #include "src/rp2_common/hardware_vreg/include/hardware/vreg.h" #include "src/rp2_common/hardware_watchdog/include/hardware/watchdog.h" +#ifdef PICO_RP2040 #include "src/rp2040/hardware_regs/include/hardware/regs/vreg_and_chip_reset.h" +#endif +#ifdef PICO_RP2350 +#include "src/rp2350/hardware_regs/include/hardware/regs/powman.h" +#endif #include "src/rp2040/hardware_regs/include/hardware/regs/watchdog.h" + +#ifdef PICO_RP2040 #include "src/rp2040/hardware_structs/include/hardware/structs/vreg_and_chip_reset.h" +#endif +#ifdef PICO_RP2350 +#include "src/rp2350/hardware_structs/include/hardware/structs/powman.h" +#endif #include "src/rp2040/hardware_structs/include/hardware/structs/watchdog.h" float common_hal_mcu_processor_get_temperature(void) { @@ -74,6 +85,7 @@ void common_hal_mcu_processor_get_uid(uint8_t raw_id[]) { mcu_reset_reason_t common_hal_mcu_processor_get_reset_reason(void) { mcu_reset_reason_t reason = RESET_REASON_UNKNOWN; + #ifdef PICO_RP2040 uint32_t chip_reset_reg = vreg_and_chip_reset_hw->chip_reset; if (chip_reset_reg & VREG_AND_CHIP_RESET_CHIP_RESET_HAD_PSM_RESTART_BITS) { @@ -88,6 +100,26 @@ mcu_reset_reason_t common_hal_mcu_processor_get_reset_reason(void) { // NOTE: This register is also used for brownout, but there is no way to differentiate between power on and brown out reason = RESET_REASON_POWER_ON; } + #endif + #ifdef PICO_RP2350 + uint32_t chip_reset_reg = powman_hw->chip_reset; + + if (chip_reset_reg & POWMAN_CHIP_RESET_HAD_RESCUE_BITS) { + reason = RESET_REASON_RESCUE_DEBUG; + } + + if (chip_reset_reg & POWMAN_CHIP_RESET_HAD_RUN_LOW_BITS) { + reason = RESET_REASON_RESET_PIN; + } + + if (chip_reset_reg & POWMAN_CHIP_RESET_HAD_BOR_BITS) { + reason = RESET_REASON_BROWNOUT; + } + + if (chip_reset_reg & POWMAN_CHIP_RESET_HAD_POR_BITS) { + reason = RESET_REASON_POWER_ON; + } + #endif // Check watchdog after chip reset since watchdog doesn't clear chip_reset, while chip_reset clears the watchdog diff --git a/ports/raspberrypi/common-hal/microcontroller/__init__.c b/ports/raspberrypi/common-hal/microcontroller/__init__.c index c0daf6037de2..7911c21e3cc1 100644 --- a/ports/raspberrypi/common-hal/microcontroller/__init__.c +++ b/ports/raspberrypi/common-hal/microcontroller/__init__.c @@ -165,6 +165,26 @@ const mp_rom_map_elem_t mcu_pin_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_GPIO27), MP_ROM_PTR(&pin_GPIO27) }, { MP_ROM_QSTR(MP_QSTR_GPIO28), MP_ROM_PTR(&pin_GPIO28) }, { MP_ROM_QSTR(MP_QSTR_GPIO29), MP_ROM_PTR(&pin_GPIO29) }, + #if NUM_BANK0_GPIOS == 48 + { MP_ROM_QSTR(MP_QSTR_GPIO30), MP_ROM_PTR(&pin_GPIO30) }, + { MP_ROM_QSTR(MP_QSTR_GPIO31), MP_ROM_PTR(&pin_GPIO31) }, + { MP_ROM_QSTR(MP_QSTR_GPIO32), MP_ROM_PTR(&pin_GPIO32) }, + { MP_ROM_QSTR(MP_QSTR_GPIO33), MP_ROM_PTR(&pin_GPIO33) }, + { MP_ROM_QSTR(MP_QSTR_GPIO34), MP_ROM_PTR(&pin_GPIO34) }, + { MP_ROM_QSTR(MP_QSTR_GPIO35), MP_ROM_PTR(&pin_GPIO35) }, + { MP_ROM_QSTR(MP_QSTR_GPIO36), MP_ROM_PTR(&pin_GPIO36) }, + { MP_ROM_QSTR(MP_QSTR_GPIO37), MP_ROM_PTR(&pin_GPIO37) }, + { MP_ROM_QSTR(MP_QSTR_GPIO38), MP_ROM_PTR(&pin_GPIO38) }, + { MP_ROM_QSTR(MP_QSTR_GPIO39), MP_ROM_PTR(&pin_GPIO39) }, + { MP_ROM_QSTR(MP_QSTR_GPIO40), MP_ROM_PTR(&pin_GPIO40) }, + { MP_ROM_QSTR(MP_QSTR_GPIO41), MP_ROM_PTR(&pin_GPIO41) }, + { MP_ROM_QSTR(MP_QSTR_GPIO42), MP_ROM_PTR(&pin_GPIO42) }, + { MP_ROM_QSTR(MP_QSTR_GPIO43), MP_ROM_PTR(&pin_GPIO43) }, + { MP_ROM_QSTR(MP_QSTR_GPIO44), MP_ROM_PTR(&pin_GPIO44) }, + { MP_ROM_QSTR(MP_QSTR_GPIO45), MP_ROM_PTR(&pin_GPIO45) }, + { MP_ROM_QSTR(MP_QSTR_GPIO46), MP_ROM_PTR(&pin_GPIO46) }, + { MP_ROM_QSTR(MP_QSTR_GPIO47), MP_ROM_PTR(&pin_GPIO47) }, + #endif #if CIRCUITPY_CYW43 { MP_ROM_QSTR(MP_QSTR_CYW0), MP_ROM_PTR(&pin_CYW0) }, { MP_ROM_QSTR(MP_QSTR_CYW1), MP_ROM_PTR(&pin_CYW1) }, diff --git a/ports/raspberrypi/common-hal/picodvi/Framebuffer.h b/ports/raspberrypi/common-hal/picodvi/Framebuffer.h index 343a178a7b40..502885785900 100644 --- a/ports/raspberrypi/common-hal/picodvi/Framebuffer.h +++ b/ports/raspberrypi/common-hal/picodvi/Framebuffer.h @@ -6,23 +6,8 @@ #pragma once -#include "py/obj.h" - -#include "lib/PicoDVI/software/libdvi/dvi.h" - -typedef struct { - mp_obj_base_t base; - uint32_t *framebuffer; - size_t framebuffer_len; // in words - size_t tmdsbuf_size; // in words - struct dvi_inst dvi; - mp_uint_t width; - mp_uint_t height; - uint tmds_lock; - uint colour_lock; - uint16_t next_scanline; - uint16_t pitch; // Number of words between rows. (May be more than a width's worth.) - uint8_t color_depth; - uint8_t pwm_slice; - int8_t pin_pair[4]; -} picodvi_framebuffer_obj_t; +#ifdef PICO_RP2040 +#include "Framebuffer_RP2040.h" +#else +#include "Framebuffer_RP2350.h" +#endif diff --git a/ports/raspberrypi/common-hal/picodvi/Framebuffer.c b/ports/raspberrypi/common-hal/picodvi/Framebuffer_RP2040.c similarity index 97% rename from ports/raspberrypi/common-hal/picodvi/Framebuffer.c rename to ports/raspberrypi/common-hal/picodvi/Framebuffer_RP2040.c index e3f17baf8572..b244fb8bbd01 100644 --- a/ports/raspberrypi/common-hal/picodvi/Framebuffer.c +++ b/ports/raspberrypi/common-hal/picodvi/Framebuffer_RP2040.c @@ -13,9 +13,10 @@ #include "common-hal/rp2pio/StateMachine.h" #include "supervisor/port.h" -#include "src/common/pico_stdlib/include/pico/stdlib.h" +#include "src/common/pico_stdlib_headers/include/pico/stdlib.h" #include "src/rp2040/hardware_structs/include/hardware/structs/mpu.h" -#include "src/rp2_common/cmsis/stub/CMSIS/Device/RaspberryPi/RP2040/Include/RP2040.h" +#include "src/rp2_common/cmsis/stub/CMSIS/Device/RP2040/Include/RP2040.h" +#include "src/rp2_common/hardware_clocks/include/hardware/clocks.h" #include "src/rp2_common/hardware_pwm/include/hardware/pwm.h" #include "src/rp2_common/hardware_vreg/include/hardware/vreg.h" #include "src/rp2_common/pico_multicore/include/pico/multicore.h" @@ -142,7 +143,7 @@ void common_hal_picodvi_framebuffer_construct(picodvi_framebuffer_obj_t *self, // If the width is > 400, then it must not be color frame buffer and vice // versa. - if ((width > 400) == color_framebuffer) { + if ((width > 400) == color_framebuffer || color_depth == 4) { mp_raise_ValueError_varg(MP_ERROR_TEXT("Invalid %q"), MP_QSTR_color_depth); } @@ -386,6 +387,10 @@ int common_hal_picodvi_framebuffer_get_color_depth(picodvi_framebuffer_obj_t *se return self->color_depth; } +bool common_hal_picodvi_framebuffer_get_grayscale(picodvi_framebuffer_obj_t *self) { + return self->color_depth < 8; +} + mp_int_t common_hal_picodvi_framebuffer_get_buffer(mp_obj_t self_in, mp_buffer_info_t *bufinfo, mp_uint_t flags) { picodvi_framebuffer_obj_t *self = (picodvi_framebuffer_obj_t *)self_in; bufinfo->buf = self->framebuffer; diff --git a/ports/raspberrypi/common-hal/picodvi/Framebuffer_RP2040.h b/ports/raspberrypi/common-hal/picodvi/Framebuffer_RP2040.h new file mode 100644 index 000000000000..aad9146c9f89 --- /dev/null +++ b/ports/raspberrypi/common-hal/picodvi/Framebuffer_RP2040.h @@ -0,0 +1,48 @@ +#pragma once + +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2023 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/obj.h" + +#include "lib/PicoDVI/software/libdvi/dvi.h" + +typedef struct { + mp_obj_base_t base; + uint32_t *framebuffer; + size_t framebuffer_len; // in words + size_t tmdsbuf_size; // in words + struct dvi_inst dvi; + mp_uint_t width; + mp_uint_t height; + uint tmds_lock; + uint colour_lock; + uint16_t next_scanline; + uint16_t pitch; // Number of words between rows. (May be more than a width's worth.) + uint8_t color_depth; + uint8_t pwm_slice; + int8_t pin_pair[4]; +} picodvi_framebuffer_obj_t; diff --git a/ports/raspberrypi/common-hal/picodvi/Framebuffer_RP2350.c b/ports/raspberrypi/common-hal/picodvi/Framebuffer_RP2350.c new file mode 100644 index 000000000000..dacad18fb8f1 --- /dev/null +++ b/ports/raspberrypi/common-hal/picodvi/Framebuffer_RP2350.c @@ -0,0 +1,509 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2023 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "bindings/picodvi/Framebuffer.h" + +#include "py/gc.h" +#include "py/runtime.h" +#include "shared-bindings/time/__init__.h" +#include "supervisor/port.h" + +#include "src/common/pico_stdlib_headers/include/pico/stdlib.h" + +// This is from: https://github.com/raspberrypi/pico-examples-rp2350/blob/a1/hstx/dvi_out_hstx_encoder/dvi_out_hstx_encoder.c + +#include "sdk/src/rp2_common/hardware_dma/include/hardware/dma.h" +#include "sdk/src/rp2350/hardware_structs/include/hardware/structs/bus_ctrl.h" +#include "sdk/src/rp2350/hardware_structs/include/hardware/structs/hstx_ctrl.h" +#include "sdk/src/rp2350/hardware_structs/include/hardware/structs/hstx_fifo.h" + +// ---------------------------------------------------------------------------- +// DVI constants + +#define TMDS_CTRL_00 0x354u +#define TMDS_CTRL_01 0x0abu +#define TMDS_CTRL_10 0x154u +#define TMDS_CTRL_11 0x2abu + +#define SYNC_V0_H0 (TMDS_CTRL_00 | (TMDS_CTRL_00 << 10) | (TMDS_CTRL_00 << 20)) +#define SYNC_V0_H1 (TMDS_CTRL_01 | (TMDS_CTRL_00 << 10) | (TMDS_CTRL_00 << 20)) +#define SYNC_V1_H0 (TMDS_CTRL_10 | (TMDS_CTRL_00 << 10) | (TMDS_CTRL_00 << 20)) +#define SYNC_V1_H1 (TMDS_CTRL_11 | (TMDS_CTRL_00 << 10) | (TMDS_CTRL_00 << 20)) + +#define MODE_H_SYNC_POLARITY 0 +#define MODE_H_FRONT_PORCH 16 +#define MODE_H_SYNC_WIDTH 96 +#define MODE_H_BACK_PORCH 48 +#define MODE_H_ACTIVE_PIXELS 640 + +#define MODE_V_SYNC_POLARITY 0 +#define MODE_V_FRONT_PORCH 10 +#define MODE_V_SYNC_WIDTH 2 +#define MODE_V_BACK_PORCH 33 +#define MODE_V_ACTIVE_LINES 480 + +#define MODE_H_TOTAL_PIXELS ( \ + MODE_H_FRONT_PORCH + MODE_H_SYNC_WIDTH + \ + MODE_H_BACK_PORCH + MODE_H_ACTIVE_PIXELS \ + ) +#define MODE_V_TOTAL_LINES ( \ + MODE_V_FRONT_PORCH + MODE_V_SYNC_WIDTH + \ + MODE_V_BACK_PORCH + MODE_V_ACTIVE_LINES \ + ) + +#define HSTX_CMD_RAW (0x0u << 12) +#define HSTX_CMD_RAW_REPEAT (0x1u << 12) +#define HSTX_CMD_TMDS (0x2u << 12) +#define HSTX_CMD_TMDS_REPEAT (0x3u << 12) +#define HSTX_CMD_NOP (0xfu << 12) + +// ---------------------------------------------------------------------------- +// HSTX command lists + +static uint32_t vblank_line_vsync_off[] = { + HSTX_CMD_RAW_REPEAT | MODE_H_FRONT_PORCH, + SYNC_V1_H1, + HSTX_CMD_RAW_REPEAT | MODE_H_SYNC_WIDTH, + SYNC_V1_H0, + HSTX_CMD_RAW_REPEAT | (MODE_H_BACK_PORCH + MODE_H_ACTIVE_PIXELS), + SYNC_V1_H1 +}; + +static uint32_t vblank_line_vsync_on[] = { + HSTX_CMD_RAW_REPEAT | MODE_H_FRONT_PORCH, + SYNC_V0_H1, + HSTX_CMD_RAW_REPEAT | MODE_H_SYNC_WIDTH, + SYNC_V0_H0, + HSTX_CMD_RAW_REPEAT | (MODE_H_BACK_PORCH + MODE_H_ACTIVE_PIXELS), + SYNC_V0_H1 +}; + +static uint32_t vactive_line[] = { + HSTX_CMD_RAW_REPEAT | MODE_H_FRONT_PORCH, + SYNC_V1_H1, + HSTX_CMD_NOP, + HSTX_CMD_RAW_REPEAT | MODE_H_SYNC_WIDTH, + SYNC_V1_H0, + HSTX_CMD_NOP, + HSTX_CMD_RAW_REPEAT | MODE_H_BACK_PORCH, + SYNC_V1_H1, + HSTX_CMD_TMDS | MODE_H_ACTIVE_PIXELS +}; + +picodvi_framebuffer_obj_t *active_picodvi = NULL; + +static void __not_in_flash_func(dma_irq_handler)(void) { + if (active_picodvi == NULL) { + return; + } + // gpio_put(10, 1); + uint ch_num = active_picodvi->dma_pixel_channel; + dma_channel_hw_t *ch = &dma_hw->ch[ch_num]; + dma_hw->intr = 1u << ch_num; + + // Set the read_addr back to the start and trigger the first transfer (which + // will trigger the pixel channel). + ch = &dma_hw->ch[active_picodvi->dma_command_channel]; + ch->al3_read_addr_trig = (uintptr_t)active_picodvi->dma_commands; + // gpio_put(10, 0); +} + +void common_hal_picodvi_framebuffer_construct(picodvi_framebuffer_obj_t *self, + mp_uint_t width, mp_uint_t height, + const mcu_pin_obj_t *clk_dp, const mcu_pin_obj_t *clk_dn, + const mcu_pin_obj_t *red_dp, const mcu_pin_obj_t *red_dn, + const mcu_pin_obj_t *green_dp, const mcu_pin_obj_t *green_dn, + const mcu_pin_obj_t *blue_dp, const mcu_pin_obj_t *blue_dn, + mp_uint_t color_depth) { + if (active_picodvi != NULL) { + mp_raise_msg_varg(&mp_type_RuntimeError, MP_ERROR_TEXT("%q in use"), MP_QSTR_picodvi); + } + + if (!(width == 640 && height == 480) && !(width == 320 && height == 240 && color_depth == 16)) { + mp_raise_ValueError_varg(MP_ERROR_TEXT("Invalid %q and %q"), MP_QSTR_width, MP_QSTR_height); + } + + bool pixel_doubled = width == 320 && height == 240; + + size_t all_allocated = 0; + int8_t pins[8] = { + clk_dp->number, clk_dn->number, + red_dp->number, red_dn->number, + green_dp->number, green_dn->number, + blue_dp->number, blue_dn->number + }; + qstr pin_names[8] = { + MP_QSTR_clk_dp, MP_QSTR_clk_dn, + MP_QSTR_red_dp, MP_QSTR_red_dn, + MP_QSTR_green_dp, MP_QSTR_green_dn, + MP_QSTR_blue_dp, MP_QSTR_blue_dn + }; + for (size_t i = 0; i < 8; i++) { + if (!(12 <= pins[i] && pins[i] <= 19)) { + raise_ValueError_invalid_pin_name(pin_names[i]); + } + pins[i] -= 12; + size_t mask = 1 << pins[i]; + if ((all_allocated & mask) != 0) { + raise_ValueError_invalid_pin_name(pin_names[i]); + } + all_allocated |= mask; + } + + self->width = width; + self->height = height; + self->pitch = (self->width * color_depth) / 8; + self->color_depth = color_depth; + // Align each row to words. + if (self->pitch % sizeof(uint32_t) != 0) { + self->pitch += sizeof(uint32_t) - (self->pitch % sizeof(uint32_t)); + } + self->pitch /= sizeof(uint32_t); + size_t framebuffer_size = self->pitch * self->height; + + // We check that allocations aren't in PSRAM because we haven't added XIP + // streaming support. + self->framebuffer = (uint32_t *)port_malloc(framebuffer_size * sizeof(uint32_t), true); + if (self->framebuffer == NULL || ((size_t)self->framebuffer & 0xf0000000) == 0x10000000) { + m_malloc_fail(framebuffer_size * sizeof(uint32_t)); + return; + } + + // We compute all DMA transfers needed for a single frame. This ensure we don't have any super + // quick interrupts that we need to respond to. Each transfer takes two words, trans_count and + // read_addr. Active pixel lines need two transfers due to different read addresses. When pixel + // doubling, then we must also set transfer size. + size_t dma_command_size = 2; + if (pixel_doubled) { + dma_command_size = 4; + } + self->dma_commands_len = (MODE_V_FRONT_PORCH + MODE_V_SYNC_WIDTH + MODE_V_BACK_PORCH + 2 * MODE_V_ACTIVE_LINES + 1) * dma_command_size; + self->dma_commands = (uint32_t *)port_malloc(self->dma_commands_len * sizeof(uint32_t), true); + if (self->dma_commands == NULL || ((size_t)self->framebuffer & 0xf0000000) == 0x10000000) { + port_free(self->framebuffer); + m_malloc_fail(self->dma_commands_len * sizeof(uint32_t)); + return; + } + + int dma_pixel_channel_maybe = dma_claim_unused_channel(false); + if (dma_pixel_channel_maybe < 0) { + mp_raise_RuntimeError(MP_ERROR_TEXT("Internal resource(s) in use")); + return; + } + + int dma_command_channel_maybe = dma_claim_unused_channel(false); + if (dma_command_channel_maybe < 0) { + dma_channel_unclaim((uint)dma_pixel_channel_maybe); + mp_raise_RuntimeError(MP_ERROR_TEXT("Internal resource(s) in use")); + return; + } + self->dma_pixel_channel = dma_pixel_channel_maybe; + self->dma_command_channel = dma_command_channel_maybe; + + size_t words_per_line; + if (self->color_depth > 8) { + words_per_line = (self->width * (self->color_depth / 8)) / sizeof(uint32_t); + } else { + words_per_line = (self->width / (8 / self->color_depth)) / sizeof(uint32_t); + } + + size_t command_word = 0; + size_t frontporch_start = MODE_V_TOTAL_LINES - MODE_V_FRONT_PORCH; + size_t frontporch_end = frontporch_start + MODE_V_FRONT_PORCH; + size_t vsync_start = 0; + size_t vsync_end = vsync_start + MODE_V_SYNC_WIDTH; + size_t backporch_start = vsync_end; + size_t backporch_end = backporch_start + MODE_V_BACK_PORCH; + size_t active_start = backporch_end; + + uint32_t dma_ctrl = self->dma_command_channel << DMA_CH0_CTRL_TRIG_CHAIN_TO_LSB | + DREQ_HSTX << DMA_CH0_CTRL_TRIG_TREQ_SEL_LSB | + DMA_CH0_CTRL_TRIG_IRQ_QUIET_BITS | + DMA_CH0_CTRL_TRIG_INCR_READ_BITS | + DMA_CH0_CTRL_TRIG_EN_BITS; + uint32_t dma_pixel_ctrl; + // We do 16 bit transfers when pixel doubling and the memory bus will + // duplicate the 16 bits to produce 32 bits for the HSTX. HSTX config is the + // same. + if (pixel_doubled) { + dma_pixel_ctrl = dma_ctrl | DMA_SIZE_16 << DMA_CH0_CTRL_TRIG_DATA_SIZE_LSB; + } else { + dma_pixel_ctrl = dma_ctrl | DMA_SIZE_32 << DMA_CH0_CTRL_TRIG_DATA_SIZE_LSB; + } + if (self->color_depth == 16) { + dma_pixel_ctrl |= DMA_CH0_CTRL_TRIG_BSWAP_BITS; + } + dma_ctrl |= DMA_SIZE_32 << DMA_CH0_CTRL_TRIG_DATA_SIZE_LSB; + + uint32_t dma_write_addr = (uint32_t)&hstx_fifo_hw->fifo; + // Write ctrl and write_addr once when not pixel doubling because they don't + // change. (write_addr doesn't change when pixel doubling either but we need + // to rewrite it because it is after the ctrl register.) + if (!pixel_doubled) { + dma_channel_hw_addr(self->dma_pixel_channel)->al1_ctrl = dma_ctrl; + dma_channel_hw_addr(self->dma_pixel_channel)->al1_write_addr = dma_write_addr; + } + for (size_t v_scanline = 0; v_scanline < MODE_V_TOTAL_LINES; v_scanline++) { + if (pixel_doubled) { + self->dma_commands[command_word++] = dma_ctrl; + self->dma_commands[command_word++] = dma_write_addr; + } + if (vsync_start <= v_scanline && v_scanline < vsync_end) { + self->dma_commands[command_word++] = count_of(vblank_line_vsync_on); + self->dma_commands[command_word++] = (uintptr_t)vblank_line_vsync_on; + } else if (backporch_start <= v_scanline && v_scanline < backporch_end) { + self->dma_commands[command_word++] = count_of(vblank_line_vsync_off); + self->dma_commands[command_word++] = (uintptr_t)vblank_line_vsync_off; + } else if (frontporch_start <= v_scanline && v_scanline < frontporch_end) { + self->dma_commands[command_word++] = count_of(vblank_line_vsync_off); + self->dma_commands[command_word++] = (uintptr_t)vblank_line_vsync_off; + } else { + self->dma_commands[command_word++] = count_of(vactive_line); + self->dma_commands[command_word++] = (uintptr_t)vactive_line; + size_t row = v_scanline - active_start; + size_t transfer_count = words_per_line; + if (pixel_doubled) { + self->dma_commands[command_word++] = dma_pixel_ctrl; + self->dma_commands[command_word++] = dma_write_addr; + row /= 2; + transfer_count *= 2; + } + self->dma_commands[command_word++] = transfer_count; + uint32_t *row_start = &self->framebuffer[row * self->pitch]; + self->dma_commands[command_word++] = (uintptr_t)row_start; + } + } + // Last command is NULL which will trigger an IRQ. + if (pixel_doubled) { + self->dma_commands[command_word++] = DMA_CH0_CTRL_TRIG_IRQ_QUIET_BITS | + DMA_CH0_CTRL_TRIG_EN_BITS; + self->dma_commands[command_word++] = 0; + } + self->dma_commands[command_word++] = 0; + self->dma_commands[command_word++] = 0; + + if (color_depth == 16) { + // Configure HSTX's TMDS encoder for RGB565 + hstx_ctrl_hw->expand_tmds = + 4 << HSTX_CTRL_EXPAND_TMDS_L2_NBITS_LSB | + 0 << HSTX_CTRL_EXPAND_TMDS_L2_ROT_LSB | + 5 << HSTX_CTRL_EXPAND_TMDS_L1_NBITS_LSB | + 27 << HSTX_CTRL_EXPAND_TMDS_L1_ROT_LSB | + 4 << HSTX_CTRL_EXPAND_TMDS_L0_NBITS_LSB | + 21 << HSTX_CTRL_EXPAND_TMDS_L0_ROT_LSB; + } else if (color_depth == 8) { + // Configure HSTX's TMDS encoder for RGB332 + hstx_ctrl_hw->expand_tmds = + 2 << HSTX_CTRL_EXPAND_TMDS_L2_NBITS_LSB | + 0 << HSTX_CTRL_EXPAND_TMDS_L2_ROT_LSB | + 2 << HSTX_CTRL_EXPAND_TMDS_L1_NBITS_LSB | + 29 << HSTX_CTRL_EXPAND_TMDS_L1_ROT_LSB | + 1 << HSTX_CTRL_EXPAND_TMDS_L0_NBITS_LSB | + 26 << HSTX_CTRL_EXPAND_TMDS_L0_ROT_LSB; + } else if (color_depth == 4) { + // Configure HSTX's TMDS encoder for RGBD + hstx_ctrl_hw->expand_tmds = + 0 << HSTX_CTRL_EXPAND_TMDS_L2_NBITS_LSB | + 28 << HSTX_CTRL_EXPAND_TMDS_L2_ROT_LSB | + 0 << HSTX_CTRL_EXPAND_TMDS_L1_NBITS_LSB | + 27 << HSTX_CTRL_EXPAND_TMDS_L1_ROT_LSB | + 0 << HSTX_CTRL_EXPAND_TMDS_L0_NBITS_LSB | + 26 << HSTX_CTRL_EXPAND_TMDS_L0_ROT_LSB; + } else { + // Grayscale + uint8_t rot = 24 + color_depth; + hstx_ctrl_hw->expand_tmds = + (color_depth - 1) << HSTX_CTRL_EXPAND_TMDS_L2_NBITS_LSB | + rot << HSTX_CTRL_EXPAND_TMDS_L2_ROT_LSB | + (color_depth - 1) << HSTX_CTRL_EXPAND_TMDS_L1_NBITS_LSB | + rot << HSTX_CTRL_EXPAND_TMDS_L1_ROT_LSB | + (color_depth - 1) << HSTX_CTRL_EXPAND_TMDS_L0_NBITS_LSB | + rot << HSTX_CTRL_EXPAND_TMDS_L0_ROT_LSB; + } + // Pixels come in 32 bits at a time. color_depth dictates the number + // of pixels per word. Control symbols (RAW) are an entire 32-bit word. + hstx_ctrl_hw->expand_shift = + ((32 / color_depth) % 32) << HSTX_CTRL_EXPAND_SHIFT_ENC_N_SHIFTS_LSB | + color_depth << HSTX_CTRL_EXPAND_SHIFT_ENC_SHIFT_LSB | + 1 << HSTX_CTRL_EXPAND_SHIFT_RAW_N_SHIFTS_LSB | + 0 << HSTX_CTRL_EXPAND_SHIFT_RAW_SHIFT_LSB; + + // Serial output config: clock period of 5 cycles, pop from command + // expander every 5 cycles, shift the output shiftreg by 2 every cycle. + hstx_ctrl_hw->csr = 0; + hstx_ctrl_hw->csr = + HSTX_CTRL_CSR_EXPAND_EN_BITS | + 5u << HSTX_CTRL_CSR_CLKDIV_LSB | + 5u << HSTX_CTRL_CSR_N_SHIFTS_LSB | + 2u << HSTX_CTRL_CSR_SHIFT_LSB | + HSTX_CTRL_CSR_EN_BITS; + + // Note we are leaving the HSTX clock at the SDK default of 125 MHz; since + // we shift out two bits per HSTX clock cycle, this gives us an output of + // 250 Mbps, which is very close to the bit clock for 480p 60Hz (252 MHz). + // If we want the exact rate then we'll have to reconfigure PLLs. + + // Setup the data to pin mapping. `pins` is a pair of pins in a standard + // order: clock, red, green and blue. We don't actually care they are next + // to one another but they'll work better that way. + for (size_t i = 0; i < 8; i++) { + uint lane = i / 2; + size_t invert = i % 2 == 1 ? HSTX_CTRL_BIT0_INV_BITS : 0; + uint32_t lane_data_sel_bits; + // Clock + if (lane == 0) { + lane_data_sel_bits = HSTX_CTRL_BIT0_CLK_BITS; + } else { + // Output even bits during first half of each HSTX cycle, and odd bits + // during second half. The shifter advances by two bits each cycle. + lane -= 1; + lane_data_sel_bits = + (lane * 10) << HSTX_CTRL_BIT0_SEL_P_LSB | + (lane * 10 + 1) << HSTX_CTRL_BIT0_SEL_N_LSB; + } + hstx_ctrl_hw->bit[pins[i]] = lane_data_sel_bits | invert; + } + + for (int i = 12; i <= 19; ++i) { + gpio_set_function(i, 0); // HSTX + never_reset_pin_number(i); + } + + // gpio_init(10); + // gpio_put(10, 0); + // gpio_set_dir(10, GPIO_OUT); + // never_reset_pin_number(10); + + dma_channel_config c; + c = dma_channel_get_default_config(self->dma_command_channel); + channel_config_set_transfer_data_size(&c, DMA_SIZE_32); + channel_config_set_read_increment(&c, true); + channel_config_set_write_increment(&c, true); + // This wraps the transfer back to the start of the write address. + size_t wrap = 3; // 8 bytes because we write two DMA registers. + volatile uint32_t *write_addr = &dma_hw->ch[self->dma_pixel_channel].al3_transfer_count; + if (pixel_doubled) { + wrap = 4; // 16 bytes because we write all four DMA registers. + write_addr = &dma_hw->ch[self->dma_pixel_channel].al3_ctrl; + } + channel_config_set_ring(&c, true, wrap); + // No chain because we use an interrupt to reload this channel instead of a + // third channel. + dma_channel_configure( + self->dma_command_channel, + &c, + write_addr, + self->dma_commands, + (1 << wrap) / sizeof(uint32_t), + false + ); + + dma_hw->ints1 = (1u << self->dma_pixel_channel); + dma_hw->inte1 = (1u << self->dma_pixel_channel); + irq_set_exclusive_handler(DMA_IRQ_1, dma_irq_handler); + irq_set_enabled(DMA_IRQ_1, true); + + bus_ctrl_hw->priority = BUSCTRL_BUS_PRIORITY_DMA_W_BITS | BUSCTRL_BUS_PRIORITY_DMA_R_BITS; + + // For the output. + self->framebuffer_len = framebuffer_size; + + active_picodvi = self; + + common_hal_picodvi_framebuffer_refresh(self); + dma_irq_handler(); +} + +STATIC void _turn_off_dma(uint8_t channel) { + dma_channel_config c = dma_channel_get_default_config(channel); + channel_config_set_enable(&c, false); + dma_channel_set_config(channel, &c, false /* trigger */); + + if (dma_channel_is_busy(channel)) { + dma_channel_abort(channel); + } + dma_channel_set_irq1_enabled(channel, false); + dma_channel_unclaim(channel); +} + +void common_hal_picodvi_framebuffer_deinit(picodvi_framebuffer_obj_t *self) { + if (common_hal_picodvi_framebuffer_deinited(self)) { + return; + } + + for (int i = 12; i <= 19; ++i) { + reset_pin_number(i); + } + + _turn_off_dma(self->dma_pixel_channel); + _turn_off_dma(self->dma_command_channel); + + active_picodvi = NULL; + + port_free(self->framebuffer); + self->framebuffer = NULL; + + port_free(self->dma_commands); + self->dma_commands = NULL; + + self->base.type = &mp_type_NoneType; +} + +bool common_hal_picodvi_framebuffer_deinited(picodvi_framebuffer_obj_t *self) { + return self->framebuffer == NULL; +} + +void common_hal_picodvi_framebuffer_refresh(picodvi_framebuffer_obj_t *self) { +} + +int common_hal_picodvi_framebuffer_get_width(picodvi_framebuffer_obj_t *self) { + return self->width; +} + +int common_hal_picodvi_framebuffer_get_height(picodvi_framebuffer_obj_t *self) { + return self->height; +} + +int common_hal_picodvi_framebuffer_get_color_depth(picodvi_framebuffer_obj_t *self) { + return self->color_depth; +} + +bool common_hal_picodvi_framebuffer_get_grayscale(picodvi_framebuffer_obj_t *self) { + return self->color_depth < 4; +} + +mp_int_t common_hal_picodvi_framebuffer_get_buffer(mp_obj_t self_in, mp_buffer_info_t *bufinfo, mp_uint_t flags) { + picodvi_framebuffer_obj_t *self = (picodvi_framebuffer_obj_t *)self_in; + bufinfo->buf = self->framebuffer; + bufinfo->typecode = self->color_depth > 8 ? 'H' : 'B'; + bufinfo->len = self->framebuffer_len * sizeof(uint32_t); + return 0; +} + +int common_hal_picodvi_framebuffer_get_row_stride(picodvi_framebuffer_obj_t *self) { + // Pitch is in words but row stride is expected as bytes. + return self->pitch * sizeof(uint32_t); +} diff --git a/ports/raspberrypi/common-hal/picodvi/Framebuffer_RP2350.h b/ports/raspberrypi/common-hal/picodvi/Framebuffer_RP2350.h new file mode 100644 index 000000000000..abb75dc27825 --- /dev/null +++ b/ports/raspberrypi/common-hal/picodvi/Framebuffer_RP2350.h @@ -0,0 +1,43 @@ +#pragma once + +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2023 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + uint32_t *framebuffer; + size_t framebuffer_len; // in words + uint32_t *dma_commands; + size_t dma_commands_len; // in words + mp_uint_t width; + mp_uint_t height; + uint16_t pitch; // Number of words between rows. (May be more than a width's worth.) + uint8_t color_depth; + uint8_t dma_pixel_channel; + uint8_t dma_command_channel; +} picodvi_framebuffer_obj_t; diff --git a/ports/raspberrypi/common-hal/pulseio/PulseOut.c b/ports/raspberrypi/common-hal/pulseio/PulseOut.c index 89a09600396d..114bff13979f 100644 --- a/ports/raspberrypi/common-hal/pulseio/PulseOut.c +++ b/ports/raspberrypi/common-hal/pulseio/PulseOut.c @@ -13,7 +13,7 @@ #include "shared-bindings/pwmio/PWMOut.h" #include "shared-bindings/microcontroller/__init__.h" #include "common-hal/pwmio/PWMOut.h" -#include "src/rp2040/hardware_structs/include/hardware/structs/pwm.h" +#include "hardware/structs/pwm.h" #include "src/rp2_common/hardware_gpio/include/hardware/gpio.h" #include "src/rp2_common/hardware_pwm/include/hardware/pwm.h" #include "src/common/pico_time/include/pico/time.h" diff --git a/ports/raspberrypi/common-hal/rp2pio/StateMachine.c b/ports/raspberrypi/common-hal/rp2pio/StateMachine.c index 89032c70c37e..602f9223f4cd 100644 --- a/ports/raspberrypi/common-hal/rp2pio/StateMachine.c +++ b/ports/raspberrypi/common-hal/rp2pio/StateMachine.c @@ -43,7 +43,13 @@ static int8_t _sm_dma_plus_one[NUM_PIOS][NUM_PIO_STATE_MACHINES]; #define SM_DMA_CLEAR_CHANNEL(pio_index, sm) (_sm_dma_plus_one[(pio_index)][(sm)] = 0) #define SM_DMA_SET_CHANNEL(pio_index, sm, channel) (_sm_dma_plus_one[(pio_index)][(sm)] = (channel) + 1) -static PIO pio_instances[2] = {pio0, pio1}; +static PIO pio_instances[NUM_PIOS] = { + pio0, + pio1 + #if NUM_PIOS == 3 + , pio2 + #endif +}; typedef void (*interrupt_handler_type)(void *); static interrupt_handler_type _interrupt_handler[NUM_PIOS][NUM_PIO_STATE_MACHINES]; static void *_interrupt_arg[NUM_PIOS][NUM_PIO_STATE_MACHINES]; diff --git a/ports/raspberrypi/common-hal/rtc/RTC.c b/ports/raspberrypi/common-hal/rtc/RTC.c index 79712c3a5337..3bdf599d2701 100644 --- a/ports/raspberrypi/common-hal/rtc/RTC.c +++ b/ports/raspberrypi/common-hal/rtc/RTC.c @@ -9,62 +9,32 @@ #include #include "py/runtime.h" -#include "src/rp2_common/hardware_rtc/include/hardware/rtc.h" -#include "src/rp2_common/hardware_clocks/include/hardware/clocks.h" +#include "shared/timeutils/timeutils.h" + +#include "src/common/pico_util/include/pico/util/datetime.h" +#include "src/rp2_common/pico_aon_timer/include/pico/aon_timer.h" void common_hal_rtc_init(void) { - datetime_t t = { - .year = 2020, - .month = 1, - .day = 1, - .dotw = 3, // 0 is Sunday, so 3 is Wednesday - .hour = 0, - .min = 0, - .sec = 0 + // We start the RTC at 0 which mark as January 1, 2000. + struct timespec t = { + .tv_sec = 0, + .tv_nsec = 0 }; - - // Start the RTC - rtc_init(); - rtc_set_datetime(&t); - + aon_timer_start(&t); } void common_hal_rtc_get_time(timeutils_struct_time_t *tm) { - datetime_t t; - rtc_get_datetime(&t); + struct timespec t; + aon_timer_get_time(&t); - tm->tm_year = t.year; - tm->tm_mon = t.month; - tm->tm_mday = t.day; - tm->tm_wday = t.dotw; - tm->tm_hour = t.hour; - tm->tm_min = t.min; - tm->tm_sec = t.sec; - - if (tm->tm_wday == 0) { - tm->tm_wday = 6; - } else { - tm->tm_wday -= 1; - } + timeutils_seconds_since_2000_to_struct_time(t.tv_sec, tm); } void common_hal_rtc_set_time(timeutils_struct_time_t *tm) { - if (tm->tm_wday == 6) { - tm->tm_wday = 0; - } else { - tm->tm_wday += 1; - } - - datetime_t t = { - .year = tm->tm_year, - .month = tm->tm_mon, - .day = tm->tm_mday, - .dotw = tm->tm_wday, - .hour = tm->tm_hour, - .min = tm->tm_min, - .sec = tm->tm_sec - }; - rtc_set_datetime(&t); + struct timespec t; + t.tv_nsec = 0; + t.tv_sec = timeutils_seconds_since_2000(tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_hour, tm->tm_min, tm->tm_sec); + aon_timer_set_time(&t); } int common_hal_rtc_get_calibration(void) { diff --git a/ports/raspberrypi/common-hal/usb_host/Port.c b/ports/raspberrypi/common-hal/usb_host/Port.c index b85b56fd1875..5fb4506a145e 100644 --- a/ports/raspberrypi/common-hal/usb_host/Port.c +++ b/ports/raspberrypi/common-hal/usb_host/Port.c @@ -12,8 +12,14 @@ #include "supervisor/usb.h" #include "src/common/pico_time/include/pico/time.h" +#ifdef PICO_RP2040 #include "src/rp2040/hardware_structs/include/hardware/structs/mpu.h" -#include "src/rp2_common/cmsis/stub/CMSIS/Device/RaspberryPi/RP2040/Include/RP2040.h" +#include "src/rp2_common/cmsis/stub/CMSIS/Device/RP2040/Include/RP2040.h" +#endif +#ifdef PICO_RP2350 +#include "src/rp2350/hardware_structs/include/hardware/structs/mpu.h" +#include "src/rp2_common/cmsis/stub/CMSIS/Device/RP2350/Include/RP2350.h" +#endif #include "src/rp2_common/hardware_dma/include/hardware/dma.h" #include "src/rp2_common/pico_multicore/include/pico/multicore.h" @@ -39,13 +45,21 @@ static void __not_in_flash_func(core1_main)(void) { // Turn off flash access. After this, it will hard fault. Better than messing // up CIRCUITPY. + #if __CORTEX_M == 0 MPU->CTRL = MPU_CTRL_PRIVDEFENA_Msk | MPU_CTRL_ENABLE_Msk; MPU->RNR = 6; // 7 is used by pico-sdk stack protection. - MPU->RBAR = XIP_MAIN_BASE | MPU_RBAR_VALID_Msk; + MPU->RBAR = XIP_BASE | MPU_RBAR_VALID_Msk; MPU->RASR = MPU_RASR_XN_Msk | // Set execute never and everything else is restricted. MPU_RASR_ENABLE_Msk | (0x1b << MPU_RASR_SIZE_Pos); // Size is 0x10000000 which masks up to SRAM region. MPU->RNR = 7; + #endif + #if __CORTEX_M == 33 + MPU->CTRL = MPU_CTRL_PRIVDEFENA_Msk | MPU_CTRL_ENABLE_Msk; + MPU->RNR = 6; // 7 is used by pico-sdk stack protection. + MPU->RBAR = XIP_BASE | MPU_RBAR_XN_Msk; + MPU->RLAR = XIP_SRAM_BASE | MPU_RLAR_EN_Msk; + #endif _core1_ready = true; diff --git a/ports/raspberrypi/lib/Pico-PIO-USB b/ports/raspberrypi/lib/Pico-PIO-USB index 0f747aaa0c16..0a14a34f7f31 160000 --- a/ports/raspberrypi/lib/Pico-PIO-USB +++ b/ports/raspberrypi/lib/Pico-PIO-USB @@ -1 +1 @@ -Subproject commit 0f747aaa0c16f750bdfa2ba37ec25d6c8e1bc117 +Subproject commit 0a14a34f7f31efb03c8435ade7f9f7122b19936c diff --git a/ports/raspberrypi/lib/PicoDVI b/ports/raspberrypi/lib/PicoDVI index 23a3a3bf1882..987cc88a70fc 160000 --- a/ports/raspberrypi/lib/PicoDVI +++ b/ports/raspberrypi/lib/PicoDVI @@ -1 +1 @@ -Subproject commit 23a3a3bf18820f2abd78e8a9c05b45c01b5a3810 +Subproject commit 987cc88a70fc7d2280bdf32428f12d42b7ea7c43 diff --git a/ports/raspberrypi/link.ld b/ports/raspberrypi/link-rp2040.ld similarity index 98% rename from ports/raspberrypi/link.ld rename to ports/raspberrypi/link-rp2040.ld index 0e0e7a3c5c69..5f2798623db1 100644 --- a/ports/raspberrypi/link.ld +++ b/ports/raspberrypi/link-rp2040.ld @@ -67,6 +67,8 @@ SECTIONS KEEP (*(.vectors)) KEEP (*(.binary_info_header)) __binary_info_header_end = .; + KEEP (*(.embedded_block)) + __embedded_block_end = .; KEEP (*(.reset)) /* TODO revisit this now memset/memcpy/float in ROM */ /* bit of a hack right now to exclude all floating point and time critical (e.g. memset, memcpy) code from @@ -134,7 +136,7 @@ SECTIONS /* End of .text-like segments */ __etext = .; - .ram_vector_table (COPY): { + .ram_vector_table (NOLOAD): { *(.ram_vector_table) } > RAM diff --git a/ports/raspberrypi/link-rp2350.ld b/ports/raspberrypi/link-rp2350.ld new file mode 100644 index 000000000000..c43378b2ccb2 --- /dev/null +++ b/ports/raspberrypi/link-rp2350.ld @@ -0,0 +1,291 @@ +/* Based on GCC ARM embedded samples. + Defines the following symbols for use by code: + __exidx_start + __exidx_end + __etext + __data_start__ + __preinit_array_start + __preinit_array_end + __init_array_start + __init_array_end + __fini_array_start + __fini_array_end + __data_end__ + __bss_start__ + __bss_end__ + __end__ + end + __HeapLimit + __StackLimit + __StackTop + __stack (== StackTop) +*/ + +firmware_size = DEFINED(firmware_size) ? firmware_size : 1020K ; + +MEMORY +{ + FLASH_FIRMWARE (rx) : ORIGIN = 0x10000000, LENGTH = firmware_size + /* Followed by: 4kB of NVRAM and at least 1024kB of CIRCUITPY */ + RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 512k + SCRATCH_Y (rwx) : ORIGIN = 0x20080000, LENGTH = 4k + /* X is used by core 1 so we put it last. */ + SCRATCH_X (rwx) : ORIGIN = 0x20081000, LENGTH = 4k +} + +ENTRY(_entry_point) + +SECTIONS +{ + /* Second stage bootloader is prepended to the image. It must be 256 bytes big + and checksummed. It is usually built by the boot_stage2 target + in the Pico SDK + */ + + .flash_begin : { + __flash_binary_start = .; + } > FLASH_FIRMWARE + + .text : { + __logical_binary_start = .; + KEEP (*(.vectors)) + KEEP (*(.binary_info_header)) + __binary_info_header_end = .; + KEEP (*(.embedded_block)) + __embedded_block_end = .; + KEEP (*(.reset)) + /* TODO revisit this now memset/memcpy/float in ROM */ + /* bit of a hack right now to exclude all floating point and time critical (e.g. memset, memcpy) code from + * FLASH ... we will include any thing excluded here in .data below by default */ + *(.init) + + __property_getter_start = .; + *(.property_getter) + __property_getter_end = .; + __property_getset_start = .; + *(.property_getset) + __property_getset_end = .; + + *(EXCLUDE_FILE(*libgcc.a: *libc.a:*lib_a-mem*.o *libm.a: *interp.o *divider.o *tusb_fifo.o *mem_ops_aeabi.o *usbh.o) .text*) + /* Allow everything in usbh.o except tuh_task_event_ready because we read it from core 1. */ + *usbh.o (.text.[_uphc]* .text.tuh_[cmvied]* .text.tuh_task_ext*) + *(.fini) + /* Pull all c'tors into .text */ + *crtbegin.o(.ctors) + *crtbegin?.o(.ctors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) + *(SORT(.ctors.*)) + *(.ctors) + /* Followed by destructors */ + *crtbegin.o(.dtors) + *crtbegin?.o(.dtors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) + *(SORT(.dtors.*)) + *(.dtors) + + *(.eh_frame*) + . = ALIGN(4); + } > FLASH_FIRMWARE + + .rodata : { + *(EXCLUDE_FILE(*libgcc.a: *libc.a:*lib_a-mem*.o *libm.a:) .rodata*) + . = ALIGN(4); + *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.flashdata*))) + . = ALIGN(4); + } > FLASH_FIRMWARE + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > FLASH_FIRMWARE + + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > FLASH_FIRMWARE + __exidx_end = .; + + /* Machine inspectable binary information */ + . = ALIGN(4); + __binary_info_start = .; + .binary_info : + { + KEEP(*(.binary_info.keep.*)) + *(.binary_info.*) + } > FLASH_FIRMWARE + __binary_info_end = .; + . = ALIGN(4); + + /* End of .text-like segments */ + __etext = .; + + .ram_vector_table (NOLOAD): { + *(.ram_vector_table) + } > RAM + + .data : { + __data_start__ = .; + *(vtable) + + *(EXCLUDE_FILE(*tmds_encode.o) .time_critical*) + + /* remaining .text and .rodata; i.e. stuff we exclude above because we want it in RAM */ + *(.text*) + . = ALIGN(4); + *(.rodata*) + . = ALIGN(4); + + *(.data*) + + . = ALIGN(4); + *(.after_data.*) + . = ALIGN(4); + /* preinit data */ + PROVIDE_HIDDEN (__mutex_array_start = .); + KEEP(*(SORT(.mutex_array.*))) + KEEP(*(.mutex_array)) + PROVIDE_HIDDEN (__mutex_array_end = .); + + . = ALIGN(4); + /* preinit data */ + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP(*(SORT(.preinit_array.*))) + KEEP(*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + + . = ALIGN(4); + /* init data */ + PROVIDE_HIDDEN (__init_array_start = .); + KEEP(*(SORT(.init_array*))) + KEEP(*(.init_array)) + PROVIDE_HIDDEN (__init_array_end = .); + + . = ALIGN(4); + /* finit data */ + PROVIDE_HIDDEN (__fini_array_start = .); + *(SORT(.fini_array.*)) + *(.fini_array) + PROVIDE_HIDDEN (__fini_array_end = .); + + *(.jcr) + . = ALIGN(4); + /* All data end */ + __data_end__ = .; + } > RAM AT> FLASH_FIRMWARE + + .itcm : + { + . = ALIGN(4); + *(.itcm.*) + + . = ALIGN(4); + } > RAM AT> FLASH_FIRMWARE + _ld_itcm_destination = ADDR(.itcm); + _ld_itcm_flash_copy = LOADADDR(.itcm); + _ld_itcm_size = SIZEOF(.itcm); + + .dtcm_data : + { + . = ALIGN(4); + + *(.dtcm_data.*) + + . = ALIGN(4); + } > RAM AT> FLASH_FIRMWARE + _ld_dtcm_data_destination = ADDR(.dtcm_data); + _ld_dtcm_data_flash_copy = LOADADDR(.dtcm_data); + _ld_dtcm_data_size = SIZEOF(.dtcm_data); + + .dtcm_bss (NOLOAD) : + { + . = ALIGN(4); + + *(.dtcm_bss.*) + + . = ALIGN(4); + } > RAM AT> RAM + _ld_dtcm_bss_start = ADDR(.dtcm_bss); + _ld_dtcm_bss_size = SIZEOF(.dtcm_bss); + + .uninitialized_data (COPY): { + . = ALIGN(4); + *(.uninitialized_data*) + } > RAM + + .bss : { + . = ALIGN(4); + __bss_start__ = .; + *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.bss*))) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; + } > RAM + + .heap (COPY): + { + __end__ = .; + end = __end__; + _ld_cp_dynamic_mem_start = .; + *(.heap*) + __HeapLimit = .; + } > RAM + + /* Start and end symbols must be word-aligned */ + .scratch_x : { + __scratch_x_start__ = .; + *(.scratch_x.*) + *tmds_encode.o (.time_critical*) + *timer.o (.text.hardware_alarm_irq_handler) + . = ALIGN(4); + __scratch_x_end__ = .; + } > SCRATCH_X AT > FLASH_FIRMWARE + __scratch_x_source__ = LOADADDR(.scratch_x); + + .scratch_y : { + __scratch_y_start__ = .; + /* Don't put anything into scratch y because CircuitPython manages it and uses it for core 0 stack. + /* *(.scratch_y.*) */ + . = ALIGN(4); + __scratch_y_end__ = .; + } > SCRATCH_Y AT > FLASH_FIRMWARE + __scratch_y_source__ = LOADADDR(.scratch_y); + + /* .stack*_dummy section doesn't contains any symbols. It is only + * used for linker to calculate size of stack sections, and assign + * values to stack symbols later + * + * stack1 section may be empty/missing if platform_launch_core1 is not used */ + + /* by default we put core 0 stack at the end of scratch Y, so that if core 1 + * stack is not used then all of SCRATCH_X is free. + */ + .stack1_dummy (COPY): + { + *(.stack1*) + } > SCRATCH_X + + .stack_dummy (COPY): + { + *(.stack*) + } > SCRATCH_Y + + .flash_end : { + __flash_binary_end = .; + } > FLASH_FIRMWARE + + /* stack limit is poorly named, but historically is maximum heap ptr */ + __StackLimit = ORIGIN(RAM) + LENGTH(RAM); + __StackOneTop = ORIGIN(SCRATCH_X) + LENGTH(SCRATCH_X); + __StackTop = ORIGIN(SCRATCH_Y) + LENGTH(SCRATCH_Y); + _ld_cp_dynamic_mem_end = __StackTop; + __StackOneBottom = __StackOneTop - SIZEOF(.stack1_dummy); + __StackBottom = __StackTop - SIZEOF(.stack_dummy); + PROVIDE(__stack = __StackTop); + + /* Check if data + heap + stack exceeds RAM limit */ + ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed") + + ASSERT( __binary_info_header_end - __logical_binary_start <= 1024, "Binary info must be in first 1024 bytes of the binary") + /* todo assert on extra code */ +} diff --git a/ports/raspberrypi/mpconfigport.h b/ports/raspberrypi/mpconfigport.h index b97286fe45e6..1181517fdf9a 100644 --- a/ports/raspberrypi/mpconfigport.h +++ b/ports/raspberrypi/mpconfigport.h @@ -6,9 +6,15 @@ #pragma once -#include "src/rp2040/hardware_regs/include/hardware/platform_defs.h" +#include "hardware/platform_defs.h" +#ifdef PICO_RP2040 #define MICROPY_PY_SYS_PLATFORM "RP2040" +#endif + +#ifdef PICO_RP2350 +#define MICROPY_PY_SYS_PLATFORM "RP2350" +#endif // Setting a non-default value also requires a non-default link.ld #ifndef CIRCUITPY_FIRMWARE_SIZE diff --git a/ports/raspberrypi/peripherals/pins.c b/ports/raspberrypi/peripherals/pins.c index e2c6b9ee7062..7f5e60203b22 100644 --- a/ports/raspberrypi/peripherals/pins.c +++ b/ports/raspberrypi/peripherals/pins.c @@ -61,6 +61,27 @@ PIN(26); PIN(27); PIN(28); PIN(29); +#if NUM_BANK0_GPIOS == 48 +PIN(30); +PIN(31); +PIN(32); +PIN(33); +PIN(34); +PIN(35); +PIN(36); +PIN(37); +PIN(38); +PIN(39); +PIN(40); +PIN(41); +PIN(42); +PIN(43); +PIN(44); +PIN(45); +PIN(46); +PIN(47); +#endif + #if CIRCUITPY_CYW43 CYW_PIN(0); CYW_PIN(1); diff --git a/ports/raspberrypi/peripherals/pins.h b/ports/raspberrypi/peripherals/pins.h index 4aa15e8929f5..9a1b6551654b 100644 --- a/ports/raspberrypi/peripherals/pins.h +++ b/ports/raspberrypi/peripherals/pins.h @@ -48,6 +48,26 @@ extern const mcu_pin_obj_t pin_GPIO26; extern const mcu_pin_obj_t pin_GPIO27; extern const mcu_pin_obj_t pin_GPIO28; extern const mcu_pin_obj_t pin_GPIO29; +#if NUM_BANK0_GPIOS == 48 +extern const mcu_pin_obj_t pin_GPIO30; +extern const mcu_pin_obj_t pin_GPIO31; +extern const mcu_pin_obj_t pin_GPIO32; +extern const mcu_pin_obj_t pin_GPIO33; +extern const mcu_pin_obj_t pin_GPIO34; +extern const mcu_pin_obj_t pin_GPIO35; +extern const mcu_pin_obj_t pin_GPIO36; +extern const mcu_pin_obj_t pin_GPIO37; +extern const mcu_pin_obj_t pin_GPIO38; +extern const mcu_pin_obj_t pin_GPIO39; +extern const mcu_pin_obj_t pin_GPIO40; +extern const mcu_pin_obj_t pin_GPIO41; +extern const mcu_pin_obj_t pin_GPIO42; +extern const mcu_pin_obj_t pin_GPIO43; +extern const mcu_pin_obj_t pin_GPIO44; +extern const mcu_pin_obj_t pin_GPIO45; +extern const mcu_pin_obj_t pin_GPIO46; +extern const mcu_pin_obj_t pin_GPIO47; +#endif #if CIRCUITPY_CYW43 extern const mcu_pin_obj_t pin_CYW0; diff --git a/ports/raspberrypi/pioasm/CMakeLists.txt b/ports/raspberrypi/pioasm/CMakeLists.txt index 1923068bae15..8391d631888e 100644 --- a/ports/raspberrypi/pioasm/CMakeLists.txt +++ b/ports/raspberrypi/pioasm/CMakeLists.txt @@ -5,4 +5,4 @@ include(../sdk/pico_sdk_init.cmake) pico_sdk_init() set(CMAKE_MODULE_PATH ${CMAKE_MODULE_PATH} ${PICO_SDK_PATH}/tools) -find_package(Pioasm REQUIRED) +find_package(pioasm REQUIRED) diff --git a/ports/raspberrypi/sdk b/ports/raspberrypi/sdk index 6a7db34ff633..efe2103f9b28 160000 --- a/ports/raspberrypi/sdk +++ b/ports/raspberrypi/sdk @@ -1 +1 @@ -Subproject commit 6a7db34ff63345a7badec79ebea3aaef1712f374 +Subproject commit efe2103f9b28458a1615ff096054479743ade236 diff --git a/ports/raspberrypi/supervisor/internal_flash.c b/ports/raspberrypi/supervisor/internal_flash.c index dea61e3ed1d0..6502aa08b055 100644 --- a/ports/raspberrypi/supervisor/internal_flash.c +++ b/ports/raspberrypi/supervisor/internal_flash.c @@ -23,6 +23,9 @@ #include "supervisor/flash.h" #include "supervisor/usb.h" +#ifdef PICO_RP2350 +#include "src/rp2350/hardware_structs/include/hardware/structs/qmi.h" +#endif #include "src/rp2040/hardware_structs/include/hardware/structs/sio.h" #include "src/rp2_common/hardware_flash/include/hardware/flash.h" #include "src/common/pico_binary_info/include/pico/binary_info.h" @@ -38,6 +41,31 @@ static uint8_t _cache[SECTOR_SIZE]; static uint32_t _cache_lba = NO_CACHE; static uint32_t _flash_size = 0; +#ifdef PICO_RP2350 +static uint32_t m1_rfmt; +static uint32_t m1_timing; +#endif + +static void save_psram_settings(void) { + #ifdef PICO_RP2350 + // We're about to invalidate the XIP cache, clean it first to commit any dirty writes to PSRAM + uint8_t *maintenance_ptr = (uint8_t *)XIP_MAINTENANCE_BASE; + for (int i = 1; i < 16 * 1024; i += 8) { + maintenance_ptr[i] = 0; + } + + m1_timing = qmi_hw->m[1].timing; + m1_rfmt = qmi_hw->m[1].rfmt; + #endif +} + +static void restore_psram_settings(void) { + #ifdef PICO_RP2350 + qmi_hw->m[1].timing = m1_timing; + qmi_hw->m[1].rfmt = m1_rfmt; + #endif +} + void supervisor_flash_init(void) { bi_decl_if_func_used(bi_block_device( BINARY_INFO_MAKE_TAG('C', 'P'), @@ -52,7 +80,9 @@ void supervisor_flash_init(void) { // Read the RDID register to get the flash capacity. uint8_t cmd[] = {0x9f, 0, 0, 0}; uint8_t data[4]; + save_psram_settings(); flash_do_cmd(cmd, data, 4); + restore_psram_settings(); uint8_t power_of_two = FLASH_DEFAULT_POWER_OF_TWO; // Flash must be at least 2MB (1 << 21) because we use the first 1MB for the // CircuitPython core. We validate the range because Adesto Tech flash chips @@ -82,8 +112,10 @@ void port_internal_flash_flush(void) { #if CIRCUITPY_AUDIOCORE uint32_t channel_mask = audio_dma_pause_all(); #endif + save_psram_settings(); flash_range_erase(CIRCUITPY_CIRCUITPY_DRIVE_START_ADDR + _cache_lba, SECTOR_SIZE); flash_range_program(CIRCUITPY_CIRCUITPY_DRIVE_START_ADDR + _cache_lba, _cache, SECTOR_SIZE); + restore_psram_settings(); _cache_lba = NO_CACHE; #if CIRCUITPY_AUDIOCORE audio_dma_unpause_mask(channel_mask); diff --git a/ports/raspberrypi/supervisor/port.c b/ports/raspberrypi/supervisor/port.c index 7d79dc962987..8a25d46ca706 100644 --- a/ports/raspberrypi/supervisor/port.c +++ b/ports/raspberrypi/supervisor/port.c @@ -84,6 +84,202 @@ extern uint32_t _ld_itcm_destination; extern uint32_t _ld_itcm_size; extern uint32_t _ld_itcm_flash_copy; +#ifdef CIRCUITPY_PSRAM_CHIP_SELECT + +#include "lib/tlsf/tlsf.h" + +#include "src/rp2350/hardware_regs/include/hardware/regs/qmi.h" +#include "src/rp2350/hardware_regs/include/hardware/regs/xip.h" +#include "src/rp2350/hardware_structs/include/hardware/structs/qmi.h" +#include "src/rp2350/hardware_structs/include/hardware/structs/xip_ctrl.h" + +static tlsf_t _heap = NULL; +static pool_t _ram_pool = NULL; +static pool_t _psram_pool = NULL; +static size_t _psram_size = 0; + +static void __no_inline_not_in_flash_func(setup_psram)(void) { + gpio_set_function(CIRCUITPY_PSRAM_CHIP_SELECT->number, GPIO_FUNC_XIP_CS1); + _psram_size = 0; + common_hal_mcu_disable_interrupts(); + // Try and read the PSRAM ID via direct_csr. + qmi_hw->direct_csr = 30 << QMI_DIRECT_CSR_CLKDIV_LSB | + QMI_DIRECT_CSR_EN_BITS; + // Need to poll for the cooldown on the last XIP transfer to expire + // (via direct-mode BUSY flag) before it is safe to perform the first + // direct-mode operation + while ((qmi_hw->direct_csr & QMI_DIRECT_CSR_BUSY_BITS) != 0) { + } + + // Exit out of QMI in case we've inited already + qmi_hw->direct_csr |= QMI_DIRECT_CSR_ASSERT_CS1N_BITS; + // Transmit as quad. + qmi_hw->direct_tx = QMI_DIRECT_TX_OE_BITS | + QMI_DIRECT_TX_IWIDTH_VALUE_Q << QMI_DIRECT_TX_IWIDTH_LSB | + 0xf5; + while ((qmi_hw->direct_csr & QMI_DIRECT_CSR_BUSY_BITS) != 0) { + } + (void)qmi_hw->direct_rx; + qmi_hw->direct_csr &= ~(QMI_DIRECT_CSR_ASSERT_CS1N_BITS); + + // Read the id + qmi_hw->direct_csr |= QMI_DIRECT_CSR_ASSERT_CS1N_BITS; + uint8_t kgd = 0; + uint8_t eid = 0; + for (size_t i = 0; i < 7; i++) { + if (i == 0) { + qmi_hw->direct_tx = 0x9f; + } else { + qmi_hw->direct_tx = 0xff; + } + while ((qmi_hw->direct_csr & QMI_DIRECT_CSR_TXEMPTY_BITS) == 0) { + } + while ((qmi_hw->direct_csr & QMI_DIRECT_CSR_BUSY_BITS) != 0) { + } + if (i == 5) { + kgd = qmi_hw->direct_rx; + } else if (i == 6) { + eid = qmi_hw->direct_rx; + } else { + (void)qmi_hw->direct_rx; + } + } + // Disable direct csr. + qmi_hw->direct_csr &= ~(QMI_DIRECT_CSR_ASSERT_CS1N_BITS | QMI_DIRECT_CSR_EN_BITS); + + if (kgd != 0x5D) { + common_hal_mcu_enable_interrupts(); + reset_pin_number(CIRCUITPY_PSRAM_CHIP_SELECT->number); + return; + } + never_reset_pin_number(CIRCUITPY_PSRAM_CHIP_SELECT->number); + + // Enable quad mode. + qmi_hw->direct_csr = 30 << QMI_DIRECT_CSR_CLKDIV_LSB | + QMI_DIRECT_CSR_EN_BITS; + // Need to poll for the cooldown on the last XIP transfer to expire + // (via direct-mode BUSY flag) before it is safe to perform the first + // direct-mode operation + while ((qmi_hw->direct_csr & QMI_DIRECT_CSR_BUSY_BITS) != 0) { + } + + // RESETEN, RESET and quad enable + for (uint8_t i = 0; i < 3; i++) { + qmi_hw->direct_csr |= QMI_DIRECT_CSR_ASSERT_CS1N_BITS; + if (i == 0) { + qmi_hw->direct_tx = 0x66; + } else if (i == 1) { + qmi_hw->direct_tx = 0x99; + } else { + qmi_hw->direct_tx = 0x35; + } + while ((qmi_hw->direct_csr & QMI_DIRECT_CSR_BUSY_BITS) != 0) { + } + qmi_hw->direct_csr &= ~(QMI_DIRECT_CSR_ASSERT_CS1N_BITS); + for (size_t j = 0; j < 20; j++) { + asm ("nop"); + } + (void)qmi_hw->direct_rx; + } + // Disable direct csr. + qmi_hw->direct_csr &= ~(QMI_DIRECT_CSR_ASSERT_CS1N_BITS | QMI_DIRECT_CSR_EN_BITS); + + qmi_hw->m[1].timing = + QMI_M0_TIMING_PAGEBREAK_VALUE_1024 << QMI_M0_TIMING_PAGEBREAK_LSB | // Break between pages. + 3 << QMI_M0_TIMING_SELECT_HOLD_LSB | // Delay releasing CS for 3 extra system cycles. + 1 << QMI_M0_TIMING_COOLDOWN_LSB | + 1 << QMI_M0_TIMING_RXDELAY_LSB | + 16 << QMI_M0_TIMING_MAX_SELECT_LSB | // In units of 64 system clock cycles. PSRAM says 8us max. 8 / 0.00752 / 64 = 16.62 + 7 << QMI_M0_TIMING_MIN_DESELECT_LSB | // In units of system clock cycles. PSRAM says 50ns.50 / 7.52 = 6.64 + 2 << QMI_M0_TIMING_CLKDIV_LSB; + qmi_hw->m[1].rfmt = (QMI_M0_RFMT_PREFIX_WIDTH_VALUE_Q << QMI_M0_RFMT_PREFIX_WIDTH_LSB | + QMI_M0_RFMT_ADDR_WIDTH_VALUE_Q << QMI_M0_RFMT_ADDR_WIDTH_LSB | + QMI_M0_RFMT_SUFFIX_WIDTH_VALUE_Q << QMI_M0_RFMT_SUFFIX_WIDTH_LSB | + QMI_M0_RFMT_DUMMY_WIDTH_VALUE_Q << QMI_M0_RFMT_DUMMY_WIDTH_LSB | + QMI_M0_RFMT_DUMMY_LEN_VALUE_24 << QMI_M0_RFMT_DUMMY_LEN_LSB | + QMI_M0_RFMT_DATA_WIDTH_VALUE_Q << QMI_M0_RFMT_DATA_WIDTH_LSB | + QMI_M0_RFMT_PREFIX_LEN_VALUE_8 << QMI_M0_RFMT_PREFIX_LEN_LSB | + QMI_M0_RFMT_SUFFIX_LEN_VALUE_NONE << QMI_M0_RFMT_SUFFIX_LEN_LSB); + qmi_hw->m[1].rcmd = 0xeb << QMI_M0_RCMD_PREFIX_LSB | + 0 << QMI_M0_RCMD_SUFFIX_LSB; + qmi_hw->m[1].wfmt = (QMI_M0_WFMT_PREFIX_WIDTH_VALUE_Q << QMI_M0_WFMT_PREFIX_WIDTH_LSB | + QMI_M0_WFMT_ADDR_WIDTH_VALUE_Q << QMI_M0_WFMT_ADDR_WIDTH_LSB | + QMI_M0_WFMT_SUFFIX_WIDTH_VALUE_Q << QMI_M0_WFMT_SUFFIX_WIDTH_LSB | + QMI_M0_WFMT_DUMMY_WIDTH_VALUE_Q << QMI_M0_WFMT_DUMMY_WIDTH_LSB | + QMI_M0_WFMT_DUMMY_LEN_VALUE_NONE << QMI_M0_WFMT_DUMMY_LEN_LSB | + QMI_M0_WFMT_DATA_WIDTH_VALUE_Q << QMI_M0_WFMT_DATA_WIDTH_LSB | + QMI_M0_WFMT_PREFIX_LEN_VALUE_8 << QMI_M0_WFMT_PREFIX_LEN_LSB | + QMI_M0_WFMT_SUFFIX_LEN_VALUE_NONE << QMI_M0_WFMT_SUFFIX_LEN_LSB); + qmi_hw->m[1].wcmd = 0x38 << QMI_M0_WCMD_PREFIX_LSB | + 0 << QMI_M0_WCMD_SUFFIX_LSB; + + common_hal_mcu_enable_interrupts(); + + _psram_size = 1024 * 1024; // 1 MiB + uint8_t size_id = eid >> 5; + if (eid == 0x26 || size_id == 2) { + _psram_size *= 8; + } else if (size_id == 0) { + _psram_size *= 2; + } else if (size_id == 1) { + _psram_size *= 4; + } + + // Mark that we can write to PSRAM. + xip_ctrl_hw->ctrl |= XIP_CTRL_WRITABLE_M1_BITS; + + // Test write to the PSRAM. + volatile uint32_t *psram_nocache = (volatile uint32_t *)0x15000000; + psram_nocache[0] = 0x12345678; + volatile uint32_t readback = psram_nocache[0]; + if (readback != 0x12345678) { + _psram_size = 0; + return; + } +} + +void port_heap_init(void) { + uint32_t *heap_bottom = port_heap_get_bottom(); + uint32_t *heap_top = port_heap_get_top(); + size_t size = (heap_top - heap_bottom) * sizeof(uint32_t); + _heap = tlsf_create_with_pool(heap_bottom, size, 64 * 1024 * 1024); + _ram_pool = tlsf_get_pool(_heap); + if (_psram_size > 0) { + _psram_pool = tlsf_add_pool(_heap, (void *)0x11000004, _psram_size - 4); + } +} + +void *port_malloc(size_t size, bool dma_capable) { + void *block = tlsf_malloc(_heap, size); + return block; +} + +void port_free(void *ptr) { + tlsf_free(_heap, ptr); +} + +void *port_realloc(void *ptr, size_t size) { + return tlsf_realloc(_heap, ptr, size); +} + +static void max_size_walker(void *ptr, size_t size, int used, void *user) { + size_t *max_size = (size_t *)user; + if (!used && *max_size < size) { + *max_size = size; + } +} + +size_t port_heap_get_largest_free_size(void) { + size_t max_size = 0; + tlsf_walk_pool(_ram_pool, max_size_walker, &max_size); + if (_psram_pool != NULL) { + tlsf_walk_pool(_psram_pool, max_size_walker, &max_size); + } + // IDF does this. Not sure why. + return tlsf_fit_size(_heap, max_size); +} +#endif + safe_mode_t port_init(void) { _binary_info(); // Set brown out. @@ -91,7 +287,12 @@ safe_mode_t port_init(void) { // Load from the XIP memory space that doesn't cache. That way we don't // evict anything else. The code we're loading is linked to the RAM address // anyway. + #ifdef PICO_RP2040 size_t nocache = 0x03000000; + #endif + #ifdef PICO_RP2350 + size_t nocache = 0x04000000; + #endif // Copy all of the "tightly coupled memory" code and data to run from RAM. // This lets us use the 16k cache for dynamically used data and code. @@ -125,8 +326,16 @@ safe_mode_t port_init(void) { // Reset everything into a known state before board_init. reset_port(); + serial_early_init(); + + #ifdef CIRCUITPY_PSRAM_CHIP_SELECT + setup_psram(); + #endif + // Initialize RTC + #if CIRCUITPY_RTC common_hal_rtc_init(); + #endif // For the tick. hardware_alarm_claim(0); diff --git a/ports/raspberrypi/supervisor/usb.c b/ports/raspberrypi/supervisor/usb.c index 8982a59707e6..97933d5651ea 100644 --- a/ports/raspberrypi/supervisor/usb.c +++ b/ports/raspberrypi/supervisor/usb.c @@ -8,7 +8,7 @@ #include "supervisor/background_callback.h" #include "supervisor/usb.h" #include "src/rp2_common/hardware_irq/include/hardware/irq.h" -#include "src/rp2_common/pico_platform/include/pico/platform.h" +#include "pico/platform.h" #include "src/rp2040/hardware_regs/include/hardware/regs/intctrl.h" void init_usb_hardware(void) { diff --git a/shared-module/displayio/__init__.c b/shared-module/displayio/__init__.c index 42865f0f4cc9..6f70f383395e 100644 --- a/shared-module/displayio/__init__.c +++ b/shared-module/displayio/__init__.c @@ -54,7 +54,7 @@ displayio_buffer_transform_t null_transform = { .transpose_xy = false }; -#if CIRCUITPY_RGBMATRIX || CIRCUITPY_IS31FL3741 || CIRCUITPY_VIDEOCORE +#if CIRCUITPY_RGBMATRIX || CIRCUITPY_IS31FL3741 || CIRCUITPY_VIDEOCORE || CIRCUITPY_PICODVI static bool any_display_uses_this_framebuffer(mp_obj_base_t *obj) { for (uint8_t i = 0; i < CIRCUITPY_DISPLAY_LIMIT; i++) { if (displays[i].display_base.type == &framebufferio_framebufferdisplay_type) {