-
-
Notifications
You must be signed in to change notification settings - Fork 66
/
dma_v1.c
64 lines (61 loc) · 2.81 KB
/
dma_v1.c
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
/*
* Copyright (c) 2019-2020, Dmitry (DiSlord) [email protected]
* Based on TAKAHASHI Tomohiro (TTRFTECH) [email protected]
* All rights reserved.
*
* This is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 3, or (at your option)
* any later version.
*
* The software is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with GNU Radio; see the file COPYING. If not, write to
* the Free Software Foundation, Inc., 51 Franklin Street,
* Boston, MA 02110-1301, USA.
*/
// Add all handlers (for reset DMA interrupt)
//#define DMA1_USE_ALL_HANDLERS
// F072 DMA1 interrupts handler function
#define STM32_SPI2_DMA_IRQ_NUMBER DMA1_Channel4_5_6_7_IRQn
#if defined(DMA1_CH1_HANDLER_FUNC) || defined(DMA1_USE_ALL_HANDLERS)
OSAL_IRQ_HANDLER(STM32_DMA1_CH1_HANDLER) {
uint32_t flags = DMA1->ISR; DMA1->IFCR = flags; // reset interrupt vector
#ifdef DMA1_CH1_HANDLER_FUNC
if (flags & (STM32_DMA_ISR_MASK<<0)) DMA1_CH1_HANDLER_FUNC((flags>>0)&STM32_DMA_ISR_MASK); // DMA Channel 1 handler
#endif
}
#endif
#if defined(DMA1_CH2_HANDLER_FUNC) || defined(DMA1_CH3_HANDLER_FUNC) || defined(DMA1_USE_ALL_HANDLERS)
OSAL_IRQ_HANDLER(STM32_DMA1_CH23_HANDLER) {
uint32_t flags = DMA1->ISR; DMA1->IFCR = flags; // reset interrupt vector
#ifdef DMA1_CH2_HANDLER_FUNC
if (flags & (STM32_DMA_ISR_MASK<<4)) DMA1_CH2_HANDLER_FUNC((flags>>4)&STM32_DMA_ISR_MASK); // DMA Channel 2 handler
#endif
#ifdef DMA1_CH3_HANDLER_FUNC
if (flags & (STM32_DMA_ISR_MASK<<8)) DMA1_CH3_HANDLER_FUNC((flags>>8)&STM32_DMA_ISR_MASK); // DMA Channel 3 handler
#endif
}
#endif
#if defined(DMA1_CH4_HANDLER_FUNC) || defined(DMA1_CH5_HANDLER_FUNC) || \
defined(DMA1_CH6_HANDLER_FUNC) || defined(DMA1_CH7_HANDLER_FUNC) || defined(DMA1_USE_ALL_HANDLERS)
OSAL_IRQ_HANDLER(STM32_DMA1_CH4567_HANDLER) {
uint32_t flags = DMA1->ISR; DMA1->IFCR = flags; // reset interrupt vector
#ifdef DMA1_CH4_HANDLER_FUNC
if (flags & (STM32_DMA_ISR_MASK<<12)) DMA1_CH4_HANDLER_FUNC((flags>>12)&STM32_DMA_ISR_MASK); // DMA Channel 4 handler
#endif
#ifdef DMA1_CH5_HANDLER_FUNC
if (flags & (STM32_DMA_ISR_MASK<<16)) DMA1_CH5_HANDLER_FUNC((flags>>16)&STM32_DMA_ISR_MASK); // DMA Channel 5 handler
#endif
#ifdef DMA1_CH6_HANDLER_FUNC
if (flags & (STM32_DMA_ISR_MASK<<20)) DMA1_CH6_HANDLER_FUNC((flags>>20)&STM32_DMA_ISR_MASK); // DMA Channel 6 handler
#endif
#ifdef DMA1_CH7_HANDLER_FUNC
if (flags & (STM32_DMA_ISR_MASK<<24)) DMA1_CH7_HANDLER_FUNC((flags>>24)&STM32_DMA_ISR_MASK); // DMA Channel 7 handler
#endif
}
#endif