diff --git a/esp-hal/CHANGELOG.md b/esp-hal/CHANGELOG.md index 98054d72018..418b90854fc 100644 --- a/esp-hal/CHANGELOG.md +++ b/esp-hal/CHANGELOG.md @@ -19,6 +19,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0 - DMA channel objects now implement `Peripheral` (#2526) - DMA channel objects are no longer wrapped in `Channel`. The `Channel` drivers are now managed by DMA enabled peripheral drivers. (#2526) - The `Dpi` driver and `DpiTransfer` now have a `Mode` type parameter. The driver's asyncness is determined by the asyncness of the `Lcd` used to create it. (#2526) +- `SpiDma` transfers now explicitly take a length along with the DMA buffer object (#0000) ### Fixed @@ -26,6 +27,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0 - The `configure` and `configure_for_async` DMA channel functions has been removed (#2403) - The DMA channel objects no longer have `tx` and `rx` fields. (#2526) +- Remove Dma[Rx|Tx]Buffer::length (#0000) ## [0.22.0] - 2024-11-20 diff --git a/esp-hal/MIGRATING-0.22.md b/esp-hal/MIGRATING-0.22.md index 7cb68ead420..1370ee89c88 100644 --- a/esp-hal/MIGRATING-0.22.md +++ b/esp-hal/MIGRATING-0.22.md @@ -26,3 +26,24 @@ -.with_dma(dma_channel.configure(false, DmaPriority::Priority1)); +.with_dma(dma_channel); ``` + +## SpiDma now requires you specify the transfer length explicitly + +```diff + dma_tx_buf.set_length(5 /* or greater */); +- spi_dma.write(dma_tx_buf); ++ spi_dma.write(5, dma_tx_buf); +``` + +```diff + dma_rx_buf.set_length(5 /* or greater */); +- spi_dma.read(dma_rx_buf); ++ spi_dma.read(5, dma_rx_buf); +``` + +```diff + dma_rx_buf.set_length(5 /* or greater */); + dma_tx_buf.set_length(5 /* or greater */); +- spi_dma.transfer(dma_rx_buf, dma_tx_buf); ++ spi_dma.transfer(5, dma_rx_buf, 5, dma_tx_buf); +``` diff --git a/esp-hal/src/dma/buffers.rs b/esp-hal/src/dma/buffers.rs index 5dd0f2dfe5a..8724342777d 100644 --- a/esp-hal/src/dma/buffers.rs +++ b/esp-hal/src/dma/buffers.rs @@ -120,13 +120,6 @@ pub unsafe trait DmaTxBuffer { /// This is called after the DMA is done using the buffer. fn from_view(view: Self::View) -> Self; - - /// Returns the maximum number of bytes that would be transmitted by this - /// buffer. - /// - /// This is a convenience hint for SPI. Most peripherals don't care how long - /// the transfer is. - fn length(&self) -> usize; } /// [DmaRxBuffer] is a DMA descriptor + memory combo that can be used for @@ -156,12 +149,6 @@ pub unsafe trait DmaRxBuffer { /// This is called after the DMA is done using the buffer. fn from_view(view: Self::View) -> Self; - - /// Returns the maximum number of bytes that can be received by this buffer. - /// - /// This is a convenience hint for SPI. Most peripherals don't care how long - /// the transfer is. - fn length(&self) -> usize; } /// An in-progress view into [DmaRxBuf]/[DmaTxBuf]. @@ -387,10 +374,6 @@ unsafe impl DmaTxBuffer for DmaTxBuf { fn from_view(view: Self::View) -> Self { view.0 } - - fn length(&self) -> usize { - self.len() - } } /// DMA receive buffer @@ -543,10 +526,6 @@ unsafe impl DmaRxBuffer for DmaRxBuf { fn from_view(view: Self::View) -> Self { view.0 } - - fn length(&self) -> usize { - self.len() - } } /// DMA transmit and receive buffer. @@ -675,10 +654,6 @@ unsafe impl DmaTxBuffer for DmaRxTxBuf { fn from_view(view: Self::View) -> Self { view.0 } - - fn length(&self) -> usize { - self.len() - } } unsafe impl DmaRxBuffer for DmaRxTxBuf { @@ -711,10 +686,6 @@ unsafe impl DmaRxBuffer for DmaRxTxBuf { fn from_view(view: Self::View) -> Self { view.0 } - - fn length(&self) -> usize { - self.len() - } } /// DMA Streaming Receive Buffer. @@ -865,10 +836,6 @@ unsafe impl DmaRxBuffer for DmaRxStreamBuf { fn from_view(view: Self::View) -> Self { view.buf } - - fn length(&self) -> usize { - panic!("DmaCircularBuf doesn't have a length") - } } /// A view into a [DmaRxStreamBuf] @@ -1072,10 +1039,6 @@ unsafe impl DmaTxBuffer for EmptyBuf { fn from_view(view: Self::View) -> Self { view } - - fn length(&self) -> usize { - 0 - } } unsafe impl DmaRxBuffer for EmptyBuf { @@ -1103,10 +1066,6 @@ unsafe impl DmaRxBuffer for EmptyBuf { fn from_view(view: Self::View) -> Self { view } - - fn length(&self) -> usize { - 0 - } } /// DMA Loop Buffer @@ -1180,10 +1139,6 @@ unsafe impl DmaTxBuffer for DmaLoopBuf { fn from_view(view: Self::View) -> Self { view } - - fn length(&self) -> usize { - panic!("DmaLoopBuf does not have a length") - } } impl Deref for DmaLoopBuf { diff --git a/esp-hal/src/spi/master.rs b/esp-hal/src/spi/master.rs index 5c4dc8e10a7..fe4e930423c 100644 --- a/esp-hal/src/spi/master.rs +++ b/esp-hal/src/spi/master.rs @@ -1114,12 +1114,11 @@ mod dma { unsafe fn start_transfer_dma( &mut self, full_duplex: bool, + bytes_to_read: usize, + bytes_to_write: usize, rx_buffer: &mut RX, tx_buffer: &mut TX, ) -> Result<(), Error> { - let bytes_to_read = rx_buffer.length(); - let bytes_to_write = tx_buffer.length(); - if bytes_to_read > MAX_DMA_SIZE || bytes_to_write > MAX_DMA_SIZE { return Err(Error::MaxDmaTransferSizeExceeded); } @@ -1129,6 +1128,8 @@ mod dma { unsafe { self.dma_driver().start_transfer_dma( full_duplex, + bytes_to_read, + bytes_to_write, rx_buffer, tx_buffer, &mut self.channel.rx, @@ -1167,6 +1168,8 @@ mod dma { unsafe { self.dma_driver().start_transfer_dma( false, + 0, + bytes_to_write, &mut EmptyBuf, &mut self.address_buffer, &mut self.channel.rx, @@ -1326,8 +1329,12 @@ mod dma { /// The caller must ensure that the buffers are not accessed while the /// transfer is in progress. Moving the buffers is allowed. #[cfg_attr(place_spi_driver_in_ram, ram)] - unsafe fn start_dma_write(&mut self, buffer: &mut impl DmaTxBuffer) -> Result<(), Error> { - self.start_dma_transfer(&mut EmptyBuf, buffer) + unsafe fn start_dma_write( + &mut self, + bytes_to_write: usize, + buffer: &mut impl DmaTxBuffer, + ) -> Result<(), Error> { + self.start_dma_transfer(0, bytes_to_write, &mut EmptyBuf, buffer) } /// Perform a DMA write. @@ -1339,11 +1346,12 @@ mod dma { #[cfg_attr(place_spi_driver_in_ram, ram)] pub fn write( mut self, + bytes_to_write: usize, mut buffer: TX, ) -> Result, (Error, Self, TX)> { self.wait_for_idle(); - match unsafe { self.start_dma_write(&mut buffer) } { + match unsafe { self.start_dma_write(bytes_to_write, &mut buffer) } { Ok(_) => Ok(SpiDmaTransfer::new(self, buffer)), Err(e) => Err((e, self, buffer)), } @@ -1354,8 +1362,12 @@ mod dma { /// The caller must ensure that the buffers are not accessed while the /// transfer is in progress. Moving the buffers is allowed. #[cfg_attr(place_spi_driver_in_ram, ram)] - unsafe fn start_dma_read(&mut self, buffer: &mut impl DmaRxBuffer) -> Result<(), Error> { - self.start_dma_transfer(buffer, &mut EmptyBuf) + unsafe fn start_dma_read( + &mut self, + bytes_to_read: usize, + buffer: &mut impl DmaRxBuffer, + ) -> Result<(), Error> { + self.start_dma_transfer(bytes_to_read, 0, buffer, &mut EmptyBuf) } /// Perform a DMA read. @@ -1367,10 +1379,11 @@ mod dma { #[cfg_attr(place_spi_driver_in_ram, ram)] pub fn read( mut self, + bytes_to_read: usize, mut buffer: RX, ) -> Result, (Error, Self, RX)> { self.wait_for_idle(); - match unsafe { self.start_dma_read(&mut buffer) } { + match unsafe { self.start_dma_read(bytes_to_read, &mut buffer) } { Ok(_) => Ok(SpiDmaTransfer::new(self, buffer)), Err(e) => Err((e, self, buffer)), } @@ -1383,10 +1396,12 @@ mod dma { #[cfg_attr(place_spi_driver_in_ram, ram)] unsafe fn start_dma_transfer( &mut self, + bytes_to_read: usize, + bytes_to_write: usize, rx_buffer: &mut impl DmaRxBuffer, tx_buffer: &mut impl DmaTxBuffer, ) -> Result<(), Error> { - self.start_transfer_dma(true, rx_buffer, tx_buffer) + self.start_transfer_dma(true, bytes_to_read, bytes_to_write, rx_buffer, tx_buffer) } /// Perform a DMA transfer @@ -1398,11 +1413,20 @@ mod dma { #[cfg_attr(place_spi_driver_in_ram, ram)] pub fn transfer( mut self, + bytes_to_read: usize, mut rx_buffer: RX, + bytes_to_write: usize, mut tx_buffer: TX, ) -> Result, (Error, Self, RX, TX)> { self.wait_for_idle(); - match unsafe { self.start_dma_transfer(&mut rx_buffer, &mut tx_buffer) } { + match unsafe { + self.start_dma_transfer( + bytes_to_read, + bytes_to_write, + &mut rx_buffer, + &mut tx_buffer, + ) + } { Ok(_) => Ok(SpiDmaTransfer::new(self, (rx_buffer, tx_buffer))), Err(e) => Err((e, self, rx_buffer, tx_buffer)), } @@ -1419,10 +1443,9 @@ mod dma { cmd: Command, address: Address, dummy: u8, + bytes_to_read: usize, buffer: &mut impl DmaRxBuffer, ) -> Result<(), Error> { - let bytes_to_read = buffer.length(); - self.driver().setup_half_duplex( false, cmd, @@ -1433,7 +1456,7 @@ mod dma { data_mode, ); - self.start_transfer_dma(false, buffer, &mut EmptyBuf) + self.start_transfer_dma(false, bytes_to_read, 0, buffer, &mut EmptyBuf) } /// Perform a half-duplex read operation using DMA. @@ -1445,12 +1468,20 @@ mod dma { cmd: Command, address: Address, dummy: u8, + bytes_to_read: usize, mut buffer: RX, ) -> Result, (Error, Self, RX)> { self.wait_for_idle(); match unsafe { - self.start_half_duplex_read(data_mode, cmd, address, dummy, &mut buffer) + self.start_half_duplex_read( + data_mode, + cmd, + address, + dummy, + bytes_to_read, + &mut buffer, + ) } { Ok(_) => Ok(SpiDmaTransfer::new(self, buffer)), Err(e) => Err((e, self, buffer)), @@ -1468,10 +1499,9 @@ mod dma { cmd: Command, address: Address, dummy: u8, + bytes_to_write: usize, buffer: &mut impl DmaTxBuffer, ) -> Result<(), Error> { - let bytes_to_write = buffer.length(); - #[cfg(all(esp32, spi_address_workaround))] { // On the ESP32, if we don't have data, the address is always sent @@ -1491,7 +1521,7 @@ mod dma { data_mode, ); - self.start_transfer_dma(false, &mut EmptyBuf, buffer) + self.start_transfer_dma(false, 0, bytes_to_write, &mut EmptyBuf, buffer) } /// Perform a half-duplex write operation using DMA. @@ -1503,12 +1533,20 @@ mod dma { cmd: Command, address: Address, dummy: u8, + bytes_to_write: usize, mut buffer: TX, ) -> Result, (Error, Self, TX)> { self.wait_for_idle(); match unsafe { - self.start_half_duplex_write(data_mode, cmd, address, dummy, &mut buffer) + self.start_half_duplex_write( + data_mode, + cmd, + address, + dummy, + bytes_to_write, + &mut buffer, + ) } { Ok(_) => Ok(SpiDmaTransfer::new(self, buffer)), Err(e) => Err((e, self, buffer)), @@ -1641,8 +1679,12 @@ mod dma { self.rx_buf.set_length(chunk.len()); unsafe { - self.spi_dma - .start_dma_transfer(&mut self.rx_buf, &mut EmptyBuf)?; + self.spi_dma.start_dma_transfer( + chunk.len(), + 0, + &mut self.rx_buf, + &mut EmptyBuf, + )?; } self.wait_for_idle(); @@ -1661,8 +1703,12 @@ mod dma { self.tx_buf.fill(chunk); unsafe { - self.spi_dma - .start_dma_transfer(&mut EmptyBuf, &mut self.tx_buf)?; + self.spi_dma.start_dma_transfer( + chunk.len(), + 0, + &mut EmptyBuf, + &mut self.tx_buf, + )?; } self.wait_for_idle(); @@ -1688,8 +1734,12 @@ mod dma { self.rx_buf.set_length(read_chunk.len()); unsafe { - self.spi_dma - .start_dma_transfer(&mut self.rx_buf, &mut self.tx_buf)?; + self.spi_dma.start_dma_transfer( + read_chunk.len(), + write_chunk.len(), + &mut self.rx_buf, + &mut self.tx_buf, + )?; } self.wait_for_idle(); @@ -1716,8 +1766,12 @@ mod dma { self.rx_buf.set_length(chunk.len()); unsafe { - self.spi_dma - .start_dma_transfer(&mut self.rx_buf, &mut self.tx_buf)?; + self.spi_dma.start_dma_transfer( + chunk.len(), + chunk.len(), + &mut self.rx_buf, + &mut self.tx_buf, + )?; } self.wait_for_idle(); @@ -1749,6 +1803,7 @@ mod dma { cmd, address, dummy, + buffer.len(), &mut self.rx_buf, )?; } @@ -1782,6 +1837,7 @@ mod dma { cmd, address, dummy, + buffer.len(), &mut self.tx_buf, )?; } @@ -1891,7 +1947,9 @@ mod dma { let mut spi = DropGuard::new(&mut self.spi_dma, |spi| spi.cancel_transfer()); - unsafe { spi.start_dma_transfer(&mut self.rx_buf, &mut EmptyBuf)? }; + unsafe { + spi.start_dma_transfer(chunk.len(), 0, &mut self.rx_buf, &mut EmptyBuf)? + }; spi.wait_for_idle_async().await; @@ -1914,7 +1972,9 @@ mod dma { for chunk in words.chunks(chunk_size) { self.tx_buf.fill(chunk); - unsafe { spi.start_dma_transfer(&mut EmptyBuf, &mut self.tx_buf)? }; + unsafe { + spi.start_dma_transfer(0, chunk.len(), &mut EmptyBuf, &mut self.tx_buf)? + }; spi.wait_for_idle_async().await; } @@ -1947,7 +2007,12 @@ mod dma { self.rx_buf.set_length(read_chunk.len()); unsafe { - spi.start_dma_transfer(&mut self.rx_buf, &mut self.tx_buf)?; + spi.start_dma_transfer( + read_chunk.len(), + write_chunk.len(), + &mut self.rx_buf, + &mut self.tx_buf, + )?; } spi.wait_for_idle_async().await; @@ -1977,7 +2042,12 @@ mod dma { self.rx_buf.set_length(chunk.len()); unsafe { - spi.start_dma_transfer(&mut self.rx_buf, &mut self.tx_buf)?; + spi.start_dma_transfer( + chunk.len(), + chunk.len(), + &mut self.rx_buf, + &mut self.tx_buf, + )?; } spi.wait_for_idle_async().await; @@ -2222,10 +2292,13 @@ impl DmaDriver { self.info.update(); } + #[allow(clippy::too_many_arguments)] #[cfg_attr(place_spi_driver_in_ram, ram)] unsafe fn start_transfer_dma( &self, _full_duplex: bool, + rx_len: usize, + tx_len: usize, rx_buffer: &mut impl DmaRxBuffer, tx_buffer: &mut impl DmaTxBuffer, rx: &mut RX, @@ -2240,8 +2313,6 @@ impl DmaDriver { reg_block.dma_in_link().write(|w| w.bits(0)); } - let rx_len = rx_buffer.length(); - let tx_len = tx_buffer.length(); self.info.configure_datalen(rx_len, tx_len); // enable the MISO and MOSI if needed diff --git a/examples/src/bin/spi_loopback_dma.rs b/examples/src/bin/spi_loopback_dma.rs index 2d1e0567b91..4ee18e0fbfe 100644 --- a/examples/src/bin/spi_loopback_dma.rs +++ b/examples/src/bin/spi_loopback_dma.rs @@ -82,7 +82,7 @@ fn main() -> ! { i = i.wrapping_add(1); let transfer = spi - .transfer(dma_rx_buf, dma_tx_buf) + .transfer(dma_rx_buf.len(), dma_rx_buf, dma_tx_buf.len(), dma_tx_buf) .map_err(|e| e.0) .unwrap(); // here we could do something else while DMA transfer is in progress diff --git a/examples/src/bin/spi_loopback_dma_psram.rs b/examples/src/bin/spi_loopback_dma_psram.rs index 5aeb74b8621..87e7acee87f 100644 --- a/examples/src/bin/spi_loopback_dma_psram.rs +++ b/examples/src/bin/spi_loopback_dma_psram.rs @@ -119,7 +119,7 @@ fn main() -> ! { i = i.wrapping_add(1); let transfer = spi - .transfer(dma_rx_buf, dma_tx_buf) + .transfer(dma_rx_buf.len(), dma_rx_buf, dma_tx_buf.len(), dma_tx_buf) .map_err(|e| e.0) .unwrap(); diff --git a/hil-test/tests/qspi.rs b/hil-test/tests/qspi.rs index 8960f767dea..3f30ff1c8b0 100644 --- a/hil-test/tests/qspi.rs +++ b/hil-test/tests/qspi.rs @@ -53,7 +53,14 @@ fn transfer_read( command: Command, ) -> (SpiUnderTest, DmaRxBuf) { let transfer = spi - .half_duplex_read(SpiDataMode::Quad, command, Address::None, 0, dma_rx_buf) + .half_duplex_read( + SpiDataMode::Quad, + command, + Address::None, + 0, + dma_rx_buf.len(), + dma_rx_buf, + ) .map_err(|e| e.0) .unwrap(); transfer.wait() @@ -74,6 +81,7 @@ fn transfer_write( SpiDataMode::Quad, ), 0, + dma_tx_buf.len(), dma_tx_buf, ) .map_err(|e| e.0) diff --git a/hil-test/tests/spi_full_duplex.rs b/hil-test/tests/spi_full_duplex.rs index 35a9209acc0..c2fe2b6992d 100644 --- a/hil-test/tests/spi_full_duplex.rs +++ b/hil-test/tests/spi_full_duplex.rs @@ -215,11 +215,17 @@ mod tests { for i in 1..4 { dma_rx_buf.as_mut_slice().copy_from_slice(&[5, 5, 5, 5, 5]); - let transfer = spi.read(dma_rx_buf).map_err(|e| e.0).unwrap(); + let transfer = spi + .read(dma_rx_buf.len(), dma_rx_buf) + .map_err(|e| e.0) + .unwrap(); (spi, dma_rx_buf) = transfer.wait(); assert_eq!(dma_rx_buf.as_slice(), &[0, 0, 0, 0, 0]); - let transfer = spi.write(dma_tx_buf).map_err(|e| e.0).unwrap(); + let transfer = spi + .write(dma_tx_buf.len(), dma_tx_buf) + .map_err(|e| e.0) + .unwrap(); (spi, dma_tx_buf) = transfer.wait(); assert_eq!(unit.value(), (i * 3 * DMA_BUFFER_SIZE) as _); } @@ -246,12 +252,15 @@ mod tests { for i in 1..4 { dma_rx_buf.as_mut_slice().copy_from_slice(&[5, 5, 5, 5, 5]); - let transfer = spi.read(dma_rx_buf).map_err(|e| e.0).unwrap(); + let transfer = spi + .read(dma_rx_buf.len(), dma_rx_buf) + .map_err(|e| e.0) + .unwrap(); (spi, dma_rx_buf) = transfer.wait(); assert_eq!(dma_rx_buf.as_slice(), &[0, 0, 0, 0, 0]); let transfer = spi - .transfer(dma_rx_buf, dma_tx_buf) + .transfer(dma_rx_buf.len(), dma_rx_buf, dma_tx_buf.len(), dma_tx_buf) .map_err(|e| e.0) .unwrap(); (spi, (dma_rx_buf, dma_tx_buf)) = transfer.wait(); @@ -276,7 +285,7 @@ mod tests { dma_tx_buf.as_mut_slice()[0] = i as u8; *dma_tx_buf.as_mut_slice().last_mut().unwrap() = i as u8; let transfer = spi - .transfer(dma_rx_buf, dma_tx_buf) + .transfer(dma_rx_buf.len(), dma_rx_buf, dma_tx_buf.len(), dma_tx_buf) .map_err(|e| e.0) .unwrap(); @@ -300,7 +309,7 @@ mod tests { let spi = ctx.spi.with_dma(ctx.dma_channel); let transfer = spi - .transfer(dma_rx_buf, dma_tx_buf) + .transfer(dma_rx_buf.len(), dma_rx_buf, dma_tx_buf.len(), dma_tx_buf) .map_err(|e| e.0) .unwrap(); let (spi, (dma_rx_buf, mut dma_tx_buf)) = transfer.wait(); @@ -311,7 +320,7 @@ mod tests { dma_tx_buf.fill(&[0xaa, 0xdd, 0xef, 0xbe]); let transfer = spi - .transfer(dma_rx_buf, dma_tx_buf) + .transfer(dma_rx_buf.len(), dma_rx_buf, dma_tx_buf.len(), dma_tx_buf) .map_err(|e| e.0) .unwrap(); let (_, (dma_rx_buf, dma_tx_buf)) = transfer.wait(); @@ -465,18 +474,30 @@ mod tests { dma_tx_buf.fill(&[0xde, 0xad, 0xbe, 0xef]); - let transfer = spi.write(dma_tx_buf).map_err(|e| e.0).unwrap(); + let transfer = spi + .write(dma_tx_buf.len(), dma_tx_buf) + .map_err(|e| e.0) + .unwrap(); let (spi, dma_tx_buf) = transfer.wait(); dma_rx_buf.as_mut_slice().fill(0); - let transfer = spi.read(dma_rx_buf).map_err(|e| e.0).unwrap(); + let transfer = spi + .read(dma_rx_buf.len(), dma_rx_buf) + .map_err(|e| e.0) + .unwrap(); let (spi, mut dma_rx_buf) = transfer.wait(); - let transfer = spi.write(dma_tx_buf).map_err(|e| e.0).unwrap(); + let transfer = spi + .write(dma_tx_buf.len(), dma_tx_buf) + .map_err(|e| e.0) + .unwrap(); let (spi, _dma_tx_buf) = transfer.wait(); dma_rx_buf.as_mut_slice().fill(0); - let transfer = spi.read(dma_rx_buf).map_err(|e| e.0).unwrap(); + let transfer = spi + .read(dma_rx_buf.len(), dma_rx_buf) + .map_err(|e| e.0) + .unwrap(); let (_, dma_rx_buf) = transfer.wait(); assert_eq!(&[0xff, 0xff, 0xff, 0xff], dma_rx_buf.as_slice()); @@ -502,7 +523,7 @@ mod tests { let spi = ctx.spi.with_dma(ctx.dma_channel); let mut transfer = spi - .transfer(dma_rx_buf, dma_tx_buf) + .transfer(dma_rx_buf.len(), dma_rx_buf, dma_tx_buf.len(), dma_tx_buf) .map_err(|e| e.0) .unwrap(); @@ -528,7 +549,7 @@ mod tests { let mut spi = ctx.spi.with_dma(ctx.dma_channel); let mut transfer = spi - .transfer(dma_rx_buf, dma_tx_buf) + .transfer(dma_rx_buf.len(), dma_rx_buf, dma_tx_buf.len(), dma_tx_buf) .map_err(|e| e.0) .unwrap(); @@ -542,7 +563,7 @@ mod tests { .unwrap(); let transfer = spi - .transfer(dma_rx_buf, dma_tx_buf) + .transfer(dma_rx_buf.len(), dma_rx_buf, dma_tx_buf.len(), dma_tx_buf) .map_err(|e| e.0) .unwrap(); @@ -564,7 +585,7 @@ mod tests { let spi = ctx.spi.with_dma(ctx.dma_channel).into_async(); let mut transfer = spi - .transfer(dma_rx_buf, dma_tx_buf) + .transfer(dma_rx_buf.len(), dma_rx_buf, dma_tx_buf.len(), dma_tx_buf) .map_err(|e| e.0) .unwrap(); diff --git a/hil-test/tests/spi_half_duplex_read.rs b/hil-test/tests/spi_half_duplex_read.rs index 12b77d1b065..7de4510f5f4 100644 --- a/hil-test/tests/spi_half_duplex_read.rs +++ b/hil-test/tests/spi_half_duplex_read.rs @@ -82,6 +82,7 @@ mod tests { Command::None, Address::None, 0, + dma_rx_buf.len(), dma_rx_buf, ) .map_err(|e| e.0) @@ -99,6 +100,7 @@ mod tests { Command::None, Address::None, 0, + dma_rx_buf.len(), dma_rx_buf, ) .map_err(|e| e.0) diff --git a/hil-test/tests/spi_half_duplex_write.rs b/hil-test/tests/spi_half_duplex_write.rs index f09a226ec53..52af33f0478 100644 --- a/hil-test/tests/spi_half_duplex_write.rs +++ b/hil-test/tests/spi_half_duplex_write.rs @@ -94,6 +94,7 @@ mod tests { Command::None, Address::None, 0, + dma_tx_buf.len(), dma_tx_buf, ) .map_err(|e| e.0) @@ -108,6 +109,7 @@ mod tests { Command::None, Address::None, 0, + dma_tx_buf.len(), dma_tx_buf, ) .map_err(|e| e.0) diff --git a/hil-test/tests/spi_half_duplex_write_psram.rs b/hil-test/tests/spi_half_duplex_write_psram.rs index e0eead9bde9..0762b685951 100644 --- a/hil-test/tests/spi_half_duplex_write_psram.rs +++ b/hil-test/tests/spi_half_duplex_write_psram.rs @@ -109,6 +109,7 @@ mod tests { Command::None, Address::None, 0, + dma_tx_buf.len(), dma_tx_buf, ) .map_err(|e| e.0) @@ -123,6 +124,7 @@ mod tests { Command::None, Address::None, 0, + dma_tx_buf.len(), dma_tx_buf, ) .map_err(|e| e.0) diff --git a/qa-test/src/bin/qspi_flash.rs b/qa-test/src/bin/qspi_flash.rs index 46552163fa9..ad83f29155a 100644 --- a/qa-test/src/bin/qspi_flash.rs +++ b/qa-test/src/bin/qspi_flash.rs @@ -103,6 +103,7 @@ fn main() -> ! { Command::Command8(0x06, SpiDataMode::Single), Address::None, 0, + 0, dma_tx_buf, ) .map_err(|e| e.0) @@ -117,6 +118,7 @@ fn main() -> ! { Command::Command8(0x20, SpiDataMode::Single), Address::Address24(0x000000, SpiDataMode::Single), 0, + dma_tx_buf.len(), dma_tx_buf, ) .map_err(|e| e.0) @@ -131,6 +133,7 @@ fn main() -> ! { Command::Command8(0x06, SpiDataMode::Single), Address::None, 0, + dma_tx_buf.len(), dma_tx_buf, ) .map_err(|e| e.0) @@ -148,6 +151,7 @@ fn main() -> ! { Command::Command8(0x32, SpiDataMode::Single), Address::Address24(0x000000, SpiDataMode::Single), 0, + dma_tx_buf.len(), dma_tx_buf, ) .map_err(|e| e.0) @@ -163,6 +167,7 @@ fn main() -> ! { Command::Command8(0xeb, SpiDataMode::Single), Address::Address32(0x000000 << 8, SpiDataMode::Quad), 4, + dma_rx_buf.len(), dma_rx_buf, ) .map_err(|e| e.0)