diff --git a/MProkaron/Include/Platform/CortexM/Chips/STM32F103RE/rmp_platform_STM32F103RE.h b/MProkaron/Include/Platform/CortexM/Chips/STM32F103RE/rmp_platform_STM32F103RE.h
index 282e9ebb..59075861 100644
--- a/MProkaron/Include/Platform/CortexM/Chips/STM32F103RE/rmp_platform_STM32F103RE.h
+++ b/MProkaron/Include/Platform/CortexM/Chips/STM32F103RE/rmp_platform_STM32F103RE.h
@@ -65,10 +65,10 @@ do \
     Clk_Init.APB2CLKDivider=RCC_HCLK_DIV1; \
     Clk_Init.APB1CLKDivider=RCC_HCLK_DIV2; \
     RMP_ASSERT(HAL_RCC_ClockConfig(&Clk_Init, FLASH_LATENCY_2)==HAL_OK); \
-     __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); \
+    __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); \
     \
     __HAL_RCC_GPIOA_CLK_ENABLE(); \
-	__HAL_RCC_USART1_CLK_ENABLE(); \
+    __HAL_RCC_USART1_CLK_ENABLE(); \
     GPIOA_Init.Mode=GPIO_MODE_AF_PP; \
     GPIOA_Init.Pin=GPIO_PIN_9; \
     GPIOA_Init.Speed=GPIO_SPEED_FREQ_HIGH; \
diff --git a/MProkaron/Include/Platform/CortexM/Chips/STM32F103ZE/rmp_platform_STM32F103ZE.h b/MProkaron/Include/Platform/CortexM/Chips/STM32F103ZE/rmp_platform_STM32F103ZE.h
index bd6000b1..608d469b 100644
--- a/MProkaron/Include/Platform/CortexM/Chips/STM32F103ZE/rmp_platform_STM32F103ZE.h
+++ b/MProkaron/Include/Platform/CortexM/Chips/STM32F103ZE/rmp_platform_STM32F103ZE.h
@@ -65,10 +65,10 @@ do \
     Clk_Init.APB2CLKDivider=RCC_HCLK_DIV1; \
     Clk_Init.APB1CLKDivider=RCC_HCLK_DIV2; \
     RMP_ASSERT(HAL_RCC_ClockConfig(&Clk_Init, FLASH_LATENCY_2)==HAL_OK); \
-     __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); \
+    __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); \
     \
     __HAL_RCC_GPIOA_CLK_ENABLE(); \
-	__HAL_RCC_USART1_CLK_ENABLE(); \
+    __HAL_RCC_USART1_CLK_ENABLE(); \
     GPIOA_Init.Mode=GPIO_MODE_AF_PP; \
     GPIOA_Init.Pin=GPIO_PIN_9; \
     GPIOA_Init.Speed=GPIO_SPEED_FREQ_HIGH; \
diff --git a/MProkaron/Include/Platform/CortexM/Chips/STM32F405RG/rmp_platform_STM32F405RG.h b/MProkaron/Include/Platform/CortexM/Chips/STM32F405RG/rmp_platform_STM32F405RG.h
index 65000821..fabcbb53 100644
--- a/MProkaron/Include/Platform/CortexM/Chips/STM32F405RG/rmp_platform_STM32F405RG.h
+++ b/MProkaron/Include/Platform/CortexM/Chips/STM32F405RG/rmp_platform_STM32F405RG.h
@@ -79,23 +79,23 @@ do \
     /* Enable USART 1 for user-level operations */ \
     /* Clock enabling */ \
     __HAL_RCC_GPIOB_CLK_ENABLE(); \
-	__HAL_RCC_USART1_CLK_ENABLE(); \
+    __HAL_RCC_USART1_CLK_ENABLE(); \
     /* UART IO initialization */ \
-	GPIO_Init.Pin=GPIO_PIN_6; \
-	GPIO_Init.Mode=GPIO_MODE_AF_PP; \
-	GPIO_Init.Pull=GPIO_PULLUP; \
-	GPIO_Init.Speed=GPIO_SPEED_FREQ_HIGH; \
-	GPIO_Init.Alternate=GPIO_AF7_USART1; \
-	HAL_GPIO_Init(GPIOB,&GPIO_Init); \
+    GPIO_Init.Pin=GPIO_PIN_6; \
+    GPIO_Init.Mode=GPIO_MODE_AF_PP; \
+    GPIO_Init.Pull=GPIO_PULLUP; \
+    GPIO_Init.Speed=GPIO_SPEED_FREQ_HIGH; \
+    GPIO_Init.Alternate=GPIO_AF7_USART1; \
+    HAL_GPIO_Init(GPIOB,&GPIO_Init); \
     /* UART initialization */ \
-	UART1_Handle.Instance=USART1; \
-	UART1_Handle.Init.BaudRate=115200; \
-	UART1_Handle.Init.WordLength=UART_WORDLENGTH_8B; \
-	UART1_Handle.Init.StopBits=UART_STOPBITS_1; \
-	UART1_Handle.Init.Parity=UART_PARITY_NONE; \
-	UART1_Handle.Init.HwFlowCtl=UART_HWCONTROL_NONE; \
-	UART1_Handle.Init.Mode=UART_MODE_TX; \
-	HAL_UART_Init(&UART1_Handle); \
+    UART1_Handle.Instance=USART1; \
+    UART1_Handle.Init.BaudRate=115200; \
+    UART1_Handle.Init.WordLength=UART_WORDLENGTH_8B; \
+    UART1_Handle.Init.StopBits=UART_STOPBITS_1; \
+    UART1_Handle.Init.Parity=UART_PARITY_NONE; \
+    UART1_Handle.Init.HwFlowCtl=UART_HWCONTROL_NONE; \
+    UART1_Handle.Init.Mode=UART_MODE_TX; \
+    HAL_UART_Init(&UART1_Handle); \
     RMP_CMX_PUTCHAR('\r'); \
     RMP_CMX_PUTCHAR('\n'); \
     \
diff --git a/MProkaron/Include/Platform/CortexM/Chips/STM32F767IG/rmp_platform_STM32F767IG.h b/MProkaron/Include/Platform/CortexM/Chips/STM32F767IG/rmp_platform_STM32F767IG.h
index 865b5d18..3776f493 100644
--- a/MProkaron/Include/Platform/CortexM/Chips/STM32F767IG/rmp_platform_STM32F767IG.h
+++ b/MProkaron/Include/Platform/CortexM/Chips/STM32F767IG/rmp_platform_STM32F767IG.h
@@ -43,7 +43,7 @@ do \
 { \
     RCC_OscInitTypeDef RCC_OscInitStructure; \
     RCC_ClkInitTypeDef RCC_ClkInitStructure; \
-	GPIO_InitTypeDef GPIO_Init; \
+    GPIO_InitTypeDef GPIO_Init; \
     UART_HandleTypeDef UART1_Handle; \
     RMP_Clear(&RCC_OscInitStructure, sizeof(RCC_OscInitTypeDef)); \
     RMP_Clear(&RCC_ClkInitStructure, sizeof(RCC_ClkInitTypeDef)); \
@@ -86,26 +86,26 @@ do \
     /* Enable USART 1 for user-level operations */ \
     /* Clock enabling */ \
     __HAL_RCC_GPIOA_CLK_ENABLE(); \
-	__HAL_RCC_USART1_CLK_ENABLE(); \
+    __HAL_RCC_USART1_CLK_ENABLE(); \
     /* UART IO initialization */ \
-	GPIO_Init.Pin=GPIO_PIN_9; \
-	GPIO_Init.Mode=GPIO_MODE_AF_PP; \
-	GPIO_Init.Pull=GPIO_PULLUP; \
-	GPIO_Init.Speed=GPIO_SPEED_HIGH; \
-	GPIO_Init.Alternate=GPIO_AF7_USART1; \
-	HAL_GPIO_Init(GPIOA,&GPIO_Init); \
+    GPIO_Init.Pin=GPIO_PIN_9; \
+    GPIO_Init.Mode=GPIO_MODE_AF_PP; \
+    GPIO_Init.Pull=GPIO_PULLUP; \
+    GPIO_Init.Speed=GPIO_SPEED_HIGH; \
+    GPIO_Init.Alternate=GPIO_AF7_USART1; \
+    HAL_GPIO_Init(GPIOA,&GPIO_Init); \
     /* UART initialization */ \
-	UART1_Handle.Instance=USART1; \
-	UART1_Handle.Init.BaudRate=115200; \
-	UART1_Handle.Init.WordLength=UART_WORDLENGTH_8B; \
-	UART1_Handle.Init.StopBits=UART_STOPBITS_1; \
-	UART1_Handle.Init.Parity=UART_PARITY_NONE; \
-	UART1_Handle.Init.HwFlowCtl=UART_HWCONTROL_NONE; \
-	UART1_Handle.Init.Mode=UART_MODE_TX; \
-	HAL_UART_Init(&UART1_Handle); \
+    UART1_Handle.Instance=USART1; \
+    UART1_Handle.Init.BaudRate=115200; \
+    UART1_Handle.Init.WordLength=UART_WORDLENGTH_8B; \
+    UART1_Handle.Init.StopBits=UART_STOPBITS_1; \
+    UART1_Handle.Init.Parity=UART_PARITY_NONE; \
+    UART1_Handle.Init.HwFlowCtl=UART_HWCONTROL_NONE; \
+    UART1_Handle.Init.Mode=UART_MODE_TX; \
+    HAL_UART_Init(&UART1_Handle); \
     /* Enable all fault handlers */ \
     SCB->SHCSR|=RMP_CMX_SHCSR_USGFAULTENA|RMP_CMX_SHCSR_BUSFAULTENA|RMP_CMX_SHCSR_MEMFAULTENA; \
-     \
+    \
     /* Set the priority of timer, svc and faults to the lowest */ \
     NVIC_SetPriorityGrouping(RMP_CMX_NVIC_GROUPING); \
     NVIC_SetPriority(SVCall_IRQn, 0xFF); \
diff --git a/MProkaron/Include/Platform/CortexM/Chips/STM32L053C8/rmp_platform_STM32L053C8.h b/MProkaron/Include/Platform/CortexM/Chips/STM32L053C8/rmp_platform_STM32L053C8.h
index afa8be30..c936fcd5 100644
--- a/MProkaron/Include/Platform/CortexM/Chips/STM32L053C8/rmp_platform_STM32L053C8.h
+++ b/MProkaron/Include/Platform/CortexM/Chips/STM32L053C8/rmp_platform_STM32L053C8.h
@@ -41,7 +41,7 @@ do \
 { \
     RCC_OscInitTypeDef RCC_OscInitStruct; \
     RCC_ClkInitTypeDef RCC_ClkInitStruct; \
-	GPIO_InitTypeDef GPIO_Init; \
+    GPIO_InitTypeDef GPIO_Init; \
     UART_HandleTypeDef UART1_Handle; \
     RMP_Clear(&RCC_OscInitStruct, sizeof(RCC_OscInitTypeDef)); \
     RMP_Clear(&RCC_ClkInitStruct, sizeof(RCC_ClkInitTypeDef)); \
@@ -64,8 +64,7 @@ do \
     RCC_OscInitStruct.PLL.PLLDIV=RCC_PLL_DIV2; \
     RCC_OscInitStruct.HSICalibrationValue=0x10; \
     HAL_RCC_OscConfig(&RCC_OscInitStruct); \
-    /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2  \
-     * clocks dividers */ \
+    /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clock dividers */ \
     RCC_ClkInitStruct.ClockType=(RCC_CLOCKTYPE_SYSCLK|RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2); \
     RCC_ClkInitStruct.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK; \
     RCC_ClkInitStruct.AHBCLKDivider=RCC_SYSCLK_DIV1; \
@@ -76,23 +75,23 @@ do \
     /* Enable USART 1 for user-level operations */ \
     /* Clock enabling */ \
     __HAL_RCC_GPIOA_CLK_ENABLE(); \
-	__HAL_RCC_USART1_CLK_ENABLE(); \
+    __HAL_RCC_USART1_CLK_ENABLE(); \
     /* UART IO initialization */ \
-	GPIO_Init.Pin=GPIO_PIN_9; \
-	GPIO_Init.Mode=GPIO_MODE_AF_PP; \
-	GPIO_Init.Pull=GPIO_PULLUP; \
-	GPIO_Init.Speed=GPIO_SPEED_HIGH; \
-	GPIO_Init.Alternate=GPIO_AF4_USART1; \
-	HAL_GPIO_Init(GPIOA,&GPIO_Init); \
+    GPIO_Init.Pin=GPIO_PIN_9; \
+    GPIO_Init.Mode=GPIO_MODE_AF_PP; \
+    GPIO_Init.Pull=GPIO_PULLUP; \
+    GPIO_Init.Speed=GPIO_SPEED_HIGH; \
+    GPIO_Init.Alternate=GPIO_AF4_USART1; \
+    HAL_GPIO_Init(GPIOA,&GPIO_Init); \
     /* UART initialization */ \
-	UART1_Handle.Instance=USART1; \
-	UART1_Handle.Init.BaudRate=115200; \
-	UART1_Handle.Init.WordLength=UART_WORDLENGTH_8B; \
-	UART1_Handle.Init.StopBits=UART_STOPBITS_1; \
-	UART1_Handle.Init.Parity=UART_PARITY_NONE; \
-	UART1_Handle.Init.HwFlowCtl=UART_HWCONTROL_NONE; \
-	UART1_Handle.Init.Mode=UART_MODE_TX; \
-	HAL_UART_Init(&UART1_Handle); \
+    UART1_Handle.Instance=USART1; \
+    UART1_Handle.Init.BaudRate=115200; \
+    UART1_Handle.Init.WordLength=UART_WORDLENGTH_8B; \
+    UART1_Handle.Init.StopBits=UART_STOPBITS_1; \
+    UART1_Handle.Init.Parity=UART_PARITY_NONE; \
+    UART1_Handle.Init.HwFlowCtl=UART_HWCONTROL_NONE; \
+    UART1_Handle.Init.Mode=UART_MODE_TX; \
+    HAL_UART_Init(&UART1_Handle); \
     RMP_CMX_PUTCHAR('\r'); \
     RMP_CMX_PUTCHAR('\n'); \
     \