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Merge pull request #3 from open-watcom/master
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Merge updates from open-watcom-v2 master
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@GateLinker
GateLinker authored Nov 24, 2023
2 parents e8e4534 + 4e0b934 commit b88b45a
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20 changes: 20 additions & 0 deletions .github/workflows/runsdel.yml
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@@ -0,0 +1,20 @@
name: Delete Old (Workflow Runs)
on:
schedule:
- cron: '5 3 * * 0'
# Run weekly, at 01:05 on the Sunday.
workflow_dispatch:

jobs:
del_runs:
runs-on: ubuntu-latest
permissions:
actions: write
steps:
- name: Delete workflow runs
uses: Mattraks/delete-workflow-runs@v2
with:
token: ${{ github.token }}
repository: ${{ github.repository }}
retain_days: 45
keep_minimum_runs: 45
1 change: 1 addition & 0 deletions .gitignore
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Expand Up @@ -5,6 +5,7 @@
*.COP
*.core
*.d32
*.dep
*.dip
*.dis
# ignore *.dll files, but include *.dll subdirectories
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2 changes: 1 addition & 1 deletion README.md
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Expand Up @@ -74,7 +74,7 @@ The directory layout is as follows:
several environment variables.

Note: the rel directory structure is created on the fly. The
location of rel tree can be changed by `OWRELROOT` environment
location of rel tree can be changed by OWRELROOT environment
variable.

OpenWatcom Installation
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2 changes: 1 addition & 1 deletion bld/afxapi/master.mif
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Expand Up @@ -5,7 +5,7 @@ proj_name = afxapi
afxapi_autodepends = .autodepend

!ifeq lib_debug 1
release = 0
afxapi_debug = 1
!endif

!ifeq unicode 1
Expand Down
128 changes: 52 additions & 76 deletions bld/as/axp/c/alphafmt.c
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Original file line number Diff line number Diff line change
Expand Up @@ -36,47 +36,27 @@
#endif


#define _FiveBits( x ) ( (x) & 0x001f )
#define _SixBits( x ) ( (x) & 0x003f )
#define _SevenBits( x ) ( (x) & 0x007f )
#define _EightBits( x ) ( (x) & 0x00ff )
#define _ElevenBits( x ) ( (x) & 0x07ff )
#define _FourteenBits( x ) ( (x) & 0x3fff )
#define _SixteenBits( x ) ( (x) & 0xffff )
#define _TwentyOneBits( x ) ( (x) & 0x001fffff )

#define _LIT_value( x ) ( _EightBits( x ) << 1 )
#define _LIT_bit 1
#define _LIT_unshifted( x ) ( _LIT_value( x ) | _LIT_bit )

#define _Opcode( x ) ( _SixBits( x ) << 26 )
#define _Ra( x ) ( _FiveBits( x ) << 21 )
#define _Rb( x ) ( _FiveBits( x ) << 16 )
#define _Rc( x ) ( _FiveBits( x ) << 0 )
#define _Memory_disp( x ) ( _SixteenBits( x ) << 0 )
#define _Mem_Func( x ) ( _SixteenBits( x ) << 0 )
#define _Branch_disp( x ) ( _TwentyOneBits( x ) << 0 )
#define _Op_Func( x ) ( _SevenBits( x ) << 5 )
#define _FP_Op_Func( x ) ( _ElevenBits( x ) << 5 )
#define _LIT( x ) ( _LIT_unshifted( x ) << 12 )

#define _Longword_offset( x ) ( (x) >> 2 )

#define MAX_EXTENDED_INS 20 // Including the default buffer, we have
// 21 dwords for an ins that emits multiple
// instructions. (eg. ldb)

#define OPCODE_BIS 0x11
#define FUNCCODE_BIS 0x0020
#define OPCODE_LDA 0x8
#define OPCODE_LDAH 0x9
#define OPCODE_BIS 0x11
#define FUNCCODE_BIS 0x0020
#define OPCODE_LDA 0x8
#define OPCODE_LDAH 0x9

#define OP_HAS_RELOC( op ) (((op)->flags & (RELOC | UNNAMED_RELOC)) != 0)
#define OP_RELOC_NAMED( op ) ((op)->flags & RELOC)

typedef struct reloc_entry *reloc_list;

typedef op_type ot_array[MAX_OPERANDS];
typedef op_type ot_array[MAX_OPERANDS];

struct reloc_entry {
reloc_list next;
Expand Down Expand Up @@ -116,11 +96,11 @@ static owl_reloc_type reloc_translate[] = {
OWL_RELOC_JUMP_REL, // jump hint
};

static bool ensureOpAbsolute( ins_operand *op, uint_8 opIdx )
//***********************************************************
static bool checkOpAbsolute( ins_operand *op, int op_idx )
//********************************************************
{
if( OP_HAS_RELOC( op ) ) {
Error( RELOC_NOT_ALLOWED, opIdx );
Error( RELOC_NOT_ALLOWED, op_idx );
return( false );
}
return( true );
Expand Down Expand Up @@ -236,26 +216,24 @@ static ins_funccode getFuncCode( ins_table *table, instruction *ins )
return( fc );
}

static void doOpcodeRaRb( uint_32 *buffer, ins_opcode opcode, uint_8 ra, uint_8 rb, uint_32 remain )
//**************************************************************************************************
static void doOpcodeRaRb( uint_32 *buffer, ins_opcode opcode, reg_idx ra, reg_idx rb, uint_32 remain )
//****************************************************************************************************
{
*buffer = _Opcode( opcode ) | _Ra( ra ) | _Rb( rb ) | remain;
}

static void doOpcodeFcRaRc( uint_32 *buffer, ins_opcode opcode, ins_funccode fc, uint_8 ra, uint_8 rc, uint_32 extra )
//********************************************************************************************************************
static void doOpcodeFcRaRc( uint_32 *buffer, ins_opcode opcode, ins_funccode fc, reg_idx ra, reg_idx rc, uint_32 extra )
//**********************************************************************************************************************
// This procedure doesn't fill in all the bits (missing bits 20-12).
// But we can fill it in using extra.
{
*buffer = _Opcode( opcode ) | _Op_Func( fc ) | _Ra( ra ) | _Rc( rc ) |
extra;
*buffer = _Opcode( opcode ) | _Function( fc ) | _Ra( ra ) | _Rc( rc ) | extra;
}

static void doFPInst( uint_32 *buffer, ins_opcode opcode, uint_8 ra, uint_8 rb, uint_8 rc, uint_32 remain )
//*********************************************************************************************************
static void doFPInst( uint_32 *buffer, ins_opcode opcode, reg_idx ra, reg_idx rb, reg_idx rc, uint_32 fc )
//********************************************************************************************************
{
*buffer = _Opcode( opcode ) | _Ra( ra ) | _Rb( rb ) |
_FP_Op_Func( remain ) | _Rc( rc );
*buffer = _Opcode( opcode ) | _Ra( ra ) | _Rb( rb ) | _FPFunction( fc ) | _Rc( rc );
}

#ifndef _STANDALONE_
Expand All @@ -274,8 +252,8 @@ static void doAutoVar( asm_reloc *reloc, op_reloc_target targ, uint_32 *buffer,
}
#endif

static unsigned ldaConst32( uint_32 *buffer, uint_8 d_reg, uint_8 s_reg, ins_operand *op, op_const c, asm_reloc *reloc, bool force_pair )
/****************************************************************************************************************************************
static unsigned ldaConst32( uint_32 *buffer, reg_idx d_reg, reg_idx s_reg, ins_operand *op, op_const c, asm_reloc *reloc, bool force_pair )
/******************************************************************************************************************************************
* LDA-LDAH sequence for 32-bit constants
* Given: lda $d_reg, foobar+c($s_reg)
* info for foobar is stored in op
Expand All @@ -287,7 +265,7 @@ static unsigned ldaConst32( uint_32 *buffer, uint_8 d_reg, uint_8 s_reg, ins_ope
int ctr;
unsigned ret = 1;
int_16 low, high[2];
uint_8 base_reg;
reg_idx base_reg;
owl_reloc_type type;
bool hi_reloc_emitted = false;

Expand Down Expand Up @@ -335,37 +313,33 @@ static unsigned ldaConst32( uint_32 *buffer, uint_8 d_reg, uint_8 s_reg, ins_ope
if( !hi_reloc_emitted && force_pair ) { // no LDAH has been generated yet
// force_pair => no modifier should've been specified
// We are asked to force one, so here
doOpcodeRaRb( buffer, OPCODE_LDAH, d_reg, s_reg,
_Memory_disp( 0 ) );
doOpcodeRaRb( buffer, OPCODE_LDAH, d_reg, s_reg, _Memory_disp( 0 ) );
doReloc( reloc, op, OWL_RELOC_HALF_HI, buffer );
++buffer;
++ret;
}
base_reg = ( ret == 1 ? s_reg : d_reg );
doOpcodeRaRb( buffer, OPCODE_LDA, d_reg, base_reg,
_Memory_disp( low ) );
doOpcodeRaRb( buffer, OPCODE_LDA, d_reg, base_reg, _Memory_disp( low ) );
if( reloc ) {
doReloc( reloc, op, OWL_RELOC_HALF_LO, buffer );
}
return( ret );
}

#if 0
static unsigned forceLoadAddressComplete( uint_8 d_reg, uint_8 s_reg, ins_operand *op, uint_32 *buffer, asm_reloc *reloc )
/*************************************************************************************************************************
static unsigned forceLoadAddressComplete( reg_idx d_reg, reg_idx s_reg, ins_operand *op, uint_32 *buffer, asm_reloc *reloc )
/***************************************************************************************************************************
*
* Generate:
* LDAH $d_reg, h^foo($s_reg)
* LDA $d_reg, l^foo+c($d_reg)
* store them in buffer[0], buffer[1]
*/
{
doOpcodeRaRb( buffer, OPCODE_LDAH, d_reg, s_reg,
_Memory_disp( 0 ) );
doOpcodeRaRb( buffer, OPCODE_LDAH, d_reg, s_reg, _Memory_disp( 0 ) );
doReloc( reloc, op, OWL_RELOC_HALF_HI, buffer );
buffer++;
doOpcodeRaRb( buffer, OPCODE_LDA, d_reg, d_reg,
_Memory_disp( op->constant ) );
doOpcodeRaRb( buffer, OPCODE_LDA, d_reg, d_reg, _Memory_disp( op->constant ) );
doReloc( reloc, op, OWL_RELOC_HALF_LO, buffer );
return( 2 );
}
Expand Down Expand Up @@ -399,13 +373,13 @@ static void doMov( uint_32 *buffer, ins_operand *operands[], domov_option m_opt
if( op0->type == OP_GPR ) {
extra = _Rb( RegIndex( op0->reg ) );
} else if( ( op0->constant & 0xff ) == op0->constant ) { // OP_IMMED implied
extra = _LIT( op0->constant ); // this lit is between 0..255
(void)ensureOpAbsolute( op0, 0 );
extra = _LIT( op0->constant ) | _LIT_bit; // this lit is between 0..255
(void)checkOpAbsolute( op0, 0 );
} else if( m_opt == DOMOV_ABS ) {
abs_val = abs( op0->constant );
if( ( abs_val & 0xff ) == abs_val ) {
extra = _LIT( abs_val ); // this lit is between 0..255
// ensureOpAbsolute( op0, 0 ); should be done before calling doMov
extra = _LIT( abs_val ) | _LIT_bit; // this lit is between 0..255
// checkOpAbsolute( op0, 0 ); should be done before calling doMov
} else {
ready = false;
}
Expand All @@ -418,7 +392,7 @@ static void doMov( uint_32 *buffer, ins_operand *operands[], domov_option m_opt
}
// Otherwise it's OP_IMMED with a greater than 8-bit literal.
// We'll then use multiple LDA, LDAH instructions to load the literal.
if( !ensureOpAbsolute( op0, 0 ) )
if( !checkOpAbsolute( op0, 0 ) )
return;
numExtendedIns += load32BitLiteral( buffer, op0, op1, m_opt ) - 1;
}
Expand All @@ -430,7 +404,7 @@ static void ITLoadAddress( ins_table *table, instruction *ins, uint_32 *buffer,
ins_operand *ops[2];
unsigned inc;
// op_const val;
uint_8 s_reg;
reg_idx s_reg;

/* unused parameters */ (void)table;

Expand Down Expand Up @@ -554,8 +528,8 @@ static void ITMemB( ins_table *table, instruction *ins, uint_32 *buffer, asm_rel
_Mem_Func( table->funccode ) );
}

static void doMemJump( uint_32 *buffer, ins_table *table, uint_8 ra, uint_8 rb, ins_operand *addr_op, int_32 hint, asm_reloc *reloc )
//***********************************************************************************************************************************
static void doMemJump( uint_32 *buffer, ins_table *table, reg_idx ra, reg_idx rb, ins_operand *addr_op, int_32 hint, asm_reloc *reloc )
//*************************************************************************************************************************************
{
// Note that addr_op maybe NULL. If not, addr_op->constant == hint.
assert( addr_op == NULL || addr_op->constant == hint );
Expand Down Expand Up @@ -654,7 +628,7 @@ static void ITMemJump( ins_table *table, instruction *ins, uint_32 *buffer, asm_
ins_operand *op0, *op1;
int num_op;
int inc;
uint_8 d_reg_idx; // default d_reg if not specified
reg_idx d_reg_idx; // default d_reg if not specified

num_op = ins->num_operands;
// First check if the operands are of the right types
Expand Down Expand Up @@ -749,7 +723,7 @@ static void ITRet( ins_table *table, instruction *ins, uint_32 *buffer, asm_relo
{
ins_operand *op0, *op1;
int num_op;
uint_8 d_reg_idx; // default d_reg if not specified
reg_idx d_reg_idx; // default d_reg if not specified

num_op = ins->num_operands;
// First check if the operands are of the right types
Expand Down Expand Up @@ -836,8 +810,8 @@ static void ITOperate( ins_table *table, instruction *ins, uint_32 *buffer, asm_
extra = _Rb( RegIndex( op->reg ) );
} else { // OP_IMMED
assert( op->type == OP_IMMED );
extra = _LIT( op->constant );
(void)ensureOpAbsolute( op, 1 );
extra = _LIT( op->constant ) | _LIT_bit;
(void)checkOpAbsolute( op, 1 );
}
fc = getFuncCode( table, ins );
doOpcodeFcRaRc( buffer, table->opcode, fc,
Expand Down Expand Up @@ -906,7 +880,7 @@ static void ITMTMFFpcr( ins_table *table, instruction *ins, uint_32 *buffer, asm
{
assert( ins->num_operands == 1 || ins->num_operands == 3 );
if( ins->num_operands == 1 ) {
uint_8 reg_num;
reg_idx reg_num;

reg_num = RegIndex( ins->operands[0]->reg );
doFPInst( buffer, table->opcode, reg_num, reg_num, reg_num,
Expand Down Expand Up @@ -948,7 +922,7 @@ static void ITPseudoMov( ins_table *table, instruction *ins, uint_32 *buffer, as
static void ITPseudoFmov( ins_table *table, instruction *ins, uint_32 *buffer, asm_reloc *reloc )
//***********************************************************************************************
{
uint_8 reg_idx0;
reg_idx reg_idx0;

/* unused parameters */ (void)reloc;

Expand All @@ -973,8 +947,8 @@ static void ITPseudoNot( ins_table *table, instruction *ins, uint_32 *buffer, as
extra = _Rb( RegIndex( op->reg ) );
} else { // OP_IMMED
assert( op->type == OP_IMMED );
extra = _LIT( op->constant );
(void)ensureOpAbsolute( op, 0 );
extra = _LIT( op->constant ) | _LIT_bit;
(void)checkOpAbsolute( op, 0 );
}
fc = getFuncCode( table, ins );
doOpcodeFcRaRc( buffer, table->opcode, fc, ZERO_REG_IDX,
Expand All @@ -997,7 +971,7 @@ static void ITPseudoNegf( ins_table *table, instruction *ins, uint_32 *buffer, a
static void ITPseudoFneg( ins_table *table, instruction *ins, uint_32 *buffer, asm_reloc *reloc )
//***********************************************************************************************
{
uint_8 reg_idx0;
reg_idx reg_idx0;

/* unused parameters */ (void)reloc;

Expand All @@ -1010,7 +984,9 @@ static void ITPseudoFneg( ins_table *table, instruction *ins, uint_32 *buffer, a
static void ITPseudoAbs( ins_table *table, instruction *ins, uint_32 *buffer, asm_reloc *reloc )
//**********************************************************************************************
{
uint_8 s_reg_idx, d_reg_idx, rc_reg_idx;
reg_idx s_reg_idx;
reg_idx d_reg_idx;
reg_idx rc_reg_idx;
ins_operand *src_op;
bool same_reg;

Expand All @@ -1021,7 +997,7 @@ static void ITPseudoAbs( ins_table *table, instruction *ins, uint_32 *buffer, as
if( src_op->type == OP_IMMED ) {
// Then just evaluate it and do a mov instead.
// mov abs(src_op->constant), d_reg
if( ensureOpAbsolute( src_op, 0 ) ) {
if( checkOpAbsolute( src_op, 0 ) ) {
doMov( buffer, ins->operands, DOMOV_ABS );
}
return;
Expand Down Expand Up @@ -1076,7 +1052,7 @@ static void ITCallPAL( ins_table *table, instruction *ins, uint_32 *buffer, asm_

assert( ins->num_operands == 1 );
op = ins->operands[0];
(void)ensureOpAbsolute( op, 0 );
(void)checkOpAbsolute( op, 0 );
constant = op->constant;
opcode = ( constant & 0xfC000000 ) >> 26;
if( opcode != 0x00 &&
Expand All @@ -1092,7 +1068,7 @@ static void ITCallPAL( ins_table *table, instruction *ins, uint_32 *buffer, asm_

alpha_format AlphaFormatTable[] = {
#define PICK( a, b, c, d, e ) { b, { c, d, e } },
#include "alphafmt.inc"
#include "_axpfmt.h"
#undef PICK
};

Expand Down Expand Up @@ -1126,14 +1102,14 @@ bool AlphaValidate( instruction *ins )
}

#ifdef _STANDALONE_
static void emitIns( owl_section_handle hdl, char *inscode, int size )
//********************************************************************
static void emitIns( owl_section_handle hdl, char *inscode, size_t size )
//***********************************************************************
{
ObjEmitData( hdl, inscode, size, true );
}
#else
static void emitIns( char *inscode, int size )
//********************************************
static void emitIns( char *inscode, size_t size )
//***********************************************
{
ObjEmitData( inscode, size, true );
}
Expand Down
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