diff --git a/arch/arm/boot/dts/qcom/Makefile b/arch/arm/boot/dts/qcom/Makefile index 9fa43b0eb9f9..588774d93394 100644 --- a/arch/arm/boot/dts/qcom/Makefile +++ b/arch/arm/boot/dts/qcom/Makefile @@ -1,3 +1,124 @@ +dtb-$(CONFIG_ARCH_MSM8996) += msm8996-v2-pmi8994-mtp.dtb \ + msm8996-v2-pmi8994-pmk8001-mtp.dtb \ + msm8996-v2-pmi8994-pm8004-mtp.dtb \ + msm8996-v2-pmi8994-pm8004-pmk8001-mtp.dtb \ + msm8996-v2-fluid.dtb \ + msm8996-v2-liquid.dtb \ + msm8996-v2-dtp.dtb \ + msm8996-v3-auto-cdp.dtb \ + msm8996-v3-auto-adp.dtb \ + msm8996-v3-pmi8994-cdp.dtb \ + msm8996-v3-pmi8994-mtp.dtb \ + msm8996-v3-pmi8994-pmk8001-cdp.dtb \ + msm8996-v3-pmi8994-pmk8001-mtp.dtb \ + msm8996-v3-pmi8994-pm8004-cdp.dtb \ + msm8996-v3-pmi8994-pm8004-mtp.dtb \ + msm8996-v3-pmi8994-pm8004-pmk8001-cdp.dtb \ + msm8996-v3-pmi8994-pm8004-pmk8001-mtp.dtb \ + msm8996-v3-pmi8996-cdp.dtb \ + msm8996-v3-pmi8996-mtp.dtb \ + msm8996-v3-pmi8996-pmk8001-cdp.dtb \ + msm8996-v3-pmi8996-pmk8001-mtp.dtb \ + msm8996-v3-fluid.dtb \ + msm8996-v3-liquid.dtb \ + msm8996-v3-dtp.dtb \ + msm8996-v3-pm8004-mmxf-adp.dtb \ + msm8996-v3-pm8004-agave-adp.dtb \ + msm8996-v3-pm8004-agave-adp-lite.dtb \ + msm8996pro-auto-adp.dtb \ + msm8996pro-auto-adp-lite.dtb \ + msm8996pro-auto-cdp.dtb \ + msm8996pro-pmi8994-cdp.dtb \ + msm8996pro-pmi8994-mtp.dtb \ + msm8996pro-pmi8994-pmk8001-cdp.dtb \ + msm8996pro-pmi8994-pmk8001-mtp.dtb \ + msm8996pro-pmi8994-pm8004-cdp.dtb \ + msm8996pro-pmi8994-pm8004-mtp.dtb \ + msm8996pro-pmi8994-pm8004-pmk8001-cdp.dtb \ + msm8996pro-pmi8994-pm8004-pmk8001-mtp.dtb \ + msm8996pro-pmi8996-cdp.dtb \ + msm8996pro-pmi8996-mtp.dtb \ + msm8996pro-pmi8996-pmk8001-cdp.dtb \ + msm8996pro-pmi8996-pmk8001-mtp.dtb \ + msm8996pro-v1.1-auto-cdp.dtb \ + msm8996pro-v1.1-pmi8994-cdp.dtb \ + msm8996pro-v1.1-pmi8994-mtp.dtb \ + msm8996pro-v1.1-pmi8994-pmk8001-cdp.dtb \ + msm8996pro-v1.1-pmi8994-pmk8001-mtp.dtb \ + msm8996pro-v1.1-pmi8994-pm8004-cdp.dtb \ + msm8996pro-v1.1-pmi8994-pm8004-mtp.dtb \ + msm8996pro-v1.1-pmi8994-pm8004-pmk8001-cdp.dtb \ + msm8996pro-v1.1-pmi8994-pm8004-pmk8001-mtp.dtb \ + msm8996pro-v1.1-pmi8996-cdp.dtb \ + msm8996pro-v1.1-pmi8996-mtp.dtb \ + msm8996pro-v1.1-pmi8996-pmk8001-cdp.dtb \ + msm8996pro-v1.1-pmi8996-pmk8001-mtp.dtb \ + apq8096pro-auto-cdp.dtb \ + apq8096pro-v1.1-auto-adp.dtb \ + apq8096pro-v1.1-auto-adp-lite.dtb \ + apq8096pro-liquid.dtb \ + apq8096pro-v1.1-auto-cdp.dtb \ + apq8096pro-v1.1-pmi8994-cdp.dtb \ + apq8096pro-v1.1-pmi8994-mtp.dtb \ + apq8096pro-v1.1-pmi8994-pmk8001-cdp.dtb \ + apq8096pro-v1.1-pmi8994-pmk8001-mtp.dtb \ + apq8096pro-v1.1-pmi8994-pm8004-cdp.dtb \ + apq8096pro-v1.1-pmi8994-pm8004-mtp.dtb \ + apq8096pro-v1.1-pmi8994-pm8004-pmk8001-cdp.dtb \ + apq8096pro-v1.1-pmi8994-pm8004-pmk8001-mtp.dtb \ + apq8096pro-v1.1-pmi8996-cdp.dtb \ + apq8096pro-v1.1-pmi8996-mtp.dtb \ + apq8096pro-v1.1-pmi8996-pmk8001-cdp.dtb \ + apq8096pro-v1.1-pmi8996-pmk8001-mtp.dtb \ + msm8996-v3.0-pmi8994-cdp.dtb \ + msm8996-v3.0-pmi8994-mtp.dtb \ + msm8996-v3.0-pmi8994-pm8004-cdp.dtb \ + msm8996-v3.0-pmi8994-pm8004-mtp.dtb \ + msm8996-v3.0-pmi8994-pm8004-pmk8001-cdp.dtb \ + msm8996-v3.0-pmi8994-pmk8001-cdp.dtb \ + msm8996-v3.0-pmi8996-cdp.dtb \ + msm8996-v3.0-pmi8996-mtp.dtb \ + msm8996-v3.0-fluid.dtb \ + msm8996-v3.0-liquid.dtb \ + msm8996-v3.0-dtp.dtb \ + apq8096-v2-pmi8994-mtp.dtb \ + apq8096-v2-liquid.dtb \ + apq8096-v2-dragonboard.dtb \ + apq8096-v2-auto-dragonboard.dtb \ + apq8096-v3-pmi8994-cdp.dtb \ + apq8096-v3-pmi8994-mtp.dtb \ + apq8096-v3-pmi8994-pmk8001-cdp.dtb \ + apq8096-v3-pmi8994-pm8004-cdp.dtb \ + apq8096-v3-pmi8994-pm8004-pmk8001-cdp.dtb \ + apq8096-v3-pmi8996-cdp.dtb \ + apq8096-v3-pmi8996-mtp.dtb \ + apq8096-v3-liquid.dtb \ + apq8096-v3-dragonboard.dtb \ + apq8096-v3-mediabox.dtb \ + apq8096-v3-sbc.dtb \ + apq8096-v3-auto-dragonboard.dtb \ + apq8096-v3-auto-adp.dtb \ + apq8096-v3-auto-cdp.dtb \ + apq8096-v3-drone.dtb \ + apq8096-v3.0-pmi8994-cdp.dtb \ + apq8096-v3.0-pmi8994-mtp.dtb \ + apq8096-v3.0-pmi8994-pm8004-cdp.dtb \ + apq8096-v3.0-pmi8994-pm8004-pmk8001-cdp.dtb \ + apq8096-v3.0-pmi8994-pmk8001-cdp.dtb \ + apq8096-v3.0-pmi8996-cdp.dtb \ + apq8096-v3.0-pmi8996-mtp.dtb \ + apq8096-v3.0-liquid.dtb \ + apq8096-v3.0-dragonboard.dtb \ + apq8096-v3-pmi8994-mdm9x55-i2s-cdp.dtb \ + apq8096-v3-pmi8994-pm8004-mdm9x55-i2s-cdp.dtb \ + apq8096-v3-pmi8994-pm8004-pmk8001-mdm9x55-i2s-cdp.dtb \ + apq8096-v3-pmi8994-pmk8001-mdm9x55-i2s-cdp.dtb \ + apq8096-v3-pmi8996-mdm9x55-i2s-cdp.dtb \ + apq8096-v3-pmi8994-mdm9x55-i2s-mtp.dtb \ + apq8096-v3-pmi8994-mdm9x55-slimbus-mtp.dtb \ + apq8096-v3-pmi8996-mdm9x55-i2s-mtp.dtb \ + apq8096-v3-pmi8996-mdm9x55-slimbus-mtp.dtb \ + apq8096-v3-pmi8996-dragonboard.dtb dtb-$(CONFIG_MSM_GVM_QUIN) += vplatform-lfv-msm8996.dtb @@ -10,6 +131,48 @@ dtb-$(CONFIG_ARCH_MSMCOBALT) += msmcobalt-sim.dtb \ msmcobalt-v2-mtp.dtb \ msmcobalt-v2-cdp.dtb +dtb-$(CONFIG_ARCH_MDM9640) += mdm9640-sim.dtb \ + mdm9640-rumi.dtb \ + mdm9640-emmc-cdp.dtb \ + mdm9640-nand-cdp.dtb \ + mdm9640-mtp.dtb \ + mdm9640-v1-mtp.dtb \ + mdm9640-v1-pmk8001-mtp.dtb \ + mdm9640-v2-mtp.dtb \ + mdm9640-v2-pmk8001-mtp.dtb \ + + +dtb-$(CONFIG_ARCH_MDM9650) += mdm9650-ttp.dtb \ + mdm9650-pcie-ep-ttp.dtb \ + mdm9650-nand-dualwifi-mtp.dtb \ + mdm9650-v1.1-emmc-cdp.dtb \ + mdm9650-v1.1-nand-cdp.dtb \ + mdm9650-v1.1-emmc-mtp.dtb \ + mdm9650-v1.1-nand-mtp.dtb \ + mdm9650-v1.1-nand-ccard-v2.dtb \ + mdm9650-v1.1-emmc-pcie-ep-mtp.dtb \ + mdm9650-v1.1-nand-pcie-ep-mtp.dtb \ + mdm9650-v1.1-nand-cv2x.dtb \ + mdm9650-v1.1-nand-rome-sdio-mtp.dtb + +dtb-$(CONFIG_ARCH_SDX20) += sdx20-emmc-cdp.dtb \ + sdx20-emmc-mtp.dtb \ + sdx20-nand-cdp.dtb \ + sdx20-nand-mtp.dtb \ + sdx20-nand-dualwifi-mtp.dtb \ + sdx20-nand-dualwifi-cdp.dtb \ + sdx20-v2-emmc-cdp.dtb \ + sdx20-v2-emmc-mtp.dtb \ + sdx20-v2-nand-cdp.dtb \ + sdx20-v2-nand-mtp.dtb \ + sdx20-v2-nand-dualwifi-mtp.dtb \ + sdx20-v2-nand-dualwifi-cdp.dtb \ + sdx20-v2-nand-singlewifi-dualwificonf-mtp.dtb \ + sdx20-emmc-pcie-ep-mtp.dtb \ + sdx20-nand-pcie-ep-mtp.dtb \ + sdx20-v2-emmc-pcie-ep-mtp.dtb \ + sdx20-v2-nand-pcie-ep-mtp.dtb + dtb-$(CONFIG_ARCH_MSM8937) += msm8937-rumi.dtb \ msm8937-pmi8950-cdp.dtb \ msm8937-pmi8937-cdp.dtb \ @@ -52,10 +215,137 @@ dtb-$(CONFIG_ARCH_MSM8917) += msm8917-rumi.dtb \ apq8017-pmi8950-cdp-wcd-rome.dtb \ apq8017-no-pmi-wcd-rome-cdp.dtb +dtb-$(CONFIG_ARCH_MSM8920) += msm8920-pmi8937-cdp.dtb \ + msm8920-pmi8937-mtp.dtb \ + msm8920-pmi8950-cdp.dtb \ + msm8920-pmi8950-mtp.dtb \ + msm8920-pmi8937-rcm.dtb \ + msm8920-pmi8950-rcm.dtb \ + msm8920-pmi8940-qrd-sku7.dtb \ + msm8920-pmi8950-ext-codec-cdp.dtb + +dtb-$(CONFIG_ARCH_MSM8940) += msm8940-pmi8937-cdp.dtb \ + msm8940-pmi8937-mtp.dtb \ + msm8940-pmi8950-cdp.dtb \ + msm8940-pmi8950-mtp.dtb \ + msm8940-pmi8937-rcm.dtb \ + msm8940-pmi8950-rcm.dtb \ + msm8940-pmi8950-qrd-sku6.dtb \ + msm8940-pmi8950-qrd-sku7.dtb \ + msm8940-pmi8950-ext-codec-cdp.dtb \ + msm8940-pmi8940-mtp.dtb \ + msm8940-pmi8940-cdp.dtb \ + msm8940-pmi8940-rcm.dtb \ + msm8940-pmi8940-qrd-sku7.dtb + +dtb-$(CONFIG_ARCH_MSM8953) += msm8953-sim.dtb \ + msm8953-rumi.dtb \ + msm8953-cdp.dtb \ + msm8953-mtp.dtb \ + msm8953-ext-codec-mtp.dtb \ + msm8953-qrd-sku3.dtb \ + msm8953-rcm.dtb \ + apq8053-rcm.dtb \ + msm8953-ext-codec-rcm.dtb \ + apq8053-cdp.dtb \ + apq8053-ipc.dtb \ + msm8953-ipc.dtb \ + apq8053-mtp.dtb \ + apq8053-ext-audio-mtp.dtb \ + apq8053-ext-codec-rcm.dtb \ + apq8053-lite-dragon-v1.0.dtb \ + apq8053-lite-dragon-v2.0.dtb \ + apq8053-lite-ext-codec-dragon-v2.0.dtb \ + msm8953-cdp-1200p.dtb \ + msm8953-iot-mtp.dtb \ + apq8053-iot-mtp.dtb \ + msm8953-pmi8940-cdp.dtb \ + msm8953-pmi8940-mtp.dtb \ + msm8953-pmi8937-cdp.dtb \ + msm8953-pmi8937-mtp.dtb \ + msm8953-pmi8940-ext-codec-mtp.dtb \ + msm8953-pmi8937-ext-codec-mtp.dtb + +dtb-$(CONFIG_ARCH_SDM450) += sdm450-rcm.dtb \ + sdm450-cdp.dtb \ + sdm450-mtp.dtb \ + sdm450-qrd.dtb \ + sdm450-pmi8940-mtp.dtb \ + sdm450-pmi8937-mtp.dtb \ + sdm450-iot-mtp.dtb \ + sda450-cdp.dtb \ + sda450-mtp.dtb + +dtb-$(CONFIG_ARCH_MDM9607) += mdm9607-rumi.dtb \ + mdm9607-cdp.dtb \ + mdm9607-mtp.dtb \ + mdm9607-rcm.dtb \ + mdm9607-mtp-sdcard.dtb \ + mdm9607-ttp.dtb \ + mdm9206-mtp.dtb \ + mdm9206-cdp.dtb \ + mdm9206-mtp-sdcard.dtb \ + mdm9206-rcm.dtb + +dtb-$(CONFIG_ARCH_MSM8916) += msm8952-qrd-skum.dtb \ + msm8952-cdp.dtb \ + msm8952-ext-codec-cdp.dtb \ + msm8952-mtp.dtb -dtb-$(CONFIG_ARCH_MSM8953) += msm8953-qrd-sku3.dtb \ - msm8953-qrd-sku3-e7.dtb \ - msm8953-qrd-sku3-daisy.dtb +dtb-$(CONFIG_ARCH_MSM8909) += msm8909-pm8916-mtp.dtb \ + msm8909-cdp.dtb \ + msm8909-1gb-qrd-skuc.dtb \ + msm8909-1gb-qrd-skue.dtb \ + msm8909-qrd-skue.dtb \ + msm8909w-wtp.dtb \ + apq8009w-wtp.dtb \ + apq8009w-cdp.dtb \ + msm8909w-swoctp.dtb \ + msm8909w-swoctp-circpanel.dtb \ + apq8009w-swoctp.dtb \ + apq8009w-swoctp-circpanel.dtb \ + apq8009w-nowgr-swoctp.dtb \ + apq8009w-nowgr-swoctp-circpanel.dtb \ + msm8909-pm8916-cdp.dtb \ + msm8909w-cdp.dtb \ + msm8909w-1gb-wtp.dtb \ + apq8009w-1gb-wtp.dtb \ + msm8909w-1gb-cdp.dtb \ + apq8009w-1gb-cdp.dtb \ + msm8909w-1gb-swoctp.dtb \ + msm8909w-1gb-swoctp-circpanel.dtb \ + apq8009w-1gb-swoctp.dtb \ + apq8009w-1gb-swoctp-circpanel.dtb \ + apq8009w-1gb-nowgr-swoctp.dtb \ + apq8009w-1gb-nowgr-swoctp-circpanel.dtb \ + msm8909w-bg-wtp-v1.dtb \ + msm8909w-bg-wtp-v2.dtb \ + apq8009w-bg-wtp-v1.dtb \ + apq8009w-bg-wtp-v2.dtb \ + apq8009-mtp-wcd9326.dtb \ + msm8909-mtp-wcd9326.dtb \ + msm8909-mtp-wcd9326-refboard.dtb \ + msm8909-512mb-mtp-wcd9326-refboard.dtb \ + msm8909-512mb-cdp-wcd9326-refboard.dtb \ + msm8909-512mb-rcm-wcd9326-refboard.dtb \ + msm8909-cdp-wcd9326-refboard.dtb \ + msm8909-rcm-wcd9326-refboard.dtb \ + apq8009-mtp-wcd9326-refboard.dtb \ + apq8009-512mb-mtp-wcd9326-refboard.dtb \ + apq8009-512mb-cdp-wcd9326-refboard.dtb \ + apq8009-512mb-rcm-wcd9326-refboard.dtb \ + apq8009-cdp-wcd9326-refboard.dtb \ + apq8009-rcm-wcd9326-refboard.dtb \ + apq8009-robot-refboard.dtb \ + apq8009-robot-rome.dtb \ + apq8009-mtp-drone.dtb \ + msm8909-mtp.dtb \ + msm8909-1gb-mtp.dtb \ + msm8909-1gb-rcm.dtb \ + msm8909-pm8916-1gb-rcm.dtb \ + msm8909-1gb-cdp.dtb \ + apq8009-ext-codec-dragon.dtb \ + apq8009-dragon.dtb ifeq ($(CONFIG_ARM64),y) always := $(dtb-y) diff --git a/arch/arm/boot/dts/qcom/Sakura-Default-4000mah-41kohm.dtsi b/arch/arm/boot/dts/qcom/Sakura-Default-4000mah-41kohm.dtsi deleted file mode 100644 index fff510cab3d2..000000000000 --- a/arch/arm/boot/dts/qcom/Sakura-Default-4000mah-41kohm.dtsi +++ /dev/null @@ -1,50 +0,0 @@ - -qcom,3299637_huaqin_bn47atl_4000mah_averaged_masterslave_7thMay2018 { - /* #3299637_Huaqin_BN47atl_4000mAh_averaged_MasterSlave_Feb9th2018*/ - qcom,max-voltage-uv = <4400000>; - qcom,nom-batt-capacity-mah = <4000>; - qcom,batt-id-kohm = <200>; - qcom,battery-beta = <3380>; - qcom,battery-type = "Default"; - qcom,chg-rslow-comp-c1 = <3424410>; - qcom,chg-rslow-comp-c2 = <5067152>; - qcom,chg-rs-to-rslow = <892701>; - qcom,chg-rslow-comp-thr = <0xA9>; - qcom,fg-cc-cv-threshold-mv = <4390>; - qcom,checksum = <0x4D97>; - qcom,gui-version = "PMI8950GUI - 2.0.0.16"; - qcom,fg-profile-data = [ - F8 83 55 7D - 40 81 2A 77 - 3E 83 7E 72 - 66 7E 82 7B - EB 81 EC 9B - 81 BF D8 D0 - 81 10 ED 83 - C7 7C FE 80 - 07 77 30 83 - 2D 7A 47 8C - B5 88 22 82 - 9F 9B 2A C4 - 4F D2 67 0E - 63 0F B8 59 - 14 70 EE FC - BD 44 7F 44 - FA 43 00 00 - 20 4C C8 38 - 3F 39 00 00 - 00 00 00 00 - 00 00 00 00 - 1A 70 1F 6A - 55 70 84 8B - 42 77 E0 70 - 7D 6D 92 78 - A5 6F 68 68 - 90 3E 05 A1 - 2C C8 62 91 - 64 A0 71 0C - 28 00 FF 36 - F0 11 30 03 - 00 00 00 0C - ]; -}; diff --git a/arch/arm/boot/dts/qcom/Sakura-FMT-4v4-4000mah-41kohm.dtsi b/arch/arm/boot/dts/qcom/Sakura-FMT-4v4-4000mah-41kohm.dtsi deleted file mode 100644 index 400a2c9d79c2..000000000000 --- a/arch/arm/boot/dts/qcom/Sakura-FMT-4v4-4000mah-41kohm.dtsi +++ /dev/null @@ -1,50 +0,0 @@ - -qcom,3299637_huaqin_bn47atl_4000mah_averaged_masterslave_feb9th2018 { - /* #3299637_Huaqin_BN47atl_4000mAh_averaged_MasterSlave_Feb9th2018*/ - qcom,max-voltage-uv = <4400000>; - qcom,nom-batt-capacity-mah = <4000>; - qcom,batt-id-kohm = <41>; - qcom,battery-beta = <3380>; - qcom,battery-type = "FMT-4000mah-41kohm"; - qcom,chg-rslow-comp-c1 = <3424410>; - qcom,chg-rslow-comp-c2 = <5067152>; - qcom,chg-rs-to-rslow = <892701>; - qcom,chg-rslow-comp-thr = <0xA9>; - qcom,fg-cc-cv-threshold-mv = <4390>; - qcom,checksum = <0x4D97>; - qcom,gui-version = "PMI8950GUI - 2.0.0.16"; - qcom,fg-profile-data = [ - F8 83 55 7D - 40 81 2A 77 - 3E 83 7E 72 - 66 7E 82 7B - EB 81 EC 9B - 81 BF D8 D0 - 81 10 ED 83 - C7 7C FE 80 - 07 77 30 83 - 2D 7A 47 8C - B5 88 22 82 - 9F 9B 2A C4 - 4F D2 67 0E - 63 0F B8 59 - 14 70 EE FC - BD 44 7F 44 - FA 43 00 00 - 20 4C C8 38 - 3F 39 00 00 - 00 00 00 00 - 00 00 00 00 - 1A 70 1F 6A - 55 70 84 8B - 42 77 E0 70 - 7D 6D 92 78 - A5 6F 68 68 - 90 3E 05 A1 - 2C C8 62 91 - 64 A0 71 0C - 28 00 FF 36 - F0 11 30 03 - 00 00 00 0C - ]; -}; diff --git a/arch/arm/boot/dts/qcom/Sakura-GY-4000mah-51kohm.dtsi b/arch/arm/boot/dts/qcom/Sakura-GY-4000mah-51kohm.dtsi deleted file mode 100644 index 13b277339086..000000000000 --- a/arch/arm/boot/dts/qcom/Sakura-GY-4000mah-51kohm.dtsi +++ /dev/null @@ -1,50 +0,0 @@ - -qcom,3299735_huaqin_d1scos_4000mah_averaged_masterslave_feb20th2018 { - /* #3299735_Huaqin_D1Scos_4000mAh_averaged_MasterSlave_Feb20th2018*/ - qcom,max-voltage-uv = <4400000>; - qcom,nom-batt-capacity-mah = <4000>; - qcom,batt-id-kohm = <51>; - qcom,battery-beta = <3380>; - qcom,battery-type = "GY-4000mah-51kohm"; - qcom,chg-rslow-comp-c1 = <3910349>; - qcom,chg-rslow-comp-c2 = <7207770>; - qcom,chg-rs-to-rslow = <881635>; - qcom,chg-rslow-comp-thr = <0xBA>; - qcom,fg-cc-cv-threshold-mv = <4390>; - qcom,checksum = <0xDA4C>; - qcom,gui-version = "PMI8950GUI - 2.0.0.16"; - qcom,fg-profile-data = [ - D0 83 F4 77 - 3A 80 29 75 - 3C 83 4C 73 - 1E 84 CC 80 - F6 81 A3 9B - 36 BF A6 D0 - 75 10 FB 83 - 4C 7D 45 81 - 56 77 31 83 - 0F 7A 28 8C - 81 88 23 82 - 9A 9B 28 C4 - 4D D2 6B 0E - 8D 0F 80 59 - 14 70 EE FC - 4E 45 BA 3F - A6 43 00 00 - 41 4C C7 40 - FD 16 00 00 - 00 00 00 00 - 00 00 00 00 - 36 70 58 6A - 91 60 EF 89 - 13 7C 72 71 - F9 6D 86 78 - DC 74 0A 6A - A1 6C 3F A1 - 2D C7 60 F3 - 5E A0 71 0C - 28 00 FF 36 - F0 11 30 03 - 00 00 00 0C - ]; -}; diff --git a/arch/arm/boot/dts/qcom/Sakura-XWD-4000mah-78kohm.dtsi b/arch/arm/boot/dts/qcom/Sakura-XWD-4000mah-78kohm.dtsi deleted file mode 100644 index 50d6e2be570e..000000000000 --- a/arch/arm/boot/dts/qcom/Sakura-XWD-4000mah-78kohm.dtsi +++ /dev/null @@ -1,50 +0,0 @@ - -qcom,3464413_huaqin_d1ssun_4000mah_averaged_masterslave_may31st2018 { - /* #3464413_Huaqin_D1Ssun_4000mAh_averaged_MasterSlave_May31st2018*/ - qcom,max-voltage-uv = <4400000>; - qcom,nom-batt-capacity-mah = <4000>; - qcom,batt-id-kohm = <78>; - qcom,battery-beta = <3380>; - qcom,battery-type = "XWD-4000mah-78kohm"; - qcom,chg-rslow-comp-c1 = <4038035>; - qcom,chg-rslow-comp-c2 = <7085423>; - qcom,chg-rs-to-rslow = <940608>; - qcom,chg-rslow-comp-thr = <0xB7>; - qcom,fg-cc-cv-threshold-mv = <4390>; - qcom,checksum = <0xDC28>; - qcom,gui-version = "PMI8950GUI - 2.0.0.16"; - qcom,fg-profile-data = [ - BC 83 91 76 - 7B 7B 4B 74 - 36 83 22 78 - 0C 85 DF 81 - ED 81 1D A0 - 21 C4 AA D1 - 6C 0F 18 88 - FA 7E 66 82 - A6 7C 38 83 - 34 79 6F 86 - B1 82 26 82 - B0 9B 3B C4 - 6B D2 79 0E - 99 0F BD 59 - 14 70 EE FC - 5C 22 99 45 - 27 38 00 00 - 82 46 F0 41 - C5 3E 00 00 - 00 00 00 00 - 00 00 00 00 - CF 70 80 6A - 0B 84 CD 88 - 58 7D 4C 73 - DA 74 2B 73 - 25 76 7F 6B - 65 4B B3 A2 - 35 76 61 4C - 5F A0 71 0C - 28 00 FF 36 - F0 11 30 03 - 00 00 00 0C - ]; -}; diff --git a/arch/arm/boot/dts/qcom/Vince-coslight-50Kohm-4000mah.dtsi b/arch/arm/boot/dts/qcom/Vince-coslight-50Kohm-4000mah.dtsi deleted file mode 100755 index e86cc6204c7a..000000000000 --- a/arch/arm/boot/dts/qcom/Vince-coslight-50Kohm-4000mah.dtsi +++ /dev/null @@ -1,49 +0,0 @@ - -qcom,3005023_huaqin_e7cos_4000mah_averaged_masterslave_jul10th2017 { - /* #3005023_Huaqin_E7cos_4000mAh_averaged_MasterSlave_Jul10th2017*/ - qcom,max-voltage-uv = <4380000>; - qcom,nom-batt-capacity-mah = <4000>; - qcom,batt-id-kohm = <50>; - qcom,battery-beta = <3435>; - qcom,battery-type = "Vince_coslight_50Kohm_4000mah"; - qcom,chg-rslow-comp-c1 = <2912209>; - qcom,chg-rslow-comp-c2 = <3933866>; - qcom,chg-rs-to-rslow = <758663>; - qcom,chg-rslow-comp-thr = <0xA0>; - qcom,checksum = <0xBFCD>; - qcom,gui-version = "PMI8950GUI - 2.0.0.16"; - qcom,fg-profile-data = [ - ED 83 4A 7D - 73 81 EF 77 - 57 83 7C 44 - E0 80 0E 8C - 21 82 F5 99 - D6 BC 4F C9 - 5A 0F FA 83 - 58 7D 65 81 - AF 77 57 83 - 88 61 4C 81 - D6 8D 76 82 - 15 98 FD B5 - EA C1 52 13 - AC 0F 4A 59 - 14 70 EE FC - BF 44 F4 3C - 56 3A 00 00 - D9 44 8F 39 - 55 3E 00 00 - 00 00 00 00 - 00 00 00 00 - A7 6A B9 69 - B4 6B 37 83 - C7 6E AB 62 - 1D 70 67 81 - F6 6C 71 60 - 16 7D 3E 92 - 1B 51 60 6E - 5D A0 71 0C - 28 00 FF 36 - F0 11 30 03 - 00 00 00 0C - ]; -}; diff --git a/arch/arm/boot/dts/qcom/Vince-desay-24Kohm-4000mAh.dtsi b/arch/arm/boot/dts/qcom/Vince-desay-24Kohm-4000mAh.dtsi deleted file mode 100644 index b0107e410d89..000000000000 --- a/arch/arm/boot/dts/qcom/Vince-desay-24Kohm-4000mAh.dtsi +++ /dev/null @@ -1,49 +0,0 @@ - -qcom,3199087_huaqin_e7desay_4000mah_averaged_masterslave_dec4th2017 { - /* #3199087_Huaqin_E7desay_4000mAh_averaged_MasterSlave_Dec4th2017*/ - qcom,max-voltage-uv = <4380000>; - qcom,nom-batt-capacity-mah = <4000>; - qcom,batt-id-kohm = <24>; - qcom,battery-beta = <3380>; - qcom,battery-type = "Vince_desay_24Kohm_4000mah"; - qcom,chg-rslow-comp-c1 = <4132413>; - qcom,chg-rslow-comp-c2 = <7193808>; - qcom,chg-rs-to-rslow = <1059831>; - qcom,chg-rslow-comp-thr = <0xB7>; - qcom,checksum = <0x4B4D>; - qcom,gui-version = "PMI8950GUI - 2.0.0.16"; - qcom,fg-profile-data = [ - A5 83 51 74 - 6F 79 3B 6C - 37 83 D1 73 - 70 84 1A 81 - EA 81 49 A0 - 75 C4 52 D2 - 6C 0F D0 83 - B9 76 4E 7B - 10 74 2F 83 - 61 7A 78 8C - EC 88 20 82 - 47 A0 3F C5 - 75 D8 63 0C - DC 0F C6 59 - 14 70 EE FC - 0E 20 34 45 - 77 39 00 00 - 46 47 EA 3B - FD 2E 00 00 - 00 00 00 00 - 00 00 00 00 - 60 71 DC 6A - 29 7C 0B 83 - 51 7D DF 72 - 3B 67 A7 78 - D6 75 DE 6A - 04 74 5A A3 - 2D 6E 60 A6 - 5D A0 71 0C - 28 00 FF 36 - F0 11 30 03 - 00 00 00 0C - ]; -}; diff --git a/arch/arm/boot/dts/qcom/Vince-sunwoda-40Kohm-4000mah.dtsi b/arch/arm/boot/dts/qcom/Vince-sunwoda-40Kohm-4000mah.dtsi deleted file mode 100755 index 466f8c35a8c9..000000000000 --- a/arch/arm/boot/dts/qcom/Vince-sunwoda-40Kohm-4000mah.dtsi +++ /dev/null @@ -1,49 +0,0 @@ - -qcom,3005040_huaqin_e7sun_4000mah_averaged_masterslave_jul17th2017 { - /* #3005040_Huaqin_E7sun_4000mAh_averaged_MasterSlave_Jul17th2017*/ - qcom,max-voltage-uv = <4380000>; - qcom,nom-batt-capacity-mah = <4000>; - qcom,batt-id-kohm = <40>; - qcom,battery-beta = <3380>; - qcom,battery-type = "Vince_sunwoda_40Kohm_4000mah"; - qcom,chg-rslow-comp-c1 = <3028448>; - qcom,chg-rslow-comp-c2 = <3651765>; - qcom,chg-rs-to-rslow = <853285>; - qcom,chg-rslow-comp-thr = <0x99>; - qcom,checksum = <0x94A0>; - qcom,gui-version = "PMI8950GUI - 2.0.0.16"; - qcom,fg-profile-data = [ - D9 83 86 7C - E6 80 F9 76 - 5F 83 33 6E - B4 88 E5 8F - 2A 82 1C 9A - 4F BD 48 CA - 56 0E 37 83 - 31 68 76 70 - 9C 54 3F 83 - 7A 78 BC 84 - 48 80 7F 82 - 53 93 E8 B4 - 47 C0 77 10 - 7A 0F DD 59 - 14 70 EE FC - AC 3D 3B 45 - 1E 42 00 00 - D2 4C 92 3A - FE 42 00 00 - 00 00 00 00 - 00 00 00 00 - 71 6B B5 69 - 72 63 21 8A - 2F 76 34 6B - 5C 6C B4 79 - 40 6F 01 63 - BA 60 05 A2 - 23 F7 62 09 - 65 A0 71 0C - 28 00 FF 36 - F0 11 30 03 - 00 00 00 0C - ]; -}; diff --git a/arch/arm/boot/dts/qcom/apq8053-camera-sensor-mtp.dtsi b/arch/arm/boot/dts/qcom/apq8053-camera-sensor-mtp.dtsi index bb1d0b02368a..3e8c253440e5 100644 --- a/arch/arm/boot/dts/qcom/apq8053-camera-sensor-mtp.dtsi +++ b/arch/arm/boot/dts/qcom/apq8053-camera-sensor-mtp.dtsi @@ -1,6 +1,5 @@ /* * Copyright (c) 2016, The Linux Foundation. All rights reserved. - * Copyright (C) 2018 XiaoMi, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -76,8 +75,8 @@ pinctrl-0 = <&cam_sensor_mclk0_default &cam_sensor_rear_default1 &cam_sensor_rear_vana1>; - //pinctrl-1 = <&cam_sensor_mclk0_sleep &cam_sensor_rear_sleep1 - // &cam_sensor_rear_vana_sleep1>; + pinctrl-1 = <&cam_sensor_mclk0_sleep &cam_sensor_rear_sleep1 + &cam_sensor_rear_vana_sleep1>; gpios = <&tlmm 26 0>, <&tlmm 40 0>, <&tlmm 46 0>, diff --git a/arch/arm/boot/dts/qcom/apq8053-lite-dragon.dtsi b/arch/arm/boot/dts/qcom/apq8053-lite-dragon.dtsi index 553d3fc3c244..0cf97ceb1ca7 100644 --- a/arch/arm/boot/dts/qcom/apq8053-lite-dragon.dtsi +++ b/arch/arm/boot/dts/qcom/apq8053-lite-dragon.dtsi @@ -456,14 +456,14 @@ }; }; }; -/* + &pm8953_typec { ss-mux-supply = <&pm8953_l13>; qcom,ssmux-gpio = <&tlmm 139 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&typec_ssmux_config>; }; -*/ + /{ mtp_batterydata: qcom,battery-data { qcom,batt-id-range-pct = <15>; diff --git a/arch/arm/boot/dts/qcom/batterydata-qrd-coslight-3000mAh.dtsi b/arch/arm/boot/dts/qcom/batterydata-qrd-coslight-3000mAh.dtsi deleted file mode 100755 index d9774ab14fe0..000000000000 --- a/arch/arm/boot/dts/qcom/batterydata-qrd-coslight-3000mAh.dtsi +++ /dev/null @@ -1,49 +0,0 @@ - -qcom,2760942_huaqin_d2cos_3080mah_averaged_masterslave_jan16th2017 { - /* #2760942_Huaqin_D2cos_3080mAh_averaged_MasterSlave_Jan16th2017*/ - qcom,max-voltage-uv = <4380000>; - qcom,nom-batt-capacity-mah = <3080>; - qcom,batt-id-kohm = <50>; - qcom,battery-beta = <3380>; - qcom,battery-type = "battey_qrd_coslight_3080mah"; - qcom,chg-rslow-comp-c1 = <3969816>; - qcom,chg-rslow-comp-c2 = <7140145>; - qcom,chg-rs-to-rslow = <997019>; - qcom,chg-rslow-comp-thr = <0xB8>; - qcom,checksum = <0x5DAD>; - qcom,gui-version = "PMI8950GUI - 2.0.0.16"; - qcom,fg-profile-data = [ - E2 83 DF 7C - 10 81 12 77 - 65 83 51 74 - 74 89 94 94 - 33 82 B0 99 - A5 BC 1D C9 - 55 10 02 88 - 9A 7D 74 81 - 8D 77 4E 83 - CD 70 15 61 - CD 7E 4F 82 - 9D 99 DF BC - B5 C9 59 0C - 24 0C 15 59 - 14 70 B2 FD - A4 3F 23 3D - 6E 33 00 00 - 35 46 01 38 - FE 12 00 00 - 00 00 00 00 - 00 00 00 00 - 97 6B B4 6A - EF 60 0B 81 - 92 6E 72 60 - 3E 59 C0 79 - 5B 6D 56 5B - 18 7F 64 9A - 18 E9 61 55 - 5F A0 71 0C - 28 00 FF 36 - F0 11 30 03 - 00 00 00 0C - ]; -}; diff --git a/arch/arm/boot/dts/qcom/batterydata-qrd-sunwoda-ATL-4v4-4000mah.dtsi b/arch/arm/boot/dts/qcom/batterydata-qrd-sunwoda-ATL-4v4-4000mah.dtsi deleted file mode 100755 index ba7c27f69363..000000000000 --- a/arch/arm/boot/dts/qcom/batterydata-qrd-sunwoda-ATL-4v4-4000mah.dtsi +++ /dev/null @@ -1,49 +0,0 @@ - -qcom,3005040_huaqin_e7sun_4000mah_averaged_masterslave_jul17th2017 { - /* #3005040_Huaqin_E7sun_4000mAh_averaged_MasterSlave_Jul17th2017*/ - qcom,max-voltage-uv = <4400000>; - qcom,nom-batt-capacity-mah = <4000>; - qcom,batt-id-kohm = <40>; - qcom,battery-beta = <3380>; - qcom,battery-type = "qrd_msm8953_sunwoda_atl_4000mah"; - qcom,chg-rslow-comp-c1 = <3028448>; - qcom,chg-rslow-comp-c2 = <3651765>; - qcom,chg-rs-to-rslow = <853285>; - qcom,chg-rslow-comp-thr = <0x99>; - qcom,checksum = <0x94A0>; - qcom,gui-version = "PMI8950GUI - 2.0.0.16"; - qcom,fg-profile-data = [ - D9 83 86 7C - E6 80 F9 76 - 5F 83 33 6E - B4 88 E5 8F - 2A 82 1C 9A - 4F BD 48 CA - 56 0E 37 83 - 31 68 76 70 - 9C 54 3F 83 - 7A 78 BC 84 - 48 80 7F 82 - 53 93 E8 B4 - 47 C0 77 10 - 7A 0F DD 59 - 14 70 EE FC - AC 3D 3B 45 - 1E 42 00 00 - D2 4C 92 3A - FE 42 00 00 - 00 00 00 00 - 00 00 00 00 - 71 6B B5 69 - 72 63 21 8A - 2F 76 34 6B - 5C 6C B4 79 - 40 6F 01 63 - BA 60 05 A2 - 23 F7 62 09 - 65 A0 71 0C - 28 00 FF 36 - F0 11 30 03 - 00 00 00 0C - ]; -}; diff --git a/arch/arm/boot/dts/qcom/dsi-panel-hx8399c-fhdplus-video.dtsi b/arch/arm/boot/dts/qcom/dsi-panel-hx8399c-fhdplus-video.dtsi deleted file mode 100644 index 2ff10dfffc84..000000000000 --- a/arch/arm/boot/dts/qcom/dsi-panel-hx8399c-fhdplus-video.dtsi +++ /dev/null @@ -1,113 +0,0 @@ -/* Copyright (c) 2012-2015, The Linux Foundation. All rights reserved. - * Copyright (C) 2018 XiaoMi, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -&mdss_mdp { - dsi_hx8399c_fhdplus_vid: qcom,mdss_dsi_hx8399c_fhdplus_video { - qcom,mdss-dsi-panel-name = "hx8399c fhdplus video mode dsi panel"; - qcom,mdss-dsi-panel-type = "dsi_video_mode"; - qcom,mdss-dsi-panel-framerate = <60>; - qcom,mdss-dsi-virtual-channel-id = <0>; - qcom,mdss-dsi-stream = <0>; - qcom,mdss-dsi-panel-width = <1080>; - qcom,mdss-dsi-panel-height = <2280>; - qcom,mdss-dsi-h-front-porch = <24>; - qcom,mdss-dsi-h-back-porch = <40>; - qcom,mdss-dsi-h-pulse-width = <40>; - qcom,mdss-dsi-h-sync-skew = <0>; - qcom,mdss-dsi-v-back-porch = <3>; - qcom,mdss-dsi-v-front-porch = <9>; - qcom,mdss-dsi-v-pulse-width = <4>; - qcom,mdss-dsi-h-left-border = <0>; - qcom,mdss-dsi-h-right-border = <0>; - qcom,mdss-dsi-v-top-border = <0>; - qcom,mdss-dsi-v-bottom-border = <0>; - qcom,mdss-dsi-bpp = <24>; - qcom,mdss-dsi-underflow-color = <0xff>; - qcom,mdss-dsi-border-color = <0>; - - qcom,mdss-dsi-h-sync-pulse = <1>; - qcom,mdss-dsi-traffic-mode = "burst_mode"; - qcom,mdss-dsi-bllp-eof-power-mode; - qcom,mdss-dsi-bllp-power-mode; - qcom,mdss-dsi-lane-0-state; - qcom,mdss-dsi-lane-1-state; - qcom,mdss-dsi-lane-2-state; - qcom,mdss-dsi-lane-3-state; - - qcom,mdss-dsi-bl-min-level = <1>; - qcom,mdss-dsi-bl-max-level = <4095>; - qcom,mdss-brightness-max-level-global = <255>; - qcom,mdss-dsi-dma-trigger = "trigger_sw"; - qcom,mdss-dsi-mdp-trigger = "none"; - qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; - qcom,mdss-dsi-reset-sequence = <1 10>, <0 10>, <1 50>; - qcom,mdss-dsi-lp11-init; - qcom,mdss-dsi-tx-eot-append; - qcom,esd-check-enabled; - qcom,mdss-dsi-panel-status-command = [06 01 00 01 05 00 01 09 - 06 01 00 01 05 00 01 d9 - ]; - qcom,mdss-dsi-panel-status-read-length = <3 3>; - qcom,mdss-dsi-panel-status-valid-params = <3 3>; - qcom,mdss-dsi-panel-status-command-mode = "dsi_hs_mode"; - qcom,mdss-dsi-panel-status-check-mode = "TE_check_NT35596"; - qcom,mdss-dsi-panel-status-value = <0x80 0x73 0x04 0x80 0x01 0x82>; - - qcom,mdss-dsi-panel-max-error-count = <3>; - qcom,mdss-pan-physical-width-dimension = <69>; - qcom,mdss-pan-physical-height-dimension = <122>; - qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; - qcom,mdss-dsi-on-command = [39 01 00 00 00 00 04 b9 ff 83 99 - 39 01 00 00 78 00 02 11 00 - 39 01 00 00 14 00 02 29 00 - 39 01 00 00 01 00 03 51 0F FF - 39 01 00 00 01 00 0A C9 03 00 16 1E 31 1E 00 91 00 - 39 01 00 00 05 00 02 55 01 - 39 01 00 00 01 00 02 53 2C - 39 01 00 00 01 00 0A CA 24 23 23 21 23 21 20 20 20 - 39 01 00 00 00 00 02 35 00]; - qcom,mdss-dsi-off-command = [39 01 00 00 32 00 02 28 00 - 39 01 00 00 78 00 02 10 00]; - - qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; - qcom,mdss-dsi-panel-timings = [29 40 2c 01 76 7a - 30 44 34 03 04 00]; - qcom,mdss-dsi-panel-timings-phy-v2 = [25 1f 09 0a 06 03 04 a0 - 25 1f 09 0a 06 03 04 a0 - 25 1f 09 0a 06 03 04 a0 - 25 1f 09 0a 06 03 04 a0 - 25 1e 08 0a 06 03 04 a0]; - qcom,mdss-dsi-t-clk-post = <0x0e>; - qcom,mdss-dsi-t-clk-pre = <0x34>; - qcom,mdss-dsi-CE_on-command-state = "dsi_hs_mode"; - qcom,mdss-dsi-CE_off-command-state = "dsi_hs_mode"; - qcom,mdss-dsi-CABC_on-command-state = "dsi_hs_mode"; - qcom,mdss-dsi-CABC_off-command-state = "dsi_hs_mode"; - qcom,mdss-dsi-CE_on-command = [ - 15 01 00 00 00 00 02 E4 00 - 39 01 00 00 00 00 20 E5 00 00 09 06 04 00 20 20 20 10 00 04 0B 18 01 12 FB 06 20 02 0C 03 05 02 0F 06 06 0E 17 02 01 - 39 01 00 00 00 00 12 E6 00 08 00 05 05 09 03 04 20 20 20 0C 08 0F 20 20 20 - 39 01 00 00 00 00 03 E4 00 40]; - qcom,mdss-dsi-CE_off-command = [ - 39 01 00 00 00 00 03 E4 00 00]; - qcom,mdss-dsi-CABC_on-command = [ - 39 01 00 00 01 00 03 51 0F FF - 39 01 00 00 01 00 0A C9 03 00 16 1E 31 1E 00 91 00 - 39 01 00 00 05 00 02 55 01 - 39 01 00 00 01 00 02 53 2C - 39 01 00 00 01 00 0A CA 24 23 23 21 23 21 20 20 20]; - qcom,mdss-dsi-CABC_off-command = [ - 39 01 00 00 05 00 02 55 01 - 39 01 00 00 01 00 0A CA 20 20 20 20 20 20 20 20 20]; - }; -}; diff --git a/arch/arm/boot/dts/qcom/dsi-panel-ili7807-fhdplus-video.dtsi b/arch/arm/boot/dts/qcom/dsi-panel-ili7807-fhdplus-video.dtsi deleted file mode 100644 index 12766678c1ff..000000000000 --- a/arch/arm/boot/dts/qcom/dsi-panel-ili7807-fhdplus-video.dtsi +++ /dev/null @@ -1,185 +0,0 @@ -/* Copyright (c) 2012-2015, The Linux Foundation. All rights reserved. - * Copyright (C) 2018 XiaoMi, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -&mdss_mdp { - dsi_ili7807_fhdplus_vid: qcom,mdss_dsi_ili7807_fhdplus_video { - qcom,mdss-dsi-panel-name = "ili7807 fhdplus video mode dsi panel"; - qcom,mdss-dsi-panel-type = "dsi_video_mode"; - qcom,mdss-dsi-panel-framerate = <60>; - qcom,mdss-dsi-virtual-channel-id = <0>; - qcom,mdss-dsi-stream = <0>; - qcom,mdss-dsi-panel-width = <1080>; - qcom,mdss-dsi-panel-height = <2280>; - qcom,mdss-dsi-h-front-porch = <72>; - qcom,mdss-dsi-h-back-porch = <64>; - qcom,mdss-dsi-h-pulse-width = <8>; - qcom,mdss-dsi-h-sync-skew = <0>; - qcom,mdss-dsi-v-back-porch = <10>; - qcom,mdss-dsi-v-front-porch = <10>; - qcom,mdss-dsi-v-pulse-width = <8>; - qcom,mdss-dsi-h-left-border = <0>; - qcom,mdss-dsi-h-right-border = <0>; - qcom,mdss-dsi-v-top-border = <0>; - qcom,mdss-dsi-v-bottom-border = <0>; - qcom,mdss-dsi-bpp = <24>; - qcom,mdss-dsi-underflow-color = <0xff>; - qcom,mdss-dsi-border-color = <0>; - - qcom,mdss-dsi-h-sync-pulse = <1>; - qcom,mdss-dsi-traffic-mode = "burst_mode"; - qcom,mdss-dsi-bllp-eof-power-mode; - qcom,mdss-dsi-bllp-power-mode; - qcom,mdss-dsi-lane-0-state; - qcom,mdss-dsi-lane-1-state; - qcom,mdss-dsi-lane-2-state; - qcom,mdss-dsi-lane-3-state; - qcom,mdss-dsi-bl-min-level = <1>; - qcom,mdss-dsi-bl-max-level = <4095>; - qcom,mdss-brightness-max-level-global = <255>; - qcom,mdss-dsi-dma-trigger = "trigger_sw"; - qcom,mdss-dsi-mdp-trigger = "none"; - qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; - qcom,mdss-dsi-reset-sequence = <1 2>, <0 2>, <1 10>; - qcom,mdss-dsi-lp11-init; - qcom,mdss-dsi-tx-eot-append; - qcom,esd-check-enabled; - qcom,mdss-dsi-panel-status-command = [06 01 00 01 05 00 01 0A - 06 01 00 01 05 00 01 0B - 06 01 00 01 05 00 01 0D]; - qcom,mdss-dsi-panel-status-read-length = <1 1 1>; - qcom,mdss-dsi-panel-status-valid-params = <1 1 1>; - qcom,mdss-dsi-panel-status-command-state = "dsi_hs_mode"; - qcom,mdss-dsi-panel-status-check-mode = "TE_check_NT35596"; - qcom,mdss-dsi-panel-status-value = <0x9C 0x00 0x00>; - - qcom,mdss-dsi-panel-max-error-count = <3>; - qcom,mdss-pan-physical-width-dimension = <69>; - qcom,mdss-pan-physical-height-dimension = <122>; - - qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; - qcom,mdss-dsi-on-command = [ - 39 01 00 00 00 00 04 ff 78 07 00 - 39 01 00 00 78 00 02 11 00 - 39 01 00 00 00 00 04 ff 78 07 07 - 39 01 00 00 00 00 02 12 22 - 39 01 00 00 00 00 02 31 0F - 39 01 00 00 00 00 02 44 07 - 39 01 00 00 00 00 04 FF 78 07 05 - 39 01 00 00 00 00 02 00 25 - 39 01 00 00 00 00 02 03 40 - 39 01 00 00 00 00 02 04 00 - 39 01 00 00 00 00 04 ff 78 07 00 - 39 01 00 00 00 00 03 51 0F FC - 39 01 00 00 00 00 02 53 2C - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00]; - - qcom,mdss-dsi-off-command = [ - 39 01 00 00 00 00 04 ff 78 07 00 - 39 01 00 00 14 00 02 28 00 - 39 01 00 00 78 00 02 10 00]; - - qcom,mdss-dsi-panel-timings = [29 40 2c 01 76 7a - 30 44 34 03 04 00]; - qcom,mdss-dsi-panel-timings-phy-v2 = [25 20 09 0c 06 03 04 a0 - 25 20 09 0c 06 03 04 a0 - 25 20 09 0c 06 03 04 a0 - 25 20 09 0c 06 03 04 a0 - 25 1e 09 0a 06 03 04 a0]; - qcom,mdss-dsi-t-clk-post = <0x0e>; - qcom,mdss-dsi-t-clk-pre = <0x35>; - - qcom,mdss-dsi-CE_on-command-state = "dsi_hs_mode"; - qcom,mdss-dsi-CE_off-command-state = "dsi_hs_mode"; - qcom,mdss-dsi-CABC_on-command-state = "dsi_hs_mode"; - qcom,mdss-dsi-CABC_off-command-state = "dsi_hs_mode"; - - qcom,mdss-dsi-CE_on-command = [ - 29 01 00 00 00 00 04 ff 78 07 07 - 29 01 00 00 00 00 02 31 1F - 29 01 00 00 00 00 04 FF 78 07 05 - 29 00 00 00 00 00 02 30 06 - 29 00 00 00 00 00 02 31 10 - 29 00 00 00 00 00 02 38 07 - 29 00 00 00 00 00 02 39 09 - 29 00 00 00 00 00 02 3A 0C - 29 00 00 00 00 00 02 40 02 - 29 00 00 00 00 00 02 41 02 - 29 00 00 00 00 00 02 42 02 - 29 00 00 00 00 00 02 43 02 - 29 00 00 00 00 00 02 44 02 - 29 00 00 00 00 00 02 45 02 - 29 00 00 00 00 00 02 46 02 - 29 00 00 00 00 00 02 47 02 - 29 00 00 00 00 00 02 48 02 - 29 00 00 00 00 00 02 49 02 - 29 00 00 00 00 00 02 4A 02 - 29 00 00 00 00 00 02 4B 02 - 29 00 00 00 00 00 02 4C 02 - 29 00 00 00 00 00 02 4D 02 - 29 00 00 00 00 00 02 4E 02 - 29 00 00 00 00 00 02 4F 02 - 29 00 00 00 00 00 02 50 02 - 29 00 00 00 00 00 02 51 02 - 29 00 00 00 00 00 02 52 02 - 29 00 00 00 00 00 02 53 02 - 29 00 00 00 00 00 02 54 02 - 29 00 00 00 00 00 02 55 02 - 29 00 00 00 00 00 02 56 02 - 29 00 00 00 00 00 02 57 02 - 29 01 00 00 00 00 04 ff 78 07 07 - 29 01 00 00 00 00 02 31 0F - 29 01 00 00 00 00 04 FF 78 07 00]; - - qcom,mdss-dsi-CE_off-command = [ - 29 00 00 00 00 00 04 FF 78 07 07 - 29 00 00 00 00 00 02 3D 30 - 29 00 00 00 00 00 04 FF 78 07 05 - 29 01 00 00 00 00 02 31 00 - 29 00 00 00 00 00 04 FF 78 07 07 - 29 01 00 00 00 00 02 3d 00 - 29 01 00 00 00 00 04 FF 78 07 00]; - - qcom,mdss-dsi-CABC_on-command = [ - 29 01 00 00 00 00 04 FF 78 07 05 - 29 00 00 00 00 00 02 00 25 - 29 00 00 00 00 00 02 01 14 - 29 00 00 00 00 00 02 02 16 - 29 00 00 00 00 00 02 03 40 - 29 00 00 00 00 00 02 04 00 - 29 00 00 00 00 00 02 07 90 - 29 00 00 00 00 00 02 08 08 - 29 00 00 00 00 00 02 28 16 - 29 00 00 00 00 00 02 29 15 - 29 00 00 00 00 00 02 2A 14 - 29 00 00 00 00 00 02 2B 0D - 29 01 00 00 00 00 04 FF 78 07 00 - 29 00 00 00 00 00 03 51 0F FC - 29 00 00 00 00 00 02 53 2C - 29 00 00 00 00 00 02 55 01 - 29 00 00 00 00 00 03 68 05 00 - 29 01 00 00 00 00 04 FF 78 07 00 - ]; - - qcom,mdss-dsi-CABC_off-command = [ - 29 01 00 00 00 00 04 FF 78 07 00 - 29 00 00 00 00 00 03 51 0F FC - 29 00 00 00 00 00 02 53 2C - 29 00 00 00 00 00 02 55 00 - 29 01 00 00 00 00 04 FF 78 07 05 - 29 00 00 00 00 00 02 2B 08 - 29 01 00 00 00 00 04 FF 78 07 00 - ]; - }; -}; diff --git a/arch/arm/boot/dts/qcom/dsi-panel-nt36672-csot-fhdplus-video_e7.dtsi b/arch/arm/boot/dts/qcom/dsi-panel-nt36672-csot-fhdplus-video_e7.dtsi deleted file mode 100755 index e24ef2776d00..000000000000 --- a/arch/arm/boot/dts/qcom/dsi-panel-nt36672-csot-fhdplus-video_e7.dtsi +++ /dev/null @@ -1,2684 +0,0 @@ -/* Copyright (c) 2012-2015, The Linux Foundation. All rights reserved. - * Copyright (C) 2018 XiaoMi, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -&mdss_mdp { - dsi_nt36672_csot_fhdplus_e7_vid: qcom,mdss_dsi_nt36672_csot_fhdplus_video_e7 { - qcom,mdss-dsi-panel-name = "nt36672 csot e7 fhdplus video mode dsi panel"; - qcom,mdss-dsi-panel-type = "dsi_video_mode"; - qcom,mdss-dsi-panel-framerate = <60>; - qcom,mdss-dsi-virtual-channel-id = <0>; - qcom,mdss-dsi-stream = <0>; - qcom,mdss-dsi-panel-width = <1080>; - qcom,mdss-dsi-panel-height = <2160>; - qcom,mdss-dsi-h-front-porch = <108>; - qcom,mdss-dsi-h-back-porch = <62>; - qcom,mdss-dsi-h-pulse-width = <20>; - qcom,mdss-dsi-h-sync-skew = <0>; - qcom,mdss-dsi-v-back-porch = <8>; - qcom,mdss-dsi-v-front-porch = <10>; - qcom,mdss-dsi-v-pulse-width = <2>; - qcom,mdss-dsi-h-left-border = <0>; - qcom,mdss-dsi-h-right-border = <0>; - qcom,mdss-dsi-v-top-border = <0>; - qcom,mdss-dsi-v-bottom-border = <0>; - qcom,mdss-dsi-bpp = <24>; - qcom,mdss-dsi-underflow-color = <0xff>; - qcom,mdss-dsi-border-color = <0>; - qcom,mdss-white-command-00 = [ - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 00 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 00 00 00 00 00 11 B0 00 00 00 11 00 30 00 4A 00 62 00 77 00 8B 00 9D - 39 00 00 00 00 00 11 B1 00 AD 00 E4 01 10 01 52 01 85 01 D2 02 10 02 12 - 39 00 00 00 00 00 11 B2 02 4D 02 91 02 BD 02 F4 03 18 03 46 03 54 03 62 - 39 00 00 00 00 00 0D B3 03 73 03 84 03 99 03 C1 03 D5 03 D9 - 39 00 00 00 00 00 11 B4 00 00 00 11 00 30 00 4A 00 62 00 77 00 8B 00 9D - 39 00 00 00 00 00 11 B5 00 AD 00 E4 01 10 01 52 01 85 01 D2 02 10 02 12 - 39 00 00 00 00 00 11 B6 02 4D 02 91 02 BD 02 F4 03 18 03 46 03 54 03 62 - 39 00 00 00 00 00 0D B7 03 73 03 84 03 99 03 C1 03 D5 03 D9 - 39 00 00 00 00 00 11 B8 00 00 00 11 00 30 00 4A 00 62 00 77 00 8B 00 9D - 39 00 00 00 00 00 11 B9 00 AD 00 E4 01 10 01 52 01 85 01 D2 02 10 02 12 - 39 00 00 00 00 00 11 BA 02 4D 02 91 02 BD 02 F4 03 18 03 46 03 54 03 62 - 39 00 00 00 00 00 0D BB 03 73 03 84 03 99 03 C1 03 D5 03 D9 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 00 00 00 00 00 11 B0 00 00 00 11 00 30 00 4A 00 62 00 77 00 8B 00 9D - 39 00 00 00 00 00 11 B1 00 AD 00 E4 01 10 01 52 01 85 01 D2 02 10 02 12 - 39 00 00 00 00 00 11 B2 02 4D 02 91 02 BD 02 F4 03 18 03 46 03 54 03 62 - 39 00 00 00 00 00 0D B3 03 73 03 84 03 99 03 C1 03 D5 03 D9 - 39 00 00 00 00 00 11 B4 00 00 00 11 00 30 00 4A 00 62 00 77 00 8B 00 9D - 39 00 00 00 00 00 11 B5 00 AD 00 E4 01 10 01 52 01 85 01 D2 02 10 02 12 - 39 00 00 00 00 00 11 B6 02 4D 02 91 02 BD 02 F4 03 18 03 46 03 54 03 62 - 39 00 00 00 00 00 0D B7 03 73 03 84 03 99 03 C1 03 D5 03 D9 - 39 00 00 00 00 00 11 B8 00 00 00 11 00 30 00 4A 00 62 00 77 00 8B 00 9D - 39 00 00 00 00 00 11 B9 00 AD 00 E4 01 10 01 52 01 85 01 D2 02 10 02 12 - 39 00 00 00 00 00 11 BA 02 4D 02 91 02 BD 02 F4 03 18 03 46 03 54 03 62 - 39 00 00 00 00 00 0D BB 03 73 03 84 03 99 03 C1 03 D5 03 D9 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 10 - ]; - qcom,mdss-dsi-on-command = - [ - 39 01 00 00 00 00 02 FF 25 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 8D 04 - 39 01 00 00 00 00 02 FF 20 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 30 10 - 39 01 00 00 00 00 02 31 50 - 39 01 00 00 00 00 02 32 2F - 39 01 00 00 00 00 02 94 00 - 39 01 00 00 00 00 02 95 E1 - 39 01 00 00 00 00 02 96 E1 - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 01 00 00 00 00 11 B0 00 00 00 11 00 30 00 4A 00 62 00 77 00 8B 00 9D - 39 01 00 00 00 00 11 B1 00 AD 00 E4 01 10 01 52 01 85 01 D2 02 10 02 12 - 39 01 00 00 00 00 11 B2 02 4D 02 91 02 BD 02 F4 03 18 03 46 03 54 03 62 - 39 01 00 00 00 00 0D B3 03 73 03 84 03 99 03 C1 03 D5 03 D9 - 39 01 00 00 00 00 11 B4 00 00 00 11 00 30 00 4A 00 62 00 77 00 8B 00 9D - 39 01 00 00 00 00 11 B5 00 AD 00 E4 01 10 01 52 01 85 01 D2 02 10 02 12 - 39 01 00 00 00 00 11 B6 02 4D 02 91 02 BD 02 F4 03 18 03 46 03 54 03 62 - 39 01 00 00 00 00 0D B7 03 73 03 84 03 99 03 C1 03 D5 03 D9 - 39 01 00 00 00 00 11 B8 00 00 00 11 00 30 00 4A 00 62 00 77 00 8B 00 9D - 39 01 00 00 00 00 11 B9 00 AD 00 E4 01 10 01 52 01 85 01 D2 02 10 02 12 - 39 01 00 00 00 00 11 BA 02 4D 02 91 02 BD 02 F4 03 18 03 46 03 54 03 62 - 39 01 00 00 00 00 0D BB 03 73 03 84 03 99 03 C1 03 D5 03 D9 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 11 B0 00 00 00 11 00 30 00 4A 00 62 00 77 00 8B 00 9D - 39 01 00 00 00 00 11 B1 00 AD 00 E4 01 10 01 52 01 85 01 D2 02 10 02 12 - 39 01 00 00 00 00 11 B2 02 4D 02 91 02 BD 02 F4 03 18 03 46 03 54 03 62 - 39 01 00 00 00 00 0D B3 03 73 03 84 03 99 03 C1 03 D5 03 D9 - 39 01 00 00 00 00 11 B4 00 00 00 11 00 30 00 4A 00 62 00 77 00 8B 00 9D - 39 01 00 00 00 00 11 B5 00 AD 00 E4 01 10 01 52 01 85 01 D2 02 10 02 12 - 39 01 00 00 00 00 11 B6 02 4D 02 91 02 BD 02 F4 03 18 03 46 03 54 03 62 - 39 01 00 00 00 00 0D B7 03 73 03 84 03 99 03 C1 03 D5 03 D9 - 39 01 00 00 00 00 11 B8 00 00 00 11 00 30 00 4A 00 62 00 77 00 8B 00 9D - 39 01 00 00 00 00 11 B9 00 AD 00 E4 01 10 01 52 01 85 01 D2 02 10 02 12 - 39 01 00 00 00 00 11 BA 02 4D 02 91 02 BD 02 F4 03 18 03 46 03 54 03 62 - 39 01 00 00 00 00 0D BB 03 73 03 84 03 99 03 C1 03 D5 03 D9 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 51 FF - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 FF F0 - 39 01 00 00 00 00 02 5A 02 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 36 00 - 39 01 00 00 00 00 02 35 00 - 05 01 00 00 78 00 02 11 00 - 05 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-01 = [ - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 00 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 00 00 00 00 00 11 B0 00 C0 00 C6 00 D3 00 DE 00 E9 00 F3 00 FD 01 07 - 39 00 00 00 00 00 11 B1 01 10 01 30 01 4D 01 7D 01 A5 01 E5 02 1B 02 1D - 39 00 00 00 00 00 11 B2 02 56 02 99 02 C5 02 FA 03 1E 03 4C 03 58 03 66 - 39 00 00 00 00 00 0D B3 03 75 03 87 03 9C 03 B6 03 D2 03 D7 - 39 00 00 00 00 00 11 B4 00 09 00 19 00 35 00 4D 00 64 00 78 00 8A 00 9B - 39 00 00 00 00 00 11 B5 00 AA 00 DF 01 0B 01 4B 01 7D 01 CB 02 06 02 08 - 39 00 00 00 00 00 11 B6 02 45 02 8A 02 B7 02 EF 03 10 03 42 03 4F 03 5E - 39 00 00 00 00 00 0D B7 03 6E 03 81 03 97 03 B2 03 D1 03 D7 - 39 00 00 00 00 00 11 B8 00 DF 00 E4 00 EF 00 F9 01 03 01 0C 01 15 01 1D - 39 00 00 00 00 00 11 B9 01 25 01 42 01 5D 01 88 01 AD 01 EA 02 1E 02 20 - 39 00 00 00 00 00 11 BA 02 59 02 9C 02 C9 03 00 03 2B 03 66 03 7A 03 89 - 39 00 00 00 00 00 0D BB 03 8B 03 8F 03 A4 03 BC 03 D2 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 00 00 00 00 00 11 B0 00 C0 00 C6 00 D3 00 DE 00 E9 00 F3 00 FD 01 07 - 39 00 00 00 00 00 11 B1 01 10 01 30 01 4D 01 7D 01 A5 01 E5 02 1B 02 1D - 39 00 00 00 00 00 11 B2 02 56 02 99 02 C5 02 FA 03 1E 03 4C 03 58 03 66 - 39 00 00 00 00 00 0D B3 03 75 03 87 03 9C 03 B6 03 D2 03 D7 - 39 00 00 00 00 00 11 B4 00 09 00 19 00 35 00 4D 00 64 00 78 00 8A 00 9B - 39 00 00 00 00 00 11 B5 00 AA 00 DF 01 0B 01 4B 01 7D 01 CB 02 06 02 08 - 39 00 00 00 00 00 11 B6 02 45 02 8A 02 B7 02 EF 03 10 03 42 03 4F 03 5E - 39 00 00 00 00 00 0D B7 03 6E 03 81 03 97 03 B2 03 D1 03 D7 - 39 00 00 00 00 00 11 B8 00 DF 00 E4 00 EF 00 F9 01 03 01 0C 01 15 01 1D - 39 00 00 00 00 00 11 B9 01 25 01 42 01 5D 01 88 01 AD 01 EA 02 1E 02 20 - 39 00 00 00 00 00 11 BA 02 59 02 9C 02 C9 03 00 03 2B 03 66 03 7A 03 89 - 39 00 00 00 00 00 0D BB 03 8B 03 8F 03 A4 03 BC 03 D2 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 10 - ]; - qcom,mdss-dsi-on-command-01 = - [ - 39 01 00 00 00 00 02 FF 25 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 8D 04 - 39 01 00 00 00 00 02 FF 20 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 30 10 - 39 01 00 00 00 00 02 31 50 - 39 01 00 00 00 00 02 32 2F - 39 01 00 00 00 00 02 94 00 - 39 01 00 00 00 00 02 95 E1 - 39 01 00 00 00 00 02 96 E1 - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 01 00 00 00 00 11 B0 00 C0 00 C6 00 D3 00 DE 00 E9 00 F3 00 FD 01 07 - 39 01 00 00 00 00 11 B1 01 10 01 30 01 4D 01 7D 01 A5 01 E5 02 1B 02 1D - 39 01 00 00 00 00 11 B2 02 56 02 99 02 C5 02 FA 03 1E 03 4C 03 58 03 66 - 39 01 00 00 00 00 0D B3 03 75 03 87 03 9C 03 B6 03 D2 03 D7 - 39 01 00 00 00 00 11 B4 00 09 00 19 00 35 00 4D 00 64 00 78 00 8A 00 9B - 39 01 00 00 00 00 11 B5 00 AA 00 DF 01 0B 01 4B 01 7D 01 CB 02 06 02 08 - 39 01 00 00 00 00 11 B6 02 45 02 8A 02 B7 02 EF 03 10 03 42 03 4F 03 5E - 39 01 00 00 00 00 0D B7 03 6E 03 81 03 97 03 B2 03 D1 03 D7 - 39 01 00 00 00 00 11 B8 00 DF 00 E4 00 EF 00 F9 01 03 01 0C 01 15 01 1D - 39 01 00 00 00 00 11 B9 01 25 01 42 01 5D 01 88 01 AD 01 EA 02 1E 02 20 - 39 01 00 00 00 00 11 BA 02 59 02 9C 02 C9 03 00 03 2B 03 66 03 7A 03 89 - 39 01 00 00 00 00 0D BB 03 8B 03 8F 03 A4 03 BC 03 D2 03 D7 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 11 B0 00 C0 00 C6 00 D3 00 DE 00 E9 00 F3 00 FD 01 07 - 39 01 00 00 00 00 11 B1 01 10 01 30 01 4D 01 7D 01 A5 01 E5 02 1B 02 1D - 39 01 00 00 00 00 11 B2 02 56 02 99 02 C5 02 FA 03 1E 03 4C 03 58 03 66 - 39 01 00 00 00 00 0D B3 03 75 03 87 03 9C 03 B6 03 D2 03 D7 - 39 01 00 00 00 00 11 B4 00 09 00 19 00 35 00 4D 00 64 00 78 00 8A 00 9B - 39 01 00 00 00 00 11 B5 00 AA 00 DF 01 0B 01 4B 01 7D 01 CB 02 06 02 08 - 39 01 00 00 00 00 11 B6 02 45 02 8A 02 B7 02 EF 03 10 03 42 03 4F 03 5E - 39 01 00 00 00 00 0D B7 03 6E 03 81 03 97 03 B2 03 D1 03 D7 - 39 01 00 00 00 00 11 B8 00 DF 00 E4 00 EF 00 F9 01 03 01 0C 01 15 01 1D - 39 01 00 00 00 00 11 B9 01 25 01 42 01 5D 01 88 01 AD 01 EA 02 1E 02 20 - 39 01 00 00 00 00 11 BA 02 59 02 9C 02 C9 03 00 03 2B 03 66 03 7A 03 89 - 39 01 00 00 00 00 0D BB 03 8B 03 8F 03 A4 03 BC 03 D2 03 D7 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 51 FF - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 FF F0 - 39 01 00 00 00 00 02 5A 02 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 36 00 - 39 01 00 00 00 00 02 35 00 - 05 01 00 00 78 00 02 11 00 - 05 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-02 = [ - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 00 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 00 00 00 00 00 11 B0 00 39 00 46 00 5D 00 72 00 86 00 97 00 A8 00 B7 - 39 00 00 00 00 00 11 B1 00 C6 00 F8 01 20 01 5E 01 8E 01 D8 02 14 02 15 - 39 00 00 00 00 00 11 B2 02 50 02 93 02 BF 02 F5 03 16 03 46 03 54 03 62 - 39 00 00 00 00 00 0D B3 03 72 03 84 03 9A 03 B4 03 D1 03 D7 - 39 00 00 00 00 00 11 B4 00 09 00 1A 00 35 00 50 00 66 00 7A 00 8B 00 9D - 39 00 00 00 00 00 11 B5 00 AF 00 E3 01 11 01 50 01 82 01 D1 02 0D 02 0E - 39 00 00 00 00 00 11 B6 02 4A 02 8D 02 BA 02 F1 03 11 03 44 03 51 03 5F - 39 00 00 00 00 00 0D B7 03 6F 03 82 03 98 03 B3 03 D1 03 D7 - 39 00 00 00 00 00 11 B8 00 81 00 8B 00 9C 00 AE 00 BD 00 CB 00 D7 00 E4 - 39 00 00 00 00 00 11 B9 00 F1 01 18 01 3C 01 70 01 9B 01 E1 02 19 02 1A - 39 00 00 00 00 00 11 BA 02 54 02 97 02 C4 02 FC 03 26 03 61 03 75 03 81 - 39 00 00 00 00 00 0D BB 03 84 03 86 03 97 03 AB 03 CE 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 00 00 00 00 00 11 B0 00 39 00 46 00 5D 00 72 00 86 00 97 00 A8 00 B7 - 39 00 00 00 00 00 11 B1 00 C6 00 F8 01 20 01 5E 01 8E 01 D8 02 14 02 15 - 39 00 00 00 00 00 11 B2 02 50 02 93 02 BF 02 F5 03 16 03 46 03 54 03 62 - 39 00 00 00 00 00 0D B3 03 72 03 84 03 9A 03 B4 03 D1 03 D7 - 39 00 00 00 00 00 11 B4 00 09 00 1A 00 35 00 50 00 66 00 7A 00 8B 00 9D - 39 00 00 00 00 00 11 B5 00 AF 00 E3 01 11 01 50 01 82 01 D1 02 0D 02 0E - 39 00 00 00 00 00 11 B6 02 4A 02 8D 02 BA 02 F1 03 11 03 44 03 51 03 5F - 39 00 00 00 00 00 0D B7 03 6F 03 82 03 98 03 B3 03 D1 03 D7 - 39 00 00 00 00 00 11 B8 00 81 00 8B 00 9C 00 AE 00 BD 00 CB 00 D7 00 E4 - 39 00 00 00 00 00 11 B9 00 F1 01 18 01 3C 01 70 01 9B 01 E1 02 19 02 1A - 39 00 00 00 00 00 11 BA 02 54 02 97 02 C4 02 FC 03 26 03 61 03 75 03 81 - 39 00 00 00 00 00 0D BB 03 84 03 86 03 97 03 AB 03 CE 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 10 - ]; - qcom,mdss-dsi-on-command-02 = - [ - 39 01 00 00 00 00 02 FF 25 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 8D 04 - 39 01 00 00 00 00 02 FF 20 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 30 10 - 39 01 00 00 00 00 02 31 50 - 39 01 00 00 00 00 02 32 2F - 39 01 00 00 00 00 02 94 00 - 39 01 00 00 00 00 02 95 E1 - 39 01 00 00 00 00 02 96 E1 - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 01 00 00 00 00 11 B0 00 39 00 46 00 5D 00 72 00 86 00 97 00 A8 00 B7 - 39 01 00 00 00 00 11 B1 00 C6 00 F8 01 20 01 5E 01 8E 01 D8 02 14 02 15 - 39 01 00 00 00 00 11 B2 02 50 02 93 02 BF 02 F5 03 16 03 46 03 54 03 62 - 39 01 00 00 00 00 0D B3 03 72 03 84 03 9A 03 B4 03 D1 03 D7 - 39 01 00 00 00 00 11 B4 00 09 00 1A 00 35 00 50 00 66 00 7A 00 8B 00 9D - 39 01 00 00 00 00 11 B5 00 AF 00 E3 01 11 01 50 01 82 01 D1 02 0D 02 0E - 39 01 00 00 00 00 11 B6 02 4A 02 8D 02 BA 02 F1 03 11 03 44 03 51 03 5F - 39 01 00 00 00 00 0D B7 03 6F 03 82 03 98 03 B3 03 D1 03 D7 - 39 01 00 00 00 00 11 B8 00 81 00 8B 00 9C 00 AE 00 BD 00 CB 00 D7 00 E4 - 39 01 00 00 00 00 11 B9 00 F1 01 18 01 3C 01 70 01 9B 01 E1 02 19 02 1A - 39 01 00 00 00 00 11 BA 02 54 02 97 02 C4 02 FC 03 26 03 61 03 75 03 81 - 39 01 00 00 00 00 0D BB 03 84 03 86 03 97 03 AB 03 CE 03 D7 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 11 B0 00 39 00 46 00 5D 00 72 00 86 00 97 00 A8 00 B7 - 39 01 00 00 00 00 11 B1 00 C6 00 F8 01 20 01 5E 01 8E 01 D8 02 14 02 15 - 39 01 00 00 00 00 11 B2 02 50 02 93 02 BF 02 F5 03 16 03 46 03 54 03 62 - 39 01 00 00 00 00 0D B3 03 72 03 84 03 9A 03 B4 03 D1 03 D7 - 39 01 00 00 00 00 11 B4 00 09 00 1A 00 35 00 50 00 66 00 7A 00 8B 00 9D - 39 01 00 00 00 00 11 B5 00 AF 00 E3 01 11 01 50 01 82 01 D1 02 0D 02 0E - 39 01 00 00 00 00 11 B6 02 4A 02 8D 02 BA 02 F1 03 11 03 44 03 51 03 5F - 39 01 00 00 00 00 0D B7 03 6F 03 82 03 98 03 B3 03 D1 03 D7 - 39 01 00 00 00 00 11 B8 00 81 00 8B 00 9C 00 AE 00 BD 00 CB 00 D7 00 E4 - 39 01 00 00 00 00 11 B9 00 F1 01 18 01 3C 01 70 01 9B 01 E1 02 19 02 1A - 39 01 00 00 00 00 11 BA 02 54 02 97 02 C4 02 FC 03 26 03 61 03 75 03 81 - 39 01 00 00 00 00 0D BB 03 84 03 86 03 97 03 AB 03 CE 03 D7 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 51 FF - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 FF F0 - 39 01 00 00 00 00 02 5A 02 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 36 00 - 39 01 00 00 00 00 02 35 00 - 05 01 00 00 78 00 02 11 00 - 05 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-03 = [ - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 00 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 00 00 00 00 00 11 B0 00 0B 00 1C 00 38 00 50 00 66 00 79 00 8C 00 9D - 39 00 00 00 00 00 11 B1 00 AD 00 E3 01 0E 01 51 01 83 01 D0 02 0B 02 0E - 39 00 00 00 00 00 11 B2 02 49 02 8E 02 BB 02 F0 03 11 03 41 03 4D 03 61 - 39 00 00 00 00 00 0D B3 03 71 03 84 03 9A 03 B5 03 D2 03 D7 - 39 00 00 00 00 00 11 B4 00 75 00 7F 00 91 00 A1 00 B1 00 BF 00 CC 00 D9 - 39 00 00 00 00 00 11 B5 00 E5 01 0E 01 30 01 68 01 94 01 DA 02 12 02 14 - 39 00 00 00 00 00 11 B6 02 4E 02 92 02 BE 02 F3 03 15 03 46 03 53 03 62 - 39 00 00 00 00 00 0D B7 03 72 03 84 03 9B 03 B7 03 D2 03 D7 - 39 00 00 00 00 00 11 B8 00 0B 00 1B 00 39 00 54 00 6C 00 81 00 95 00 A6 - 39 00 00 00 00 00 11 B9 00 B6 00 EC 01 16 01 57 01 88 01 D3 02 0D 02 10 - 39 00 00 00 00 00 11 BA 02 4A 02 90 02 BD 02 F4 03 1B 03 53 03 66 03 86 - 39 00 00 00 00 00 0D BB 03 9B 03 9D 03 9F 03 B8 03 D2 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 00 00 00 00 00 11 B0 00 0B 00 1C 00 38 00 50 00 66 00 79 00 8C 00 9D - 39 00 00 00 00 00 11 B1 00 AD 00 E3 01 0E 01 51 01 83 01 D0 02 0B 02 0E - 39 00 00 00 00 00 11 B2 02 49 02 8E 02 BB 02 F0 03 11 03 41 03 4D 03 61 - 39 00 00 00 00 00 0D B3 03 71 03 84 03 9A 03 B5 03 D2 03 D7 - 39 00 00 00 00 00 11 B4 00 75 00 7F 00 91 00 A1 00 B1 00 BF 00 CC 00 D9 - 39 00 00 00 00 00 11 B5 00 E5 01 0E 01 30 01 68 01 94 01 DA 02 12 02 14 - 39 00 00 00 00 00 11 B6 02 4E 02 92 02 BE 02 F3 03 15 03 46 03 53 03 62 - 39 00 00 00 00 00 0D B7 03 72 03 84 03 9B 03 B7 03 D2 03 D7 - 39 00 00 00 00 00 11 B8 00 0B 00 1B 00 39 00 54 00 6C 00 81 00 95 00 A6 - 39 00 00 00 00 00 11 B9 00 B6 00 EC 01 16 01 57 01 88 01 D3 02 0D 02 10 - 39 00 00 00 00 00 11 BA 02 4A 02 90 02 BD 02 F4 03 1B 03 53 03 66 03 86 - 39 00 00 00 00 00 0D BB 03 9B 03 9D 03 9F 03 B8 03 D2 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 10 - ]; - qcom,mdss-dsi-on-command-03 = - [ - 39 01 00 00 00 00 02 FF 25 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 8D 04 - 39 01 00 00 00 00 02 FF 20 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 30 10 - 39 01 00 00 00 00 02 31 50 - 39 01 00 00 00 00 02 32 2F - 39 01 00 00 00 00 02 94 00 - 39 01 00 00 00 00 02 95 E1 - 39 01 00 00 00 00 02 96 E1 - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 01 00 00 00 00 11 B0 00 0B 00 1C 00 38 00 50 00 66 00 79 00 8C 00 9D - 39 01 00 00 00 00 11 B1 00 AD 00 E3 01 0E 01 51 01 83 01 D0 02 0B 02 0E - 39 01 00 00 00 00 11 B2 02 49 02 8E 02 BB 02 F0 03 11 03 41 03 4D 03 61 - 39 01 00 00 00 00 0D B3 03 71 03 84 03 9A 03 B5 03 D2 03 D7 - 39 01 00 00 00 00 11 B4 00 75 00 7F 00 91 00 A1 00 B1 00 BF 00 CC 00 D9 - 39 01 00 00 00 00 11 B5 00 E5 01 0E 01 30 01 68 01 94 01 DA 02 12 02 14 - 39 01 00 00 00 00 11 B6 02 4E 02 92 02 BE 02 F3 03 15 03 46 03 53 03 62 - 39 01 00 00 00 00 0D B7 03 72 03 84 03 9B 03 B7 03 D2 03 D7 - 39 01 00 00 00 00 11 B8 00 0B 00 1B 00 39 00 54 00 6C 00 81 00 95 00 A6 - 39 01 00 00 00 00 11 B9 00 B6 00 EC 01 16 01 57 01 88 01 D3 02 0D 02 10 - 39 01 00 00 00 00 11 BA 02 4A 02 90 02 BD 02 F4 03 1B 03 53 03 66 03 86 - 39 01 00 00 00 00 0D BB 03 9B 03 9D 03 9F 03 B8 03 D2 03 D7 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 11 B0 00 0B 00 1C 00 38 00 50 00 66 00 79 00 8C 00 9D - 39 01 00 00 00 00 11 B1 00 AD 00 E3 01 0E 01 51 01 83 01 D0 02 0B 02 0E - 39 01 00 00 00 00 11 B2 02 49 02 8E 02 BB 02 F0 03 11 03 41 03 4D 03 61 - 39 01 00 00 00 00 0D B3 03 71 03 84 03 9A 03 B5 03 D2 03 D7 - 39 01 00 00 00 00 11 B4 00 75 00 7F 00 91 00 A1 00 B1 00 BF 00 CC 00 D9 - 39 01 00 00 00 00 11 B5 00 E5 01 0E 01 30 01 68 01 94 01 DA 02 12 02 14 - 39 01 00 00 00 00 11 B6 02 4E 02 92 02 BE 02 F3 03 15 03 46 03 53 03 62 - 39 01 00 00 00 00 0D B7 03 72 03 84 03 9B 03 B7 03 D2 03 D7 - 39 01 00 00 00 00 11 B8 00 0B 00 1B 00 39 00 54 00 6C 00 81 00 95 00 A6 - 39 01 00 00 00 00 11 B9 00 B6 00 EC 01 16 01 57 01 88 01 D3 02 0D 02 10 - 39 01 00 00 00 00 11 BA 02 4A 02 90 02 BD 02 F4 03 1B 03 53 03 66 03 86 - 39 01 00 00 00 00 0D BB 03 9B 03 9D 03 9F 03 B8 03 D2 03 D7 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 51 FF - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 FF F0 - 39 01 00 00 00 00 02 5A 02 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 36 00 - 39 01 00 00 00 00 02 35 00 - 05 01 00 00 78 00 02 11 00 - 05 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-04 = [ - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 00 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 00 00 00 00 00 11 B0 00 09 00 19 00 35 00 4E 00 65 00 79 00 8C 00 9D - 39 00 00 00 00 00 11 B1 00 AD 00 E5 01 11 01 56 01 88 01 D5 02 11 02 12 - 39 00 00 00 00 00 11 B2 02 4F 02 93 02 BE 02 F5 03 17 03 42 03 4E 03 61 - 39 00 00 00 00 00 0D B3 03 72 03 87 03 9E 03 BA 03 D3 03 D7 - 39 00 00 00 00 00 11 B4 00 C6 00 CD 00 D9 00 E5 00 F0 00 FB 01 05 01 0E - 39 00 00 00 00 00 11 B5 01 17 01 38 01 54 01 84 01 AB 01 EA 02 20 02 21 - 39 00 00 00 00 00 11 B6 02 5A 02 9C 02 C7 02 FD 03 21 03 4C 03 59 03 67 - 39 00 00 00 00 00 0D B7 03 76 03 88 03 9E 03 B8 03 D2 03 D7 - 39 00 00 00 00 00 11 B8 00 11 00 23 00 41 00 5B 00 73 00 88 00 9B 00 AC - 39 00 00 00 00 00 11 B9 00 BC 00 F3 01 1D 01 5F 01 8F 01 D9 02 14 02 15 - 39 00 00 00 00 00 11 BA 02 51 02 95 02 C1 02 FA 03 23 03 59 03 6D 03 95 - 39 00 00 00 00 00 0D BB 03 B8 03 BA 03 BC 03 BE 03 D2 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 00 00 00 00 00 11 B0 00 09 00 19 00 35 00 4E 00 65 00 79 00 8C 00 9D - 39 00 00 00 00 00 11 B1 00 AD 00 E5 01 11 01 56 01 88 01 D5 02 11 02 12 - 39 00 00 00 00 00 11 B2 02 4F 02 93 02 BE 02 F5 03 17 03 42 03 4E 03 61 - 39 00 00 00 00 00 0D B3 03 72 03 87 03 9E 03 BA 03 D3 03 D7 - 39 00 00 00 00 00 11 B4 00 C6 00 CD 00 D9 00 E5 00 F0 00 FB 01 05 01 0E - 39 00 00 00 00 00 11 B5 01 17 01 38 01 54 01 84 01 AB 01 EA 02 20 02 21 - 39 00 00 00 00 00 11 B6 02 5A 02 9C 02 C7 02 FD 03 21 03 4C 03 59 03 67 - 39 00 00 00 00 00 0D B7 03 76 03 88 03 9E 03 B8 03 D2 03 D7 - 39 00 00 00 00 00 11 B8 00 11 00 23 00 41 00 5B 00 73 00 88 00 9B 00 AC - 39 00 00 00 00 00 11 B9 00 BC 00 F3 01 1D 01 5F 01 8F 01 D9 02 14 02 15 - 39 00 00 00 00 00 11 BA 02 51 02 95 02 C1 02 FA 03 23 03 59 03 6D 03 95 - 39 00 00 00 00 00 0D BB 03 B8 03 BA 03 BC 03 BE 03 D2 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 10 - ]; - qcom,mdss-dsi-on-command-04 = - [ - 39 01 00 00 00 00 02 FF 25 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 8D 04 - 39 01 00 00 00 00 02 FF 20 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 30 10 - 39 01 00 00 00 00 02 31 50 - 39 01 00 00 00 00 02 32 2F - 39 01 00 00 00 00 02 94 00 - 39 01 00 00 00 00 02 95 E1 - 39 01 00 00 00 00 02 96 E1 - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 01 00 00 00 00 11 B0 00 09 00 19 00 35 00 4E 00 65 00 79 00 8C 00 9D - 39 01 00 00 00 00 11 B1 00 AD 00 E5 01 11 01 56 01 88 01 D5 02 11 02 12 - 39 01 00 00 00 00 11 B2 02 4F 02 93 02 BE 02 F5 03 17 03 42 03 4E 03 61 - 39 01 00 00 00 00 0D B3 03 72 03 87 03 9E 03 BA 03 D3 03 D7 - 39 01 00 00 00 00 11 B4 00 C6 00 CD 00 D9 00 E5 00 F0 00 FB 01 05 01 0E - 39 01 00 00 00 00 11 B5 01 17 01 38 01 54 01 84 01 AB 01 EA 02 20 02 21 - 39 01 00 00 00 00 11 B6 02 5A 02 9C 02 C7 02 FD 03 21 03 4C 03 59 03 67 - 39 01 00 00 00 00 0D B7 03 76 03 88 03 9E 03 B8 03 D2 03 D7 - 39 01 00 00 00 00 11 B8 00 11 00 23 00 41 00 5B 00 73 00 88 00 9B 00 AC - 39 01 00 00 00 00 11 B9 00 BC 00 F3 01 1D 01 5F 01 8F 01 D9 02 14 02 15 - 39 01 00 00 00 00 11 BA 02 51 02 95 02 C1 02 FA 03 23 03 59 03 6D 03 95 - 39 01 00 00 00 00 0D BB 03 B8 03 BA 03 BC 03 BE 03 D2 03 D7 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 11 B0 00 09 00 19 00 35 00 4E 00 65 00 79 00 8C 00 9D - 39 01 00 00 00 00 11 B1 00 AD 00 E5 01 11 01 56 01 88 01 D5 02 11 02 12 - 39 01 00 00 00 00 11 B2 02 4F 02 93 02 BE 02 F5 03 17 03 42 03 4E 03 61 - 39 01 00 00 00 00 0D B3 03 72 03 87 03 9E 03 BA 03 D3 03 D7 - 39 01 00 00 00 00 11 B4 00 C6 00 CD 00 D9 00 E5 00 F0 00 FB 01 05 01 0E - 39 01 00 00 00 00 11 B5 01 17 01 38 01 54 01 84 01 AB 01 EA 02 20 02 21 - 39 01 00 00 00 00 11 B6 02 5A 02 9C 02 C7 02 FD 03 21 03 4C 03 59 03 67 - 39 01 00 00 00 00 0D B7 03 76 03 88 03 9E 03 B8 03 D2 03 D7 - 39 01 00 00 00 00 11 B8 00 11 00 23 00 41 00 5B 00 73 00 88 00 9B 00 AC - 39 01 00 00 00 00 11 B9 00 BC 00 F3 01 1D 01 5F 01 8F 01 D9 02 14 02 15 - 39 01 00 00 00 00 11 BA 02 51 02 95 02 C1 02 FA 03 23 03 59 03 6D 03 95 - 39 01 00 00 00 00 0D BB 03 B8 03 BA 03 BC 03 BE 03 D2 03 D7 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 51 FF - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 FF F0 - 39 01 00 00 00 00 02 5A 02 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 36 00 - 39 01 00 00 00 00 02 35 00 - 05 01 00 00 78 00 02 11 00 - 05 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-05 = [ - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 00 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 00 00 00 00 00 11 B0 00 0A 00 1A 00 37 00 4E 00 66 00 79 00 8B 00 9D - 39 00 00 00 00 00 11 B1 00 AC 00 E2 01 0D 01 4E 01 82 01 CD 02 0A 02 0C - 39 00 00 00 00 00 11 B2 02 47 02 8C 02 B8 02 EF 03 0F 03 3D 03 4E 03 5D - 39 00 00 00 00 00 0D B3 03 6F 03 82 03 98 03 B4 03 D2 03 D7 - 39 00 00 00 00 00 11 B4 01 07 01 0B 01 14 01 1C 01 24 01 2B 01 32 01 39 - 39 00 00 00 00 00 11 B5 01 40 01 59 01 6F 01 96 01 B8 01 F1 02 24 02 26 - 39 00 00 00 00 00 11 B6 02 5C 02 9E 02 C9 02 FD 03 22 03 4D 03 5A 03 68 - 39 00 00 00 00 00 0D B7 03 78 03 8A 03 A0 03 BB 03 D3 03 D7 - 39 00 00 00 00 00 11 B8 01 0F 01 13 01 1C 01 23 01 2B 01 32 01 39 01 40 - 39 00 00 00 00 00 11 B9 01 46 01 5F 01 75 01 9B 01 BD 01 F3 02 27 02 29 - 39 00 00 00 00 00 11 BA 02 5F 02 A1 02 CD 03 03 03 2C 03 64 03 80 03 92 - 39 00 00 00 00 00 0D BB 03 96 03 98 03 A4 03 BF 03 D4 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 00 00 00 00 00 11 B0 00 0A 00 1A 00 37 00 4E 00 66 00 79 00 8B 00 9D - 39 00 00 00 00 00 11 B1 00 AC 00 E2 01 0D 01 4E 01 82 01 CD 02 0A 02 0C - 39 00 00 00 00 00 11 B2 02 47 02 8C 02 B8 02 EF 03 0F 03 3D 03 4E 03 5D - 39 00 00 00 00 00 0D B3 03 6F 03 82 03 98 03 B4 03 D2 03 D7 - 39 00 00 00 00 00 11 B4 01 07 01 0B 01 14 01 1C 01 24 01 2B 01 32 01 39 - 39 00 00 00 00 00 11 B5 01 40 01 59 01 6F 01 96 01 B8 01 F1 02 24 02 26 - 39 00 00 00 00 00 11 B6 02 5C 02 9E 02 C9 02 FD 03 22 03 4D 03 5A 03 68 - 39 00 00 00 00 00 0D B7 03 78 03 8A 03 A0 03 BB 03 D3 03 D7 - 39 00 00 00 00 00 11 B8 01 0F 01 13 01 1C 01 23 01 2B 01 32 01 39 01 40 - 39 00 00 00 00 00 11 B9 01 46 01 5F 01 75 01 9B 01 BD 01 F3 02 27 02 29 - 39 00 00 00 00 00 11 BA 02 5F 02 A1 02 CD 03 03 03 2C 03 64 03 80 03 92 - 39 00 00 00 00 00 0D BB 03 96 03 98 03 A4 03 BF 03 D4 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 10 - ]; - qcom,mdss-dsi-on-command-05 = - [ - 39 01 00 00 00 00 02 FF 25 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 8D 04 - 39 01 00 00 00 00 02 FF 20 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 30 10 - 39 01 00 00 00 00 02 31 50 - 39 01 00 00 00 00 02 32 2F - 39 01 00 00 00 00 02 94 00 - 39 01 00 00 00 00 02 95 E1 - 39 01 00 00 00 00 02 96 E1 - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 01 00 00 00 00 11 B0 00 0A 00 1A 00 37 00 4E 00 66 00 79 00 8B 00 9D - 39 01 00 00 00 00 11 B1 00 AC 00 E2 01 0D 01 4E 01 82 01 CD 02 0A 02 0C - 39 01 00 00 00 00 11 B2 02 47 02 8C 02 B8 02 EF 03 0F 03 3D 03 4E 03 5D - 39 01 00 00 00 00 0D B3 03 6F 03 82 03 98 03 B4 03 D2 03 D7 - 39 01 00 00 00 00 11 B4 01 07 01 0B 01 14 01 1C 01 24 01 2B 01 32 01 39 - 39 01 00 00 00 00 11 B5 01 40 01 59 01 6F 01 96 01 B8 01 F1 02 24 02 26 - 39 01 00 00 00 00 11 B6 02 5C 02 9E 02 C9 02 FD 03 22 03 4D 03 5A 03 68 - 39 01 00 00 00 00 0D B7 03 78 03 8A 03 A0 03 BB 03 D3 03 D7 - 39 01 00 00 00 00 11 B8 01 0F 01 13 01 1C 01 23 01 2B 01 32 01 39 01 40 - 39 01 00 00 00 00 11 B9 01 46 01 5F 01 75 01 9B 01 BD 01 F3 02 27 02 29 - 39 01 00 00 00 00 11 BA 02 5F 02 A1 02 CD 03 03 03 2C 03 64 03 80 03 92 - 39 01 00 00 00 00 0D BB 03 96 03 98 03 A4 03 BF 03 D4 03 D7 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 11 B0 00 0A 00 1A 00 37 00 4E 00 66 00 79 00 8B 00 9D - 39 01 00 00 00 00 11 B1 00 AC 00 E2 01 0D 01 4E 01 82 01 CD 02 0A 02 0C - 39 01 00 00 00 00 11 B2 02 47 02 8C 02 B8 02 EF 03 0F 03 3D 03 4E 03 5D - 39 01 00 00 00 00 0D B3 03 6F 03 82 03 98 03 B4 03 D2 03 D7 - 39 01 00 00 00 00 11 B4 01 07 01 0B 01 14 01 1C 01 24 01 2B 01 32 01 39 - 39 01 00 00 00 00 11 B5 01 40 01 59 01 6F 01 96 01 B8 01 F1 02 24 02 26 - 39 01 00 00 00 00 11 B6 02 5C 02 9E 02 C9 02 FD 03 22 03 4D 03 5A 03 68 - 39 01 00 00 00 00 0D B7 03 78 03 8A 03 A0 03 BB 03 D3 03 D7 - 39 01 00 00 00 00 11 B8 01 0F 01 13 01 1C 01 23 01 2B 01 32 01 39 01 40 - 39 01 00 00 00 00 11 B9 01 46 01 5F 01 75 01 9B 01 BD 01 F3 02 27 02 29 - 39 01 00 00 00 00 11 BA 02 5F 02 A1 02 CD 03 03 03 2C 03 64 03 80 03 92 - 39 01 00 00 00 00 0D BB 03 96 03 98 03 A4 03 BF 03 D4 03 D7 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 51 FF - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 FF F0 - 39 01 00 00 00 00 02 5A 02 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 36 00 - 39 01 00 00 00 00 02 35 00 - 05 01 00 00 78 00 02 11 00 - 05 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-06 = [ - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 00 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 00 00 00 00 00 11 B0 00 0B 00 1C 00 39 00 53 00 6A 00 7E 00 91 00 A3 - 39 00 00 00 00 00 11 B1 00 B2 00 E9 01 15 01 57 01 89 01 D6 02 14 02 15 - 39 00 00 00 00 00 11 B2 02 51 02 94 02 C0 02 F5 03 15 03 43 03 53 03 62 - 39 00 00 00 00 00 0D B3 03 73 03 88 03 9F 03 BB 03 D3 03 D7 - 39 00 00 00 00 00 11 B4 00 CF 00 D5 00 E1 00 ED 00 F7 01 02 01 0B 01 15 - 39 00 00 00 00 00 11 B5 01 1D 01 3D 01 59 01 88 01 AE 01 ED 02 23 02 25 - 39 00 00 00 00 00 11 B6 02 5D 02 9F 02 CA 02 FE 03 22 03 4E 03 5A 03 68 - 39 00 00 00 00 00 0D B7 03 77 03 88 03 9C 03 B6 03 D2 03 D7 - 39 00 00 00 00 00 11 B8 00 E2 00 E8 00 F3 00 FE 01 08 01 11 01 1A 01 23 - 39 00 00 00 00 00 11 B9 01 2B 01 49 01 64 01 90 01 B5 01 F2 02 28 02 29 - 39 00 00 00 00 00 11 BA 02 61 02 A3 02 CF 03 04 03 2D 03 64 03 7C 03 8C - 39 00 00 00 00 00 0D BB 03 8E 03 94 03 A0 03 C2 03 D4 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 00 00 00 00 00 11 B0 00 0B 00 1C 00 39 00 53 00 6A 00 7E 00 91 00 A3 - 39 00 00 00 00 00 11 B1 00 B2 00 E9 01 15 01 57 01 89 01 D6 02 14 02 15 - 39 00 00 00 00 00 11 B2 02 51 02 94 02 C0 02 F5 03 15 03 43 03 53 03 62 - 39 00 00 00 00 00 0D B3 03 73 03 88 03 9F 03 BB 03 D3 03 D7 - 39 00 00 00 00 00 11 B4 00 CF 00 D5 00 E1 00 ED 00 F7 01 02 01 0B 01 15 - 39 00 00 00 00 00 11 B5 01 1D 01 3D 01 59 01 88 01 AE 01 ED 02 23 02 25 - 39 00 00 00 00 00 11 B6 02 5D 02 9F 02 CA 02 FE 03 22 03 4E 03 5A 03 68 - 39 00 00 00 00 00 0D B7 03 77 03 88 03 9C 03 B6 03 D2 03 D7 - 39 00 00 00 00 00 11 B8 00 E2 00 E8 00 F3 00 FE 01 08 01 11 01 1A 01 23 - 39 00 00 00 00 00 11 B9 01 2B 01 49 01 64 01 90 01 B5 01 F2 02 28 02 29 - 39 00 00 00 00 00 11 BA 02 61 02 A3 02 CF 03 04 03 2D 03 64 03 7C 03 8C - 39 00 00 00 00 00 0D BB 03 8E 03 94 03 A0 03 C2 03 D4 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 10 - ]; - qcom,mdss-dsi-on-command-06 = - [ - 39 01 00 00 00 00 02 FF 25 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 8D 04 - 39 01 00 00 00 00 02 FF 20 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 30 10 - 39 01 00 00 00 00 02 31 50 - 39 01 00 00 00 00 02 32 2F - 39 01 00 00 00 00 02 94 00 - 39 01 00 00 00 00 02 95 E1 - 39 01 00 00 00 00 02 96 E1 - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 01 00 00 00 00 11 B0 00 0B 00 1C 00 39 00 53 00 6A 00 7E 00 91 00 A3 - 39 01 00 00 00 00 11 B1 00 B2 00 E9 01 15 01 57 01 89 01 D6 02 14 02 15 - 39 01 00 00 00 00 11 B2 02 51 02 94 02 C0 02 F5 03 15 03 43 03 53 03 62 - 39 01 00 00 00 00 0D B3 03 73 03 88 03 9F 03 BB 03 D3 03 D7 - 39 01 00 00 00 00 11 B4 00 CF 00 D5 00 E1 00 ED 00 F7 01 02 01 0B 01 15 - 39 01 00 00 00 00 11 B5 01 1D 01 3D 01 59 01 88 01 AE 01 ED 02 23 02 25 - 39 01 00 00 00 00 11 B6 02 5D 02 9F 02 CA 02 FE 03 22 03 4E 03 5A 03 68 - 39 01 00 00 00 00 0D B7 03 77 03 88 03 9C 03 B6 03 D2 03 D7 - 39 01 00 00 00 00 11 B8 00 E2 00 E8 00 F3 00 FE 01 08 01 11 01 1A 01 23 - 39 01 00 00 00 00 11 B9 01 2B 01 49 01 64 01 90 01 B5 01 F2 02 28 02 29 - 39 01 00 00 00 00 11 BA 02 61 02 A3 02 CF 03 04 03 2D 03 64 03 7C 03 8C - 39 01 00 00 00 00 0D BB 03 8E 03 94 03 A0 03 C2 03 D4 03 D7 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 11 B0 00 0B 00 1C 00 39 00 53 00 6A 00 7E 00 91 00 A3 - 39 01 00 00 00 00 11 B1 00 B2 00 E9 01 15 01 57 01 89 01 D6 02 14 02 15 - 39 01 00 00 00 00 11 B2 02 51 02 94 02 C0 02 F5 03 15 03 43 03 53 03 62 - 39 01 00 00 00 00 0D B3 03 73 03 88 03 9F 03 BB 03 D3 03 D7 - 39 01 00 00 00 00 11 B4 00 CF 00 D5 00 E1 00 ED 00 F7 01 02 01 0B 01 15 - 39 01 00 00 00 00 11 B5 01 1D 01 3D 01 59 01 88 01 AE 01 ED 02 23 02 25 - 39 01 00 00 00 00 11 B6 02 5D 02 9F 02 CA 02 FE 03 22 03 4E 03 5A 03 68 - 39 01 00 00 00 00 0D B7 03 77 03 88 03 9C 03 B6 03 D2 03 D7 - 39 01 00 00 00 00 11 B8 00 E2 00 E8 00 F3 00 FE 01 08 01 11 01 1A 01 23 - 39 01 00 00 00 00 11 B9 01 2B 01 49 01 64 01 90 01 B5 01 F2 02 28 02 29 - 39 01 00 00 00 00 11 BA 02 61 02 A3 02 CF 03 04 03 2D 03 64 03 7C 03 8C - 39 01 00 00 00 00 0D BB 03 8E 03 94 03 A0 03 C2 03 D4 03 D7 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 51 FF - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 FF F0 - 39 01 00 00 00 00 02 5A 02 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 36 00 - 39 01 00 00 00 00 02 35 00 - 05 01 00 00 78 00 02 11 00 - 05 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-07 = [ - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 00 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 00 00 00 00 00 11 B0 00 91 00 99 00 A9 00 B7 00 C5 00 D2 00 DE 00 E9 - 39 00 00 00 00 00 11 B1 00 F4 01 1A 01 3B 01 6F 01 9A 01 DE 02 16 02 18 - 39 00 00 00 00 00 11 B2 02 51 02 95 02 C1 02 F7 03 1A 03 48 03 55 03 64 - 39 00 00 00 00 00 0D B3 03 74 03 87 03 9D 03 B9 03 D3 03 D7 - 39 00 00 00 00 00 11 B4 00 09 00 19 00 35 00 4E 00 65 00 79 00 8B 00 9B - 39 00 00 00 00 00 11 B5 00 AA 00 DF 01 09 01 4B 01 7E 01 CB 02 07 02 09 - 39 00 00 00 00 00 11 B6 02 46 02 8A 02 B7 02 EE 03 11 03 42 03 4F 03 5E - 39 00 00 00 00 00 0D B7 03 6E 03 81 03 98 03 B4 03 D2 03 D7 - 39 00 00 00 00 00 11 B8 00 09 00 1A 00 37 00 51 00 68 00 7D 00 90 00 A1 - 39 00 00 00 00 00 11 B9 00 B1 00 E7 01 11 01 52 01 84 01 D0 02 0B 02 0D - 39 00 00 00 00 00 11 BA 02 49 02 8E 02 BB 02 F4 03 1B 03 53 03 66 03 7D - 39 00 00 00 00 00 0D BB 03 8F 03 97 03 9C 03 B7 03 D2 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 00 00 00 00 00 11 B0 00 91 00 99 00 A9 00 B7 00 C5 00 D2 00 DE 00 E9 - 39 00 00 00 00 00 11 B1 00 F4 01 1A 01 3B 01 6F 01 9A 01 DE 02 16 02 18 - 39 00 00 00 00 00 11 B2 02 51 02 95 02 C1 02 F7 03 1A 03 48 03 55 03 64 - 39 00 00 00 00 00 0D B3 03 74 03 87 03 9D 03 B9 03 D3 03 D7 - 39 00 00 00 00 00 11 B4 00 09 00 19 00 35 00 4E 00 65 00 79 00 8B 00 9B - 39 00 00 00 00 00 11 B5 00 AA 00 DF 01 09 01 4B 01 7E 01 CB 02 07 02 09 - 39 00 00 00 00 00 11 B6 02 46 02 8A 02 B7 02 EE 03 11 03 42 03 4F 03 5E - 39 00 00 00 00 00 0D B7 03 6E 03 81 03 98 03 B4 03 D2 03 D7 - 39 00 00 00 00 00 11 B8 00 09 00 1A 00 37 00 51 00 68 00 7D 00 90 00 A1 - 39 00 00 00 00 00 11 B9 00 B1 00 E7 01 11 01 52 01 84 01 D0 02 0B 02 0D - 39 00 00 00 00 00 11 BA 02 49 02 8E 02 BB 02 F4 03 1B 03 53 03 66 03 7D - 39 00 00 00 00 00 0D BB 03 8F 03 97 03 9C 03 B7 03 D2 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 10 - ]; - qcom,mdss-dsi-on-command-07 = - [ - 39 01 00 00 00 00 02 FF 25 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 8D 04 - 39 01 00 00 00 00 02 FF 20 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 30 10 - 39 01 00 00 00 00 02 31 50 - 39 01 00 00 00 00 02 32 2F - 39 01 00 00 00 00 02 94 00 - 39 01 00 00 00 00 02 95 E1 - 39 01 00 00 00 00 02 96 E1 - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 01 00 00 00 00 11 B0 00 91 00 99 00 A9 00 B7 00 C5 00 D2 00 DE 00 E9 - 39 01 00 00 00 00 11 B1 00 F4 01 1A 01 3B 01 6F 01 9A 01 DE 02 16 02 18 - 39 01 00 00 00 00 11 B2 02 51 02 95 02 C1 02 F7 03 1A 03 48 03 55 03 64 - 39 01 00 00 00 00 0D B3 03 74 03 87 03 9D 03 B9 03 D3 03 D7 - 39 01 00 00 00 00 11 B4 00 09 00 19 00 35 00 4E 00 65 00 79 00 8B 00 9B - 39 01 00 00 00 00 11 B5 00 AA 00 DF 01 09 01 4B 01 7E 01 CB 02 07 02 09 - 39 01 00 00 00 00 11 B6 02 46 02 8A 02 B7 02 EE 03 11 03 42 03 4F 03 5E - 39 01 00 00 00 00 0D B7 03 6E 03 81 03 98 03 B4 03 D2 03 D7 - 39 01 00 00 00 00 11 B8 00 09 00 1A 00 37 00 51 00 68 00 7D 00 90 00 A1 - 39 01 00 00 00 00 11 B9 00 B1 00 E7 01 11 01 52 01 84 01 D0 02 0B 02 0D - 39 01 00 00 00 00 11 BA 02 49 02 8E 02 BB 02 F4 03 1B 03 53 03 66 03 7D - 39 01 00 00 00 00 0D BB 03 8F 03 97 03 9C 03 B7 03 D2 03 D7 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 11 B0 00 91 00 99 00 A9 00 B7 00 C5 00 D2 00 DE 00 E9 - 39 01 00 00 00 00 11 B1 00 F4 01 1A 01 3B 01 6F 01 9A 01 DE 02 16 02 18 - 39 01 00 00 00 00 11 B2 02 51 02 95 02 C1 02 F7 03 1A 03 48 03 55 03 64 - 39 01 00 00 00 00 0D B3 03 74 03 87 03 9D 03 B9 03 D3 03 D7 - 39 01 00 00 00 00 11 B4 00 09 00 19 00 35 00 4E 00 65 00 79 00 8B 00 9B - 39 01 00 00 00 00 11 B5 00 AA 00 DF 01 09 01 4B 01 7E 01 CB 02 07 02 09 - 39 01 00 00 00 00 11 B6 02 46 02 8A 02 B7 02 EE 03 11 03 42 03 4F 03 5E - 39 01 00 00 00 00 0D B7 03 6E 03 81 03 98 03 B4 03 D2 03 D7 - 39 01 00 00 00 00 11 B8 00 09 00 1A 00 37 00 51 00 68 00 7D 00 90 00 A1 - 39 01 00 00 00 00 11 B9 00 B1 00 E7 01 11 01 52 01 84 01 D0 02 0B 02 0D - 39 01 00 00 00 00 11 BA 02 49 02 8E 02 BB 02 F4 03 1B 03 53 03 66 03 7D - 39 01 00 00 00 00 0D BB 03 8F 03 97 03 9C 03 B7 03 D2 03 D7 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 51 FF - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 FF F0 - 39 01 00 00 00 00 02 5A 02 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 36 00 - 39 01 00 00 00 00 02 35 00 - 05 01 00 00 78 00 02 11 00 - 05 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-08 = [ - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 00 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 00 00 00 00 00 11 B0 01 03 01 08 01 10 01 19 01 21 01 28 01 30 01 37 - 39 00 00 00 00 00 11 B1 01 3E 01 58 01 6E 01 96 01 B9 01 F2 02 26 02 28 - 39 00 00 00 00 00 11 B2 02 5E 02 A0 02 CB 02 FF 03 25 03 50 03 5D 03 6A - 39 00 00 00 00 00 0D B3 03 7A 03 8C 03 A2 03 BC 03 D3 03 D7 - 39 00 00 00 00 00 11 B4 00 09 00 19 00 35 00 4B 00 61 00 74 00 87 00 97 - 39 00 00 00 00 00 11 B5 00 A7 00 DD 01 07 01 4A 01 7D 01 CB 02 08 02 0A - 39 00 00 00 00 00 11 B6 02 45 02 8A 02 B7 02 ED 03 10 03 41 03 4F 03 5E - 39 00 00 00 00 00 0D B7 03 6E 03 81 03 98 03 B4 03 D2 03 D7 - 39 00 00 00 00 00 11 B8 00 09 00 1A 00 38 00 51 00 68 00 7D 00 90 00 A1 - 39 00 00 00 00 00 11 B9 00 B1 00 E7 01 11 01 52 01 84 01 D0 02 0C 02 0E - 39 00 00 00 00 00 11 BA 02 49 02 8E 02 BB 02 F3 03 1A 03 52 03 66 03 7D - 39 00 00 00 00 00 0D BB 03 8F 03 97 03 9C 03 B7 03 D2 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 00 00 00 00 00 11 B0 01 03 01 08 01 10 01 19 01 21 01 28 01 30 01 37 - 39 00 00 00 00 00 11 B1 01 3E 01 58 01 6E 01 96 01 B9 01 F2 02 26 02 28 - 39 00 00 00 00 00 11 B2 02 5E 02 A0 02 CB 02 FF 03 25 03 50 03 5D 03 6A - 39 00 00 00 00 00 0D B3 03 7A 03 8C 03 A2 03 BC 03 D3 03 D7 - 39 00 00 00 00 00 11 B4 00 09 00 19 00 35 00 4B 00 61 00 74 00 87 00 97 - 39 00 00 00 00 00 11 B5 00 A7 00 DD 01 07 01 4A 01 7D 01 CB 02 08 02 0A - 39 00 00 00 00 00 11 B6 02 45 02 8A 02 B7 02 ED 03 10 03 41 03 4F 03 5E - 39 00 00 00 00 00 0D B7 03 6E 03 81 03 98 03 B4 03 D2 03 D7 - 39 00 00 00 00 00 11 B8 00 09 00 1A 00 38 00 51 00 68 00 7D 00 90 00 A1 - 39 00 00 00 00 00 11 B9 00 B1 00 E7 01 11 01 52 01 84 01 D0 02 0C 02 0E - 39 00 00 00 00 00 11 BA 02 49 02 8E 02 BB 02 F3 03 1A 03 52 03 66 03 7D - 39 00 00 00 00 00 0D BB 03 8F 03 97 03 9C 03 B7 03 D2 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 10 - ]; - qcom,mdss-dsi-on-command-08 = - [ - 39 01 00 00 00 00 02 FF 25 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 8D 04 - 39 01 00 00 00 00 02 FF 20 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 30 10 - 39 01 00 00 00 00 02 31 50 - 39 01 00 00 00 00 02 32 2F - 39 01 00 00 00 00 02 94 00 - 39 01 00 00 00 00 02 95 E1 - 39 01 00 00 00 00 02 96 E1 - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 01 00 00 00 00 11 B0 01 03 01 08 01 10 01 19 01 21 01 28 01 30 01 37 - 39 01 00 00 00 00 11 B1 01 3E 01 58 01 6E 01 96 01 B9 01 F2 02 26 02 28 - 39 01 00 00 00 00 11 B2 02 5E 02 A0 02 CB 02 FF 03 25 03 50 03 5D 03 6A - 39 01 00 00 00 00 0D B3 03 7A 03 8C 03 A2 03 BC 03 D3 03 D7 - 39 01 00 00 00 00 11 B4 00 09 00 19 00 35 00 4B 00 61 00 74 00 87 00 97 - 39 01 00 00 00 00 11 B5 00 A7 00 DD 01 07 01 4A 01 7D 01 CB 02 08 02 0A - 39 01 00 00 00 00 11 B6 02 45 02 8A 02 B7 02 ED 03 10 03 41 03 4F 03 5E - 39 01 00 00 00 00 0D B7 03 6E 03 81 03 98 03 B4 03 D2 03 D7 - 39 01 00 00 00 00 11 B8 00 09 00 1A 00 38 00 51 00 68 00 7D 00 90 00 A1 - 39 01 00 00 00 00 11 B9 00 B1 00 E7 01 11 01 52 01 84 01 D0 02 0C 02 0E - 39 01 00 00 00 00 11 BA 02 49 02 8E 02 BB 02 F3 03 1A 03 52 03 66 03 7D - 39 01 00 00 00 00 0D BB 03 8F 03 97 03 9C 03 B7 03 D2 03 D7 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 11 B0 01 03 01 08 01 10 01 19 01 21 01 28 01 30 01 37 - 39 01 00 00 00 00 11 B1 01 3E 01 58 01 6E 01 96 01 B9 01 F2 02 26 02 28 - 39 01 00 00 00 00 11 B2 02 5E 02 A0 02 CB 02 FF 03 25 03 50 03 5D 03 6A - 39 01 00 00 00 00 0D B3 03 7A 03 8C 03 A2 03 BC 03 D3 03 D7 - 39 01 00 00 00 00 11 B4 00 09 00 19 00 35 00 4B 00 61 00 74 00 87 00 97 - 39 01 00 00 00 00 11 B5 00 A7 00 DD 01 07 01 4A 01 7D 01 CB 02 08 02 0A - 39 01 00 00 00 00 11 B6 02 45 02 8A 02 B7 02 ED 03 10 03 41 03 4F 03 5E - 39 01 00 00 00 00 0D B7 03 6E 03 81 03 98 03 B4 03 D2 03 D7 - 39 01 00 00 00 00 11 B8 00 09 00 1A 00 38 00 51 00 68 00 7D 00 90 00 A1 - 39 01 00 00 00 00 11 B9 00 B1 00 E7 01 11 01 52 01 84 01 D0 02 0C 02 0E - 39 01 00 00 00 00 11 BA 02 49 02 8E 02 BB 02 F3 03 1A 03 52 03 66 03 7D - 39 01 00 00 00 00 0D BB 03 8F 03 97 03 9C 03 B7 03 D2 03 D7 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 51 FF - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 FF F0 - 39 01 00 00 00 00 02 5A 02 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 36 00 - 39 01 00 00 00 00 02 35 00 - 05 01 00 00 78 00 02 11 00 - 05 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-09 = [ - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 00 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 00 00 00 00 00 11 B0 00 0A 00 1B 00 37 00 50 00 66 00 7A 00 8C 00 9E - 39 00 00 00 00 00 11 B1 00 AE 00 E3 01 0E 01 4E 01 82 01 CE 02 0A 02 0C - 39 00 00 00 00 00 11 B2 02 48 02 8C 02 B9 02 EE 03 11 03 3F 03 51 03 5F - 39 00 00 00 00 00 0D B3 03 70 03 82 03 98 03 B4 03 D2 03 D7 - 39 00 00 00 00 00 11 B4 00 91 00 99 00 A9 00 B7 00 C5 00 D2 00 DE 00 E9 - 39 00 00 00 00 00 11 B5 00 F4 01 1A 01 39 01 6E 01 98 01 DC 02 14 02 15 - 39 00 00 00 00 00 11 B6 02 4F 02 92 02 BE 02 F4 03 16 03 46 03 53 03 62 - 39 00 00 00 00 00 0D B7 03 72 03 85 03 9C 03 B7 03 D2 03 D7 - 39 00 00 00 00 00 11 B8 01 12 01 16 01 1E 01 26 01 2D 01 35 01 3B 01 42 - 39 00 00 00 00 00 11 B9 01 49 01 61 01 77 01 9C 01 BE 01 F4 02 28 02 29 - 39 00 00 00 00 00 11 BA 02 60 02 A1 02 CE 03 03 03 2F 03 69 03 89 03 98 - 39 00 00 00 00 00 0D BB 03 9A 03 9C 03 A4 03 BF 03 D4 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 00 00 00 00 00 11 B0 00 0A 00 1B 00 37 00 50 00 66 00 7A 00 8C 00 9E - 39 00 00 00 00 00 11 B1 00 AE 00 E3 01 0E 01 4E 01 82 01 CE 02 0A 02 0C - 39 00 00 00 00 00 11 B2 02 48 02 8C 02 B9 02 EE 03 11 03 3F 03 51 03 5F - 39 00 00 00 00 00 0D B3 03 70 03 82 03 98 03 B4 03 D2 03 D7 - 39 00 00 00 00 00 11 B4 00 91 00 99 00 A9 00 B7 00 C5 00 D2 00 DE 00 E9 - 39 00 00 00 00 00 11 B5 00 F4 01 1A 01 39 01 6E 01 98 01 DC 02 14 02 15 - 39 00 00 00 00 00 11 B6 02 4F 02 92 02 BE 02 F4 03 16 03 46 03 53 03 62 - 39 00 00 00 00 00 0D B7 03 72 03 85 03 9C 03 B7 03 D2 03 D7 - 39 00 00 00 00 00 11 B8 01 12 01 16 01 1E 01 26 01 2D 01 35 01 3B 01 42 - 39 00 00 00 00 00 11 B9 01 49 01 61 01 77 01 9C 01 BE 01 F4 02 28 02 29 - 39 00 00 00 00 00 11 BA 02 60 02 A1 02 CE 03 03 03 2F 03 69 03 89 03 98 - 39 00 00 00 00 00 0D BB 03 9A 03 9C 03 A4 03 BF 03 D4 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 10 - ]; - qcom,mdss-dsi-on-command-09 = - [ - 39 01 00 00 00 00 02 FF 25 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 8D 04 - 39 01 00 00 00 00 02 FF 20 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 30 10 - 39 01 00 00 00 00 02 31 50 - 39 01 00 00 00 00 02 32 2F - 39 01 00 00 00 00 02 94 00 - 39 01 00 00 00 00 02 95 E1 - 39 01 00 00 00 00 02 96 E1 - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 01 00 00 00 00 11 B0 00 0A 00 1B 00 37 00 50 00 66 00 7A 00 8C 00 9E - 39 01 00 00 00 00 11 B1 00 AE 00 E3 01 0E 01 4E 01 82 01 CE 02 0A 02 0C - 39 01 00 00 00 00 11 B2 02 48 02 8C 02 B9 02 EE 03 11 03 3F 03 51 03 5F - 39 01 00 00 00 00 0D B3 03 70 03 82 03 98 03 B4 03 D2 03 D7 - 39 01 00 00 00 00 11 B4 00 91 00 99 00 A9 00 B7 00 C5 00 D2 00 DE 00 E9 - 39 01 00 00 00 00 11 B5 00 F4 01 1A 01 39 01 6E 01 98 01 DC 02 14 02 15 - 39 01 00 00 00 00 11 B6 02 4F 02 92 02 BE 02 F4 03 16 03 46 03 53 03 62 - 39 01 00 00 00 00 0D B7 03 72 03 85 03 9C 03 B7 03 D2 03 D7 - 39 01 00 00 00 00 11 B8 01 12 01 16 01 1E 01 26 01 2D 01 35 01 3B 01 42 - 39 01 00 00 00 00 11 B9 01 49 01 61 01 77 01 9C 01 BE 01 F4 02 28 02 29 - 39 01 00 00 00 00 11 BA 02 60 02 A1 02 CE 03 03 03 2F 03 69 03 89 03 98 - 39 01 00 00 00 00 0D BB 03 9A 03 9C 03 A4 03 BF 03 D4 03 D7 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 11 B0 00 0A 00 1B 00 37 00 50 00 66 00 7A 00 8C 00 9E - 39 01 00 00 00 00 11 B1 00 AE 00 E3 01 0E 01 4E 01 82 01 CE 02 0A 02 0C - 39 01 00 00 00 00 11 B2 02 48 02 8C 02 B9 02 EE 03 11 03 3F 03 51 03 5F - 39 01 00 00 00 00 0D B3 03 70 03 82 03 98 03 B4 03 D2 03 D7 - 39 01 00 00 00 00 11 B4 00 91 00 99 00 A9 00 B7 00 C5 00 D2 00 DE 00 E9 - 39 01 00 00 00 00 11 B5 00 F4 01 1A 01 39 01 6E 01 98 01 DC 02 14 02 15 - 39 01 00 00 00 00 11 B6 02 4F 02 92 02 BE 02 F4 03 16 03 46 03 53 03 62 - 39 01 00 00 00 00 0D B7 03 72 03 85 03 9C 03 B7 03 D2 03 D7 - 39 01 00 00 00 00 11 B8 01 12 01 16 01 1E 01 26 01 2D 01 35 01 3B 01 42 - 39 01 00 00 00 00 11 B9 01 49 01 61 01 77 01 9C 01 BE 01 F4 02 28 02 29 - 39 01 00 00 00 00 11 BA 02 60 02 A1 02 CE 03 03 03 2F 03 69 03 89 03 98 - 39 01 00 00 00 00 0D BB 03 9A 03 9C 03 A4 03 BF 03 D4 03 D7 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 51 FF - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 FF F0 - 39 01 00 00 00 00 02 5A 02 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 36 00 - 39 01 00 00 00 00 02 35 00 - 05 01 00 00 78 00 02 11 00 - 05 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-10 = [ - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 00 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 00 00 00 00 00 11 B0 00 0A 00 1A 00 35 00 4E 00 66 00 79 00 8C 00 9D - 39 00 00 00 00 00 11 B1 00 AC 00 E3 01 0C 01 4F 01 80 01 CE 02 0A 02 0C - 39 00 00 00 00 00 11 B2 02 47 02 8C 02 B8 02 EF 03 0F 03 3F 03 50 03 5E - 39 00 00 00 00 00 0D B3 03 6F 03 82 03 98 03 B4 03 D2 03 D7 - 39 00 00 00 00 00 11 B4 00 D5 00 DB 00 E6 00 F0 00 FA 01 04 01 0D 01 15 - 39 00 00 00 00 00 11 B5 01 1E 01 3C 01 56 01 83 01 A9 01 E7 02 1C 02 1E - 39 00 00 00 00 00 11 B6 02 55 02 98 02 C3 02 F8 03 1B 03 4A 03 57 03 65 - 39 00 00 00 00 00 0D B7 03 75 03 88 03 9E 03 B9 03 D3 03 D7 - 39 00 00 00 00 00 11 B8 01 10 01 14 01 1C 01 24 01 2C 01 33 01 3A 01 41 - 39 00 00 00 00 00 11 B9 01 47 01 60 01 75 01 9C 01 BC 01 F4 02 27 02 29 - 39 00 00 00 00 00 11 BA 02 5F 02 A1 02 CD 03 03 03 2D 03 68 03 86 03 95 - 39 00 00 00 00 00 0D BB 03 97 03 99 03 A4 03 BF 03 D4 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 00 00 00 00 00 11 B0 00 0A 00 1A 00 35 00 4E 00 66 00 79 00 8C 00 9D - 39 00 00 00 00 00 11 B1 00 AC 00 E3 01 0C 01 4F 01 80 01 CE 02 0A 02 0C - 39 00 00 00 00 00 11 B2 02 47 02 8C 02 B8 02 EF 03 0F 03 3F 03 50 03 5E - 39 00 00 00 00 00 0D B3 03 6F 03 82 03 98 03 B4 03 D2 03 D7 - 39 00 00 00 00 00 11 B4 00 D5 00 DB 00 E6 00 F0 00 FA 01 04 01 0D 01 15 - 39 00 00 00 00 00 11 B5 01 1E 01 3C 01 56 01 83 01 A9 01 E7 02 1C 02 1E - 39 00 00 00 00 00 11 B6 02 55 02 98 02 C3 02 F8 03 1B 03 4A 03 57 03 65 - 39 00 00 00 00 00 0D B7 03 75 03 88 03 9E 03 B9 03 D3 03 D7 - 39 00 00 00 00 00 11 B8 01 10 01 14 01 1C 01 24 01 2C 01 33 01 3A 01 41 - 39 00 00 00 00 00 11 B9 01 47 01 60 01 75 01 9C 01 BC 01 F4 02 27 02 29 - 39 00 00 00 00 00 11 BA 02 5F 02 A1 02 CD 03 03 03 2D 03 68 03 86 03 95 - 39 00 00 00 00 00 0D BB 03 97 03 99 03 A4 03 BF 03 D4 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 10 - ]; - qcom,mdss-dsi-on-command-10 = - [ - 39 01 00 00 00 00 02 FF 25 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 8D 04 - 39 01 00 00 00 00 02 FF 20 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 30 10 - 39 01 00 00 00 00 02 31 50 - 39 01 00 00 00 00 02 32 2F - 39 01 00 00 00 00 02 94 00 - 39 01 00 00 00 00 02 95 E1 - 39 01 00 00 00 00 02 96 E1 - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 01 00 00 00 00 11 B0 00 0A 00 1A 00 35 00 4E 00 66 00 79 00 8C 00 9D - 39 01 00 00 00 00 11 B1 00 AC 00 E3 01 0C 01 4F 01 80 01 CE 02 0A 02 0C - 39 01 00 00 00 00 11 B2 02 47 02 8C 02 B8 02 EF 03 0F 03 3F 03 50 03 5E - 39 01 00 00 00 00 0D B3 03 6F 03 82 03 98 03 B4 03 D2 03 D7 - 39 01 00 00 00 00 11 B4 00 D5 00 DB 00 E6 00 F0 00 FA 01 04 01 0D 01 15 - 39 01 00 00 00 00 11 B5 01 1E 01 3C 01 56 01 83 01 A9 01 E7 02 1C 02 1E - 39 01 00 00 00 00 11 B6 02 55 02 98 02 C3 02 F8 03 1B 03 4A 03 57 03 65 - 39 01 00 00 00 00 0D B7 03 75 03 88 03 9E 03 B9 03 D3 03 D7 - 39 01 00 00 00 00 11 B8 01 10 01 14 01 1C 01 24 01 2C 01 33 01 3A 01 41 - 39 01 00 00 00 00 11 B9 01 47 01 60 01 75 01 9C 01 BC 01 F4 02 27 02 29 - 39 01 00 00 00 00 11 BA 02 5F 02 A1 02 CD 03 03 03 2D 03 68 03 86 03 95 - 39 01 00 00 00 00 0D BB 03 97 03 99 03 A4 03 BF 03 D4 03 D7 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 11 B0 00 0A 00 1A 00 35 00 4E 00 66 00 79 00 8C 00 9D - 39 01 00 00 00 00 11 B1 00 AC 00 E3 01 0C 01 4F 01 80 01 CE 02 0A 02 0C - 39 01 00 00 00 00 11 B2 02 47 02 8C 02 B8 02 EF 03 0F 03 3F 03 50 03 5E - 39 01 00 00 00 00 0D B3 03 6F 03 82 03 98 03 B4 03 D2 03 D7 - 39 01 00 00 00 00 11 B4 00 D5 00 DB 00 E6 00 F0 00 FA 01 04 01 0D 01 15 - 39 01 00 00 00 00 11 B5 01 1E 01 3C 01 56 01 83 01 A9 01 E7 02 1C 02 1E - 39 01 00 00 00 00 11 B6 02 55 02 98 02 C3 02 F8 03 1B 03 4A 03 57 03 65 - 39 01 00 00 00 00 0D B7 03 75 03 88 03 9E 03 B9 03 D3 03 D7 - 39 01 00 00 00 00 11 B8 01 10 01 14 01 1C 01 24 01 2C 01 33 01 3A 01 41 - 39 01 00 00 00 00 11 B9 01 47 01 60 01 75 01 9C 01 BC 01 F4 02 27 02 29 - 39 01 00 00 00 00 11 BA 02 5F 02 A1 02 CD 03 03 03 2D 03 68 03 86 03 95 - 39 01 00 00 00 00 0D BB 03 97 03 99 03 A4 03 BF 03 D4 03 D7 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 51 FF - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 FF F0 - 39 01 00 00 00 00 02 5A 02 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 36 00 - 39 01 00 00 00 00 02 35 00 - 05 01 00 00 78 00 02 11 00 - 05 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-11 = [ - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 00 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 00 00 00 00 00 11 B0 00 0B 00 1C 00 38 00 51 00 67 00 7B 00 8E 00 A0 - 39 00 00 00 00 00 11 B1 00 B0 00 E5 01 12 01 52 01 84 01 D0 02 0C 02 0E - 39 00 00 00 00 00 11 B2 02 49 02 8D 02 B8 02 EF 03 0E 03 3D 03 49 03 59 - 39 00 00 00 00 00 0D B3 03 67 03 7C 03 9A 03 B6 03 D1 03 D7 - 39 00 00 00 00 00 11 B4 01 35 01 38 01 3F 01 45 01 4B 01 51 01 57 01 5D - 39 00 00 00 00 00 11 B5 01 62 01 77 01 8B 01 AC 01 CA 01 FD 02 2F 02 30 - 39 00 00 00 00 00 11 B6 02 65 02 A6 02 D0 03 02 03 29 03 53 03 5F 03 6D - 39 00 00 00 00 00 0D B7 03 7C 03 8E 03 A3 03 BD 03 D3 03 D7 - 39 00 00 00 00 00 11 B8 01 1A 01 1E 01 26 01 2D 01 34 01 3B 01 42 01 49 - 39 00 00 00 00 00 11 B9 01 4F 01 66 01 7C 01 A1 01 C1 01 F7 02 2A 02 2B - 39 00 00 00 00 00 11 BA 02 61 02 A3 02 CE 03 04 03 2E 03 65 03 7B 03 A9 - 39 00 00 00 00 00 0D BB 03 C8 03 CB 03 CD 03 CF 03 D4 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 00 00 00 00 00 11 B0 00 0B 00 1C 00 38 00 51 00 67 00 7B 00 8E 00 A0 - 39 00 00 00 00 00 11 B1 00 B0 00 E5 01 12 01 52 01 84 01 D0 02 0C 02 0E - 39 00 00 00 00 00 11 B2 02 49 02 8D 02 B8 02 EF 03 0E 03 3D 03 49 03 59 - 39 00 00 00 00 00 0D B3 03 67 03 7C 03 9A 03 B6 03 D1 03 D7 - 39 00 00 00 00 00 11 B4 01 35 01 38 01 3F 01 45 01 4B 01 51 01 57 01 5D - 39 00 00 00 00 00 11 B5 01 62 01 77 01 8B 01 AC 01 CA 01 FD 02 2F 02 30 - 39 00 00 00 00 00 11 B6 02 65 02 A6 02 D0 03 02 03 29 03 53 03 5F 03 6D - 39 00 00 00 00 00 0D B7 03 7C 03 8E 03 A3 03 BD 03 D3 03 D7 - 39 00 00 00 00 00 11 B8 01 1A 01 1E 01 26 01 2D 01 34 01 3B 01 42 01 49 - 39 00 00 00 00 00 11 B9 01 4F 01 66 01 7C 01 A1 01 C1 01 F7 02 2A 02 2B - 39 00 00 00 00 00 11 BA 02 61 02 A3 02 CE 03 04 03 2E 03 65 03 7B 03 A9 - 39 00 00 00 00 00 0D BB 03 C8 03 CB 03 CD 03 CF 03 D4 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 10 - ]; - qcom,mdss-dsi-on-command-11 = - [ - 39 01 00 00 00 00 02 FF 25 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 8D 04 - 39 01 00 00 00 00 02 FF 20 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 30 10 - 39 01 00 00 00 00 02 31 50 - 39 01 00 00 00 00 02 32 2F - 39 01 00 00 00 00 02 94 00 - 39 01 00 00 00 00 02 95 E1 - 39 01 00 00 00 00 02 96 E1 - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 01 00 00 00 00 11 B0 00 0B 00 1C 00 38 00 51 00 67 00 7B 00 8E 00 A0 - 39 01 00 00 00 00 11 B1 00 B0 00 E5 01 12 01 52 01 84 01 D0 02 0C 02 0E - 39 01 00 00 00 00 11 B2 02 49 02 8D 02 B8 02 EF 03 0E 03 3D 03 49 03 59 - 39 01 00 00 00 00 0D B3 03 67 03 7C 03 9A 03 B6 03 D1 03 D7 - 39 01 00 00 00 00 11 B4 01 35 01 38 01 3F 01 45 01 4B 01 51 01 57 01 5D - 39 01 00 00 00 00 11 B5 01 62 01 77 01 8B 01 AC 01 CA 01 FD 02 2F 02 30 - 39 01 00 00 00 00 11 B6 02 65 02 A6 02 D0 03 02 03 29 03 53 03 5F 03 6D - 39 01 00 00 00 00 0D B7 03 7C 03 8E 03 A3 03 BD 03 D3 03 D7 - 39 01 00 00 00 00 11 B8 01 1A 01 1E 01 26 01 2D 01 34 01 3B 01 42 01 49 - 39 01 00 00 00 00 11 B9 01 4F 01 66 01 7C 01 A1 01 C1 01 F7 02 2A 02 2B - 39 01 00 00 00 00 11 BA 02 61 02 A3 02 CE 03 04 03 2E 03 65 03 7B 03 A9 - 39 01 00 00 00 00 0D BB 03 C8 03 CB 03 CD 03 CF 03 D4 03 D7 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 11 B0 00 0B 00 1C 00 38 00 51 00 67 00 7B 00 8E 00 A0 - 39 01 00 00 00 00 11 B1 00 B0 00 E5 01 12 01 52 01 84 01 D0 02 0C 02 0E - 39 01 00 00 00 00 11 B2 02 49 02 8D 02 B8 02 EF 03 0E 03 3D 03 49 03 59 - 39 01 00 00 00 00 0D B3 03 67 03 7C 03 9A 03 B6 03 D1 03 D7 - 39 01 00 00 00 00 11 B4 01 35 01 38 01 3F 01 45 01 4B 01 51 01 57 01 5D - 39 01 00 00 00 00 11 B5 01 62 01 77 01 8B 01 AC 01 CA 01 FD 02 2F 02 30 - 39 01 00 00 00 00 11 B6 02 65 02 A6 02 D0 03 02 03 29 03 53 03 5F 03 6D - 39 01 00 00 00 00 0D B7 03 7C 03 8E 03 A3 03 BD 03 D3 03 D7 - 39 01 00 00 00 00 11 B8 01 1A 01 1E 01 26 01 2D 01 34 01 3B 01 42 01 49 - 39 01 00 00 00 00 11 B9 01 4F 01 66 01 7C 01 A1 01 C1 01 F7 02 2A 02 2B - 39 01 00 00 00 00 11 BA 02 61 02 A3 02 CE 03 04 03 2E 03 65 03 7B 03 A9 - 39 01 00 00 00 00 0D BB 03 C8 03 CB 03 CD 03 CF 03 D4 03 D7 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 51 FF - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 FF F0 - 39 01 00 00 00 00 02 5A 02 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 36 00 - 39 01 00 00 00 00 02 35 00 - 05 01 00 00 78 00 02 11 00 - 05 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-12 = [ - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 00 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 00 00 00 00 00 11 B0 00 09 00 1B 00 39 00 53 00 6A 00 7F 00 91 00 A3 - 39 00 00 00 00 00 11 B1 00 B3 00 E9 01 14 01 56 01 89 01 D6 02 11 02 13 - 39 00 00 00 00 00 11 B2 02 4F 02 91 02 BD 02 F4 03 15 03 3D 03 4D 03 5D - 39 00 00 00 00 00 0D B3 03 71 03 87 03 9E 03 BA 03 D3 03 D7 - 39 00 00 00 00 00 11 B4 01 59 01 5C 01 61 01 67 01 6C 01 71 01 76 01 7B - 39 00 00 00 00 00 11 B5 01 80 01 92 01 A3 01 C1 01 DD 02 0C 02 3C 02 3D - 39 00 00 00 00 00 11 B6 02 71 02 B0 02 D9 03 0D 03 30 03 58 03 64 03 72 - 39 00 00 00 00 00 0D B7 03 80 03 91 03 A6 03 BE 03 D4 03 D7 - 39 00 00 00 00 00 11 B8 01 23 01 27 01 2E 01 36 01 3D 01 44 01 4A 01 51 - 39 00 00 00 00 00 11 B9 01 57 01 6E 01 83 01 A8 01 C8 01 FE 02 30 02 32 - 39 00 00 00 00 00 11 BA 02 68 02 A8 02 D3 03 0B 03 34 03 6B 03 8A 03 A3 - 39 00 00 00 00 00 0D BB 03 A7 03 A9 03 AB 03 B7 03 D3 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 00 00 00 00 00 11 B0 00 09 00 1B 00 39 00 53 00 6A 00 7F 00 91 00 A3 - 39 00 00 00 00 00 11 B1 00 B3 00 E9 01 14 01 56 01 89 01 D6 02 11 02 13 - 39 00 00 00 00 00 11 B2 02 4F 02 91 02 BD 02 F4 03 15 03 3D 03 4D 03 5D - 39 00 00 00 00 00 0D B3 03 71 03 87 03 9E 03 BA 03 D3 03 D7 - 39 00 00 00 00 00 11 B4 01 59 01 5C 01 61 01 67 01 6C 01 71 01 76 01 7B - 39 00 00 00 00 00 11 B5 01 80 01 92 01 A3 01 C1 01 DD 02 0C 02 3C 02 3D - 39 00 00 00 00 00 11 B6 02 71 02 B0 02 D9 03 0D 03 30 03 58 03 64 03 72 - 39 00 00 00 00 00 0D B7 03 80 03 91 03 A6 03 BE 03 D4 03 D7 - 39 00 00 00 00 00 11 B8 01 23 01 27 01 2E 01 36 01 3D 01 44 01 4A 01 51 - 39 00 00 00 00 00 11 B9 01 57 01 6E 01 83 01 A8 01 C8 01 FE 02 30 02 32 - 39 00 00 00 00 00 11 BA 02 68 02 A8 02 D3 03 0B 03 34 03 6B 03 8A 03 A3 - 39 00 00 00 00 00 0D BB 03 A7 03 A9 03 AB 03 B7 03 D3 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 10 - ]; - qcom,mdss-dsi-on-command-12 = - [ - 39 01 00 00 00 00 02 FF 25 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 8D 04 - 39 01 00 00 00 00 02 FF 20 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 30 10 - 39 01 00 00 00 00 02 31 50 - 39 01 00 00 00 00 02 32 2F - 39 01 00 00 00 00 02 94 00 - 39 01 00 00 00 00 02 95 E1 - 39 01 00 00 00 00 02 96 E1 - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 01 00 00 00 00 11 B0 00 09 00 1B 00 39 00 53 00 6A 00 7F 00 91 00 A3 - 39 01 00 00 00 00 11 B1 00 B3 00 E9 01 14 01 56 01 89 01 D6 02 11 02 13 - 39 01 00 00 00 00 11 B2 02 4F 02 91 02 BD 02 F4 03 15 03 3D 03 4D 03 5D - 39 01 00 00 00 00 0D B3 03 71 03 87 03 9E 03 BA 03 D3 03 D7 - 39 01 00 00 00 00 11 B4 01 59 01 5C 01 61 01 67 01 6C 01 71 01 76 01 7B - 39 01 00 00 00 00 11 B5 01 80 01 92 01 A3 01 C1 01 DD 02 0C 02 3C 02 3D - 39 01 00 00 00 00 11 B6 02 71 02 B0 02 D9 03 0D 03 30 03 58 03 64 03 72 - 39 01 00 00 00 00 0D B7 03 80 03 91 03 A6 03 BE 03 D4 03 D7 - 39 01 00 00 00 00 11 B8 01 23 01 27 01 2E 01 36 01 3D 01 44 01 4A 01 51 - 39 01 00 00 00 00 11 B9 01 57 01 6E 01 83 01 A8 01 C8 01 FE 02 30 02 32 - 39 01 00 00 00 00 11 BA 02 68 02 A8 02 D3 03 0B 03 34 03 6B 03 8A 03 A3 - 39 01 00 00 00 00 0D BB 03 A7 03 A9 03 AB 03 B7 03 D3 03 D7 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 11 B0 00 09 00 1B 00 39 00 53 00 6A 00 7F 00 91 00 A3 - 39 01 00 00 00 00 11 B1 00 B3 00 E9 01 14 01 56 01 89 01 D6 02 11 02 13 - 39 01 00 00 00 00 11 B2 02 4F 02 91 02 BD 02 F4 03 15 03 3D 03 4D 03 5D - 39 01 00 00 00 00 0D B3 03 71 03 87 03 9E 03 BA 03 D3 03 D7 - 39 01 00 00 00 00 11 B4 01 59 01 5C 01 61 01 67 01 6C 01 71 01 76 01 7B - 39 01 00 00 00 00 11 B5 01 80 01 92 01 A3 01 C1 01 DD 02 0C 02 3C 02 3D - 39 01 00 00 00 00 11 B6 02 71 02 B0 02 D9 03 0D 03 30 03 58 03 64 03 72 - 39 01 00 00 00 00 0D B7 03 80 03 91 03 A6 03 BE 03 D4 03 D7 - 39 01 00 00 00 00 11 B8 01 23 01 27 01 2E 01 36 01 3D 01 44 01 4A 01 51 - 39 01 00 00 00 00 11 B9 01 57 01 6E 01 83 01 A8 01 C8 01 FE 02 30 02 32 - 39 01 00 00 00 00 11 BA 02 68 02 A8 02 D3 03 0B 03 34 03 6B 03 8A 03 A3 - 39 01 00 00 00 00 0D BB 03 A7 03 A9 03 AB 03 B7 03 D3 03 D7 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 51 FF - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 FF F0 - 39 01 00 00 00 00 02 5A 02 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 36 00 - 39 01 00 00 00 00 02 35 00 - 05 01 00 00 78 00 02 11 00 - 05 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-13 = [ - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 00 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 00 00 00 00 00 11 B0 00 0C 00 1D 00 3A 00 54 00 6B 00 80 00 93 00 A5 - 39 00 00 00 00 00 11 B1 00 B5 00 EC 01 17 01 5A 01 8C 01 D8 02 13 02 15 - 39 00 00 00 00 00 11 B2 02 50 02 93 02 BF 02 F5 03 16 03 45 03 52 03 61 - 39 00 00 00 00 00 0D B3 03 6D 03 84 03 9B 03 B7 03 D2 03 D7 - 39 00 00 00 00 00 11 B4 00 0C 00 1C 00 39 00 54 00 6A 00 80 00 92 00 A5 - 39 00 00 00 00 00 11 B5 00 B4 00 EA 01 16 01 57 01 89 01 D4 02 10 02 12 - 39 00 00 00 00 00 11 B6 02 4D 02 90 02 BC 02 F3 03 14 03 45 03 52 03 60 - 39 00 00 00 00 00 0D B7 03 6B 03 80 03 98 03 B4 03 D2 03 D7 - 39 00 00 00 00 00 11 B8 00 D7 00 DD 00 E9 00 F5 00 FF 01 0A 01 13 01 1D - 39 00 00 00 00 00 11 B9 01 25 01 44 01 60 01 8D 01 B3 01 F0 02 25 02 27 - 39 00 00 00 00 00 11 BA 02 5E 02 A0 02 CC 03 03 03 2D 03 6A 03 87 03 C9 - 39 00 00 00 00 00 0D BB 03 CB 03 CD 03 CF 03 D1 03 D4 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 00 00 00 00 00 11 B0 00 0C 00 1D 00 3A 00 54 00 6B 00 80 00 93 00 A5 - 39 00 00 00 00 00 11 B1 00 B5 00 EC 01 17 01 5A 01 8C 01 D8 02 13 02 15 - 39 00 00 00 00 00 11 B2 02 50 02 93 02 BF 02 F5 03 16 03 45 03 52 03 61 - 39 00 00 00 00 00 0D B3 03 6D 03 84 03 9B 03 B7 03 D2 03 D7 - 39 00 00 00 00 00 11 B4 00 0C 00 1C 00 39 00 54 00 6A 00 80 00 92 00 A5 - 39 00 00 00 00 00 11 B5 00 B4 00 EA 01 16 01 57 01 89 01 D4 02 10 02 12 - 39 00 00 00 00 00 11 B6 02 4D 02 90 02 BC 02 F3 03 14 03 45 03 52 03 60 - 39 00 00 00 00 00 0D B7 03 6B 03 80 03 98 03 B4 03 D2 03 D7 - 39 00 00 00 00 00 11 B8 00 D7 00 DD 00 E9 00 F5 00 FF 01 0A 01 13 01 1D - 39 00 00 00 00 00 11 B9 01 25 01 44 01 60 01 8D 01 B3 01 F0 02 25 02 27 - 39 00 00 00 00 00 11 BA 02 5E 02 A0 02 CC 03 03 03 2D 03 6A 03 87 03 C9 - 39 00 00 00 00 00 0D BB 03 CB 03 CD 03 CF 03 D1 03 D4 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 10 - ]; - qcom,mdss-dsi-on-command-13 = - [ - 39 01 00 00 00 00 02 FF 25 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 8D 04 - 39 01 00 00 00 00 02 FF 20 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 30 10 - 39 01 00 00 00 00 02 31 50 - 39 01 00 00 00 00 02 32 2F - 39 01 00 00 00 00 02 94 00 - 39 01 00 00 00 00 02 95 E1 - 39 01 00 00 00 00 02 96 E1 - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 01 00 00 00 00 11 B0 00 0C 00 1D 00 3A 00 54 00 6B 00 80 00 93 00 A5 - 39 01 00 00 00 00 11 B1 00 B5 00 EC 01 17 01 5A 01 8C 01 D8 02 13 02 15 - 39 01 00 00 00 00 11 B2 02 50 02 93 02 BF 02 F5 03 16 03 45 03 52 03 61 - 39 01 00 00 00 00 0D B3 03 6D 03 84 03 9B 03 B7 03 D2 03 D7 - 39 01 00 00 00 00 11 B4 00 0C 00 1C 00 39 00 54 00 6A 00 80 00 92 00 A5 - 39 01 00 00 00 00 11 B5 00 B4 00 EA 01 16 01 57 01 89 01 D4 02 10 02 12 - 39 01 00 00 00 00 11 B6 02 4D 02 90 02 BC 02 F3 03 14 03 45 03 52 03 60 - 39 01 00 00 00 00 0D B7 03 6B 03 80 03 98 03 B4 03 D2 03 D7 - 39 01 00 00 00 00 11 B8 00 D7 00 DD 00 E9 00 F5 00 FF 01 0A 01 13 01 1D - 39 01 00 00 00 00 11 B9 01 25 01 44 01 60 01 8D 01 B3 01 F0 02 25 02 27 - 39 01 00 00 00 00 11 BA 02 5E 02 A0 02 CC 03 03 03 2D 03 6A 03 87 03 C9 - 39 01 00 00 00 00 0D BB 03 CB 03 CD 03 CF 03 D1 03 D4 03 D7 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 11 B0 00 0C 00 1D 00 3A 00 54 00 6B 00 80 00 93 00 A5 - 39 01 00 00 00 00 11 B1 00 B5 00 EC 01 17 01 5A 01 8C 01 D8 02 13 02 15 - 39 01 00 00 00 00 11 B2 02 50 02 93 02 BF 02 F5 03 16 03 45 03 52 03 61 - 39 01 00 00 00 00 0D B3 03 6D 03 84 03 9B 03 B7 03 D2 03 D7 - 39 01 00 00 00 00 11 B4 00 0C 00 1C 00 39 00 54 00 6A 00 80 00 92 00 A5 - 39 01 00 00 00 00 11 B5 00 B4 00 EA 01 16 01 57 01 89 01 D4 02 10 02 12 - 39 01 00 00 00 00 11 B6 02 4D 02 90 02 BC 02 F3 03 14 03 45 03 52 03 60 - 39 01 00 00 00 00 0D B7 03 6B 03 80 03 98 03 B4 03 D2 03 D7 - 39 01 00 00 00 00 11 B8 00 D7 00 DD 00 E9 00 F5 00 FF 01 0A 01 13 01 1D - 39 01 00 00 00 00 11 B9 01 25 01 44 01 60 01 8D 01 B3 01 F0 02 25 02 27 - 39 01 00 00 00 00 11 BA 02 5E 02 A0 02 CC 03 03 03 2D 03 6A 03 87 03 C9 - 39 01 00 00 00 00 0D BB 03 CB 03 CD 03 CF 03 D1 03 D4 03 D7 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 51 FF - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 FF F0 - 39 01 00 00 00 00 02 5A 02 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 36 00 - 39 01 00 00 00 00 02 35 00 - 05 01 00 00 78 00 02 11 00 - 05 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-14 = [ - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 00 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 00 00 00 00 00 11 B0 00 0C 00 1D 00 3B 00 54 00 6B 00 7E 00 93 00 A3 - 39 00 00 00 00 00 11 B1 00 B5 00 EB 01 16 01 5A 01 8D 01 DA 02 15 02 16 - 39 00 00 00 00 00 11 B2 02 51 02 94 02 BF 02 F6 03 16 03 44 03 51 03 60 - 39 00 00 00 00 00 0D B3 03 71 03 86 03 9C 03 BC 03 D3 03 D7 - 39 00 00 00 00 00 11 B4 00 66 00 71 00 85 00 98 00 A9 00 B9 00 C8 00 D5 - 39 00 00 00 00 00 11 B5 00 E2 01 0E 01 32 01 6C 01 99 01 E0 02 19 02 1A - 39 00 00 00 00 00 11 B6 02 53 02 96 02 C1 02 F8 03 19 03 48 03 55 03 64 - 39 00 00 00 00 00 0D B7 03 74 03 89 03 9D 03 B7 03 D2 03 D7 - 39 00 00 00 00 00 11 B8 00 CC 00 D3 00 E0 00 EC 00 F7 01 01 01 0C 01 15 - 39 00 00 00 00 00 11 B9 01 1F 01 3F 01 5B 01 8B 01 B2 01 F1 02 26 02 27 - 39 00 00 00 00 00 11 BA 02 5E 02 A0 02 CB 03 04 03 2C 03 67 03 80 03 93 - 39 00 00 00 00 00 0D BB 03 97 03 9A 03 9C 03 B2 03 D0 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 00 00 00 00 00 11 B0 00 0C 00 1D 00 3B 00 54 00 6B 00 7E 00 93 00 A3 - 39 00 00 00 00 00 11 B1 00 B5 00 EB 01 16 01 5A 01 8D 01 DA 02 15 02 16 - 39 00 00 00 00 00 11 B2 02 51 02 94 02 BF 02 F6 03 16 03 44 03 51 03 60 - 39 00 00 00 00 00 0D B3 03 71 03 86 03 9C 03 BC 03 D3 03 D7 - 39 00 00 00 00 00 11 B4 00 66 00 71 00 85 00 98 00 A9 00 B9 00 C8 00 D5 - 39 00 00 00 00 00 11 B5 00 E2 01 0E 01 32 01 6C 01 99 01 E0 02 19 02 1A - 39 00 00 00 00 00 11 B6 02 53 02 96 02 C1 02 F8 03 19 03 48 03 55 03 64 - 39 00 00 00 00 00 0D B7 03 74 03 89 03 9D 03 B7 03 D2 03 D7 - 39 00 00 00 00 00 11 B8 00 CC 00 D3 00 E0 00 EC 00 F7 01 01 01 0C 01 15 - 39 00 00 00 00 00 11 B9 01 1F 01 3F 01 5B 01 8B 01 B2 01 F1 02 26 02 27 - 39 00 00 00 00 00 11 BA 02 5E 02 A0 02 CB 03 04 03 2C 03 67 03 80 03 93 - 39 00 00 00 00 00 0D BB 03 97 03 9A 03 9C 03 B2 03 D0 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 10 - ]; - qcom,mdss-dsi-on-command-14 = - [ - 39 01 00 00 00 00 02 FF 25 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 8D 04 - 39 01 00 00 00 00 02 FF 20 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 30 10 - 39 01 00 00 00 00 02 31 50 - 39 01 00 00 00 00 02 32 2F - 39 01 00 00 00 00 02 94 00 - 39 01 00 00 00 00 02 95 E1 - 39 01 00 00 00 00 02 96 E1 - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 01 00 00 00 00 11 B0 00 0C 00 1D 00 3B 00 54 00 6B 00 7E 00 93 00 A3 - 39 01 00 00 00 00 11 B1 00 B5 00 EB 01 16 01 5A 01 8D 01 DA 02 15 02 16 - 39 01 00 00 00 00 11 B2 02 51 02 94 02 BF 02 F6 03 16 03 44 03 51 03 60 - 39 01 00 00 00 00 0D B3 03 71 03 86 03 9C 03 BC 03 D3 03 D7 - 39 01 00 00 00 00 11 B4 00 66 00 71 00 85 00 98 00 A9 00 B9 00 C8 00 D5 - 39 01 00 00 00 00 11 B5 00 E2 01 0E 01 32 01 6C 01 99 01 E0 02 19 02 1A - 39 01 00 00 00 00 11 B6 02 53 02 96 02 C1 02 F8 03 19 03 48 03 55 03 64 - 39 01 00 00 00 00 0D B7 03 74 03 89 03 9D 03 B7 03 D2 03 D7 - 39 01 00 00 00 00 11 B8 00 CC 00 D3 00 E0 00 EC 00 F7 01 01 01 0C 01 15 - 39 01 00 00 00 00 11 B9 01 1F 01 3F 01 5B 01 8B 01 B2 01 F1 02 26 02 27 - 39 01 00 00 00 00 11 BA 02 5E 02 A0 02 CB 03 04 03 2C 03 67 03 80 03 93 - 39 01 00 00 00 00 0D BB 03 97 03 9A 03 9C 03 B2 03 D0 03 D7 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 11 B0 00 0C 00 1D 00 3B 00 54 00 6B 00 7E 00 93 00 A3 - 39 01 00 00 00 00 11 B1 00 B5 00 EB 01 16 01 5A 01 8D 01 DA 02 15 02 16 - 39 01 00 00 00 00 11 B2 02 51 02 94 02 BF 02 F6 03 16 03 44 03 51 03 60 - 39 01 00 00 00 00 0D B3 03 71 03 86 03 9C 03 BC 03 D3 03 D7 - 39 01 00 00 00 00 11 B4 00 66 00 71 00 85 00 98 00 A9 00 B9 00 C8 00 D5 - 39 01 00 00 00 00 11 B5 00 E2 01 0E 01 32 01 6C 01 99 01 E0 02 19 02 1A - 39 01 00 00 00 00 11 B6 02 53 02 96 02 C1 02 F8 03 19 03 48 03 55 03 64 - 39 01 00 00 00 00 0D B7 03 74 03 89 03 9D 03 B7 03 D2 03 D7 - 39 01 00 00 00 00 11 B8 00 CC 00 D3 00 E0 00 EC 00 F7 01 01 01 0C 01 15 - 39 01 00 00 00 00 11 B9 01 1F 01 3F 01 5B 01 8B 01 B2 01 F1 02 26 02 27 - 39 01 00 00 00 00 11 BA 02 5E 02 A0 02 CB 03 04 03 2C 03 67 03 80 03 93 - 39 01 00 00 00 00 0D BB 03 97 03 9A 03 9C 03 B2 03 D0 03 D7 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 51 FF - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 FF F0 - 39 01 00 00 00 00 02 5A 02 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 36 00 - 39 01 00 00 00 00 02 35 00 - 05 01 00 00 78 00 02 11 00 - 05 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-15 = [ - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 00 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 00 00 00 00 00 11 B0 00 0B 00 1C 00 36 00 4F 00 66 00 79 00 8C 00 9E - 39 00 00 00 00 00 11 B1 00 AD 00 E3 01 0E 01 52 01 83 01 D0 02 0B 02 0D - 39 00 00 00 00 00 11 B2 02 49 02 8E 02 BA 02 EF 03 0F 03 3F 03 4C 03 5E - 39 00 00 00 00 00 0D B3 03 6C 03 81 03 9A 03 B5 03 D2 03 D7 - 39 00 00 00 00 00 11 B4 00 F0 00 F5 00 FF 01 08 01 11 01 19 01 21 01 29 - 39 00 00 00 00 00 11 B5 01 31 01 4C 01 65 01 8F 01 B2 01 EE 02 21 02 23 - 39 00 00 00 00 00 11 B6 02 5A 02 9C 02 C7 02 FB 03 21 03 4D 03 5A 03 68 - 39 00 00 00 00 00 0D B7 03 77 03 89 03 9F 03 BA 03 D3 03 D7 - 39 00 00 00 00 00 11 B8 00 C6 00 CD 00 D9 00 E5 00 F0 00 FA 01 04 01 0E - 39 00 00 00 00 00 11 B9 01 16 01 36 01 52 01 82 01 A8 01 E7 02 1C 02 1E - 39 00 00 00 00 00 11 BA 02 56 02 9A 02 C6 02 FC 03 26 03 5C 03 72 03 99 - 39 00 00 00 00 00 0D BB 03 AD 03 B3 03 B5 03 BF 03 D4 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 00 00 00 00 00 11 B0 00 0B 00 1C 00 36 00 4F 00 66 00 79 00 8C 00 9E - 39 00 00 00 00 00 11 B1 00 AD 00 E3 01 0E 01 52 01 83 01 D0 02 0B 02 0D - 39 00 00 00 00 00 11 B2 02 49 02 8E 02 BA 02 EF 03 0F 03 3F 03 4C 03 5E - 39 00 00 00 00 00 0D B3 03 6C 03 81 03 9A 03 B5 03 D2 03 D7 - 39 00 00 00 00 00 11 B4 00 F0 00 F5 00 FF 01 08 01 11 01 19 01 21 01 29 - 39 00 00 00 00 00 11 B5 01 31 01 4C 01 65 01 8F 01 B2 01 EE 02 21 02 23 - 39 00 00 00 00 00 11 B6 02 5A 02 9C 02 C7 02 FB 03 21 03 4D 03 5A 03 68 - 39 00 00 00 00 00 0D B7 03 77 03 89 03 9F 03 BA 03 D3 03 D7 - 39 00 00 00 00 00 11 B8 00 C6 00 CD 00 D9 00 E5 00 F0 00 FA 01 04 01 0E - 39 00 00 00 00 00 11 B9 01 16 01 36 01 52 01 82 01 A8 01 E7 02 1C 02 1E - 39 00 00 00 00 00 11 BA 02 56 02 9A 02 C6 02 FC 03 26 03 5C 03 72 03 99 - 39 00 00 00 00 00 0D BB 03 AD 03 B3 03 B5 03 BF 03 D4 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 10 - ]; - qcom,mdss-dsi-on-command-15 = - [ - 39 01 00 00 00 00 02 FF 25 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 8D 04 - 39 01 00 00 00 00 02 FF 20 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 30 10 - 39 01 00 00 00 00 02 31 50 - 39 01 00 00 00 00 02 32 2F - 39 01 00 00 00 00 02 94 00 - 39 01 00 00 00 00 02 95 E1 - 39 01 00 00 00 00 02 96 E1 - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 01 00 00 00 00 11 B0 00 0B 00 1C 00 36 00 4F 00 66 00 79 00 8C 00 9E - 39 01 00 00 00 00 11 B1 00 AD 00 E3 01 0E 01 52 01 83 01 D0 02 0B 02 0D - 39 01 00 00 00 00 11 B2 02 49 02 8E 02 BA 02 EF 03 0F 03 3F 03 4C 03 5E - 39 01 00 00 00 00 0D B3 03 6C 03 81 03 9A 03 B5 03 D2 03 D7 - 39 01 00 00 00 00 11 B4 00 F0 00 F5 00 FF 01 08 01 11 01 19 01 21 01 29 - 39 01 00 00 00 00 11 B5 01 31 01 4C 01 65 01 8F 01 B2 01 EE 02 21 02 23 - 39 01 00 00 00 00 11 B6 02 5A 02 9C 02 C7 02 FB 03 21 03 4D 03 5A 03 68 - 39 01 00 00 00 00 0D B7 03 77 03 89 03 9F 03 BA 03 D3 03 D7 - 39 01 00 00 00 00 11 B8 00 C6 00 CD 00 D9 00 E5 00 F0 00 FA 01 04 01 0E - 39 01 00 00 00 00 11 B9 01 16 01 36 01 52 01 82 01 A8 01 E7 02 1C 02 1E - 39 01 00 00 00 00 11 BA 02 56 02 9A 02 C6 02 FC 03 26 03 5C 03 72 03 99 - 39 01 00 00 00 00 0D BB 03 AD 03 B3 03 B5 03 BF 03 D4 03 D7 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 11 B0 00 0B 00 1C 00 36 00 4F 00 66 00 79 00 8C 00 9E - 39 01 00 00 00 00 11 B1 00 AD 00 E3 01 0E 01 52 01 83 01 D0 02 0B 02 0D - 39 01 00 00 00 00 11 B2 02 49 02 8E 02 BA 02 EF 03 0F 03 3F 03 4C 03 5E - 39 01 00 00 00 00 0D B3 03 6C 03 81 03 9A 03 B5 03 D2 03 D7 - 39 01 00 00 00 00 11 B4 00 F0 00 F5 00 FF 01 08 01 11 01 19 01 21 01 29 - 39 01 00 00 00 00 11 B5 01 31 01 4C 01 65 01 8F 01 B2 01 EE 02 21 02 23 - 39 01 00 00 00 00 11 B6 02 5A 02 9C 02 C7 02 FB 03 21 03 4D 03 5A 03 68 - 39 01 00 00 00 00 0D B7 03 77 03 89 03 9F 03 BA 03 D3 03 D7 - 39 01 00 00 00 00 11 B8 00 C6 00 CD 00 D9 00 E5 00 F0 00 FA 01 04 01 0E - 39 01 00 00 00 00 11 B9 01 16 01 36 01 52 01 82 01 A8 01 E7 02 1C 02 1E - 39 01 00 00 00 00 11 BA 02 56 02 9A 02 C6 02 FC 03 26 03 5C 03 72 03 99 - 39 01 00 00 00 00 0D BB 03 AD 03 B3 03 B5 03 BF 03 D4 03 D7 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 51 FF - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 FF F0 - 39 01 00 00 00 00 02 5A 02 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 36 00 - 39 01 00 00 00 00 02 35 00 - 05 01 00 00 78 00 02 11 00 - 05 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-16 = [ - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 00 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 00 00 00 00 00 11 B0 00 09 00 1B 00 39 00 53 00 68 00 7D 00 90 00 A1 - 39 00 00 00 00 00 11 B1 00 B3 00 E9 01 15 01 55 01 88 01 D5 02 10 02 13 - 39 00 00 00 00 00 11 B2 02 4F 02 93 02 BE 02 F5 03 15 03 40 03 50 03 60 - 39 00 00 00 00 00 0D B3 03 73 03 87 03 9E 03 BA 03 D3 03 D7 - 39 00 00 00 00 00 11 B4 01 1B 01 1F 01 27 01 2F 01 36 01 3D 01 44 01 4A - 39 00 00 00 00 00 11 B5 01 51 01 69 01 7E 01 A4 01 C4 01 FA 02 2D 02 2F - 39 00 00 00 00 00 11 B6 02 65 02 A6 02 D0 03 05 03 28 03 52 03 5E 03 6C - 39 00 00 00 00 00 0D B7 03 7B 03 8D 03 A1 03 BB 03 D3 03 D7 - 39 00 00 00 00 00 11 B8 00 C5 00 CC 00 D9 00 E5 00 F0 00 FB 01 05 01 0F - 39 00 00 00 00 00 11 B9 01 19 01 3A 01 57 01 85 01 AC 01 EC 02 21 02 23 - 39 00 00 00 00 00 11 BA 02 5C 02 9F 02 CA 03 03 03 2A 03 61 03 7A 03 8D - 39 00 00 00 00 00 0D BB 03 91 03 93 03 9B 03 B2 03 D1 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 00 00 00 00 00 11 B0 00 09 00 1B 00 39 00 53 00 68 00 7D 00 90 00 A1 - 39 00 00 00 00 00 11 B1 00 B3 00 E9 01 15 01 55 01 88 01 D5 02 10 02 13 - 39 00 00 00 00 00 11 B2 02 4F 02 93 02 BE 02 F5 03 15 03 40 03 50 03 60 - 39 00 00 00 00 00 0D B3 03 73 03 87 03 9E 03 BA 03 D3 03 D7 - 39 00 00 00 00 00 11 B4 01 1B 01 1F 01 27 01 2F 01 36 01 3D 01 44 01 4A - 39 00 00 00 00 00 11 B5 01 51 01 69 01 7E 01 A4 01 C4 01 FA 02 2D 02 2F - 39 00 00 00 00 00 11 B6 02 65 02 A6 02 D0 03 05 03 28 03 52 03 5E 03 6C - 39 00 00 00 00 00 0D B7 03 7B 03 8D 03 A1 03 BB 03 D3 03 D7 - 39 00 00 00 00 00 11 B8 00 C5 00 CC 00 D9 00 E5 00 F0 00 FB 01 05 01 0F - 39 00 00 00 00 00 11 B9 01 19 01 3A 01 57 01 85 01 AC 01 EC 02 21 02 23 - 39 00 00 00 00 00 11 BA 02 5C 02 9F 02 CA 03 03 03 2A 03 61 03 7A 03 8D - 39 00 00 00 00 00 0D BB 03 91 03 93 03 9B 03 B2 03 D1 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 10 - ]; - qcom,mdss-dsi-on-command-16 = - [ - 39 01 00 00 00 00 02 FF 25 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 8D 04 - 39 01 00 00 00 00 02 FF 20 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 30 10 - 39 01 00 00 00 00 02 31 50 - 39 01 00 00 00 00 02 32 2F - 39 01 00 00 00 00 02 94 00 - 39 01 00 00 00 00 02 95 E1 - 39 01 00 00 00 00 02 96 E1 - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 01 00 00 00 00 11 B0 00 09 00 1B 00 39 00 53 00 68 00 7D 00 90 00 A1 - 39 01 00 00 00 00 11 B1 00 B3 00 E9 01 15 01 55 01 88 01 D5 02 10 02 13 - 39 01 00 00 00 00 11 B2 02 4F 02 93 02 BE 02 F5 03 15 03 40 03 50 03 60 - 39 01 00 00 00 00 0D B3 03 73 03 87 03 9E 03 BA 03 D3 03 D7 - 39 01 00 00 00 00 11 B4 01 1B 01 1F 01 27 01 2F 01 36 01 3D 01 44 01 4A - 39 01 00 00 00 00 11 B5 01 51 01 69 01 7E 01 A4 01 C4 01 FA 02 2D 02 2F - 39 01 00 00 00 00 11 B6 02 65 02 A6 02 D0 03 05 03 28 03 52 03 5E 03 6C - 39 01 00 00 00 00 0D B7 03 7B 03 8D 03 A1 03 BB 03 D3 03 D7 - 39 01 00 00 00 00 11 B8 00 C5 00 CC 00 D9 00 E5 00 F0 00 FB 01 05 01 0F - 39 01 00 00 00 00 11 B9 01 19 01 3A 01 57 01 85 01 AC 01 EC 02 21 02 23 - 39 01 00 00 00 00 11 BA 02 5C 02 9F 02 CA 03 03 03 2A 03 61 03 7A 03 8D - 39 01 00 00 00 00 0D BB 03 91 03 93 03 9B 03 B2 03 D1 03 D7 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 11 B0 00 09 00 1B 00 39 00 53 00 68 00 7D 00 90 00 A1 - 39 01 00 00 00 00 11 B1 00 B3 00 E9 01 15 01 55 01 88 01 D5 02 10 02 13 - 39 01 00 00 00 00 11 B2 02 4F 02 93 02 BE 02 F5 03 15 03 40 03 50 03 60 - 39 01 00 00 00 00 0D B3 03 73 03 87 03 9E 03 BA 03 D3 03 D7 - 39 01 00 00 00 00 11 B4 01 1B 01 1F 01 27 01 2F 01 36 01 3D 01 44 01 4A - 39 01 00 00 00 00 11 B5 01 51 01 69 01 7E 01 A4 01 C4 01 FA 02 2D 02 2F - 39 01 00 00 00 00 11 B6 02 65 02 A6 02 D0 03 05 03 28 03 52 03 5E 03 6C - 39 01 00 00 00 00 0D B7 03 7B 03 8D 03 A1 03 BB 03 D3 03 D7 - 39 01 00 00 00 00 11 B8 00 C5 00 CC 00 D9 00 E5 00 F0 00 FB 01 05 01 0F - 39 01 00 00 00 00 11 B9 01 19 01 3A 01 57 01 85 01 AC 01 EC 02 21 02 23 - 39 01 00 00 00 00 11 BA 02 5C 02 9F 02 CA 03 03 03 2A 03 61 03 7A 03 8D - 39 01 00 00 00 00 0D BB 03 91 03 93 03 9B 03 B2 03 D1 03 D7 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 51 FF - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 FF F0 - 39 01 00 00 00 00 02 5A 02 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 36 00 - 39 01 00 00 00 00 02 35 00 - 05 01 00 00 78 00 02 11 00 - 05 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-17 = [ - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 00 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 00 00 00 00 00 11 B0 01 14 01 18 01 20 01 27 01 2F 01 36 01 3D 01 43 - 39 00 00 00 00 00 11 B1 01 4A 01 62 01 78 01 9E 01 BF 01 F5 02 29 02 2B - 39 00 00 00 00 00 11 B2 02 61 02 A3 02 CE 03 01 03 27 03 54 03 5E 03 6B - 39 00 00 00 00 00 0D B3 03 7A 03 8B 03 A0 03 B9 03 D3 03 D7 - 39 00 00 00 00 00 11 B4 00 09 00 19 00 35 00 4D 00 63 00 77 00 89 00 99 - 39 00 00 00 00 00 11 B5 00 AB 00 E0 01 09 01 4A 01 7C 01 CA 02 06 02 08 - 39 00 00 00 00 00 11 B6 02 45 02 8A 02 B6 02 EE 03 10 03 42 03 4F 03 5E - 39 00 00 00 00 00 0D B7 03 6E 03 81 03 97 03 B2 03 D1 03 D7 - 39 00 00 00 00 00 11 B8 00 DB 00 E1 00 EC 00 F6 01 00 01 09 01 12 01 1A - 39 00 00 00 00 00 11 B9 01 23 01 41 01 5A 01 86 01 AB 01 E9 02 1E 02 20 - 39 00 00 00 00 00 11 BA 02 58 02 9C 02 C8 02 FF 03 2A 03 65 03 79 03 89 - 39 00 00 00 00 00 0D BB 03 8B 03 8F 03 A4 03 BC 03 D2 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 00 00 00 00 00 11 B0 01 14 01 18 01 20 01 27 01 2F 01 36 01 3D 01 43 - 39 00 00 00 00 00 11 B1 01 4A 01 62 01 78 01 9E 01 BF 01 F5 02 29 02 2B - 39 00 00 00 00 00 11 B2 02 61 02 A3 02 CE 03 01 03 27 03 54 03 5E 03 6B - 39 00 00 00 00 00 0D B3 03 7A 03 8B 03 A0 03 B9 03 D3 03 D7 - 39 00 00 00 00 00 11 B4 00 09 00 19 00 35 00 4D 00 63 00 77 00 89 00 99 - 39 00 00 00 00 00 11 B5 00 AB 00 E0 01 09 01 4A 01 7C 01 CA 02 06 02 08 - 39 00 00 00 00 00 11 B6 02 45 02 8A 02 B6 02 EE 03 10 03 42 03 4F 03 5E - 39 00 00 00 00 00 0D B7 03 6E 03 81 03 97 03 B2 03 D1 03 D7 - 39 00 00 00 00 00 11 B8 00 DB 00 E1 00 EC 00 F6 01 00 01 09 01 12 01 1A - 39 00 00 00 00 00 11 B9 01 23 01 41 01 5A 01 86 01 AB 01 E9 02 1E 02 20 - 39 00 00 00 00 00 11 BA 02 58 02 9C 02 C8 02 FF 03 2A 03 65 03 79 03 89 - 39 00 00 00 00 00 0D BB 03 8B 03 8F 03 A4 03 BC 03 D2 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 10 - ]; - qcom,mdss-dsi-on-command-17 = - [ - 39 01 00 00 00 00 02 FF 25 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 8D 04 - 39 01 00 00 00 00 02 FF 20 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 30 10 - 39 01 00 00 00 00 02 31 50 - 39 01 00 00 00 00 02 32 2F - 39 01 00 00 00 00 02 94 00 - 39 01 00 00 00 00 02 95 E1 - 39 01 00 00 00 00 02 96 E1 - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 01 00 00 00 00 11 B0 01 14 01 18 01 20 01 27 01 2F 01 36 01 3D 01 43 - 39 01 00 00 00 00 11 B1 01 4A 01 62 01 78 01 9E 01 BF 01 F5 02 29 02 2B - 39 01 00 00 00 00 11 B2 02 61 02 A3 02 CE 03 01 03 27 03 54 03 5E 03 6B - 39 01 00 00 00 00 0D B3 03 7A 03 8B 03 A0 03 B9 03 D3 03 D7 - 39 01 00 00 00 00 11 B4 00 09 00 19 00 35 00 4D 00 63 00 77 00 89 00 99 - 39 01 00 00 00 00 11 B5 00 AB 00 E0 01 09 01 4A 01 7C 01 CA 02 06 02 08 - 39 01 00 00 00 00 11 B6 02 45 02 8A 02 B6 02 EE 03 10 03 42 03 4F 03 5E - 39 01 00 00 00 00 0D B7 03 6E 03 81 03 97 03 B2 03 D1 03 D7 - 39 01 00 00 00 00 11 B8 00 DB 00 E1 00 EC 00 F6 01 00 01 09 01 12 01 1A - 39 01 00 00 00 00 11 B9 01 23 01 41 01 5A 01 86 01 AB 01 E9 02 1E 02 20 - 39 01 00 00 00 00 11 BA 02 58 02 9C 02 C8 02 FF 03 2A 03 65 03 79 03 89 - 39 01 00 00 00 00 0D BB 03 8B 03 8F 03 A4 03 BC 03 D2 03 D7 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 11 B0 01 14 01 18 01 20 01 27 01 2F 01 36 01 3D 01 43 - 39 01 00 00 00 00 11 B1 01 4A 01 62 01 78 01 9E 01 BF 01 F5 02 29 02 2B - 39 01 00 00 00 00 11 B2 02 61 02 A3 02 CE 03 01 03 27 03 54 03 5E 03 6B - 39 01 00 00 00 00 0D B3 03 7A 03 8B 03 A0 03 B9 03 D3 03 D7 - 39 01 00 00 00 00 11 B4 00 09 00 19 00 35 00 4D 00 63 00 77 00 89 00 99 - 39 01 00 00 00 00 11 B5 00 AB 00 E0 01 09 01 4A 01 7C 01 CA 02 06 02 08 - 39 01 00 00 00 00 11 B6 02 45 02 8A 02 B6 02 EE 03 10 03 42 03 4F 03 5E - 39 01 00 00 00 00 0D B7 03 6E 03 81 03 97 03 B2 03 D1 03 D7 - 39 01 00 00 00 00 11 B8 00 DB 00 E1 00 EC 00 F6 01 00 01 09 01 12 01 1A - 39 01 00 00 00 00 11 B9 01 23 01 41 01 5A 01 86 01 AB 01 E9 02 1E 02 20 - 39 01 00 00 00 00 11 BA 02 58 02 9C 02 C8 02 FF 03 2A 03 65 03 79 03 89 - 39 01 00 00 00 00 0D BB 03 8B 03 8F 03 A4 03 BC 03 D2 03 D7 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 51 FF - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 FF F0 - 39 01 00 00 00 00 02 5A 02 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 36 00 - 39 01 00 00 00 00 02 35 00 - 05 01 00 00 78 00 02 11 00 - 05 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-18 = [ - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 00 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 00 00 00 00 00 11 B0 00 DC 00 E2 00 EC 00 F7 01 00 01 0A 01 12 01 1B - 39 00 00 00 00 00 11 B1 01 23 01 41 01 5B 01 87 01 AD 01 EA 02 20 02 22 - 39 00 00 00 00 00 11 B2 02 59 02 9B 02 C7 02 FC 03 21 03 4D 03 59 03 67 - 39 00 00 00 00 00 0D B3 03 77 03 8A 03 A0 03 BB 03 D3 03 D7 - 39 00 00 00 00 00 11 B4 00 09 00 18 00 35 00 4C 00 61 00 77 00 8A 00 9B - 39 00 00 00 00 00 11 B5 00 A9 00 E1 01 09 01 4B 01 80 01 CA 02 07 02 0A - 39 00 00 00 00 00 11 B6 02 45 02 8A 02 B7 02 EE 03 10 03 42 03 4F 03 5E - 39 00 00 00 00 00 0D B7 03 6E 03 81 03 98 03 B4 03 D2 03 D7 - 39 00 00 00 00 00 11 B8 00 84 00 8D 00 9F 00 AE 00 BC 00 CB 00 D8 00 E4 - 39 00 00 00 00 00 11 B9 00 EE 01 17 01 36 01 6C 01 99 01 DB 02 14 02 17 - 39 00 00 00 00 00 11 BA 02 50 02 94 02 C1 02 F9 03 22 03 5A 03 6E 03 89 - 39 00 00 00 00 00 0D BB 03 A6 03 AE 03 B0 03 B9 03 D3 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 00 00 00 00 00 11 B0 00 DC 00 E2 00 EC 00 F7 01 00 01 0A 01 12 01 1B - 39 00 00 00 00 00 11 B1 01 23 01 41 01 5B 01 87 01 AD 01 EA 02 20 02 22 - 39 00 00 00 00 00 11 B2 02 59 02 9B 02 C7 02 FC 03 21 03 4D 03 59 03 67 - 39 00 00 00 00 00 0D B3 03 77 03 8A 03 A0 03 BB 03 D3 03 D7 - 39 00 00 00 00 00 11 B4 00 09 00 18 00 35 00 4C 00 61 00 77 00 8A 00 9B - 39 00 00 00 00 00 11 B5 00 A9 00 E1 01 09 01 4B 01 80 01 CA 02 07 02 0A - 39 00 00 00 00 00 11 B6 02 45 02 8A 02 B7 02 EE 03 10 03 42 03 4F 03 5E - 39 00 00 00 00 00 0D B7 03 6E 03 81 03 98 03 B4 03 D2 03 D7 - 39 00 00 00 00 00 11 B8 00 84 00 8D 00 9F 00 AE 00 BC 00 CB 00 D8 00 E4 - 39 00 00 00 00 00 11 B9 00 EE 01 17 01 36 01 6C 01 99 01 DB 02 14 02 17 - 39 00 00 00 00 00 11 BA 02 50 02 94 02 C1 02 F9 03 22 03 5A 03 6E 03 89 - 39 00 00 00 00 00 0D BB 03 A6 03 AE 03 B0 03 B9 03 D3 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 10 - ]; - qcom,mdss-dsi-on-command-18 = - [ - 39 01 00 00 00 00 02 FF 25 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 8D 04 - 39 01 00 00 00 00 02 FF 20 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 30 10 - 39 01 00 00 00 00 02 31 50 - 39 01 00 00 00 00 02 32 2F - 39 01 00 00 00 00 02 94 00 - 39 01 00 00 00 00 02 95 E1 - 39 01 00 00 00 00 02 96 E1 - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 01 00 00 00 00 11 B0 00 DC 00 E2 00 EC 00 F7 01 00 01 0A 01 12 01 1B - 39 01 00 00 00 00 11 B1 01 23 01 41 01 5B 01 87 01 AD 01 EA 02 20 02 22 - 39 01 00 00 00 00 11 B2 02 59 02 9B 02 C7 02 FC 03 21 03 4D 03 59 03 67 - 39 01 00 00 00 00 0D B3 03 77 03 8A 03 A0 03 BB 03 D3 03 D7 - 39 01 00 00 00 00 11 B4 00 09 00 18 00 35 00 4C 00 61 00 77 00 8A 00 9B - 39 01 00 00 00 00 11 B5 00 A9 00 E1 01 09 01 4B 01 80 01 CA 02 07 02 0A - 39 01 00 00 00 00 11 B6 02 45 02 8A 02 B7 02 EE 03 10 03 42 03 4F 03 5E - 39 01 00 00 00 00 0D B7 03 6E 03 81 03 98 03 B4 03 D2 03 D7 - 39 01 00 00 00 00 11 B8 00 84 00 8D 00 9F 00 AE 00 BC 00 CB 00 D8 00 E4 - 39 01 00 00 00 00 11 B9 00 EE 01 17 01 36 01 6C 01 99 01 DB 02 14 02 17 - 39 01 00 00 00 00 11 BA 02 50 02 94 02 C1 02 F9 03 22 03 5A 03 6E 03 89 - 39 01 00 00 00 00 0D BB 03 A6 03 AE 03 B0 03 B9 03 D3 03 D7 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 11 B0 00 DC 00 E2 00 EC 00 F7 01 00 01 0A 01 12 01 1B - 39 01 00 00 00 00 11 B1 01 23 01 41 01 5B 01 87 01 AD 01 EA 02 20 02 22 - 39 01 00 00 00 00 11 B2 02 59 02 9B 02 C7 02 FC 03 21 03 4D 03 59 03 67 - 39 01 00 00 00 00 0D B3 03 77 03 8A 03 A0 03 BB 03 D3 03 D7 - 39 01 00 00 00 00 11 B4 00 09 00 18 00 35 00 4C 00 61 00 77 00 8A 00 9B - 39 01 00 00 00 00 11 B5 00 A9 00 E1 01 09 01 4B 01 80 01 CA 02 07 02 0A - 39 01 00 00 00 00 11 B6 02 45 02 8A 02 B7 02 EE 03 10 03 42 03 4F 03 5E - 39 01 00 00 00 00 0D B7 03 6E 03 81 03 98 03 B4 03 D2 03 D7 - 39 01 00 00 00 00 11 B8 00 84 00 8D 00 9F 00 AE 00 BC 00 CB 00 D8 00 E4 - 39 01 00 00 00 00 11 B9 00 EE 01 17 01 36 01 6C 01 99 01 DB 02 14 02 17 - 39 01 00 00 00 00 11 BA 02 50 02 94 02 C1 02 F9 03 22 03 5A 03 6E 03 89 - 39 01 00 00 00 00 0D BB 03 A6 03 AE 03 B0 03 B9 03 D3 03 D7 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 51 FF - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 FF F0 - 39 01 00 00 00 00 02 5A 02 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 36 00 - 39 01 00 00 00 00 02 35 00 - 05 01 00 00 78 00 02 11 00 - 05 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-19 = [ - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 00 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 00 00 00 00 00 11 B0 00 55 00 60 00 74 00 87 00 99 00 A9 00 B8 00 C7 - 39 00 00 00 00 00 11 B1 00 D4 01 03 01 29 01 64 01 93 01 DC 02 16 02 18 - 39 00 00 00 00 00 11 B2 02 53 02 96 02 C2 02 F8 03 1A 03 49 03 54 03 65 - 39 00 00 00 00 00 0D B3 03 74 03 85 03 9A 03 B4 03 D1 03 D7 - 39 00 00 00 00 00 11 B4 00 67 00 71 00 84 00 96 00 A7 00 B6 00 C4 00 D2 - 39 00 00 00 00 00 11 B5 00 DE 01 0A 01 2E 01 67 01 94 01 DB 02 15 02 17 - 39 00 00 00 00 00 11 B6 02 51 02 94 02 C0 02 F7 03 19 03 49 03 55 03 64 - 39 00 00 00 00 00 0D B7 03 73 03 85 03 9B 03 B5 03 D1 03 D7 - 39 00 00 00 00 00 11 B8 00 0B 00 1E 00 3C 00 55 00 6B 00 80 00 93 00 A4 - 39 00 00 00 00 00 11 B9 00 B4 00 EB 01 16 01 58 01 8A 01 D6 02 12 02 14 - 39 00 00 00 00 00 11 BA 02 4F 02 93 02 C0 02 FA 03 21 03 5B 03 6D 03 8D - 39 00 00 00 00 00 0D BB 03 A1 03 A3 03 A5 03 B9 03 D3 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 00 00 00 00 00 11 B0 00 55 00 60 00 74 00 87 00 99 00 A9 00 B8 00 C7 - 39 00 00 00 00 00 11 B1 00 D4 01 03 01 29 01 64 01 93 01 DC 02 16 02 18 - 39 00 00 00 00 00 11 B2 02 53 02 96 02 C2 02 F8 03 1A 03 49 03 54 03 65 - 39 00 00 00 00 00 0D B3 03 74 03 85 03 9A 03 B4 03 D1 03 D7 - 39 00 00 00 00 00 11 B4 00 67 00 71 00 84 00 96 00 A7 00 B6 00 C4 00 D2 - 39 00 00 00 00 00 11 B5 00 DE 01 0A 01 2E 01 67 01 94 01 DB 02 15 02 17 - 39 00 00 00 00 00 11 B6 02 51 02 94 02 C0 02 F7 03 19 03 49 03 55 03 64 - 39 00 00 00 00 00 0D B7 03 73 03 85 03 9B 03 B5 03 D1 03 D7 - 39 00 00 00 00 00 11 B8 00 0B 00 1E 00 3C 00 55 00 6B 00 80 00 93 00 A4 - 39 00 00 00 00 00 11 B9 00 B4 00 EB 01 16 01 58 01 8A 01 D6 02 12 02 14 - 39 00 00 00 00 00 11 BA 02 4F 02 93 02 C0 02 FA 03 21 03 5B 03 6D 03 8D - 39 00 00 00 00 00 0D BB 03 A1 03 A3 03 A5 03 B9 03 D3 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 10 - ]; - qcom,mdss-dsi-on-command-19 = - [ - 39 01 00 00 00 00 02 FF 25 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 8D 04 - 39 01 00 00 00 00 02 FF 20 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 30 10 - 39 01 00 00 00 00 02 31 50 - 39 01 00 00 00 00 02 32 2F - 39 01 00 00 00 00 02 94 00 - 39 01 00 00 00 00 02 95 E1 - 39 01 00 00 00 00 02 96 E1 - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 01 00 00 00 00 11 B0 00 55 00 60 00 74 00 87 00 99 00 A9 00 B8 00 C7 - 39 01 00 00 00 00 11 B1 00 D4 01 03 01 29 01 64 01 93 01 DC 02 16 02 18 - 39 01 00 00 00 00 11 B2 02 53 02 96 02 C2 02 F8 03 1A 03 49 03 54 03 65 - 39 01 00 00 00 00 0D B3 03 74 03 85 03 9A 03 B4 03 D1 03 D7 - 39 01 00 00 00 00 11 B4 00 67 00 71 00 84 00 96 00 A7 00 B6 00 C4 00 D2 - 39 01 00 00 00 00 11 B5 00 DE 01 0A 01 2E 01 67 01 94 01 DB 02 15 02 17 - 39 01 00 00 00 00 11 B6 02 51 02 94 02 C0 02 F7 03 19 03 49 03 55 03 64 - 39 01 00 00 00 00 0D B7 03 73 03 85 03 9B 03 B5 03 D1 03 D7 - 39 01 00 00 00 00 11 B8 00 0B 00 1E 00 3C 00 55 00 6B 00 80 00 93 00 A4 - 39 01 00 00 00 00 11 B9 00 B4 00 EB 01 16 01 58 01 8A 01 D6 02 12 02 14 - 39 01 00 00 00 00 11 BA 02 4F 02 93 02 C0 02 FA 03 21 03 5B 03 6D 03 8D - 39 01 00 00 00 00 0D BB 03 A1 03 A3 03 A5 03 B9 03 D3 03 D7 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 11 B0 00 55 00 60 00 74 00 87 00 99 00 A9 00 B8 00 C7 - 39 01 00 00 00 00 11 B1 00 D4 01 03 01 29 01 64 01 93 01 DC 02 16 02 18 - 39 01 00 00 00 00 11 B2 02 53 02 96 02 C2 02 F8 03 1A 03 49 03 54 03 65 - 39 01 00 00 00 00 0D B3 03 74 03 85 03 9A 03 B4 03 D1 03 D7 - 39 01 00 00 00 00 11 B4 00 67 00 71 00 84 00 96 00 A7 00 B6 00 C4 00 D2 - 39 01 00 00 00 00 11 B5 00 DE 01 0A 01 2E 01 67 01 94 01 DB 02 15 02 17 - 39 01 00 00 00 00 11 B6 02 51 02 94 02 C0 02 F7 03 19 03 49 03 55 03 64 - 39 01 00 00 00 00 0D B7 03 73 03 85 03 9B 03 B5 03 D1 03 D7 - 39 01 00 00 00 00 11 B8 00 0B 00 1E 00 3C 00 55 00 6B 00 80 00 93 00 A4 - 39 01 00 00 00 00 11 B9 00 B4 00 EB 01 16 01 58 01 8A 01 D6 02 12 02 14 - 39 01 00 00 00 00 11 BA 02 4F 02 93 02 C0 02 FA 03 21 03 5B 03 6D 03 8D - 39 01 00 00 00 00 0D BB 03 A1 03 A3 03 A5 03 B9 03 D3 03 D7 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 51 FF - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 FF F0 - 39 01 00 00 00 00 02 5A 02 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 36 00 - 39 01 00 00 00 00 02 35 00 - 05 01 00 00 78 00 02 11 00 - 05 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-20 = [ - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 00 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 00 00 00 00 00 11 B0 00 A9 00 B1 00 BF 00 CC 00 D9 00 E5 00 F0 00 FB - 39 00 00 00 00 00 11 B1 01 05 01 29 01 48 01 7B 01 A5 01 E8 02 1F 02 20 - 39 00 00 00 00 00 11 B2 02 59 02 9B 02 C7 02 FC 03 20 03 4B 03 57 03 68 - 39 00 00 00 00 00 0D B3 03 77 03 8A 03 A0 03 BB 03 D3 03 D7 - 39 00 00 00 00 00 11 B4 00 B1 00 B8 00 C6 00 D3 00 DF 00 EA 00 F5 00 FF - 39 00 00 00 00 00 11 B5 01 09 01 2B 01 4A 01 7B 01 A5 01 E6 02 1C 02 1E - 39 00 00 00 00 00 11 B6 02 56 02 99 02 C4 02 FA 03 1D 03 4B 03 58 03 66 - 39 00 00 00 00 00 0D B7 03 75 03 87 03 9D 03 B8 03 D2 03 D7 - 39 00 00 00 00 00 11 B8 00 09 00 1A 00 39 00 53 00 6B 00 81 00 94 00 A6 - 39 00 00 00 00 00 11 B9 00 B6 00 EC 01 17 01 58 01 8C 01 D8 02 12 02 14 - 39 00 00 00 00 00 11 BA 02 4F 02 93 02 C0 02 F9 03 21 03 58 03 6B 03 88 - 39 00 00 00 00 00 0D BB 03 9B 03 A4 03 AA 03 B8 03 D1 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 00 00 00 00 00 11 B0 00 A9 00 B1 00 BF 00 CC 00 D9 00 E5 00 F0 00 FB - 39 00 00 00 00 00 11 B1 01 05 01 29 01 48 01 7B 01 A5 01 E8 02 1F 02 20 - 39 00 00 00 00 00 11 B2 02 59 02 9B 02 C7 02 FC 03 20 03 4B 03 57 03 68 - 39 00 00 00 00 00 0D B3 03 77 03 8A 03 A0 03 BB 03 D3 03 D7 - 39 00 00 00 00 00 11 B4 00 B1 00 B8 00 C6 00 D3 00 DF 00 EA 00 F5 00 FF - 39 00 00 00 00 00 11 B5 01 09 01 2B 01 4A 01 7B 01 A5 01 E6 02 1C 02 1E - 39 00 00 00 00 00 11 B6 02 56 02 99 02 C4 02 FA 03 1D 03 4B 03 58 03 66 - 39 00 00 00 00 00 0D B7 03 75 03 87 03 9D 03 B8 03 D2 03 D7 - 39 00 00 00 00 00 11 B8 00 09 00 1A 00 39 00 53 00 6B 00 81 00 94 00 A6 - 39 00 00 00 00 00 11 B9 00 B6 00 EC 01 17 01 58 01 8C 01 D8 02 12 02 14 - 39 00 00 00 00 00 11 BA 02 4F 02 93 02 C0 02 F9 03 21 03 58 03 6B 03 88 - 39 00 00 00 00 00 0D BB 03 9B 03 A4 03 AA 03 B8 03 D1 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 10 - ]; - qcom,mdss-dsi-on-command-20 = - [ - 39 01 00 00 00 00 02 FF 25 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 8D 04 - 39 01 00 00 00 00 02 FF 20 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 30 10 - 39 01 00 00 00 00 02 31 50 - 39 01 00 00 00 00 02 32 2F - 39 01 00 00 00 00 02 94 00 - 39 01 00 00 00 00 02 95 E1 - 39 01 00 00 00 00 02 96 E1 - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 01 00 00 00 00 11 B0 00 A9 00 B1 00 BF 00 CC 00 D9 00 E5 00 F0 00 FB - 39 01 00 00 00 00 11 B1 01 05 01 29 01 48 01 7B 01 A5 01 E8 02 1F 02 20 - 39 01 00 00 00 00 11 B2 02 59 02 9B 02 C7 02 FC 03 20 03 4B 03 57 03 68 - 39 01 00 00 00 00 0D B3 03 77 03 8A 03 A0 03 BB 03 D3 03 D7 - 39 01 00 00 00 00 11 B4 00 B1 00 B8 00 C6 00 D3 00 DF 00 EA 00 F5 00 FF - 39 01 00 00 00 00 11 B5 01 09 01 2B 01 4A 01 7B 01 A5 01 E6 02 1C 02 1E - 39 01 00 00 00 00 11 B6 02 56 02 99 02 C4 02 FA 03 1D 03 4B 03 58 03 66 - 39 01 00 00 00 00 0D B7 03 75 03 87 03 9D 03 B8 03 D2 03 D7 - 39 01 00 00 00 00 11 B8 00 09 00 1A 00 39 00 53 00 6B 00 81 00 94 00 A6 - 39 01 00 00 00 00 11 B9 00 B6 00 EC 01 17 01 58 01 8C 01 D8 02 12 02 14 - 39 01 00 00 00 00 11 BA 02 4F 02 93 02 C0 02 F9 03 21 03 58 03 6B 03 88 - 39 01 00 00 00 00 0D BB 03 9B 03 A4 03 AA 03 B8 03 D1 03 D7 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 11 B0 00 A9 00 B1 00 BF 00 CC 00 D9 00 E5 00 F0 00 FB - 39 01 00 00 00 00 11 B1 01 05 01 29 01 48 01 7B 01 A5 01 E8 02 1F 02 20 - 39 01 00 00 00 00 11 B2 02 59 02 9B 02 C7 02 FC 03 20 03 4B 03 57 03 68 - 39 01 00 00 00 00 0D B3 03 77 03 8A 03 A0 03 BB 03 D3 03 D7 - 39 01 00 00 00 00 11 B4 00 B1 00 B8 00 C6 00 D3 00 DF 00 EA 00 F5 00 FF - 39 01 00 00 00 00 11 B5 01 09 01 2B 01 4A 01 7B 01 A5 01 E6 02 1C 02 1E - 39 01 00 00 00 00 11 B6 02 56 02 99 02 C4 02 FA 03 1D 03 4B 03 58 03 66 - 39 01 00 00 00 00 0D B7 03 75 03 87 03 9D 03 B8 03 D2 03 D7 - 39 01 00 00 00 00 11 B8 00 09 00 1A 00 39 00 53 00 6B 00 81 00 94 00 A6 - 39 01 00 00 00 00 11 B9 00 B6 00 EC 01 17 01 58 01 8C 01 D8 02 12 02 14 - 39 01 00 00 00 00 11 BA 02 4F 02 93 02 C0 02 F9 03 21 03 58 03 6B 03 88 - 39 01 00 00 00 00 0D BB 03 9B 03 A4 03 AA 03 B8 03 D1 03 D7 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 51 FF - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 FF F0 - 39 01 00 00 00 00 02 5A 02 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 36 00 - 39 01 00 00 00 00 02 35 00 - 05 01 00 00 78 00 02 11 00 - 05 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-21 = [ - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 00 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 00 00 00 00 00 11 B0 01 57 01 5A 01 5F 01 64 01 6A 01 6F 01 74 01 78 - 39 00 00 00 00 00 11 B1 01 7D 01 8F 01 A0 01 BE 01 D9 02 09 02 39 02 3A - 39 00 00 00 00 00 11 B2 02 6E 02 AF 02 D9 03 0A 03 2F 03 5E 03 6B 03 74 - 39 00 00 00 00 00 0D B3 03 80 03 90 03 A4 03 BC 03 D3 03 D7 - 39 00 00 00 00 00 11 B4 00 09 00 19 00 33 00 4C 00 63 00 77 00 8A 00 9A - 39 00 00 00 00 00 11 B5 00 AA 00 DF 01 0A 01 4A 01 7D 01 CA 02 07 02 08 - 39 00 00 00 00 00 11 B6 02 44 02 8A 02 B7 02 EE 03 0E 03 42 03 4F 03 5E - 39 00 00 00 00 00 0D B7 03 6B 03 7F 03 97 03 B2 03 D1 03 D7 - 39 00 00 00 00 00 11 B8 00 E0 00 E6 00 F0 00 FA 01 04 01 0D 01 16 01 1E - 39 00 00 00 00 00 11 B9 01 26 01 43 01 5D 01 88 01 AD 01 EA 02 1F 02 20 - 39 00 00 00 00 00 11 BA 02 58 02 9C 02 C9 02 FF 03 28 03 66 03 7E 03 AC - 39 00 00 00 00 00 0D BB 03 C7 03 CA 03 CC 03 CE 03 D3 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 00 00 00 00 00 11 B0 01 57 01 5A 01 5F 01 64 01 6A 01 6F 01 74 01 78 - 39 00 00 00 00 00 11 B1 01 7D 01 8F 01 A0 01 BE 01 D9 02 09 02 39 02 3A - 39 00 00 00 00 00 11 B2 02 6E 02 AF 02 D9 03 0A 03 2F 03 5E 03 6B 03 74 - 39 00 00 00 00 00 0D B3 03 80 03 90 03 A4 03 BC 03 D3 03 D7 - 39 00 00 00 00 00 11 B4 00 09 00 19 00 33 00 4C 00 63 00 77 00 8A 00 9A - 39 00 00 00 00 00 11 B5 00 AA 00 DF 01 0A 01 4A 01 7D 01 CA 02 07 02 08 - 39 00 00 00 00 00 11 B6 02 44 02 8A 02 B7 02 EE 03 0E 03 42 03 4F 03 5E - 39 00 00 00 00 00 0D B7 03 6B 03 7F 03 97 03 B2 03 D1 03 D7 - 39 00 00 00 00 00 11 B8 00 E0 00 E6 00 F0 00 FA 01 04 01 0D 01 16 01 1E - 39 00 00 00 00 00 11 B9 01 26 01 43 01 5D 01 88 01 AD 01 EA 02 1F 02 20 - 39 00 00 00 00 00 11 BA 02 58 02 9C 02 C9 02 FF 03 28 03 66 03 7E 03 AC - 39 00 00 00 00 00 0D BB 03 C7 03 CA 03 CC 03 CE 03 D3 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 10 - ]; - qcom,mdss-dsi-on-command-21 = - [ - 39 01 00 00 00 00 02 FF 25 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 8D 04 - 39 01 00 00 00 00 02 FF 20 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 30 10 - 39 01 00 00 00 00 02 31 50 - 39 01 00 00 00 00 02 32 2F - 39 01 00 00 00 00 02 94 00 - 39 01 00 00 00 00 02 95 E1 - 39 01 00 00 00 00 02 96 E1 - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 01 00 00 00 00 11 B0 01 57 01 5A 01 5F 01 64 01 6A 01 6F 01 74 01 78 - 39 01 00 00 00 00 11 B1 01 7D 01 8F 01 A0 01 BE 01 D9 02 09 02 39 02 3A - 39 01 00 00 00 00 11 B2 02 6E 02 AF 02 D9 03 0A 03 2F 03 5E 03 6B 03 74 - 39 01 00 00 00 00 0D B3 03 80 03 90 03 A4 03 BC 03 D3 03 D7 - 39 01 00 00 00 00 11 B4 00 09 00 19 00 33 00 4C 00 63 00 77 00 8A 00 9A - 39 01 00 00 00 00 11 B5 00 AA 00 DF 01 0A 01 4A 01 7D 01 CA 02 07 02 08 - 39 01 00 00 00 00 11 B6 02 44 02 8A 02 B7 02 EE 03 0E 03 42 03 4F 03 5E - 39 01 00 00 00 00 0D B7 03 6B 03 7F 03 97 03 B2 03 D1 03 D7 - 39 01 00 00 00 00 11 B8 00 E0 00 E6 00 F0 00 FA 01 04 01 0D 01 16 01 1E - 39 01 00 00 00 00 11 B9 01 26 01 43 01 5D 01 88 01 AD 01 EA 02 1F 02 20 - 39 01 00 00 00 00 11 BA 02 58 02 9C 02 C9 02 FF 03 28 03 66 03 7E 03 AC - 39 01 00 00 00 00 0D BB 03 C7 03 CA 03 CC 03 CE 03 D3 03 D7 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 11 B0 01 57 01 5A 01 5F 01 64 01 6A 01 6F 01 74 01 78 - 39 01 00 00 00 00 11 B1 01 7D 01 8F 01 A0 01 BE 01 D9 02 09 02 39 02 3A - 39 01 00 00 00 00 11 B2 02 6E 02 AF 02 D9 03 0A 03 2F 03 5E 03 6B 03 74 - 39 01 00 00 00 00 0D B3 03 80 03 90 03 A4 03 BC 03 D3 03 D7 - 39 01 00 00 00 00 11 B4 00 09 00 19 00 33 00 4C 00 63 00 77 00 8A 00 9A - 39 01 00 00 00 00 11 B5 00 AA 00 DF 01 0A 01 4A 01 7D 01 CA 02 07 02 08 - 39 01 00 00 00 00 11 B6 02 44 02 8A 02 B7 02 EE 03 0E 03 42 03 4F 03 5E - 39 01 00 00 00 00 0D B7 03 6B 03 7F 03 97 03 B2 03 D1 03 D7 - 39 01 00 00 00 00 11 B8 00 E0 00 E6 00 F0 00 FA 01 04 01 0D 01 16 01 1E - 39 01 00 00 00 00 11 B9 01 26 01 43 01 5D 01 88 01 AD 01 EA 02 1F 02 20 - 39 01 00 00 00 00 11 BA 02 58 02 9C 02 C9 02 FF 03 28 03 66 03 7E 03 AC - 39 01 00 00 00 00 0D BB 03 C7 03 CA 03 CC 03 CE 03 D3 03 D7 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 51 FF - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 FF F0 - 39 01 00 00 00 00 02 5A 02 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 36 00 - 39 01 00 00 00 00 02 35 00 - 05 01 00 00 78 00 02 11 00 - 05 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-22 = [ - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 00 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 00 00 00 00 00 11 B0 01 3E 01 41 01 48 01 4E 01 54 01 5A 01 60 01 66 - 39 00 00 00 00 00 11 B1 01 6B 01 80 01 93 01 B4 01 D2 02 05 02 36 02 38 - 39 00 00 00 00 00 11 B2 02 6C 02 AC 02 D6 03 06 03 2C 03 58 03 65 03 6F - 39 00 00 00 00 00 0D B3 03 7E 03 8F 03 A3 03 BB 03 D3 03 D7 - 39 00 00 00 00 00 11 B4 00 09 00 19 00 37 00 4F 00 65 00 7A 00 8C 00 9F - 39 00 00 00 00 00 11 B5 00 AF 00 E5 01 0F 01 51 01 84 01 D0 02 0C 02 10 - 39 00 00 00 00 00 11 B6 02 4A 02 8D 02 BA 02 F0 03 10 03 43 03 51 03 5F - 39 00 00 00 00 00 0D B7 03 6F 03 82 03 98 03 B3 03 D1 03 D7 - 39 00 00 00 00 00 11 B8 00 8F 00 97 00 A9 00 B8 00 C6 00 D4 00 E0 00 ED - 39 00 00 00 00 00 11 B9 00 F8 01 1F 01 3F 01 74 01 9F 01 E2 02 1A 02 1D - 39 00 00 00 00 00 11 BA 02 55 02 98 02 C5 02 FB 03 25 03 60 03 79 03 9D - 39 00 00 00 00 00 0D BB 03 CC 03 CE 03 D0 03 D2 03 D4 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 00 00 00 00 00 11 B0 01 3E 01 41 01 48 01 4E 01 54 01 5A 01 60 01 66 - 39 00 00 00 00 00 11 B1 01 6B 01 80 01 93 01 B4 01 D2 02 05 02 36 02 38 - 39 00 00 00 00 00 11 B2 02 6C 02 AC 02 D6 03 06 03 2C 03 58 03 65 03 6F - 39 00 00 00 00 00 0D B3 03 7E 03 8F 03 A3 03 BB 03 D3 03 D7 - 39 00 00 00 00 00 11 B4 00 09 00 19 00 37 00 4F 00 65 00 7A 00 8C 00 9F - 39 00 00 00 00 00 11 B5 00 AF 00 E5 01 0F 01 51 01 84 01 D0 02 0C 02 10 - 39 00 00 00 00 00 11 B6 02 4A 02 8D 02 BA 02 F0 03 10 03 43 03 51 03 5F - 39 00 00 00 00 00 0D B7 03 6F 03 82 03 98 03 B3 03 D1 03 D7 - 39 00 00 00 00 00 11 B8 00 8F 00 97 00 A9 00 B8 00 C6 00 D4 00 E0 00 ED - 39 00 00 00 00 00 11 B9 00 F8 01 1F 01 3F 01 74 01 9F 01 E2 02 1A 02 1D - 39 00 00 00 00 00 11 BA 02 55 02 98 02 C5 02 FB 03 25 03 60 03 79 03 9D - 39 00 00 00 00 00 0D BB 03 CC 03 CE 03 D0 03 D2 03 D4 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 10 - ]; - qcom,mdss-dsi-on-command-22 = - [ - 39 01 00 00 00 00 02 FF 25 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 8D 04 - 39 01 00 00 00 00 02 FF 20 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 30 10 - 39 01 00 00 00 00 02 31 50 - 39 01 00 00 00 00 02 32 2F - 39 01 00 00 00 00 02 94 00 - 39 01 00 00 00 00 02 95 E1 - 39 01 00 00 00 00 02 96 E1 - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 01 00 00 00 00 11 B0 01 3E 01 41 01 48 01 4E 01 54 01 5A 01 60 01 66 - 39 01 00 00 00 00 11 B1 01 6B 01 80 01 93 01 B4 01 D2 02 05 02 36 02 38 - 39 01 00 00 00 00 11 B2 02 6C 02 AC 02 D6 03 06 03 2C 03 58 03 65 03 6F - 39 01 00 00 00 00 0D B3 03 7E 03 8F 03 A3 03 BB 03 D3 03 D7 - 39 01 00 00 00 00 11 B4 00 09 00 19 00 37 00 4F 00 65 00 7A 00 8C 00 9F - 39 01 00 00 00 00 11 B5 00 AF 00 E5 01 0F 01 51 01 84 01 D0 02 0C 02 10 - 39 01 00 00 00 00 11 B6 02 4A 02 8D 02 BA 02 F0 03 10 03 43 03 51 03 5F - 39 01 00 00 00 00 0D B7 03 6F 03 82 03 98 03 B3 03 D1 03 D7 - 39 01 00 00 00 00 11 B8 00 8F 00 97 00 A9 00 B8 00 C6 00 D4 00 E0 00 ED - 39 01 00 00 00 00 11 B9 00 F8 01 1F 01 3F 01 74 01 9F 01 E2 02 1A 02 1D - 39 01 00 00 00 00 11 BA 02 55 02 98 02 C5 02 FB 03 25 03 60 03 79 03 9D - 39 01 00 00 00 00 0D BB 03 CC 03 CE 03 D0 03 D2 03 D4 03 D7 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 11 B0 01 3E 01 41 01 48 01 4E 01 54 01 5A 01 60 01 66 - 39 01 00 00 00 00 11 B1 01 6B 01 80 01 93 01 B4 01 D2 02 05 02 36 02 38 - 39 01 00 00 00 00 11 B2 02 6C 02 AC 02 D6 03 06 03 2C 03 58 03 65 03 6F - 39 01 00 00 00 00 0D B3 03 7E 03 8F 03 A3 03 BB 03 D3 03 D7 - 39 01 00 00 00 00 11 B4 00 09 00 19 00 37 00 4F 00 65 00 7A 00 8C 00 9F - 39 01 00 00 00 00 11 B5 00 AF 00 E5 01 0F 01 51 01 84 01 D0 02 0C 02 10 - 39 01 00 00 00 00 11 B6 02 4A 02 8D 02 BA 02 F0 03 10 03 43 03 51 03 5F - 39 01 00 00 00 00 0D B7 03 6F 03 82 03 98 03 B3 03 D1 03 D7 - 39 01 00 00 00 00 11 B8 00 8F 00 97 00 A9 00 B8 00 C6 00 D4 00 E0 00 ED - 39 01 00 00 00 00 11 B9 00 F8 01 1F 01 3F 01 74 01 9F 01 E2 02 1A 02 1D - 39 01 00 00 00 00 11 BA 02 55 02 98 02 C5 02 FB 03 25 03 60 03 79 03 9D - 39 01 00 00 00 00 0D BB 03 CC 03 CE 03 D0 03 D2 03 D4 03 D7 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 51 FF - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 FF F0 - 39 01 00 00 00 00 02 5A 02 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 36 00 - 39 01 00 00 00 00 02 35 00 - 05 01 00 00 78 00 02 11 00 - 05 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-23 = [ - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 00 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 00 00 00 00 00 11 B0 00 FD 01 02 01 0B 01 14 01 1D 01 25 01 2D 01 35 - 39 00 00 00 00 00 11 B1 01 3C 01 57 01 6F 01 98 01 BB 01 F5 02 2A 02 2C - 39 00 00 00 00 00 11 B2 02 63 02 A4 02 CF 03 03 03 27 03 52 03 5E 03 6C - 39 00 00 00 00 00 0D B3 03 7B 03 8B 03 9F 03 B7 03 D2 03 D7 - 39 00 00 00 00 00 11 B4 00 65 00 6F 00 83 00 95 00 A5 00 B5 00 C3 00 D0 - 39 00 00 00 00 00 11 B5 00 DD 01 09 01 2D 01 67 01 94 01 DB 02 15 02 17 - 39 00 00 00 00 00 11 B6 02 51 02 94 02 C0 02 F7 03 19 03 48 03 55 03 63 - 39 00 00 00 00 00 0D B7 03 73 03 85 03 9A 03 B5 03 D1 03 D7 - 39 00 00 00 00 00 11 B8 00 0B 00 1E 00 3C 00 55 00 6B 00 80 00 93 00 A4 - 39 00 00 00 00 00 11 B9 00 B4 00 EB 01 16 01 59 01 8A 01 D6 02 12 02 14 - 39 00 00 00 00 00 11 BA 02 4F 02 93 02 C0 02 FA 03 21 03 59 03 6D 03 84 - 39 00 00 00 00 00 0D BB 03 99 03 9E 03 A0 03 B9 03 D3 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 00 00 00 00 00 11 B0 00 FD 01 02 01 0B 01 14 01 1D 01 25 01 2D 01 35 - 39 00 00 00 00 00 11 B1 01 3C 01 57 01 6F 01 98 01 BB 01 F5 02 2A 02 2C - 39 00 00 00 00 00 11 B2 02 63 02 A4 02 CF 03 03 03 27 03 52 03 5E 03 6C - 39 00 00 00 00 00 0D B3 03 7B 03 8B 03 9F 03 B7 03 D2 03 D7 - 39 00 00 00 00 00 11 B4 00 65 00 6F 00 83 00 95 00 A5 00 B5 00 C3 00 D0 - 39 00 00 00 00 00 11 B5 00 DD 01 09 01 2D 01 67 01 94 01 DB 02 15 02 17 - 39 00 00 00 00 00 11 B6 02 51 02 94 02 C0 02 F7 03 19 03 48 03 55 03 63 - 39 00 00 00 00 00 0D B7 03 73 03 85 03 9A 03 B5 03 D1 03 D7 - 39 00 00 00 00 00 11 B8 00 0B 00 1E 00 3C 00 55 00 6B 00 80 00 93 00 A4 - 39 00 00 00 00 00 11 B9 00 B4 00 EB 01 16 01 59 01 8A 01 D6 02 12 02 14 - 39 00 00 00 00 00 11 BA 02 4F 02 93 02 C0 02 FA 03 21 03 59 03 6D 03 84 - 39 00 00 00 00 00 0D BB 03 99 03 9E 03 A0 03 B9 03 D3 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 10 - ]; - qcom,mdss-dsi-on-command-23 = - [ - 39 01 00 00 00 00 02 FF 25 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 8D 04 - 39 01 00 00 00 00 02 FF 20 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 30 10 - 39 01 00 00 00 00 02 31 50 - 39 01 00 00 00 00 02 32 2F - 39 01 00 00 00 00 02 94 00 - 39 01 00 00 00 00 02 95 E1 - 39 01 00 00 00 00 02 96 E1 - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 01 00 00 00 00 11 B0 00 FD 01 02 01 0B 01 14 01 1D 01 25 01 2D 01 35 - 39 01 00 00 00 00 11 B1 01 3C 01 57 01 6F 01 98 01 BB 01 F5 02 2A 02 2C - 39 01 00 00 00 00 11 B2 02 63 02 A4 02 CF 03 03 03 27 03 52 03 5E 03 6C - 39 01 00 00 00 00 0D B3 03 7B 03 8B 03 9F 03 B7 03 D2 03 D7 - 39 01 00 00 00 00 11 B4 00 65 00 6F 00 83 00 95 00 A5 00 B5 00 C3 00 D0 - 39 01 00 00 00 00 11 B5 00 DD 01 09 01 2D 01 67 01 94 01 DB 02 15 02 17 - 39 01 00 00 00 00 11 B6 02 51 02 94 02 C0 02 F7 03 19 03 48 03 55 03 63 - 39 01 00 00 00 00 0D B7 03 73 03 85 03 9A 03 B5 03 D1 03 D7 - 39 01 00 00 00 00 11 B8 00 0B 00 1E 00 3C 00 55 00 6B 00 80 00 93 00 A4 - 39 01 00 00 00 00 11 B9 00 B4 00 EB 01 16 01 59 01 8A 01 D6 02 12 02 14 - 39 01 00 00 00 00 11 BA 02 4F 02 93 02 C0 02 FA 03 21 03 59 03 6D 03 84 - 39 01 00 00 00 00 0D BB 03 99 03 9E 03 A0 03 B9 03 D3 03 D7 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 11 B0 00 FD 01 02 01 0B 01 14 01 1D 01 25 01 2D 01 35 - 39 01 00 00 00 00 11 B1 01 3C 01 57 01 6F 01 98 01 BB 01 F5 02 2A 02 2C - 39 01 00 00 00 00 11 B2 02 63 02 A4 02 CF 03 03 03 27 03 52 03 5E 03 6C - 39 01 00 00 00 00 0D B3 03 7B 03 8B 03 9F 03 B7 03 D2 03 D7 - 39 01 00 00 00 00 11 B4 00 65 00 6F 00 83 00 95 00 A5 00 B5 00 C3 00 D0 - 39 01 00 00 00 00 11 B5 00 DD 01 09 01 2D 01 67 01 94 01 DB 02 15 02 17 - 39 01 00 00 00 00 11 B6 02 51 02 94 02 C0 02 F7 03 19 03 48 03 55 03 63 - 39 01 00 00 00 00 0D B7 03 73 03 85 03 9A 03 B5 03 D1 03 D7 - 39 01 00 00 00 00 11 B8 00 0B 00 1E 00 3C 00 55 00 6B 00 80 00 93 00 A4 - 39 01 00 00 00 00 11 B9 00 B4 00 EB 01 16 01 59 01 8A 01 D6 02 12 02 14 - 39 01 00 00 00 00 11 BA 02 4F 02 93 02 C0 02 FA 03 21 03 59 03 6D 03 84 - 39 01 00 00 00 00 0D BB 03 99 03 9E 03 A0 03 B9 03 D3 03 D7 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 51 FF - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 FF F0 - 39 01 00 00 00 00 02 5A 02 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 36 00 - 39 01 00 00 00 00 02 35 00 - 05 01 00 00 78 00 02 11 00 - 05 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-24 = [ - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 00 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 00 00 00 00 00 11 B0 01 06 01 0B 01 14 01 1C 01 25 01 2D 01 34 01 3C - 39 00 00 00 00 00 11 B1 01 43 01 5D 01 74 01 9C 01 BE 01 F8 02 2C 02 2E - 39 00 00 00 00 00 11 B2 02 64 02 A5 02 CF 03 02 03 28 03 51 03 5E 03 6C - 39 00 00 00 00 00 0D B3 03 7B 03 8D 03 A2 03 BB 03 D3 03 D7 - 39 00 00 00 00 00 11 B4 00 C2 00 C9 00 D6 00 E2 00 ED 00 F8 01 02 01 0C - 39 00 00 00 00 00 11 B5 01 15 01 36 01 53 01 82 01 A8 01 E9 02 20 02 21 - 39 00 00 00 00 00 11 B6 02 59 02 9B 02 C6 02 FA 03 21 03 4C 03 59 03 67 - 39 00 00 00 00 00 0D B7 03 77 03 89 03 9F 03 BA 03 D3 03 D7 - 39 00 00 00 00 00 11 B8 00 0B 00 1D 00 3C 00 55 00 6C 00 81 00 94 00 A6 - 39 00 00 00 00 00 11 B9 00 B7 00 EE 01 1A 01 5B 01 8B 01 D7 02 14 02 15 - 39 00 00 00 00 00 11 BA 02 50 02 94 02 C0 02 F8 03 22 03 58 03 6C 03 84 - 39 00 00 00 00 00 0D BB 03 98 03 9E 03 A0 03 B7 03 D1 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 00 00 00 00 00 11 B0 01 06 01 0B 01 14 01 1C 01 25 01 2D 01 34 01 3C - 39 00 00 00 00 00 11 B1 01 43 01 5D 01 74 01 9C 01 BE 01 F8 02 2C 02 2E - 39 00 00 00 00 00 11 B2 02 64 02 A5 02 CF 03 02 03 28 03 51 03 5E 03 6C - 39 00 00 00 00 00 0D B3 03 7B 03 8D 03 A2 03 BB 03 D3 03 D7 - 39 00 00 00 00 00 11 B4 00 C2 00 C9 00 D6 00 E2 00 ED 00 F8 01 02 01 0C - 39 00 00 00 00 00 11 B5 01 15 01 36 01 53 01 82 01 A8 01 E9 02 20 02 21 - 39 00 00 00 00 00 11 B6 02 59 02 9B 02 C6 02 FA 03 21 03 4C 03 59 03 67 - 39 00 00 00 00 00 0D B7 03 77 03 89 03 9F 03 BA 03 D3 03 D7 - 39 00 00 00 00 00 11 B8 00 0B 00 1D 00 3C 00 55 00 6C 00 81 00 94 00 A6 - 39 00 00 00 00 00 11 B9 00 B7 00 EE 01 1A 01 5B 01 8B 01 D7 02 14 02 15 - 39 00 00 00 00 00 11 BA 02 50 02 94 02 C0 02 F8 03 22 03 58 03 6C 03 84 - 39 00 00 00 00 00 0D BB 03 98 03 9E 03 A0 03 B7 03 D1 03 D7 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 10 - ]; - qcom,mdss-dsi-on-command-24 = - [ - 39 01 00 00 00 00 02 FF 25 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 8D 04 - 39 01 00 00 00 00 02 FF 20 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 30 10 - 39 01 00 00 00 00 02 31 50 - 39 01 00 00 00 00 02 32 2F - 39 01 00 00 00 00 02 94 00 - 39 01 00 00 00 00 02 95 E1 - 39 01 00 00 00 00 02 96 E1 - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 01 00 00 00 00 11 B0 01 06 01 0B 01 14 01 1C 01 25 01 2D 01 34 01 3C - 39 01 00 00 00 00 11 B1 01 43 01 5D 01 74 01 9C 01 BE 01 F8 02 2C 02 2E - 39 01 00 00 00 00 11 B2 02 64 02 A5 02 CF 03 02 03 28 03 51 03 5E 03 6C - 39 01 00 00 00 00 0D B3 03 7B 03 8D 03 A2 03 BB 03 D3 03 D7 - 39 01 00 00 00 00 11 B4 00 C2 00 C9 00 D6 00 E2 00 ED 00 F8 01 02 01 0C - 39 01 00 00 00 00 11 B5 01 15 01 36 01 53 01 82 01 A8 01 E9 02 20 02 21 - 39 01 00 00 00 00 11 B6 02 59 02 9B 02 C6 02 FA 03 21 03 4C 03 59 03 67 - 39 01 00 00 00 00 0D B7 03 77 03 89 03 9F 03 BA 03 D3 03 D7 - 39 01 00 00 00 00 11 B8 00 0B 00 1D 00 3C 00 55 00 6C 00 81 00 94 00 A6 - 39 01 00 00 00 00 11 B9 00 B7 00 EE 01 1A 01 5B 01 8B 01 D7 02 14 02 15 - 39 01 00 00 00 00 11 BA 02 50 02 94 02 C0 02 F8 03 22 03 58 03 6C 03 84 - 39 01 00 00 00 00 0D BB 03 98 03 9E 03 A0 03 B7 03 D1 03 D7 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 11 B0 01 06 01 0B 01 14 01 1C 01 25 01 2D 01 34 01 3C - 39 01 00 00 00 00 11 B1 01 43 01 5D 01 74 01 9C 01 BE 01 F8 02 2C 02 2E - 39 01 00 00 00 00 11 B2 02 64 02 A5 02 CF 03 02 03 28 03 51 03 5E 03 6C - 39 01 00 00 00 00 0D B3 03 7B 03 8D 03 A2 03 BB 03 D3 03 D7 - 39 01 00 00 00 00 11 B4 00 C2 00 C9 00 D6 00 E2 00 ED 00 F8 01 02 01 0C - 39 01 00 00 00 00 11 B5 01 15 01 36 01 53 01 82 01 A8 01 E9 02 20 02 21 - 39 01 00 00 00 00 11 B6 02 59 02 9B 02 C6 02 FA 03 21 03 4C 03 59 03 67 - 39 01 00 00 00 00 0D B7 03 77 03 89 03 9F 03 BA 03 D3 03 D7 - 39 01 00 00 00 00 11 B8 00 0B 00 1D 00 3C 00 55 00 6C 00 81 00 94 00 A6 - 39 01 00 00 00 00 11 B9 00 B7 00 EE 01 1A 01 5B 01 8B 01 D7 02 14 02 15 - 39 01 00 00 00 00 11 BA 02 50 02 94 02 C0 02 F8 03 22 03 58 03 6C 03 84 - 39 01 00 00 00 00 0D BB 03 98 03 9E 03 A0 03 B7 03 D1 03 D7 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 51 FF - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 FF F0 - 39 01 00 00 00 00 02 5A 02 - 39 01 00 00 00 00 02 FF 10 - 39 01 00 00 00 00 02 36 00 - 39 01 00 00 00 00 02 35 00 - 05 01 00 00 78 00 02 11 00 - 05 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-dsi-off-command = - [ - 39 01 00 00 00 00 02 FF 10 - 05 01 00 00 14 00 02 28 00 - 05 01 00 00 78 00 02 10 00 - ]; - qcom,mdss-dsi-CABC_on-command = [ - 23 01 00 00 00 00 02 FF 23 - 23 00 00 00 00 00 02 07 20 - 23 00 00 00 00 00 02 08 05 - 23 00 00 00 00 00 02 09 00 - 23 00 00 00 00 00 02 10 95 - 23 00 00 00 00 00 02 30 FF - 23 00 00 00 00 00 02 31 FF - 23 00 00 00 00 00 02 32 FF - 23 00 00 00 00 00 02 33 FF - 23 00 00 00 00 00 02 34 FF - 23 00 00 00 00 00 02 35 FF - 23 00 00 00 00 00 02 36 FF - 23 00 00 00 00 00 02 37 FF - 23 00 00 00 00 00 02 38 FF - 23 00 00 00 00 00 02 39 FF - 23 00 00 00 00 00 02 3A FF - 23 00 00 00 00 00 02 3B F9 - 23 00 00 00 00 00 02 3D D9 - 23 00 00 00 00 00 02 3F B9 - 23 00 00 00 00 00 02 40 AB - 23 00 00 00 00 00 02 41 98 - 23 01 00 00 00 00 02 FB 01 - 23 01 00 00 00 00 02 FF 10 - 23 00 00 00 00 00 02 55 81 - 23 00 00 00 00 00 02 53 2C - 23 01 00 00 00 00 02 FB 01 - - ]; - qcom,mdss-dsi-CABC_off-command = [ - 23 01 00 00 00 00 02 FF 10 - 23 00 00 00 00 00 02 53 24 - 23 00 00 00 00 00 02 55 80 - 23 01 00 00 00 00 02 FB 01 - ]; - qcom,mdss-dsi-CE_on-command = [ - - 23 01 00 00 00 00 02 FF 22 - 23 00 00 00 00 00 02 00 54 - 23 00 00 00 00 00 02 01 54 - 23 00 00 00 00 00 02 02 54 - 23 00 00 00 00 00 02 03 54 - 23 00 00 00 00 00 02 04 54 - 23 00 00 00 00 00 02 05 54 - 23 00 00 00 00 00 02 06 54 - 23 00 00 00 00 00 02 07 54 - 23 00 00 00 00 00 02 08 54 - 23 00 00 00 00 00 02 09 54 - 23 00 00 00 00 00 02 0A 54 - 23 00 00 00 00 00 02 0B 54 - 23 00 00 00 00 00 02 0C 54 - 23 00 00 00 00 00 02 0D 54 - 23 00 00 00 00 00 02 0E 54 - 23 00 00 00 00 00 02 0F 54 - 23 00 00 00 00 00 02 10 54 - 23 00 00 00 00 00 02 11 50 - 23 00 00 00 00 00 02 12 60 - 23 00 00 00 00 00 02 13 70 - 23 00 00 00 00 00 02 14 58 - 23 00 00 00 00 00 02 15 68 - 23 00 00 00 00 00 02 16 78 - 23 00 00 00 00 00 02 17 00 - 23 00 00 00 00 00 02 18 40 - 23 00 00 00 00 00 02 19 40 - 23 00 00 00 00 00 02 1A 40 - 23 00 00 00 00 00 02 1B 40 - 23 00 00 00 00 00 02 1C 40 - 23 00 00 00 00 00 02 1D 40 - 23 00 00 00 00 00 02 1E 40 - 23 00 00 00 00 00 02 1F 40 - 23 00 00 00 00 00 02 20 40 - 23 00 00 00 00 00 02 21 3D - 23 00 00 00 00 00 02 22 39 - 23 00 00 00 00 00 02 23 36 - 23 00 00 00 00 00 02 24 32 - 23 00 00 00 00 00 02 25 32 - 23 00 00 00 00 00 02 26 31 - 23 00 00 00 00 00 02 27 2F - 23 00 00 00 00 00 02 28 2D - 23 00 00 00 00 00 02 2D 00 - 23 00 00 00 00 00 02 2F 40 - 23 00 00 00 00 00 02 30 40 - 23 00 00 00 00 00 02 31 40 - 23 00 00 00 00 00 02 32 40 - 23 00 00 00 00 00 02 33 40 - 23 00 00 00 00 00 02 34 40 - 23 00 00 00 00 00 02 35 40 - 23 00 00 00 00 00 02 36 40 - 23 00 00 00 00 00 02 37 40 - 23 00 00 00 00 00 02 38 3E - 23 00 00 00 00 00 02 39 3B - 23 00 00 00 00 00 02 3A 39 - 23 00 00 00 00 00 02 3B 36 - 23 00 00 00 00 00 02 3D 36 - 23 00 00 00 00 00 02 3F 36 - 23 00 00 00 00 00 02 40 36 - 23 00 00 00 00 00 02 41 36 - 23 00 00 00 00 00 02 42 40 - 23 00 00 00 00 00 02 43 40 - 23 00 00 00 00 00 02 44 40 - 23 00 00 00 00 00 02 45 40 - 23 00 00 00 00 00 02 46 40 - 23 00 00 00 00 00 02 47 46 - 23 00 00 00 00 00 02 48 4C - 23 00 00 00 00 00 02 49 50 - 23 00 00 00 00 00 02 4A 52 - 23 00 00 00 00 00 02 4B 52 - 23 00 00 00 00 00 02 4C 50 - 23 00 00 00 00 00 02 4D 4E - 23 00 00 00 00 00 02 4E 4A - 23 00 00 00 00 00 02 4F 46 - 23 00 00 00 00 00 02 50 42 - 23 00 00 00 00 00 02 51 41 - 23 00 00 00 00 00 02 52 40 - 23 00 00 00 00 00 02 53 01 - 23 00 00 00 00 00 02 54 01 - 23 00 00 00 00 00 02 55 89 - 23 00 00 00 00 00 02 56 7F - 23 00 00 00 00 00 02 58 40 - 23 00 00 00 00 00 02 59 40 - 23 00 00 00 00 00 02 5A C2 - 23 00 00 00 00 00 02 5B 44 - 23 00 00 00 00 00 02 5C 43 - 23 00 00 00 00 00 02 5D 43 - 23 00 00 00 00 00 02 5E 42 - 23 00 00 00 00 00 02 5F 44 - 23 00 00 00 00 00 02 60 44 - 23 00 00 00 00 00 02 61 44 - 23 00 00 00 00 00 02 62 42 - 23 00 00 00 00 00 02 63 42 - 23 00 00 00 00 00 02 64 41 - 23 00 00 00 00 00 02 65 40 - 23 00 00 00 00 00 02 66 3F - 23 00 00 00 00 00 02 67 BD - 23 00 00 00 00 00 02 68 BC - 23 00 00 00 00 00 02 69 BD - 23 00 00 00 00 00 02 6A 3F - 23 00 00 00 00 00 02 6B 40 - 23 00 00 00 00 00 02 6C 40 - 23 00 00 00 00 00 02 6D 3F - 23 00 00 00 00 00 02 6E 3E - 23 00 00 00 00 00 02 6F BC - 23 00 00 00 00 00 02 70 8C - 23 00 00 00 00 00 02 71 0E - 23 00 00 00 00 00 02 72 00 - 23 00 00 00 00 00 02 73 16 - 23 00 00 00 00 00 02 74 06 - 23 00 00 00 00 00 02 75 0C - 23 00 00 00 00 00 02 76 03 - 23 00 00 00 00 00 02 77 09 - 23 00 00 00 00 00 02 78 0F - 23 00 00 00 00 00 02 79 68 - 23 00 00 00 00 00 02 7A 88 - 23 00 00 00 00 00 02 83 01 - 23 00 00 00 00 00 02 84 68 - //23 00 00 00 00 00 02 85 40 - 23 00 00 00 00 00 02 86 40 - //23 00 00 00 00 00 02 87 40 - //23 00 00 00 00 00 02 88 40 - 23 00 00 00 00 00 02 89 CF - 23 00 00 00 00 00 02 A2 20 - 23 00 00 00 00 00 02 B3 00 - 23 00 00 00 00 00 02 B7 00 - 23 00 00 00 00 00 02 B8 00 - 23 01 00 00 00 00 02 FB 01 - 23 01 00 00 00 00 02 FF 10 - 23 00 00 00 00 00 02 9D 00 - 23 00 00 00 00 00 02 89 00 - 23 00 00 00 00 00 02 55 80 - 23 01 00 00 00 00 02 FB 01 - - - ]; - qcom,mdss-dsi-CE_off-command = [ - 23 01 00 00 00 00 02 FF 10 - 23 00 00 00 00 00 02 55 01 - 23 01 00 00 00 00 02 FB 01 - - ]; - qcom,mdss-dsi-sRGB_on-command = [ - 23 01 00 00 00 00 02 FF 10 - 23 00 00 00 00 00 02 55 80 - 23 00 00 00 00 00 02 97 00 - 23 00 00 00 00 00 02 98 00 - 23 00 00 00 00 00 02 99 00 - 23 00 00 00 00 00 02 8E C0 - 23 00 00 00 00 00 02 8F 0C - 23 00 00 00 00 00 02 90 C0 - 23 00 00 00 00 00 02 91 30 - 23 00 00 00 00 00 02 92 83 - 23 00 00 00 00 00 02 93 00 - 23 00 00 00 00 00 02 94 0F - 23 00 00 00 00 00 02 95 00 - 23 00 00 00 00 00 02 96 01 - 23 00 00 00 00 00 02 9A 00 - 23 00 00 00 00 00 02 9B 00 - 23 00 00 00 00 00 02 9C 00 - 23 00 00 00 00 00 02 9D 24 - 23 00 00 00 00 00 02 89 00 - 23 01 00 00 00 00 02 FB 01 - 23 01 00 00 00 00 02 FF 22 - 23 00 00 00 00 00 02 00 40 - 23 00 00 00 00 00 02 01 54 - 23 00 00 00 00 00 02 02 5A - 23 00 00 00 00 00 02 03 60 - 23 00 00 00 00 00 02 04 66 - 23 00 00 00 00 00 02 05 6A - 23 00 00 00 00 00 02 06 6C - 23 00 00 00 00 00 02 07 6C - 23 00 00 00 00 00 02 08 68 - 23 00 00 00 00 00 02 09 62 - 23 00 00 00 00 00 02 0A 5B - 23 00 00 00 00 00 02 0B 53 - 23 00 00 00 00 00 02 0C 4D - 23 00 00 00 00 00 02 0D 48 - 23 00 00 00 00 00 02 0E 44 - 23 00 00 00 00 00 02 0F 41 - 23 00 00 00 00 00 02 10 40 - 23 00 00 00 00 00 02 11 50 - 23 00 00 00 00 00 02 12 60 - 23 00 00 00 00 00 02 13 70 - 23 00 00 00 00 00 02 14 58 - 23 00 00 00 00 00 02 15 68 - 23 00 00 00 00 00 02 16 78 - 23 00 00 00 00 00 02 17 00 - 23 00 00 00 00 00 02 18 40 - 23 00 00 00 00 00 02 19 40 - 23 00 00 00 00 00 02 1A 40 - 23 00 00 00 00 00 02 1B 40 - 23 00 00 00 00 00 02 1C 40 - 23 00 00 00 00 00 02 1D 40 - 23 00 00 00 00 00 02 1E 40 - 23 00 00 00 00 00 02 1F 40 - 23 00 00 00 00 00 02 20 40 - 23 00 00 00 00 00 02 21 45 - 23 00 00 00 00 00 02 22 49 - 23 00 00 00 00 00 02 23 4C - 23 00 00 00 00 00 02 24 4B - 23 00 00 00 00 00 02 25 48 - 23 00 00 00 00 00 02 26 44 - 23 00 00 00 00 00 02 27 41 - 23 00 00 00 00 00 02 28 40 - 23 00 00 00 00 00 02 2D 00 - 23 00 00 00 00 00 02 2F 40 - 23 00 00 00 00 00 02 30 40 - 23 00 00 00 00 00 02 31 40 - 23 00 00 00 00 00 02 32 40 - 23 00 00 00 00 00 02 33 40 - 23 00 00 00 00 00 02 34 40 - 23 00 00 00 00 00 02 35 40 - 23 00 00 00 00 00 02 36 40 - 23 00 00 00 00 00 02 37 40 - 23 00 00 00 00 00 02 38 40 - 23 00 00 00 00 00 02 39 40 - 23 00 00 00 00 00 02 3A 40 - 23 00 00 00 00 00 02 3B 40 - 23 00 00 00 00 00 02 3D 40 - 23 00 00 00 00 00 02 3F 40 - 23 00 00 00 00 00 02 40 40 - 23 00 00 00 00 00 02 41 40 - 23 00 00 00 00 00 02 42 40 - 23 00 00 00 00 00 02 43 40 - 23 00 00 00 00 00 02 44 40 - 23 00 00 00 00 00 02 45 40 - 23 00 00 00 00 00 02 46 40 - 23 00 00 00 00 00 02 47 40 - 23 00 00 00 00 00 02 48 40 - 23 00 00 00 00 00 02 49 40 - 23 00 00 00 00 00 02 4A 40 - 23 00 00 00 00 00 02 4B 40 - 23 00 00 00 00 00 02 4C 40 - 23 00 00 00 00 00 02 4D 40 - 23 00 00 00 00 00 02 4E 40 - 23 00 00 00 00 00 02 4F 40 - 23 00 00 00 00 00 02 50 40 - 23 00 00 00 00 00 02 51 40 - 23 00 00 00 00 00 02 52 40 - 23 00 00 00 00 00 02 53 01 - 23 00 00 00 00 00 02 54 00 - 23 00 00 00 00 00 02 55 88 - 23 00 00 00 00 00 02 56 77 - 23 00 00 00 00 00 02 58 32 - 23 00 00 00 00 00 02 59 30 - 23 00 00 00 00 00 02 5A 2D - 23 00 00 00 00 00 02 5B 2B - 23 00 00 00 00 00 02 5C 29 - 23 00 00 00 00 00 02 5D 27 - 23 00 00 00 00 00 02 5E 24 - 23 00 00 00 00 00 02 5F 26 - 23 00 00 00 00 00 02 60 2A - 23 00 00 00 00 00 02 61 2B - 23 00 00 00 00 00 02 62 2D - 23 00 00 00 00 00 02 63 30 - 23 00 00 00 00 00 02 64 30 - 23 00 00 00 00 00 02 65 33 - 23 00 00 00 00 00 02 66 34 - 23 00 00 00 00 00 02 67 34 - 23 00 00 00 00 00 02 68 34 - 23 00 00 00 00 00 02 69 34 - 23 00 00 00 00 00 02 6A 33 - 23 00 00 00 00 00 02 6B 32 - 23 00 00 00 00 00 02 6C 32 - 23 00 00 00 00 00 02 6D 32 - 23 00 00 00 00 00 02 6E 32 - 23 00 00 00 00 00 02 6F 32 - 23 00 00 00 00 00 02 70 00 - 23 00 00 00 00 00 02 71 00 - 23 00 00 00 00 00 02 72 00 - 23 00 00 00 00 00 02 73 05 - 23 00 00 00 00 00 02 74 06 - 23 00 00 00 00 00 02 75 0C - 23 00 00 00 00 00 02 76 03 - 23 00 00 00 00 00 02 77 09 - 23 00 00 00 00 00 02 78 0F - 23 00 00 00 00 00 02 79 68 - 23 00 00 00 00 00 02 7A 88 - 23 00 00 00 00 00 02 83 77 - 23 00 00 00 00 00 02 84 3B - 23 00 00 00 00 00 02 86 20 - 23 00 00 00 00 00 02 89 40 - 23 00 00 00 00 00 02 A2 20 - 23 00 00 00 00 00 02 B3 00 - 23 00 00 00 00 00 02 B7 00 - 23 00 00 00 00 00 02 B8 00 - 23 01 00 00 00 00 02 FB 01 - 23 01 00 00 00 00 02 FF 10 - ]; - qcom,mdss-dsi-sRGB_off-command = [ - 23 01 00 00 00 00 02 FF 10 - 23 00 00 00 00 00 02 9D 00 - 23 00 00 00 00 00 02 55 01 - 23 00 00 00 00 00 02 89 00 - 23 01 00 00 00 00 02 FB 01 - ]; - qcom,mdss-dsi-cold_gamma-command = [ - 39 01 00 00 00 00 02 FF 20 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 11 B0 00 77 00 81 00 93 00 A4 00 B3 00 C2 00 D0 00 DC - 39 01 00 00 00 00 11 B1 00 E9 01 13 01 36 01 6E 01 9A 01 E0 02 19 02 1A - 39 01 00 00 00 00 11 B2 02 54 02 97 02 C2 02 F9 03 1C 03 49 03 57 03 65 - 39 01 00 00 00 00 0D B3 03 75 03 87 03 9C 03 B7 03 D2 03 D7 - 39 01 00 00 00 00 11 B4 00 20 00 2F 00 49 00 60 00 76 00 89 00 9B 00 AA - 39 01 00 00 00 00 11 B5 00 B9 00 EB 01 15 01 54 01 86 01 D3 02 0E 02 0F - 39 01 00 00 00 00 11 B6 02 4B 02 8F 02 BA 02 F2 03 15 03 44 03 52 03 60 - 39 01 00 00 00 00 0D B7 03 70 03 83 03 99 03 B4 03 D1 03 D7 - 39 01 00 00 00 00 11 B8 00 09 00 1B 00 39 00 54 00 6B 00 81 00 95 00 A6 - 39 01 00 00 00 00 11 B9 00 B7 00 ED 01 18 01 59 01 8B 01 D7 02 12 02 13 - 39 01 00 00 00 00 11 BA 02 4F 02 93 02 BF 02 F9 03 23 03 5E 03 78 03 9A - 39 01 00 00 00 00 0D BB 03 C0 03 C2 03 C4 03 C6 03 D2 03 D7 - 39 01 00 00 00 00 02 FF 21 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 11 B0 00 77 00 81 00 93 00 A4 00 B3 00 C2 00 D0 00 D3 - 39 01 00 00 00 00 11 B1 00 E9 01 13 01 36 01 6E 01 9A 01 E0 02 19 02 1A - 39 01 00 00 00 00 11 B2 02 54 02 97 02 C2 02 F9 03 1C 03 49 03 57 03 65 - 39 01 00 00 00 00 0D B3 03 75 03 87 03 9C 03 B7 03 D2 03 D7 - 39 01 00 00 00 00 11 B4 00 20 00 2F 00 49 00 60 00 76 00 89 00 9B 00 AA - 39 01 00 00 00 00 11 B5 00 B9 00 EB 01 15 01 54 01 86 01 D3 02 0E 02 0F - 39 01 00 00 00 00 11 B6 02 4B 02 8F 02 BA 02 F2 03 15 03 44 03 52 03 60 - 39 01 00 00 00 00 0D B7 03 70 03 83 03 99 03 B4 03 D1 03 D7 - 39 01 00 00 00 00 11 B8 00 09 00 1B 00 39 00 54 00 6B 00 81 00 95 00 A6 - 39 01 00 00 00 00 11 B9 00 B7 00 ED 01 18 01 59 01 8B 01 D7 02 12 02 13 - 39 01 00 00 00 00 11 BA 02 4F 02 93 02 BF 02 F9 03 23 03 5E 03 78 03 9A - 39 01 00 00 00 00 0D BB 03 C0 03 C2 03 C4 03 C6 03 D2 03 D7 - ]; - qcom,mdss-dsi-warm_gamma-command = [ - 39 01 00 00 00 00 02 FF 20 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 11 B0 00 09 00 19 00 37 00 4F 00 67 00 7A 00 8E 00 9E - 39 01 00 00 00 00 11 B1 00 B0 00 E6 01 12 01 53 01 86 01 D4 02 0F 02 11 - 39 01 00 00 00 00 11 B2 02 4C 02 92 02 BC 02 F3 03 16 03 43 03 53 03 62 - 39 01 00 00 00 00 0D B3 03 72 03 87 03 9A 03 B5 03 D2 03 D7 - 39 01 00 00 00 00 11 B4 00 0E 00 1E 00 3B 00 54 00 6B 00 7F 00 92 00 A3 - 39 01 00 00 00 00 11 B5 00 B4 00 E9 01 14 01 55 01 86 01 D2 02 0D 02 0F - 39 01 00 00 00 00 11 B6 02 4A 02 8F 02 BA 02 F2 03 15 03 44 03 51 03 60 - 39 01 00 00 00 00 0D B7 03 70 03 84 03 9B 03 B4 03 D1 03 D7 - 39 01 00 00 00 00 11 B8 00 DA 00 E0 00 EC 00 F6 01 01 01 0A 01 14 01 1C - 39 01 00 00 00 00 11 B9 01 25 01 43 01 5E 01 8A 01 B0 01 EE 02 22 02 24 - 39 01 00 00 00 00 11 BA 02 5C 02 A0 02 CB 03 04 03 2F 03 6E 03 8F 03 A3 - 39 01 00 00 00 00 0D BB 03 A5 03 A7 03 A9 03 BA 03 D2 03 D7 - 39 01 00 00 00 00 02 FF 21 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 11 B0 00 09 00 19 00 37 00 4F 00 67 00 7A 00 8E 00 9E - 39 01 00 00 00 00 11 B1 00 B0 00 E6 01 12 01 53 01 86 01 D4 02 0F 02 11 - 39 01 00 00 00 00 11 B2 02 4C 02 92 02 BC 02 F3 03 16 03 43 03 53 03 62 - 39 01 00 00 00 00 0D B3 03 72 03 87 03 9A 03 B5 03 D3 03 D7 - 39 01 00 00 00 00 11 B4 00 0E 00 1E 00 3B 00 54 00 6B 00 7F 00 92 00 A3 - 39 01 00 00 00 00 11 B5 00 B4 00 E9 01 14 01 55 01 86 01 D2 02 0D 02 0F - 39 01 00 00 00 00 11 B6 02 4A 02 8F 02 BA 02 F2 03 15 03 44 03 51 03 60 - 39 01 00 00 00 00 0D B7 03 70 03 84 03 9B 03 B4 03 D1 03 D7 - 39 01 00 00 00 00 11 B8 00 DA 00 E0 00 EC 00 F6 01 01 01 0A 01 14 01 1C - 39 01 00 00 00 00 11 B9 01 25 01 43 01 5E 01 8A 01 B0 01 EE 02 22 02 24 - 39 01 00 00 00 00 11 BA 02 5C 02 A0 02 CB 03 04 03 2F 03 6E 03 8F 03 A3 - 39 01 00 00 00 00 0D BB 03 A5 03 A7 03 A9 03 BA 03 D2 03 D7 - ]; - qcom,mdss-dsi-default_gamma-command = [ - 39 01 00 00 00 00 02 FF 20 //Enter CMD2_P0 - 39 00 00 00 00 00 02 AF 00 //R G B Gamma independent - 39 00 00 00 00 00 11 B0 00 00 00 11 00 30 00 4A 00 62 00 77 00 8B 00 9D - 39 00 00 00 00 00 11 B1 00 AD 00 E4 01 10 01 52 01 85 01 D2 02 10 02 12 - 39 00 00 00 00 00 11 B2 02 4D 02 91 02 BD 02 F4 03 18 03 46 03 54 03 62 - 39 00 00 00 00 00 0D B3 03 73 03 84 03 99 03 C1 03 D5 03 D9 - 39 00 00 00 00 00 11 B4 00 00 00 11 00 30 00 4A 00 62 00 77 00 8B 00 9D - 39 00 00 00 00 00 11 B5 00 AD 00 E4 01 10 01 52 01 85 01 D2 02 10 02 12 - 39 00 00 00 00 00 11 B6 02 4D 02 91 02 BD 02 F4 03 18 03 46 03 54 03 62 - 39 00 00 00 00 00 0D B7 03 73 03 84 03 99 03 C1 03 D5 03 D9 - 39 00 00 00 00 00 11 B8 00 00 00 11 00 30 00 4A 00 62 00 77 00 8B 00 9D - 39 00 00 00 00 00 11 B9 00 AD 00 E4 01 10 01 52 01 85 01 D2 02 10 02 12 - 39 00 00 00 00 00 11 BA 02 4D 02 91 02 BD 02 F4 03 18 03 46 03 54 03 62 - 39 00 00 00 00 00 0D BB 03 73 03 84 03 99 03 C1 03 D5 03 D9 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 21 //Enter CMD2_P1 - 39 00 00 00 00 00 11 B0 00 00 00 11 00 30 00 4A 00 62 00 77 00 8B 00 9D - 39 00 00 00 00 00 11 B1 00 AD 00 E4 01 10 01 52 01 85 01 D2 02 10 02 12 - 39 00 00 00 00 00 11 B2 02 4D 02 91 02 BD 02 F4 03 18 03 46 03 54 03 62 - 39 00 00 00 00 00 0D B3 03 73 03 84 03 99 03 C1 03 D5 03 D9 - 39 00 00 00 00 00 11 B4 00 00 00 11 00 30 00 4A 00 62 00 77 00 8B 00 9D - 39 00 00 00 00 00 11 B5 00 AD 00 E4 01 10 01 52 01 85 01 D2 02 10 02 12 - 39 00 00 00 00 00 11 B6 02 4D 02 91 02 BD 02 F4 03 18 03 46 03 54 03 62 - 39 00 00 00 00 00 0D B7 03 73 03 84 03 99 03 C1 03 D5 03 D9 - 39 00 00 00 00 00 11 B8 00 00 00 11 00 30 00 4A 00 62 00 77 00 8B 00 9D - 39 00 00 00 00 00 11 B9 00 AD 00 E4 01 10 01 52 01 85 01 D2 02 10 02 12 - 39 00 00 00 00 00 11 BA 02 4D 02 91 02 BD 02 F4 03 18 03 46 03 54 03 62 - 39 00 00 00 00 00 0D BB 03 73 03 84 03 99 03 C1 03 D5 03 D9 - 39 01 00 00 00 00 02 FB 01 - 39 01 00 00 00 00 02 FF 10 - ]; - qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; - qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; - qcom,mdss-dsi-CABC_on-command-state = "dsi_hs_mode"; - qcom,mdss-dsi-CABC_off-command-state = "dsi_hs_mode"; - qcom,mdss-dsi-CE_on-command-state = "dsi_hs_mode"; - qcom,mdss-dsi-CE_off-command-state = "dsi_hs_mode"; - qcom,mdss-dsi-cold_gamma-command-state = "dsi_lp_mode"; - qcom,mdss-dsi-warm_gamma-command-state = "dsi_lp_mode"; - qcom,mdss-dsi-default_gamma-command-state = "dsi_hs_mode"; - qcom,mdss-white-command-state = "dsi_hs_mode"; - qcom,mdss-dsi-sRGB_on-command-state = "dsi_hs_mode"; - qcom,mdss-dsi-sRGB_off-command-state = "dsi_hs_mode"; - qcom,mdss-dsi-h-sync-pulse = <1>; - qcom,mdss-dsi-traffic-mode = "burst_mode"; - qcom,mdss-dsi-bllp-eof-power-mode; - qcom,mdss-dsi-bllp-power-mode; - qcom,mdss-dsi-lane-0-state; - qcom,mdss-dsi-lane-1-state; - qcom,mdss-dsi-lane-2-state; - qcom,mdss-dsi-lane-3-state; - qcom,mdss-dsi-t-clk-post = <0x0E>; - qcom,mdss-dsi-t-clk-pre = <0x34>; - qcom,mdss-dsi-bl-min-level = <1>; - qcom,mdss-dsi-bl-max-level = <4095>; - qcom,mdss-dsi-dma-trigger = "trigger_sw"; - qcom,mdss-dsi-mdp-trigger = "none"; - qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; - qcom,mdss-dsi-reset-sequence = <1 10>, <0 10>, <1 10>; - qcom,mdss-dsi-lp11-init; - //qcom,mdss-dsi-tx-eot-append; - qcom,esd-check-enabled; - qcom,mdss-dsi-panel-status-command = [06 01 00 01 05 00 01 0A]; - qcom,mdss-dsi-panel-status-command-mode = "dsi_lp_mode"; - qcom,mdss-dsi-panel-status-check-mode = "reg_read"; - qcom,mdss-dsi-panel-status-read-length = <1>; - qcom,mdss-dsi-panel-status-value = <0x9C>; - qcom,mdss-dsi-panel-max-error-count = <3>; - qcom,mdss-pan-physical-width-dimension = <69>; - qcom,mdss-pan-physical-height-dimension = <122>; - }; -}; diff --git a/arch/arm/boot/dts/qcom/dsi-panel-nt36672-tianma-fhdplus-video_e7.dtsi b/arch/arm/boot/dts/qcom/dsi-panel-nt36672-tianma-fhdplus-video_e7.dtsi deleted file mode 100755 index 679f7112685c..000000000000 --- a/arch/arm/boot/dts/qcom/dsi-panel-nt36672-tianma-fhdplus-video_e7.dtsi +++ /dev/null @@ -1,79 +0,0 @@ -/* Copyright (c) 2012-2015, The Linux Foundation. All rights reserved. - * Copyright (C) 2018 XiaoMi, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -&mdss_mdp { - dsi_nt36672_tianma_fhdplus_e7_vid: qcom,mdss_dsi_nt36672_tianma_fhdplus_video_e7 { - qcom,mdss-dsi-panel-name = "nt36672 tianma e7 fhdplus video mode dsi panel"; - qcom,mdss-dsi-panel-type = "dsi_video_mode"; - qcom,mdss-dsi-panel-framerate = <60>; - qcom,mdss-dsi-virtual-channel-id = <0>; - qcom,mdss-dsi-stream = <0>; - qcom,mdss-dsi-panel-width = <1080>; - qcom,mdss-dsi-panel-height = <2160>; - qcom,mdss-dsi-h-front-porch = <16>; - qcom,mdss-dsi-h-back-porch = <64>; - qcom,mdss-dsi-h-pulse-width = <20>; - qcom,mdss-dsi-h-sync-skew = <0>; - qcom,mdss-dsi-v-back-porch = <4>; - qcom,mdss-dsi-v-front-porch = <4>; - qcom,mdss-dsi-v-pulse-width = <2>; - qcom,mdss-dsi-h-left-border = <0>; - qcom,mdss-dsi-h-right-border = <0>; - qcom,mdss-dsi-v-top-border = <0>; - qcom,mdss-dsi-v-bottom-border = <0>; - qcom,mdss-dsi-bpp = <24>; - qcom,mdss-dsi-underflow-color = <0xff>; - qcom,mdss-dsi-border-color = <0>; - qcom,mdss-dsi-on-command = [29 01 00 00 01 00 02 ff 10 - 29 01 00 00 00 00 02 35 00 - 29 01 00 00 00 00 02 51 ff - 29 01 00 00 00 00 02 53 2c - 29 01 00 00 00 00 02 55 00 - 29 01 00 00 00 00 02 ff 10 - 29 01 00 00 78 00 02 11 00 - 29 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-dsi-off-command = [29 01 00 00 00 00 02 FF 00 - 05 01 00 00 14 00 02 28 00 - 05 01 00 00 78 00 02 10 00 - ]; - qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; - qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; - qcom,mdss-dsi-h-sync-pulse = <1>; - qcom,mdss-dsi-traffic-mode = "burst_mode"; - qcom,mdss-dsi-bllp-eof-power-mode; - qcom,mdss-dsi-bllp-power-mode; - qcom,mdss-dsi-lane-0-state; - qcom,mdss-dsi-lane-1-state; - qcom,mdss-dsi-lane-2-state; - qcom,mdss-dsi-lane-3-state; - qcom,mdss-dsi-t-clk-post = <0x0E>; - qcom,mdss-dsi-t-clk-pre = <0x31>; - qcom,mdss-dsi-bl-min-level = <1>; - qcom,mdss-dsi-bl-max-level = <4095>; - qcom,mdss-dsi-dma-trigger = "trigger_sw"; - qcom,mdss-dsi-mdp-trigger = "none"; - qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; - qcom,mdss-dsi-reset-sequence = <1 10>, <0 10>, <1 10>; - qcom,mdss-dsi-tx-eot-append; - //qcom,esd-check-enabled; - qcom,mdss-dsi-panel-status-command = [06 01 00 01 05 00 01 0A]; - qcom,mdss-dsi-panel-status-command-mode = "dsi_lp_mode"; - qcom,mdss-dsi-panel-status-check-mode = "TE_check_NT35596"; - qcom,mdss-dsi-panel-status-read-length = <1>; - qcom,mdss-dsi-panel-status-value = <0x9C>; - qcom,mdss-dsi-panel-max-error-count = <3>; - qcom,mdss-pan-physical-width-dimension = <69>; - qcom,mdss-pan-physical-height-dimension = <122>; - }; -}; diff --git a/arch/arm/boot/dts/qcom/dsi-panel-otm1911-fhd-video.dtsi b/arch/arm/boot/dts/qcom/dsi-panel-otm1911-fhd-video.dtsi deleted file mode 100644 index 0f9cad52a1c9..000000000000 --- a/arch/arm/boot/dts/qcom/dsi-panel-otm1911-fhd-video.dtsi +++ /dev/null @@ -1,76 +0,0 @@ -/* Copyright (c) 2012-2015, The Linux Foundation. All rights reserved. - * Copyright (C) 2018 XiaoMi, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -&mdss_mdp { - dsi_otm1911_fhd_vid: qcom,mdss_dsi_otm1911_fhd_video { - qcom,mdss-dsi-panel-name = "otm1911 fhd video mode dsi panel"; - qcom,mdss-dsi-panel-type = "dsi_video_mode"; - qcom,mdss-dsi-panel-framerate = <60>; - qcom,mdss-dsi-virtual-channel-id = <0>; - qcom,mdss-dsi-stream = <0>; - qcom,mdss-dsi-panel-width = <1080>; - qcom,mdss-dsi-panel-height = <1920>; - qcom,mdss-dsi-h-front-porch = <24>; - qcom,mdss-dsi-h-back-porch = <24>; - qcom,mdss-dsi-h-pulse-width = <20>; - qcom,mdss-dsi-h-sync-skew = <0>; - qcom,mdss-dsi-v-back-porch = <6>; - qcom,mdss-dsi-v-front-porch = <14>; - qcom,mdss-dsi-v-pulse-width = <2>; - qcom,mdss-dsi-h-left-border = <0>; - qcom,mdss-dsi-h-right-border = <0>; - qcom,mdss-dsi-v-top-border = <0>; - qcom,mdss-dsi-v-bottom-border = <0>; - qcom,mdss-dsi-bpp = <24>; - qcom,mdss-dsi-underflow-color = <0xff>; - qcom,mdss-dsi-border-color = <0>; - qcom,mdss-dsi-on-command = [ - 39 01 00 00 78 00 02 00 00 - 39 01 00 00 78 00 02 11 00 - 39 01 00 00 14 00 02 29 00]; - - qcom,mdss-dsi-off-command = [39 01 00 00 32 00 02 28 00 - 39 01 00 00 78 00 02 10 00 - ]; - qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; - qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; - qcom,mdss-dsi-h-sync-pulse = <1>; - qcom,mdss-dsi-traffic-mode = "burst_mode"; - qcom,mdss-dsi-bllp-eof-power-mode; - qcom,mdss-dsi-bllp-power-mode; - qcom,mdss-dsi-lane-0-state; - qcom,mdss-dsi-lane-1-state; - qcom,mdss-dsi-lane-2-state; - qcom,mdss-dsi-lane-3-state; - qcom,mdss-dsi-panel-timings = [7d 25 1d 00 37 33 - 22 27 1e 03 04 00]; - qcom,mdss-dsi-t-clk-post = <0x0d>; - qcom,mdss-dsi-t-clk-pre = <0x2d>; - qcom,mdss-dsi-bl-min-level = <1>; - qcom,mdss-dsi-bl-max-level = <4095>; - qcom,mdss-dsi-dma-trigger = "trigger_sw"; - qcom,mdss-dsi-mdp-trigger = "none"; - qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; - qcom,mdss-dsi-reset-sequence = <1 10>, <0 10>, <1 10>; - //qcom,mdss-dsi-tx-eot-append; - //qcom,esd-check-enabled; - qcom,mdss-dsi-panel-status-command = [06 01 00 01 05 00 01 0A]; - qcom,mdss-dsi-panel-status-command-mode = "dsi_lp_mode"; - qcom,mdss-dsi-panel-status-check-mode = "TE_check_NT35596"; - qcom,mdss-dsi-panel-status-read-length = <1>; - qcom,mdss-dsi-panel-status-value = <0x9C>; - qcom,mdss-dsi-panel-max-error-count = <3>; - qcom,mdss-pan-physical-width-dimension = <69>; - qcom,mdss-pan-physical-height-dimension = <122>; - }; -}; diff --git a/arch/arm/boot/dts/qcom/dsi-panel-otm1911-fhdplus-video.dtsi b/arch/arm/boot/dts/qcom/dsi-panel-otm1911-fhdplus-video.dtsi deleted file mode 100644 index 19e2bf5d44a2..000000000000 --- a/arch/arm/boot/dts/qcom/dsi-panel-otm1911-fhdplus-video.dtsi +++ /dev/null @@ -1,137 +0,0 @@ -/* Copyright (c) 2012-2015, The Linux Foundation. All rights reserved. - * Copyright (C) 2018 XiaoMi, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -&mdss_mdp { - dsi_otm1911_fhdplus_vid: qcom,mdss_dsi_otm1911_fhdplus_video { - qcom,mdss-dsi-panel-name = "otm1911 fhdplus video mode dsi panel"; - qcom,mdss-dsi-panel-type = "dsi_video_mode"; - qcom,mdss-dsi-panel-framerate = <60>; - qcom,mdss-dsi-virtual-channel-id = <0>; - qcom,mdss-dsi-stream = <0>; - qcom,mdss-dsi-panel-width = <1080>; - qcom,mdss-dsi-panel-height = <2280>; - qcom,mdss-dsi-h-front-porch = <24>; - qcom,mdss-dsi-h-back-porch = <24>; - qcom,mdss-dsi-h-pulse-width = <20>; - qcom,mdss-dsi-h-sync-skew = <0>; - qcom,mdss-dsi-v-back-porch = <38>; - qcom,mdss-dsi-v-front-porch = <47>; - qcom,mdss-dsi-v-pulse-width = <2>; - qcom,mdss-dsi-h-left-border = <0>; - qcom,mdss-dsi-h-right-border = <0>; - qcom,mdss-dsi-v-top-border = <0>; - qcom,mdss-dsi-v-bottom-border = <0>; - qcom,mdss-dsi-bpp = <24>; - qcom,mdss-dsi-underflow-color = <0xff>; - qcom,mdss-dsi-border-color = <0>; - qcom,mdss-dsi-on-command = [ - 39 01 00 00 00 00 02 00 00 - 39 01 00 00 00 00 04 ff 19 11 01 - 39 01 00 00 00 00 02 00 80 - 39 01 00 00 00 00 03 ff 19 11 - 39 01 00 00 00 00 02 00 b0 - 39 01 00 00 00 00 05 b3 04 38 08 e8 - 39 01 00 00 00 00 02 00 80 - 39 01 00 00 00 00 02 C9 8E - 39 01 00 00 00 00 02 00 80 - 39 01 00 00 00 00 0D CA F0 D9 C8 BA AF A6 9E 98 92 8D 88 84 - 39 01 00 00 00 00 02 00 90 - 39 01 00 00 00 00 0A CA FD FF 98 FB FF 33 F6 FF 66 - 39 01 00 00 00 00 02 00 A0 - 39 01 00 00 00 00 0D D6 0a 0b 0b 0b 0b 0c 0f 13 0f 13 11 0e - 39 01 00 00 00 00 02 00 B0 - 39 01 00 00 00 00 0D D6 9a 8d 82 83 83 83 80 6b 80 85 88 8a - 39 01 00 00 00 00 02 00 C0 - 39 01 00 00 00 00 0D D6 8d 86 91 90 89 81 80 83 80 8a 86 84 - 39 01 00 00 00 00 02 00 D0 - 39 01 00 00 00 00 0D D6 88 84 80 80 80 80 80 80 80 80 80 80 - 39 01 00 00 00 00 02 00 B0 - 39 01 00 00 00 00 02 CA 00 - 39 01 00 00 00 00 02 00 B2 - 39 01 00 00 00 00 02 CA 0A - 39 01 00 00 00 00 03 51 ff 0C - 39 01 00 00 00 00 02 53 2C - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 78 00 02 11 00 - 39 01 00 00 14 00 02 29 00]; - - qcom,mdss-dsi-off-command = [ - 39 01 00 00 00 00 04 ff 19 11 01 - 39 01 00 00 00 00 02 00 80 - 39 01 00 00 00 00 03 ff 19 11 - 39 01 00 00 00 00 02 00 90 - 39 01 00 00 00 00 02 b3 34 - 39 01 00 00 14 00 02 28 00 - 39 01 00 00 78 00 02 10 00]; - - qcom,mdss-dsi-CABC_on-command = [ - 39 01 00 00 00 00 02 00 00 - 39 01 00 00 00 00 02 55 01]; - - qcom,mdss-dsi-CABC_off-command = [ - 39 01 00 00 00 00 02 00 00 - 39 01 00 00 00 00 02 55 00]; - - qcom,mdss-dsi-CE_on-command = [ - 39 01 00 00 00 00 02 00 00 - 39 01 00 00 00 00 02 91 80]; - - qcom,mdss-dsi-CE_off-command = [ - 39 01 00 00 00 00 02 00 00 - 39 01 00 00 00 00 02 91 00]; - - qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; - qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; - qcom,mdss-dsi-CE_on-command-state = "dsi_hs_mode"; - qcom,mdss-dsi-CE_off-command-state = "dsi_hs_mode"; - qcom,mdss-dsi-CABC_on-command-state = "dsi_hs_mode"; - qcom,mdss-dsi-CABC_off-command-state = "dsi_hs_mode"; - - qcom,mdss-dsi-h-sync-pulse = <1>; - qcom,mdss-dsi-traffic-mode = "burst_mode"; - qcom,mdss-dsi-bllp-eof-power-mode; - qcom,mdss-dsi-bllp-power-mode; - qcom,mdss-dsi-lane-0-state; - qcom,mdss-dsi-lane-1-state; - qcom,mdss-dsi-lane-2-state; - qcom,mdss-dsi-lane-3-state; - qcom,mdss-dsi-panel-timings = [f7 3c 28 00 6e 70 - 22 40 31 03 04 00]; - qcom,mdss-dsi-panel-timings-phy-v2 = [25 1f 09 0a 06 03 04 a0 - 25 1f 09 0a 06 03 04 a0 - 25 1f 09 0a 06 03 04 a0 - 25 1f 09 0a 06 03 04 a0 - 25 1e 08 0a 06 03 04 a0]; - qcom,mdss-dsi-t-clk-post = <0x0E>; - qcom,mdss-dsi-t-clk-pre = <0x34>; - qcom,mdss-dsi-bl-min-level = <1>; - qcom,mdss-dsi-bl-max-level = <4095>; - qcom,mdss-brightness-max-level-global = <255>; - qcom,mdss-dsi-dma-trigger = "trigger_sw"; - qcom,mdss-dsi-mdp-trigger = "none"; - qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; - qcom,mdss-dsi-reset-sequence = <1 10>, <0 2>, <1 15>; - qcom,mdss-dsi-lp11-init; - //qcom,mdss-dsi-tx-eot-append; - qcom,esd-check-enabled; - qcom,mdss-dsi-panel-status-command = [06 01 00 01 05 00 01 0A]; - qcom,mdss-dsi-panel-status-command-mode = "dsi_lp_mode"; - qcom,mdss-dsi-panel-status-check-mode = "TE_check_NT35596"; - qcom,mdss-dsi-panel-status-read-length = <1>; - qcom,mdss-dsi-panel-status-value = <0x9C>; - qcom,mdss-dsi-panel-max-error-count = <3>; - qcom,mdss-pan-physical-width-dimension = <69>; - qcom,mdss-pan-physical-height-dimension = <122>; - }; -}; diff --git a/arch/arm/boot/dts/qcom/dsi-panel-td4310-ebbg-fhdplus-video_e7.dtsi b/arch/arm/boot/dts/qcom/dsi-panel-td4310-ebbg-fhdplus-video_e7.dtsi deleted file mode 100644 index 93821f825fa7..000000000000 --- a/arch/arm/boot/dts/qcom/dsi-panel-td4310-ebbg-fhdplus-video_e7.dtsi +++ /dev/null @@ -1,572 +0,0 @@ -/* Copyright (c) 2012-2015, The Linux Foundation. All rights reserved. - * Copyright (C) 2018 XiaoMi, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -&mdss_mdp { - dsi_td4310_ebbg_fhdplus_e7_vid: qcom,mdss_dsi_td4310_ebbg_fhdplus_video_e7 { - qcom,mdss-dsi-panel-name = "td4310 ebbg fhdplus e7 video mode dsi panel"; - qcom,mdss-dsi-panel-type = "dsi_video_mode"; - qcom,mdss-dsi-panel-framerate = <60>; - qcom,mdss-dsi-virtual-channel-id = <0>; - qcom,mdss-dsi-stream = <0>; - qcom,mdss-dsi-panel-width = <1080>; - qcom,mdss-dsi-panel-height = <2160>; - qcom,mdss-dsi-h-front-porch = <130>; - qcom,mdss-dsi-h-back-porch = <26>; - qcom,mdss-dsi-h-pulse-width = <2>; - qcom,mdss-dsi-h-sync-skew = <0>; - qcom,mdss-dsi-v-back-porch = <54>; - qcom,mdss-dsi-v-front-porch = <4>; - qcom,mdss-dsi-v-pulse-width = <10>; - qcom,mdss-dsi-h-left-border = <0>; - qcom,mdss-dsi-h-right-border = <0>; - qcom,mdss-dsi-v-top-border = <0>; - qcom,mdss-dsi-v-bottom-border = <0>; - qcom,mdss-dsi-bpp = <24>; - qcom,mdss-dsi-underflow-color = <0xff>; - qcom,mdss-dsi-border-color = <0>; - - - qcom,mdss-white-command-00 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 10 1C 2C 3A 45 5D 6F 7D 8A 3E 4B 5B 71 7B 88 98 A5 B1 00 10 1C 2C 3A 45 5D 6F 7D 8A 3E 4B 5B 71 7B 88 98 A5 B1 - 29 01 00 00 00 00 15 C8 01 00 03 01 03 FC 00 00 03 FE FE FC 00 00 01 FE FB FC 00 00 - ]; - qcom,mdss-dsi-on-command = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 10 1C 2C 3A 45 5D 6F 7D 8A 3E 4B 5B 71 7B 88 98 A5 B1 00 10 1C 2C 3A 45 5D 6F 7D 8A 3E 4B 5B 71 7B 88 98 A5 B1 - 29 01 00 00 00 00 15 C8 01 00 03 01 03 FC 00 00 03 FE FE FC 00 00 01 FE FB FC 00 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-01 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 F9 02 01 BB 00 00 01 05 03 FC 00 00 FC 03 FF B1 00 00 FA 02 01 BD 00 00 01 05 03 FC 00 00 FC 04 FE E3 00 00 FA 02 FF FB 00 00 01 05 03 FC 00 00 FC 03 FE 9F 00 - ]; - qcom,mdss-dsi-on-command-01 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 F9 02 01 BB 00 00 01 05 03 FC 00 00 FC 03 FF B1 00 00 FA 02 01 BD 00 00 01 05 03 FC 00 00 FC 04 FE E3 00 00 FA 02 FF FB 00 00 01 05 03 FC 00 00 FC 03 FE 9F 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-02 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 FA 02 01 DD 00 00 01 05 03 FC 00 00 FB 04 FD D5 00 00 F9 02 FF D4 00 00 FE 05 03 EE 00 00 FC 03 FE FC 00 00 F9 02 FF FC 00 00 01 04 02 DD 00 00 FC 03 FE A4 00 - ]; - qcom,mdss-dsi-on-command-02 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 FA 02 01 DD 00 00 01 05 03 FC 00 00 FB 04 FD D5 00 00 F9 02 FF D4 00 00 FE 05 03 EE 00 00 FC 03 FE FC 00 00 F9 02 FF FC 00 00 01 04 02 DD 00 00 FC 03 FE A4 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-03 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 F9 02 FF FC 00 00 FE 04 01 D4 00 00 FD 03 FE F7 00 00 FA 02 FF D3 00 00 FE 04 01 A5 00 00 FC 03 FE FC 00 00 F9 02 FF FC 00 00 01 03 02 9A 00 00 FC 03 01 AA 00 - ]; - qcom,mdss-dsi-on-command-03 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 F9 02 FF FC 00 00 FE 04 01 D4 00 00 FD 03 FE F7 00 00 FA 02 FF D3 00 00 FE 04 01 A5 00 00 FC 03 FE FC 00 00 F9 02 FF FC 00 00 01 03 02 9A 00 00 FC 03 01 AA 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-04 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 F9 02 FF FC 00 00 FF 04 02 AE 00 00 FD 03 FD F9 00 00 FA 02 FF D3 00 00 FF 03 02 80 00 00 FC 03 FE FC 00 00 F9 02 FF FC 00 00 01 03 01 79 00 00 FC 03 FF AE 00 - ]; - qcom,mdss-dsi-on-command-04 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 F9 02 FF FC 00 00 FF 04 02 AE 00 00 FD 03 FD F9 00 00 FA 02 FF D3 00 00 FF 03 02 80 00 00 FC 03 FE FC 00 00 F9 02 FF FC 00 00 01 03 01 79 00 00 FC 03 FF AE 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-05 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 F9 02 FF FC 00 00 01 03 01 87 00 00 FD 03 01 83 00 00 F9 02 FF FC 00 00 FF 03 02 7C 00 00 FD 03 01 AD 00 00 F9 02 FF FC 00 00 FF 03 02 59 00 00 FD 02 02 46 00 - ]; - qcom,mdss-dsi-on-command-05 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 F9 02 FF FC 00 00 01 03 01 87 00 00 FD 03 01 83 00 00 F9 02 FF FC 00 00 FF 03 02 7C 00 00 FD 03 01 AD 00 00 F9 02 FF FC 00 00 FF 03 02 59 00 00 FD 02 02 46 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-06 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 F9 02 FF FC 00 00 01 04 02 BB 00 00 FC 03 FF B9 00 00 F9 02 FF FC 00 00 FE 04 01 B3 00 00 FC 04 FE E4 00 00 F9 02 FF FC 00 00 01 03 01 88 00 00 FC 03 01 73 00 - ]; - qcom,mdss-dsi-on-command-06 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 F9 02 FF FC 00 00 01 04 02 BB 00 00 FC 03 FF B9 00 00 F9 02 FF FC 00 00 FE 04 01 B3 00 00 FC 04 FE E4 00 00 F9 02 FF FC 00 00 01 03 01 88 00 00 FC 03 01 73 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-07 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 F9 02 FF BF 00 00 01 05 03 FC 00 00 FD 03 FF FA 00 00 F9 02 01 91 00 00 FE 04 01 CE 00 00 FC 03 FE FC 00 00 F9 02 FF FC 00 00 01 05 04 F4 00 00 FC 04 FE E0 00 - ]; - qcom,mdss-dsi-on-command-07 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 F9 02 FF BF 00 00 01 05 03 FC 00 00 FD 03 FF FA 00 00 F9 02 01 91 00 00 FE 04 01 CE 00 00 FC 03 FE FC 00 00 F9 02 FF FC 00 00 01 05 04 F4 00 00 FC 04 FE E0 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-08 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 F9 02 02 78 00 00 01 05 03 FC 00 00 FD 03 FE F9 00 00 FA 01 03 4E 00 00 FF 04 01 D0 00 00 FC 03 FE FC 00 00 F9 02 FF C2 00 00 01 05 03 FC 00 00 FC 04 FE E7 00 - ]; - qcom,mdss-dsi-on-command-08 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 F9 02 02 78 00 00 01 05 03 FC 00 00 FD 03 FE F9 00 00 FA 01 03 4E 00 00 FF 04 01 D0 00 00 FC 03 FE FC 00 00 F9 02 FF C2 00 00 01 05 03 FC 00 00 FC 04 FE E7 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-09 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 F9 02 FF FC 00 00 01 04 01 C7 00 00 FC 03 01 7A 00 00 F9 02 FF FC 00 00 FF 04 01 BF 00 00 FC 03 FE A7 00 00 F9 02 FF FC 00 00 FF 03 01 96 00 00 FD 02 02 3A 00 - ]; - qcom,mdss-dsi-on-command-09 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 F9 02 FF FC 00 00 01 04 01 C7 00 00 FC 03 01 7A 00 00 F9 02 FF FC 00 00 FF 04 01 BF 00 00 FC 03 FE A7 00 00 F9 02 FF FC 00 00 FF 03 01 96 00 00 FD 02 02 3A 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-10 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 F9 02 FF FC 00 00 01 03 02 A7 00 00 FC 03 01 7F 00 00 F9 02 FF FC 00 00 01 03 02 9E 00 00 FC 03 FF AA 00 00 F9 02 FF FC 00 00 01 03 02 77 00 00 FD 02 03 40 00 - ]; - qcom,mdss-dsi-on-command-10 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 F9 02 FF FC 00 00 01 03 02 A7 00 00 FC 03 01 7F 00 00 F9 02 FF FC 00 00 01 03 02 9E 00 00 FC 03 FF AA 00 00 F9 02 FF FC 00 00 01 03 02 77 00 00 FD 02 03 40 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-11 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 F9 02 FF FC 00 00 FF 03 01 67 00 00 FD 03 01 87 00 00 F9 02 FF FC 00 00 FE 03 01 5B 00 00 FC 03 FE B1 00 00 F9 02 FF FC 00 00 01 02 02 3B 00 00 FC 03 01 4B 00 - ]; - qcom,mdss-dsi-on-command-11 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 F9 02 FF FC 00 00 FF 03 01 67 00 00 FD 03 01 87 00 00 F9 02 FF FC 00 00 FE 03 01 5B 00 00 FC 03 FE B1 00 00 F9 02 FF FC 00 00 01 02 02 3B 00 00 FC 03 01 4B 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-12 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 F9 02 FF FC 00 00 01 02 03 46 00 00 FD 03 02 8B 00 00 F9 02 FF FC 00 00 01 02 02 39 00 00 FC 03 FE B5 00 00 F9 02 FF FC 00 00 FF 02 01 1E 00 00 FC 03 02 50 00 - ]; - qcom,mdss-dsi-on-command-12 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 F9 02 FF FC 00 00 01 02 03 46 00 00 FD 03 02 8B 00 00 F9 02 FF FC 00 00 01 02 02 39 00 00 FC 03 FE B5 00 00 F9 02 FF FC 00 00 FF 02 01 1E 00 00 FC 03 02 50 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-13 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 F9 02 01 FA 00 00 01 05 03 FC 00 00 FC 03 FE B1 00 00 F9 02 FF FC 00 00 01 05 03 F8 00 00 FC 04 FE E0 00 00 F9 02 FF FC 00 00 FF 04 01 C7 00 00 FC 03 02 68 00 - ]; - qcom,mdss-dsi-on-command-13 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 F9 02 01 FA 00 00 01 05 03 FC 00 00 FC 03 FE B1 00 00 F9 02 FF FC 00 00 01 05 03 F8 00 00 FC 04 FE E0 00 00 F9 02 FF FC 00 00 FF 04 01 C7 00 00 FC 03 02 68 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-14 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 F9 02 FF FC 00 00 FE 05 01 DD 00 00 FC 03 FE B6 00 00 F9 02 FF FC 00 00 01 04 01 D7 00 00 FC 04 FE E2 00 00 F9 02 FF FC 00 00 FF 04 01 A7 00 00 FC 03 02 6D 00 - ]; - qcom,mdss-dsi-on-command-14 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 F9 02 FF FC 00 00 FE 05 01 DD 00 00 FC 03 FE B6 00 00 F9 02 FF FC 00 00 01 04 01 D7 00 00 FC 04 FE E2 00 00 F9 02 FF FC 00 00 FF 04 01 A7 00 00 FC 03 02 6D 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-15 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 F9 02 FF FC 00 00 01 03 02 9A 00 00 FC 03 FF BC 00 00 F9 02 FF FC 00 00 FF 03 01 90 00 00 FC 04 FD E7 00 00 F9 02 FF FC 00 00 FF 03 02 68 00 00 FC 03 01 77 00 - ]; - qcom,mdss-dsi-on-command-15 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 F9 02 FF FC 00 00 01 03 02 9A 00 00 FC 03 FF BC 00 00 F9 02 FF FC 00 00 FF 03 01 90 00 00 FC 04 FD E7 00 00 F9 02 FF FC 00 00 FF 03 02 68 00 00 FC 03 01 77 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-16 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 F9 02 FF FC 00 00 FF 03 01 78 00 00 FC 03 FE C0 00 00 F9 02 FF FC 00 00 01 03 02 6B 00 00 FC 04 FE E9 00 00 F9 02 FF FC 00 00 01 02 03 48 00 00 FD 03 02 7B 00 - ]; - qcom,mdss-dsi-on-command-16 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 F9 02 FF FC 00 00 FF 03 01 78 00 00 FC 03 FE C0 00 00 F9 02 FF FC 00 00 01 03 02 6B 00 00 FC 04 FE E9 00 00 F9 02 FF FC 00 00 01 02 03 48 00 00 FD 03 02 7B 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-17 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 F9 02 02 79 00 00 01 05 03 FC 00 00 FC 03 FF B2 00 00 F9 02 02 78 00 00 01 05 03 FC 00 00 FC 04 FE E2 00 00 FA 02 01 BD 00 00 01 05 03 FC 00 00 FC 03 FD A1 00 - ]; - qcom,mdss-dsi-on-command-17 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 F9 02 02 79 00 00 01 05 03 FC 00 00 FC 03 FF B2 00 00 F9 02 02 78 00 00 01 05 03 FC 00 00 FC 04 FE E2 00 00 FA 02 01 BD 00 00 01 05 03 FC 00 00 FC 03 FD A1 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-18 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 F9 02 01 9C 00 00 01 05 03 FC 00 00 FB 04 FD D5 00 00 FA 02 02 8F 00 00 FE 05 03 F0 00 00 FC 03 FE FC 00 00 F9 02 01 DF 00 00 01 05 03 FC 00 00 FC 03 FE C4 00 - ]; - qcom,mdss-dsi-on-command-18 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 F9 02 01 9C 00 00 01 05 03 FC 00 00 FB 04 FD D5 00 00 FA 02 02 8F 00 00 FE 05 03 F0 00 00 FC 03 FE FC 00 00 F9 02 01 DF 00 00 01 05 03 FC 00 00 FC 03 FE C4 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-19 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 F9 02 01 C0 00 00 01 04 02 DA 00 00 FC 03 FE FC 00 00 F9 02 02 92 00 00 FE 04 02 A8 00 00 FC 03 FE FC 00 00 F9 02 FF FC 00 00 01 04 01 D3 00 00 FC 04 FF E2 00 - ]; - qcom,mdss-dsi-on-command-19 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 F9 02 01 C0 00 00 01 04 02 DA 00 00 FC 03 FE FC 00 00 F9 02 02 92 00 00 FE 04 02 A8 00 00 FC 03 FE FC 00 00 F9 02 FF FC 00 00 01 04 01 D3 00 00 FC 04 FF E2 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-20 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 F9 02 01 C0 00 00 FF 04 01 B5 00 00 FB 03 FE FC 00 00 F9 02 01 94 00 00 01 03 01 85 00 00 FC 03 FE FC 00 00 F9 02 FF FC 00 00 FF 04 02 AF 00 00 FB 04 FD E5 00 - ]; - qcom,mdss-dsi-on-command-20 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 F9 02 01 C0 00 00 FF 04 01 B5 00 00 FB 03 FE FC 00 00 F9 02 01 94 00 00 01 03 01 85 00 00 FC 03 FE FC 00 00 F9 02 FF FC 00 00 FF 04 02 AF 00 00 FB 04 FD E5 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-21 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 FA 01 02 37 00 00 01 05 03 FC 00 00 FC 03 FE B3 00 00 F9 01 01 34 00 00 01 05 03 FC 00 00 FD 03 FF E2 00 00 F9 02 02 7C 00 00 01 05 03 FC 00 00 FC 03 FE A2 00 - ]; - qcom,mdss-dsi-on-command-21 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 FA 01 02 37 00 00 01 05 03 FC 00 00 FC 03 FE B3 00 00 F9 01 01 34 00 00 01 05 03 FC 00 00 FD 03 FF E2 00 00 F9 02 02 7C 00 00 01 05 03 FC 00 00 FC 03 FE A2 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-22 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 FA 01 02 57 00 00 01 05 03 FC 00 00 FC 03 FE D5 00 00 FA 01 03 4A 00 00 01 05 03 F1 00 00 FC 03 FE FC 00 00 FA 01 01 A0 00 00 01 05 03 FC 00 00 FC 03 FE C4 00 - ]; - qcom,mdss-dsi-on-command-22 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 FA 01 02 57 00 00 01 05 03 FC 00 00 FC 03 FE D5 00 00 FA 01 03 4A 00 00 01 05 03 F1 00 00 FC 03 FE FC 00 00 FA 01 01 A0 00 00 01 05 03 FC 00 00 FC 03 FE C4 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-23 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 F9 02 02 7C 00 00 01 04 02 DC 00 00 FC 03 FE FC 00 00 FA 01 03 51 00 00 FF 04 02 AB 00 00 FC 03 FE FC 00 00 F9 02 FF D4 00 00 01 04 02 EC 00 00 FC 03 FE FC 00 - ]; - qcom,mdss-dsi-on-command-23 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 F9 02 02 7C 00 00 01 04 02 DC 00 00 FC 03 FE FC 00 00 FA 01 03 51 00 00 FF 04 02 AB 00 00 FC 03 FE FC 00 00 F9 02 FF D4 00 00 01 04 02 EC 00 00 FC 03 FE FC 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-white-command-24 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 F9 02 02 7E 00 00 01 04 02 B7 00 00 FC 03 FE FC 00 00 FA 01 02 55 00 00 01 03 01 89 00 00 FD 03 FE FC 00 00 FA 02 01 D3 00 00 FF 04 01 C7 00 00 FC 03 FE FC 00 - ]; - qcom,mdss-dsi-on-command-24 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 00 11 1D 2D 3B 46 5E 6F 7D 8A 3D 4A 5A 70 7B 88 98 A4 B1 - 29 01 00 00 00 00 38 C8 01 00 F9 02 02 7E 00 00 01 04 02 B7 00 00 FC 03 FE FC 00 00 FA 01 02 55 00 00 01 03 01 89 00 00 FD 03 FE FC 00 00 FA 02 01 D3 00 00 FF 04 01 C7 00 00 FC 03 FE FC 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - qcom,mdss-dsi-off-command = [ - 39 01 00 00 14 00 02 28 00 - 39 01 00 00 78 00 02 10 00 - ]; - qcom,mdss-dsi-CABC_on-command = [ - 15 01 00 00 00 00 02 55 01 - 29 00 00 00 00 00 02 b0 04 - 29 01 00 00 00 00 08 B8 89 51 15 00 02 00 00 - 29 01 00 00 00 00 1A CE dd 05 0F 10 24 45 66 85 9C AC C4 C6 eE F0 f2 fb ff 02 00 04 04 24 04 69 5a - 29 01 00 00 00 00 0A F9 64 FF E0 BE 00 8D BF 80 00 - ]; - qcom,mdss-dsi-CABC_off-command = [ - 15 01 00 00 00 00 02 55 00 - ]; - qcom,mdss-dsi-CE_on-command = [ - //29 01 00 00 00 00 2C CA 1D FC E4 B8 03 FF 05 F5 EF FB E1 F8 05 0C 16 11 FD F7 FD FA FD 00 FF 00 00 FF 00 00 FF 00 FF 00 07 FF 05 FF 00 00 FF 2A 00 FF FF - 29 01 00 00 00 00 2C CA 1D FC FC FC 0D F0 03 18 00 18 12 0F 07 15 00 FB 0A 0B 0C 03 00 FD FF 00 00 FC 02 01 80 9F 6C 50 97 62 4C 00 B9 87 72 BF 89 70 00 - ]; - qcom,mdss-dsi-CE_off-command = [ - 29 01 00 00 00 00 2C CA 1C FC FC FC 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 - ]; - qcom,mdss-dsi-cold_gamma-command = [ - 39 01 00 00 00 00 02 84 7F - ]; - qcom,mdss-dsi-warm_gamma-command = [ - 39 01 00 00 00 00 02 84 80 - ]; - qcom,mdss-dsi-default_gamma-command = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 c7 00 10 1C 2C 3A 45 5D 6F 7D 8A 3E 4B 5B 71 7B 88 98 A5 B1 00 10 1C 2C 3A 45 5D 6F 7D 8A 3E 4B 5B 71 7B 88 98 A5 B1 - 29 01 00 00 00 00 15 C8 01 00 03 01 03 FC 00 00 03 FE FE FC 00 00 01 FE FB FC 00 00 - ]; - - qcom,mdss-dsi-sRGB_on-command = [ - 15 01 00 00 00 00 02 B0 00 - 29 01 00 00 00 00 2C CA 1D FC D8 80 1B EB F1 CA E7 D5 F5 DC EE 25 FD E9 1F 2B FF 08 F7 27 FF 00 00 F6 25 1E FF 00 FF 00 55 FA 3C FF 00 00 FF 01 35 E6 FF - ]; - qcom,mdss-dsi-sRGB_off-command = [ - 29 01 00 00 00 00 2C CA 1C FC FC FC 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 - ]; - - qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; - qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; - qcom,mdss-dsi-CABC_on-command-state = "dsi_lp_mode"; - qcom,mdss-dsi-CABC_off-command-state = "dsi_lp_mode"; - qcom,mdss-dsi-CE_on-command-state = "dsi_lp_mode"; - qcom,mdss-dsi-CE_off-command-state = "dsi_lp_mode"; - qcom,mdss-dsi-cold_gamma-command-state = "dsi_lp_mode"; - qcom,mdss-dsi-warm_gamma-command-state = "dsi_lp_mode"; - qcom,mdss-dsi-default_gamma-command-state = "dsi_lp_mode"; - qcom,mdss-dsi-sRGB_on-command-state = "dsi_lp_mode"; - qcom,mdss-dsi-sRGB_off-command-state = "dsi_lp_mode"; - qcom,mdss-white-command-state = "dsi_lp_mode"; - qcom,mdss-dsi-h-sync-pulse = <1>; - qcom,mdss-dsi-traffic-mode = "burst_mode"; - qcom,mdss-dsi-bllp-eof-power-mode; - qcom,mdss-dsi-bllp-power-mode; - qcom,mdss-dsi-lane-0-state; - qcom,mdss-dsi-lane-1-state; - qcom,mdss-dsi-lane-2-state; - qcom,mdss-dsi-lane-3-state; - qcom,mdss-dsi-panel-timings = [7d 25 1d 00 37 33 - 22 27 1e 03 04 00]; - qcom,mdss-dsi-t-clk-post = <0x0E>; - qcom,mdss-dsi-t-clk-pre = <0x34>; - qcom,mdss-dsi-bl-min-level = <1>; - qcom,mdss-dsi-bl-max-level = <4095>; - qcom,mdss-dsi-dma-trigger = "trigger_sw"; - qcom,mdss-dsi-mdp-trigger = "none"; - qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; - qcom,mdss-dsi-reset-sequence = <1 5>, <0 5>, <1 30>; - //qcom,mdss-dsi-tx-eot-append; - qcom,esd-check-enabled; - qcom,mdss-dsi-panel-status-command = [06 01 00 01 05 00 01 0A]; - qcom,mdss-dsi-panel-status-command-mode = "dsi_lp_mode"; - qcom,mdss-dsi-panel-status-check-mode = "TE_check_NT35596"; - qcom,mdss-dsi-panel-status-read-length = <1>; - qcom,mdss-dsi-panel-status-value = <0x9C>; - qcom,mdss-dsi-panel-max-error-count = <3>; - qcom,mdss-pan-physical-width-dimension = <69>; - qcom,mdss-pan-physical-height-dimension = <122>; - }; -}; diff --git a/arch/arm/boot/dts/qcom/dsi-panel-td4310-fhdplus-video_e7.dtsi b/arch/arm/boot/dts/qcom/dsi-panel-td4310-fhdplus-video_e7.dtsi deleted file mode 100644 index eeb912675f8c..000000000000 --- a/arch/arm/boot/dts/qcom/dsi-panel-td4310-fhdplus-video_e7.dtsi +++ /dev/null @@ -1,624 +0,0 @@ -/* Copyright (c) 2012-2015, The Linux Foundation. All rights reserved. - * Copyright (C) 2018 XiaoMi, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -&mdss_mdp { - dsi_td4310_fhdplus_e7_vid: qcom,mdss_dsi_td4310_fhdplus_video_e7 { - qcom,mdss-dsi-panel-name = "td4310 fhdplus e7 video mode dsi panel"; - qcom,mdss-dsi-panel-type = "dsi_video_mode"; - qcom,mdss-dsi-panel-framerate = <60>; - qcom,mdss-dsi-virtual-channel-id = <0>; - qcom,mdss-dsi-stream = <0>; - qcom,mdss-dsi-panel-width = <1080>; - qcom,mdss-dsi-panel-height = <2160>; - qcom,mdss-dsi-h-front-porch = <108>; - qcom,mdss-dsi-h-back-porch = <60>; - qcom,mdss-dsi-h-pulse-width = <12>; - qcom,mdss-dsi-h-sync-skew = <0>; - qcom,mdss-dsi-v-back-porch = <33>; - qcom,mdss-dsi-v-front-porch = <6>; - qcom,mdss-dsi-v-pulse-width = <4>; - qcom,mdss-dsi-h-left-border = <0>; - qcom,mdss-dsi-h-right-border = <0>; - qcom,mdss-dsi-v-top-border = <0>; - qcom,mdss-dsi-v-bottom-border = <0>; - qcom,mdss-dsi-bpp = <24>; - qcom,mdss-dsi-underflow-color = <0xff>; - qcom,mdss-dsi-border-color = <0>; - - qcom,mdss-dsi-on-command = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 03 00 01 01 02 FE 00 00 FE FF 02 F3 00 00 01 FD 01 EE 00 00 FF 01 01 F6 00 00 01 FE 03 EC 00 00 01 FC FE FE 00 00 01 01 02 FE 00 00 FF FF 02 E9 00 00 01 FE 01 CD 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-01 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 01 FD 01 CC 00 00 02 FE 01 FC 00 00 01 FF FF B7 00 00 FF 01 01 F6 00 00 01 FE 03 EC 00 00 01 FC FE FE 00 00 01 01 02 FE 00 00 FF FF 02 E9 00 00 01 FE 01 CD 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-02 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 01 FE 01 F3 00 00 02 FE 01 FC 00 00 01 FE FE E0 00 00 FF 01 01 F6 00 00 01 FE 03 EC 00 00 01 FC FE FE 00 00 01 01 02 FE 00 00 FF FF 02 E9 00 00 01 FE 01 CD 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-03 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 03 00 01 FD 01 FE 00 00 02 FE FF F0 00 00 01 FE FD FE 00 00 FF 01 01 F6 00 00 01 FE 03 EC 00 00 01 FC FE FE 00 00 01 01 02 FE 00 00 FF FF 02 E9 00 00 01 FE 01 CD 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-04 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 01 FD 01 FC 00 00 02 FE 01 B6 00 00 01 FE FD FC 00 00 FF 01 01 F6 00 00 01 FE 03 EC 00 00 01 FC FE FE 00 00 01 01 02 FE 00 00 FF FF 02 E9 00 00 01 FE 01 CD 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-05 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FE FF FE FC 00 00 FE FF FF 96 00 00 FE 01 02 8E 00 00 04 01 FD 97 00 00 03 FF FD B9 00 00 04 FC F8 FC 00 00 04 01 FE FC 00 00 03 FF FD C0 00 00 04 FF FE 53 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-06 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 01 FD 01 FC 00 00 02 FE FF D9 00 00 01 FF 01 CB 00 00 FF 01 01 F6 00 00 01 FE 03 EC 00 00 01 FC FE FE 00 00 01 01 02 FE 00 00 FF FF 02 E9 00 00 01 FE 01 CD 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-07 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 01 FD 01 CC 00 00 02 FE 01 FC 00 00 01 FE FD FC 00 00 FF 01 01 F6 00 00 01 FE 03 EC 00 00 01 FC FE FE 00 00 01 01 02 FE 00 00 FF FF 02 E9 00 00 01 FE 01 CD 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-08 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 01 FD 01 84 00 00 02 FE 01 FC 00 00 01 FE FD FC 00 00 FF 01 01 F6 00 00 01 FE 03 EC 00 00 01 FC FE FE 00 00 01 01 02 FE 00 00 FF FF 02 E9 00 00 01 FE 01 CD 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-09 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 01 FD 01 FC 00 00 02 FE FE E7 00 00 01 FE 01 8F 00 00 FF 01 01 F6 00 00 01 FE 03 EC 00 00 01 FC FE FE 00 00 01 01 02 FE 00 00 FF FF 02 E9 00 00 01 FE 01 CD 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-10 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FE FF FE FC 00 00 FE FF FF BA 00 00 FE 01 02 8C 00 00 04 01 FD 97 00 00 03 FF FD B9 00 00 04 FC F8 FC 00 00 04 01 FE FC 00 00 03 FF FD CC 00 00 04 FF FE 53 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-11 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FE FF FE FC 00 00 FF FF 02 70 00 00 FE 01 02 8F 00 00 04 01 FD 97 00 00 03 FF FD B9 00 00 04 FC F8 FC 00 00 04 01 FE FC 00 00 03 FF FD CC 00 00 04 FF FE 53 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-12 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FE FF FE FC 00 00 FD 01 01 4C 00 00 FE 01 02 90 00 00 04 01 FD 97 00 00 03 FF FD B9 00 00 04 FC F8 FC 00 00 04 01 FE FC 00 00 03 FF FD CC 00 00 04 FF FE 53 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-13 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 01 FD 01 FC 00 00 02 FE 01 FC 00 00 01 FF FF B8 00 00 FF 01 01 F6 00 00 01 FE 03 EC 00 00 01 FC FE FE 00 00 01 01 02 FE 00 00 FF FF 02 E9 00 00 01 FE 01 CD 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-14 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 01 FD 01 FC 00 00 02 FE 01 FC 00 00 01 FF 01 CB 00 00 FF 01 01 F6 00 00 01 FE 03 EC 00 00 01 FC FE FE 00 00 01 01 02 FE 00 00 FF FF 02 E9 00 00 01 FE 01 CD 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-15 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 01 FD 01 FC 00 00 02 FF 01 AE 00 00 01 FF 01 CB 00 00 FF 01 01 F6 00 00 01 FE 03 EC 00 00 01 FC FE FE 00 00 01 01 02 FE 00 00 FF FF 02 E9 00 00 01 FE 01 CD 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-16 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FE FF FE FC 00 00 FD 01 FD 87 00 00 FD 01 01 CA 00 00 04 01 FD 97 00 00 03 FF FD B9 00 00 04 FC F8 FC 00 00 04 01 FE FC 00 00 03 FF FD CC 00 00 04 FF FE 53 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-17 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 01 FE 01 85 00 00 02 FE 01 FC 00 00 01 FF 01 B6 00 00 FF 01 01 F6 00 00 01 FE 03 EC 00 00 01 FC FE FE 00 00 01 01 02 FE 00 00 FF FF 02 E9 00 00 01 FE 01 CD 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-18 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 01 FE 01 AB 00 00 02 FE 01 FC 00 00 01 FE FE DD 00 00 FF 01 01 F6 00 00 01 FE 03 EC 00 00 01 FC FE FE 00 00 01 01 02 FE 00 00 FF FF 02 E9 00 00 01 FE 01 CD 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-19 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 01 FD 01 CE 00 00 02 FE FE E3 00 00 01 FE FD FC 00 00 FF 01 01 F6 00 00 01 FE 03 EC 00 00 01 FC FE FE 00 00 01 01 02 FE 00 00 FF FF 02 E9 00 00 01 FE 01 CD 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-20 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FE FF FC CF 00 00 FD 01 FC BB 00 00 FD 01 FD FC 00 00 04 01 FD 97 00 00 03 FF FD B9 00 00 04 FC F8 FC 00 00 04 01 FE FC 00 00 03 FF FD CC 00 00 04 FF FE 53 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-21 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 01 FE 01 3D 00 00 02 FE 01 FC 00 00 01 FF FF B5 00 00 FF 01 01 F6 00 00 01 FE 03 EC 00 00 01 FC FE FE 00 00 01 01 02 FE 00 00 FF FF 02 E9 00 00 01 FE 01 CD 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-22 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 01 FE FF 63 00 00 02 FE 01 FC 00 00 01 FE 01 DA 00 00 FF 01 01 F6 00 00 01 FE 03 EC 00 00 01 FC FE FE 00 00 01 01 02 FE 00 00 FF FF 02 E9 00 00 01 FE 01 CD 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-23 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 01 FE 01 86 00 00 02 FE 01 E6 00 00 01 FE FD FC 00 00 FF 01 01 F6 00 00 01 FE 03 EC 00 00 01 FC FE FE 00 00 01 01 02 FE 00 00 FF FF 02 E9 00 00 01 FE 01 CD 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-24 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FE FF FF 85 00 00 FC 01 FA C1 00 00 FD 01 FD FC 00 00 04 01 FD 97 00 00 03 FF FD B9 00 00 04 FC F8 FC 00 00 04 01 FE FC 00 00 03 FF FD CC 00 00 04 FF FE 53 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-off-command = [ - 39 01 00 00 14 00 02 28 00 - 39 01 00 00 78 00 02 10 00 - ]; - qcom,mdss-dsi-CABC_on-command = [ - 15 01 00 00 00 00 02 55 01 - 29 01 00 00 00 00 08 B8 89 51 0d 00 02 00 00 - 29 01 00 00 00 00 1A CE 55 40 4d 6a 75 97 a7 b6 c9 d0 d4 e7 f8 f9 fa fb ff 04 00 00 04 46 04 69 5a //default old rsp - 29 01 00 00 00 00 0A F9 64 FF E0 BE 00 8D BF 80 00 - ]; - qcom,mdss-dsi-CABC_off-command = [ - 15 01 00 00 00 00 02 55 00 - ]; - qcom,mdss-dsi-CE_on-command = [ - 29 01 00 00 00 00 2C CA 1D FC FC FC 00 EC F8 3D 00 13 0E 13 00 1F 08 00 19 11 00 00 00 00 D5 A1 89 d8 9e 87 40 00 00 00 00 00 00 00 00 00 00 00 00 00 00 - ]; - qcom,mdss-dsi-CE_off-command = [ - 29 01 00 00 00 00 2C CA 1C FC FC FC 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 - ]; - qcom,mdss-dsi-cold_gamma-command = [ - 39 01 00 00 00 00 02 84 7F - ]; - qcom,mdss-dsi-warm_gamma-command = [ - 39 01 00 00 00 00 02 84 80 - ]; - qcom,mdss-dsi-default_gamma-command = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 03 00 01 01 02 FE 00 00 FE FF 02 F3 00 00 01 FD 01 EE 00 00 FF 01 01 F6 00 00 01 FE 03 EC 00 00 01 FC FE FE 00 00 01 01 02 FE 00 00 FF FF 02 E9 00 00 01 FE 01 CD 00 - ]; /*Add by HQ-sxf follow gamma0*/ - - - /*Add by HQ-sxf follow white gamma start*/ - qcom,mdss-white-command-00 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 03 00 01 01 02 FE 00 00 FE FF 02 F3 00 00 01 FD 01 EE 00 00 FF 01 01 F6 00 00 01 FE 03 EC 00 00 01 FC FE FE 00 00 01 01 02 FE 00 00 FF FF 02 E9 00 00 01 FE 01 CD 00 - ]; - - qcom,mdss-white-command-01 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 01 FD 01 CC 00 00 02 FE 01 FC 00 00 01 FF FF B7 00 00 FF 01 01 F6 00 00 01 FE 03 EC 00 00 01 FC FE FE 00 00 01 01 02 FE 00 00 FF FF 02 E9 00 00 01 FE 01 CD 00 - ]; - - qcom,mdss-white-command-02 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 01 FE 01 F3 00 00 02 FE 01 FC 00 00 01 FE FE E0 00 00 FF 01 01 F6 00 00 01 FE 03 EC 00 00 01 FC FE FE 00 00 01 01 02 FE 00 00 FF FF 02 E9 00 00 01 FE 01 CD 00 - ]; - - qcom,mdss-white-command-03 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 03 00 01 FD 01 FE 00 00 02 FE FF F0 00 00 01 FE FD FE 00 00 FF 01 01 F6 00 00 01 FE 03 EC 00 00 01 FC FE FE 00 00 01 01 02 FE 00 00 FF FF 02 E9 00 00 01 FE 01 CD 00 - ]; - - qcom,mdss-white-command-04 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 01 FD 01 FC 00 00 02 FE 01 B6 00 00 01 FE FD FC 00 00 FF 01 01 F6 00 00 01 FE 03 EC 00 00 01 FC FE FE 00 00 01 01 02 FE 00 00 FF FF 02 E9 00 00 01 FE 01 CD 00 - ]; - - qcom,mdss-white-command-05 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FE FF FE FC 00 00 FE FF FF 96 00 00 FE 01 02 8E 00 00 04 01 FD 97 00 00 03 FF FD B9 00 00 04 FC F8 FC 00 00 04 01 FE FC 00 00 03 FF FD C0 00 00 04 FF FE 53 00 - ]; - - qcom,mdss-white-command-06 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 01 FD 01 FC 00 00 02 FE FF D9 00 00 01 FF 01 CB 00 00 FF 01 01 F6 00 00 01 FE 03 EC 00 00 01 FC FE FE 00 00 01 01 02 FE 00 00 FF FF 02 E9 00 00 01 FE 01 CD 00 - ]; - - qcom,mdss-white-command-07 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 01 FD 01 CC 00 00 02 FE 01 FC 00 00 01 FE FD FC 00 00 FF 01 01 F6 00 00 01 FE 03 EC 00 00 01 FC FE FE 00 00 01 01 02 FE 00 00 FF FF 02 E9 00 00 01 FE 01 CD 00 - ]; - - qcom,mdss-white-command-08 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 01 FD 01 84 00 00 02 FE 01 FC 00 00 01 FE FD FC 00 00 FF 01 01 F6 00 00 01 FE 03 EC 00 00 01 FC FE FE 00 00 01 01 02 FE 00 00 FF FF 02 E9 00 00 01 FE 01 CD 00 - ]; - - qcom,mdss-white-command-09 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 01 FD 01 FC 00 00 02 FE FE E7 00 00 01 FE 01 8F 00 00 FF 01 01 F6 00 00 01 FE 03 EC 00 00 01 FC FE FE 00 00 01 01 02 FE 00 00 FF FF 02 E9 00 00 01 FE 01 CD 00 - ]; - - qcom,mdss-white-command-10 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FE FF FE FC 00 00 FE FF FF BA 00 00 FE 01 02 8C 00 00 04 01 FD 97 00 00 03 FF FD B9 00 00 04 FC F8 FC 00 00 04 01 FE FC 00 00 03 FF FD CC 00 00 04 FF FE 53 00 - ]; - - qcom,mdss-white-command-11 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FE FF FE FC 00 00 FF FF 02 70 00 00 FE 01 02 8F 00 00 04 01 FD 97 00 00 03 FF FD B9 00 00 04 FC F8 FC 00 00 04 01 FE FC 00 00 03 FF FD CC 00 00 04 FF FE 53 00 - ]; - - qcom,mdss-white-command-12 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FE FF FE FC 00 00 FD 01 01 4C 00 00 FE 01 02 90 00 00 04 01 FD 97 00 00 03 FF FD B9 00 00 04 FC F8 FC 00 00 04 01 FE FC 00 00 03 FF FD CC 00 00 04 FF FE 53 00 - ]; - - qcom,mdss-white-command-13 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 01 FD 01 FC 00 00 02 FE 01 FC 00 00 01 FF FF B8 00 00 FF 01 01 F6 00 00 01 FE 03 EC 00 00 01 FC FE FE 00 00 01 01 02 FE 00 00 FF FF 02 E9 00 00 01 FE 01 CD 00 - ]; - - qcom,mdss-white-command-14 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 01 FD 01 FC 00 00 02 FE 01 FC 00 00 01 FF 01 CB 00 00 FF 01 01 F6 00 00 01 FE 03 EC 00 00 01 FC FE FE 00 00 01 01 02 FE 00 00 FF FF 02 E9 00 00 01 FE 01 CD 00 - ]; - - qcom,mdss-white-command-15 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 01 FD 01 FC 00 00 02 FF 01 AE 00 00 01 FF 01 CB 00 00 FF 01 01 F6 00 00 01 FE 03 EC 00 00 01 FC FE FE 00 00 01 01 02 FE 00 00 FF FF 02 E9 00 00 01 FE 01 CD 00 - ]; - - qcom,mdss-white-command-16 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FE FF FE FC 00 00 FD 01 FD 87 00 00 FD 01 01 CA 00 00 04 01 FD 97 00 00 03 FF FD B9 00 00 04 FC F8 FC 00 00 04 01 FE FC 00 00 03 FF FD CC 00 00 04 FF FE 53 00 - ]; - - qcom,mdss-white-command-17 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 01 FE 01 85 00 00 02 FE 01 FC 00 00 01 FF 01 B6 00 00 FF 01 01 F6 00 00 01 FE 03 EC 00 00 01 FC FE FE 00 00 01 01 02 FE 00 00 FF FF 02 E9 00 00 01 FE 01 CD 00 - ]; - - qcom,mdss-white-command-18 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 01 FE 01 AB 00 00 02 FE 01 FC 00 00 01 FE FE DD 00 00 FF 01 01 F6 00 00 01 FE 03 EC 00 00 01 FC FE FE 00 00 01 01 02 FE 00 00 FF FF 02 E9 00 00 01 FE 01 CD 00 - ]; - - qcom,mdss-white-command-19 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 01 FD 01 CE 00 00 02 FE FE E3 00 00 01 FE FD FC 00 00 FF 01 01 F6 00 00 01 FE 03 EC 00 00 01 FC FE FE 00 00 01 01 02 FE 00 00 FF FF 02 E9 00 00 01 FE 01 CD 00 - ]; - - qcom,mdss-white-command-20 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FE FF FC CF 00 00 FD 01 FC BB 00 00 FD 01 FD FC 00 00 04 01 FD 97 00 00 03 FF FD B9 00 00 04 FC F8 FC 00 00 04 01 FE FC 00 00 03 FF FD CC 00 00 04 FF FE 53 00 - ]; - - qcom,mdss-white-command-21 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 01 FE 01 3D 00 00 02 FE 01 FC 00 00 01 FF FF B5 00 00 FF 01 01 F6 00 00 01 FE 03 EC 00 00 01 FC FE FE 00 00 01 01 02 FE 00 00 FF FF 02 E9 00 00 01 FE 01 CD 00 - ]; - - qcom,mdss-white-command-22 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 01 FE FF 63 00 00 02 FE 01 FC 00 00 01 FE 01 DA 00 00 FF 01 01 F6 00 00 01 FE 03 EC 00 00 01 FC FE FE 00 00 01 01 02 FE 00 00 FF FF 02 E9 00 00 01 FE 01 CD 00 - ]; - - qcom,mdss-white-command-23 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 01 FE 01 86 00 00 02 FE 01 E6 00 00 01 FE FD FC 00 00 FF 01 01 F6 00 00 01 FE 03 EC 00 00 01 FC FE FE 00 00 01 01 02 FE 00 00 FF FF 02 E9 00 00 01 FE 01 CD 00 - ]; - - qcom,mdss-white-command-24 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FE FF FF 85 00 00 FC 01 FA C1 00 00 FD 01 FD FC 00 00 04 01 FD 97 00 00 03 FF FD B9 00 00 04 FC F8 FC 00 00 04 01 FE FC 00 00 03 FF FD CC 00 00 04 FF FE 53 00 - ]; - - /*white gamma end*/ - - /*Add by HQ-zmc follow sRGB[Date: 2017-11-25 13:35:40]*/ - qcom,mdss-dsi-sRGB_on-command = [ - 15 01 00 00 00 00 02 84 00 - 29 01 00 00 00 00 2C CA 1D FC DC 9C 17 EA F4 EF 30 EF DB 0C F6 67 4C 2C 38 2A 19 06 06 25 FF 00 00 F7 2E 19 FF 00 FF 00 4B FD 3D FF 00 00 FF 42 01 FC FF - ]; - qcom,mdss-dsi-sRGB_off-command = [ - 29 01 00 00 00 00 2C CA 1C FC FC FC 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 - ]; - - qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; - qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; - qcom,mdss-dsi-CABC_on-command-state = "dsi_lp_mode"; - qcom,mdss-dsi-CABC_off-command-state = "dsi_lp_mode"; - qcom,mdss-dsi-CE_on-command-state = "dsi_lp_mode"; - qcom,mdss-dsi-CE_off-command-state = "dsi_lp_mode"; - qcom,mdss-dsi-cold_gamma-command-state = "dsi_lp_mode"; - qcom,mdss-dsi-warm_gamma-command-state = "dsi_lp_mode"; - qcom,mdss-dsi-default_gamma-command-state = "dsi_lp_mode"; - qcom,mdss-white-command-state = "dsi_lp_mode"; - qcom,mdss-dsi-sRGB_on-command-state = "dsi_lp_mode"; - qcom,mdss-dsi-sRGB_off-command-state = "dsi_lp_mode"; - qcom,mdss-dsi-h-sync-pulse = <1>; - qcom,mdss-dsi-traffic-mode = "burst_mode"; - qcom,mdss-dsi-bllp-eof-power-mode; - qcom,mdss-dsi-bllp-power-mode; - qcom,mdss-dsi-lane-0-state; - qcom,mdss-dsi-lane-1-state; - qcom,mdss-dsi-lane-2-state; - qcom,mdss-dsi-lane-3-state; - qcom,mdss-dsi-panel-timings = [7d 25 1d 00 37 33 - 22 27 1e 03 04 00]; - qcom,mdss-dsi-t-clk-post = <0x0E>; - qcom,mdss-dsi-t-clk-pre = <0x35>; - qcom,mdss-dsi-bl-min-level = <1>; - qcom,mdss-dsi-bl-max-level = <4095>; - qcom,mdss-dsi-dma-trigger = "trigger_sw"; - qcom,mdss-dsi-mdp-trigger = "none"; - qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; - qcom,mdss-dsi-reset-sequence = <1 5>, <0 5>, <1 30>; - //qcom,mdss-dsi-tx-eot-append; - qcom,esd-check-enabled; - qcom,mdss-dsi-panel-status-command = [06 01 00 01 05 00 01 0A]; - qcom,mdss-dsi-panel-status-command-mode = "dsi_lp_mode"; - qcom,mdss-dsi-panel-status-check-mode = "TE_check_NT35596"; - qcom,mdss-dsi-panel-status-read-length = <1>; - qcom,mdss-dsi-panel-status-value = <0x9C>; - qcom,mdss-dsi-panel-max-error-count = <3>; - qcom,mdss-pan-physical-width-dimension = <69>; - qcom,mdss-pan-physical-height-dimension = <122>; - }; -}; diff --git a/arch/arm/boot/dts/qcom/dsi-panel-td4310-fhdplus-video_e7_g55.dtsi b/arch/arm/boot/dts/qcom/dsi-panel-td4310-fhdplus-video_e7_g55.dtsi deleted file mode 100644 index e263f2c1a376..000000000000 --- a/arch/arm/boot/dts/qcom/dsi-panel-td4310-fhdplus-video_e7_g55.dtsi +++ /dev/null @@ -1,627 +0,0 @@ -/* Copyright (c) 2012-2015, The Linux Foundation. All rights reserved. - * Copyright (C) 2018 XiaoMi, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -&mdss_mdp { - dsi_td4310_fhdplus_e7_g55_vid: qcom,mdss_dsi_td4310_fhdplus_video_e7_g55 { - qcom,mdss-dsi-panel-name = "td4310 fhdplus e7 g55 video mode dsi panel"; - qcom,mdss-dsi-panel-type = "dsi_video_mode"; - qcom,mdss-dsi-panel-framerate = <60>; - qcom,mdss-dsi-virtual-channel-id = <0>; - qcom,mdss-dsi-stream = <0>; - qcom,mdss-dsi-panel-width = <1080>; - qcom,mdss-dsi-panel-height = <2160>; - qcom,mdss-dsi-h-front-porch = <108>; - qcom,mdss-dsi-h-back-porch = <60>; - qcom,mdss-dsi-h-pulse-width = <12>; - qcom,mdss-dsi-h-sync-skew = <0>; - qcom,mdss-dsi-v-back-porch = <33>; - qcom,mdss-dsi-v-front-porch = <6>; - qcom,mdss-dsi-v-pulse-width = <4>; - qcom,mdss-dsi-h-left-border = <0>; - qcom,mdss-dsi-h-right-border = <0>; - qcom,mdss-dsi-v-top-border = <0>; - qcom,mdss-dsi-v-bottom-border = <0>; - qcom,mdss-dsi-bpp = <24>; - qcom,mdss-dsi-underflow-color = <0xff>; - qcom,mdss-dsi-border-color = <0>; - - qcom,mdss-dsi-on-command = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - //29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - //29 01 00 00 00 00 38 C8 03 00 01 01 02 FE 00 00 FE FF 02 F3 00 00 01 FD 01 EE 00 00 FF 01 01 F6 00 00 01 FE 03 EC 00 00 01 FC FE FE 00 00 01 01 02 FE 00 00 FF FF 02 E9 00 00 01 FE 01 CD 00 - 29 01 00 00 00 00 27 C7 00 19 28 3B 4A 55 6D 7D 8A 96 48 54 62 76 7F 8B 99 A4 B2 00 19 28 3B 4A 55 6D 7D 8A 96 48 54 62 76 7F 8B 99 A4 B2 - 29 01 00 00 00 00 38 C8 03 00 01 03 FF FE 00 00 FE 01 FD F7 00 00 01 FF FB F2 00 00 01 03 01 EC 00 00 FE 01 FD F5 00 00 01 FE FA FE 00 00 01 03 FF FE 00 00 FE 01 FD EC 00 00 FE 01 FB D3 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-01 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FD FB FA B1 00 00 FF FB FF FC 00 00 FE FB FC AF 00 00 01 03 01 EC 00 00 FE 01 FD F5 00 00 01 FE FA FE 00 00 01 03 FF FE 00 00 FE 01 FD EC 00 00 FE 01 FB D3 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-02 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FD FA FD D7 00 00 FF FB FF FC 00 00 FD FB FD D4 00 00 01 03 01 EC 00 00 FE 01 FD F5 00 00 01 FE FA FE 00 00 01 03 FF FE 00 00 FE 01 FD EC 00 00 FE 01 FB D3 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-03 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FD FA FF FC 00 00 FE FB FB D6 00 00 FD FB FD FC 00 00 01 03 01 EC 00 00 FE 01 FD F5 00 00 01 FE FA FE 00 00 01 03 FF FE 00 00 FE 01 FD EC 00 00 FE 01 FB D3 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-04 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FD FA FF FC 00 00 FF FB FB AE 00 00 FD FB FE FB 00 00 01 03 01 EC 00 00 FE 01 FD F5 00 00 01 FE FA FE 00 00 01 03 FF FE 00 00 FE 01 FD EC 00 00 FE 01 FB D3 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-05 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FE FF FE FC 00 00 FE FF FF 96 00 00 FE 01 02 8E 00 00 04 01 FD 97 00 00 03 FF FD B9 00 00 04 FC F8 FC 00 00 04 01 FE FC 00 00 03 FF FD C0 00 00 04 FF FE 53 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-06 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FD FA FF FC 00 00 01 FB FD B9 00 00 FE FB FA BB 00 00 01 03 01 EC 00 00 FE 01 FD F5 00 00 01 FE FA FE 00 00 01 03 FF FE 00 00 FE 01 FD EC 00 00 FE 01 FB D3 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-07 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FD FA FC B4 00 00 FF FB FF FC 00 00 FD FB FE F9 00 00 01 03 01 EC 00 00 FE 01 FD F5 00 00 01 FE FA FE 00 00 01 03 FF FE 00 00 FE 01 FD EC 00 00 FE 01 FB D3 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-08 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FD FB FB 66 00 00 FF FB FF FC 00 00 FD FB FD F8 00 00 01 03 01 EC 00 00 FE 01 FD F5 00 00 01 FE FA FE 00 00 01 03 FF FE 00 00 FE 01 FD EC 00 00 FE 01 FB D3 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-09 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FD FA FF FC 00 00 FF FB FD C5 00 00 FF FB FD 7A 00 00 01 03 01 EC 00 00 FE 01 FD F5 00 00 01 FE FA FE 00 00 01 03 FF FE 00 00 FE 01 FD EC 00 00 FE 01 FB D3 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-10 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FE FF FE FC 00 00 FE FF FF BA 00 00 FE 01 02 8C 00 00 04 01 FD 97 00 00 03 FF FD B9 00 00 04 FC F8 FC 00 00 04 01 FE FC 00 00 03 FF FD CC 00 00 04 FF FE 53 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-11 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FE FF FE FC 00 00 FF FF 02 70 00 00 FE 01 02 8F 00 00 04 01 FD 97 00 00 03 FF FD B9 00 00 04 FC F8 FC 00 00 04 01 FE FC 00 00 03 FF FD CC 00 00 04 FF FE 53 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-12 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FE FF FE FC 00 00 FD 01 01 4C 00 00 FE 01 02 90 00 00 04 01 FD 97 00 00 03 FF FD B9 00 00 04 FC F8 FC 00 00 04 01 FE FC 00 00 03 FF FD CC 00 00 04 FF FE 53 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-13 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FC FB FF F4 00 00 FF FB FF FC 00 00 FE FB FC AF 00 00 01 03 01 EC 00 00 FE 01 FD F5 00 00 01 FE FA FE 00 00 01 03 FF FE 00 00 FE 01 FD EC 00 00 FE 01 FB D3 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-14 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FD FA FF FC 00 00 FE FB FD E0 00 00 FE FB FB B9 00 00 01 03 01 EC 00 00 FE 01 FD F5 00 00 01 FE FA FE 00 00 01 03 FF FE 00 00 FE 01 FD EC 00 00 FE 01 FB D3 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-15 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FD FA FF FC 00 00 01 FB FD 94 00 00 FD FB FC BC 00 00 01 03 01 EC 00 00 FE 01 FD F5 00 00 01 FE FA FE 00 00 01 03 FF FE 00 00 FE 01 FD EC 00 00 FE 01 FB D3 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-16 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FE FF FE FC 00 00 FD 01 FD 87 00 00 FD 01 01 CA 00 00 04 01 FD 97 00 00 03 FF FD B9 00 00 04 FC F8 FC 00 00 04 01 FE FC 00 00 03 FF FD CC 00 00 04 FF FE 53 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-17 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FD FB FC 68 00 00 FF FB FF FC 00 00 FE FB FC AF 00 00 01 03 01 EC 00 00 FE 01 FD F5 00 00 01 FE FA FE 00 00 01 03 FF FE 00 00 FE 01 FD EC 00 00 FE 01 FB D3 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-18 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FD FB FB 8D 00 00 FF FB FF FC 00 00 FE FB FC D3 00 00 01 03 01 EC 00 00 FE 01 FD F5 00 00 01 FE FA FE 00 00 01 03 FF FE 00 00 FE 01 FD EC 00 00 FE 01 FB D3 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-19 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FD FA FD B8 00 00 FF FB FD D9 00 00 FD FB FD FC 00 00 01 03 01 EC 00 00 FE 01 FD F5 00 00 01 FE FA FE 00 00 01 03 FF FE 00 00 FE 01 FD EC 00 00 FE 01 FB D3 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-20 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FE FF FC CF 00 00 FD 01 FC BB 00 00 FD 01 FD FC 00 00 04 01 FD 97 00 00 03 FF FD B9 00 00 04 FC F8 FC 00 00 04 01 FE FC 00 00 03 FF FD CC 00 00 04 FF FE 53 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-21 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FD FC F8 20 00 00 FF FB FF FC 00 00 FE FB FC AF 00 00 01 03 01 EC 00 00 FE 01 FD F5 00 00 01 FE FA FE 00 00 01 03 FF FE 00 00 FE 01 FD EC 00 00 FE 01 FB D3 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-22 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FE FB FB 42 00 00 FF FB FF FC 00 00 FD FB FC D2 00 00 01 03 01 EC 00 00 FE 01 FD F5 00 00 01 FE FA FE 00 00 01 03 FF FE 00 00 FE 01 FD EC 00 00 FE 01 FB D3 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-23 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FD FB FA 6F 00 00 FE FB FC DC 00 00 FD FB FD FC 00 00 01 03 01 EC 00 00 FE 01 FD F5 00 00 01 FE FA FE 00 00 01 03 FF FE 00 00 FE 01 FD EC 00 00 FE 01 FB D3 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-on-command-24 = [ - 39 01 00 00 78 00 02 11 00 - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FE FF FF 85 00 00 FC 01 FA C1 00 00 FD 01 FD FC 00 00 04 01 FD 97 00 00 03 FF FD B9 00 00 04 FC F8 FC 00 00 04 01 FE FC 00 00 03 FF FD CC 00 00 04 FF FE 53 00 - 39 01 00 00 00 00 02 51 ff - 39 01 00 00 00 00 02 53 24 - 39 01 00 00 00 00 02 55 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 14 00 02 29 00 - ]; - - qcom,mdss-dsi-off-command = [ - 39 01 00 00 14 00 02 28 00 - 39 01 00 00 78 00 02 10 00 - ]; - qcom,mdss-dsi-CABC_on-command = [ - 15 01 00 00 00 00 02 55 01 - 29 01 00 00 00 00 08 B8 89 51 0d 00 02 00 00 - 29 01 00 00 00 00 1A CE 55 40 4d 6a 75 97 a7 b6 c9 d0 d4 e7 f8 f9 fa fb ff 04 00 00 04 46 04 69 5a //default old rsp - 29 01 00 00 00 00 0A F9 64 FF E0 BE 00 8D BF 80 00 - ]; - qcom,mdss-dsi-CABC_off-command = [ - 15 01 00 00 00 00 02 55 00 - ]; - qcom,mdss-dsi-CE_on-command = [ - 29 01 00 00 00 00 2C CA 1D FC FC FC 00 EC F8 3D 00 13 0E 13 00 1F 08 00 19 11 00 00 00 00 D5 A1 89 d8 9e 87 40 00 00 00 00 00 00 00 00 00 00 00 00 00 00 - ]; - qcom,mdss-dsi-CE_off-command = [ - 29 01 00 00 00 00 2C CA 1C FC FC FC 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 - ]; - qcom,mdss-dsi-cold_gamma-command = [ - 39 01 00 00 00 00 02 84 7F - ]; - qcom,mdss-dsi-warm_gamma-command = [ - 39 01 00 00 00 00 02 84 80 - ]; - qcom,mdss-dsi-default_gamma-command = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 19 28 3B 4A 55 6D 7D 8A 96 48 54 62 76 7F 8B 99 A4 B2 00 19 28 3B 4A 55 6D 7D 8A 96 48 54 62 76 7F 8B 99 A4 B2 - 29 01 00 00 00 00 38 C8 03 00 01 03 FF FE 00 00 FE 01 FD F7 00 00 01 FF FB F2 00 00 01 03 01 EC 00 00 FE 01 FD F5 00 00 01 FE FA FE 00 00 01 03 FF FE 00 00 FE 01 FD EC 00 00 FE 01 FB D3 00 - ]; /*Add by sxf fllow gamma0*/ - - - /*Add by HQ sxf fllow white gamma start*/ - qcom,mdss-white-command-00 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 19 28 3B 4A 55 6D 7D 8A 96 48 54 62 76 7F 8B 99 A4 B2 00 19 28 3B 4A 55 6D 7D 8A 96 48 54 62 76 7F 8B 99 A4 B2 - 29 01 00 00 00 00 38 C8 03 00 01 03 FF FE 00 00 FE 01 FD F7 00 00 01 FF FB F2 00 00 01 03 01 EC 00 00 FE 01 FD F5 00 00 01 FE FA FE 00 00 01 03 FF FE 00 00 FE 01 FD EC 00 00 FE 01 FB D3 00 - ]; - - qcom,mdss-white-command-01 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FD FB FA B1 00 00 FF FB FF FC 00 00 FE FB FC AF 00 00 01 03 01 EC 00 00 FE 01 FD F5 00 00 01 FE FA FE 00 00 01 03 FF FE 00 00 FE 01 FD EC 00 00 FE 01 FB D3 00 - ]; - - qcom,mdss-white-command-02 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FD FA FD D7 00 00 FF FB FF FC 00 00 FD FB FD D4 00 00 01 03 01 EC 00 00 FE 01 FD F5 00 00 01 FE FA FE 00 00 01 03 FF FE 00 00 FE 01 FD EC 00 00 FE 01 FB D3 00 - ]; - - qcom,mdss-white-command-03 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FD FA FF FC 00 00 FE FB FB D6 00 00 FD FB FD FC 00 00 01 03 01 EC 00 00 FE 01 FD F5 00 00 01 FE FA FE 00 00 01 03 FF FE 00 00 FE 01 FD EC 00 00 FE 01 FB D3 00 - ]; - - qcom,mdss-white-command-04 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FD FA FF FC 00 00 FF FB FB AE 00 00 FD FB FE FB 00 00 01 03 01 EC 00 00 FE 01 FD F5 00 00 01 FE FA FE 00 00 01 03 FF FE 00 00 FE 01 FD EC 00 00 FE 01 FB D3 00 - ]; - - qcom,mdss-white-command-05 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FE FF FE FC 00 00 FE FF FF 96 00 00 FE 01 02 8E 00 00 04 01 FD 97 00 00 03 FF FD B9 00 00 04 FC F8 FC 00 00 04 01 FE FC 00 00 03 FF FD C0 00 00 04 FF FE 53 00 - ]; - - qcom,mdss-white-command-06 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FD FA FF FC 00 00 01 FB FD B9 00 00 FE FB FA BB 00 00 01 03 01 EC 00 00 FE 01 FD F5 00 00 01 FE FA FE 00 00 01 03 FF FE 00 00 FE 01 FD EC 00 00 FE 01 FB D3 00 - ]; - - qcom,mdss-white-command-07 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FD FA FC B4 00 00 FF FB FF FC 00 00 FD FB FE F9 00 00 01 03 01 EC 00 00 FE 01 FD F5 00 00 01 FE FA FE 00 00 01 03 FF FE 00 00 FE 01 FD EC 00 00 FE 01 FB D3 00 - ]; - - qcom,mdss-white-command-08 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FD FB FB 66 00 00 FF FB FF FC 00 00 FD FB FD F8 00 00 01 03 01 EC 00 00 FE 01 FD F5 00 00 01 FE FA FE 00 00 01 03 FF FE 00 00 FE 01 FD EC 00 00 FE 01 FB D3 00 - ]; - - qcom,mdss-white-command-09 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FD FA FF FC 00 00 FF FB FD C5 00 00 FF FB FD 7A 00 00 01 03 01 EC 00 00 FE 01 FD F5 00 00 01 FE FA FE 00 00 01 03 FF FE 00 00 FE 01 FD EC 00 00 FE 01 FB D3 00 - ]; - - qcom,mdss-white-command-10 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FE FF FE FC 00 00 FE FF FF BA 00 00 FE 01 02 8C 00 00 04 01 FD 97 00 00 03 FF FD B9 00 00 04 FC F8 FC 00 00 04 01 FE FC 00 00 03 FF FD CC 00 00 04 FF FE 53 00 - ]; - - qcom,mdss-white-command-11 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FE FF FE FC 00 00 FF FF 02 70 00 00 FE 01 02 8F 00 00 04 01 FD 97 00 00 03 FF FD B9 00 00 04 FC F8 FC 00 00 04 01 FE FC 00 00 03 FF FD CC 00 00 04 FF FE 53 00 - ]; - - qcom,mdss-white-command-12 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FE FF FE FC 00 00 FD 01 01 4C 00 00 FE 01 02 90 00 00 04 01 FD 97 00 00 03 FF FD B9 00 00 04 FC F8 FC 00 00 04 01 FE FC 00 00 03 FF FD CC 00 00 04 FF FE 53 00 - ]; - - qcom,mdss-white-command-13 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FC FB FF F4 00 00 FF FB FF FC 00 00 FE FB FC AF 00 00 01 03 01 EC 00 00 FE 01 FD F5 00 00 01 FE FA FE 00 00 01 03 FF FE 00 00 FE 01 FD EC 00 00 FE 01 FB D3 00 - ]; - - qcom,mdss-white-command-14 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FD FA FF FC 00 00 FE FB FD E0 00 00 FE FB FB B9 00 00 01 03 01 EC 00 00 FE 01 FD F5 00 00 01 FE FA FE 00 00 01 03 FF FE 00 00 FE 01 FD EC 00 00 FE 01 FB D3 00 - ]; - - qcom,mdss-white-command-15 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FD FA FF FC 00 00 01 FB FD 94 00 00 FD FB FC BC 00 00 01 03 01 EC 00 00 FE 01 FD F5 00 00 01 FE FA FE 00 00 01 03 FF FE 00 00 FE 01 FD EC 00 00 FE 01 FB D3 00 - ]; - - qcom,mdss-white-command-16 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FE FF FE FC 00 00 FD 01 FD 87 00 00 FD 01 01 CA 00 00 04 01 FD 97 00 00 03 FF FD B9 00 00 04 FC F8 FC 00 00 04 01 FE FC 00 00 03 FF FD CC 00 00 04 FF FE 53 00 - ]; - - qcom,mdss-white-command-17 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FD FB FC 68 00 00 FF FB FF FC 00 00 FE FB FC AF 00 00 01 03 01 EC 00 00 FE 01 FD F5 00 00 01 FE FA FE 00 00 01 03 FF FE 00 00 FE 01 FD EC 00 00 FE 01 FB D3 00 - ]; - - qcom,mdss-white-command-18 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FD FB FB 8D 00 00 FF FB FF FC 00 00 FE FB FC D3 00 00 01 03 01 EC 00 00 FE 01 FD F5 00 00 01 FE FA FE 00 00 01 03 FF FE 00 00 FE 01 FD EC 00 00 FE 01 FB D3 00 - ]; - - qcom,mdss-white-command-19 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FD FA FD B8 00 00 FF FB FD D9 00 00 FD FB FD FC 00 00 01 03 01 EC 00 00 FE 01 FD F5 00 00 01 FE FA FE 00 00 01 03 FF FE 00 00 FE 01 FD EC 00 00 FE 01 FB D3 00 - ]; - - qcom,mdss-white-command-20 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FE FF FC CF 00 00 FD 01 FC BB 00 00 FD 01 FD FC 00 00 04 01 FD 97 00 00 03 FF FD B9 00 00 04 FC F8 FC 00 00 04 01 FE FC 00 00 03 FF FD CC 00 00 04 FF FE 53 00 - ]; - - qcom,mdss-white-command-21 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FD FC F8 20 00 00 FF FB FF FC 00 00 FE FB FC AF 00 00 01 03 01 EC 00 00 FE 01 FD F5 00 00 01 FE FA FE 00 00 01 03 FF FE 00 00 FE 01 FD EC 00 00 FE 01 FB D3 00 - ]; - - qcom,mdss-white-command-22 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FE FB FB 42 00 00 FF FB FF FC 00 00 FD FB FC D2 00 00 01 03 01 EC 00 00 FE 01 FD F5 00 00 01 FE FA FE 00 00 01 03 FF FE 00 00 FE 01 FD EC 00 00 FE 01 FB D3 00 - ]; - - qcom,mdss-white-command-23 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FD FB FA 6F 00 00 FE FB FC DC 00 00 FD FB FD FC 00 00 01 03 01 EC 00 00 FE 01 FD F5 00 00 01 FE FA FE 00 00 01 03 FF FE 00 00 FE 01 FD EC 00 00 FE 01 FB D3 00 - ]; - - qcom,mdss-white-command-24 = [ - 29 01 00 00 00 00 02 B0 04 - 29 01 00 00 00 00 02 D6 01 - 29 01 00 00 00 00 27 C7 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 00 1A 29 3C 4B 57 6F 7F 8C 97 49 55 63 77 80 8C 9B A6 B2 - 29 01 00 00 00 00 38 C8 01 00 FE FF FF 85 00 00 FC 01 FA C1 00 00 FD 01 FD FC 00 00 04 01 FD 97 00 00 03 FF FD B9 00 00 04 FC F8 FC 00 00 04 01 FE FC 00 00 03 FF FD CC 00 00 04 FF FE 53 00 - ]; - - /*white gamma end*/ - - - /*Add by HQ-zmc follow sRGB[Date: 2017-11-25 13:35:40]*/ - qcom,mdss-dsi-sRGB_on-command = [ - 15 01 00 00 00 00 02 84 00 - 29 01 00 00 00 00 2C CA 1D FC E8 90 0E E7 F1 E1 1F E7 DB 0B EF 6F 4A 27 35 2A 19 FD 00 22 FF 00 00 F7 2F 1A FF 00 FF 00 54 FD 3B FF 00 00 FF 45 01 FE FF - ]; - qcom,mdss-dsi-sRGB_off-command = [ - 29 01 00 00 00 00 2C CA 1C FC FC FC 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 - ]; - - qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; - qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; - qcom,mdss-dsi-CABC_on-command-state = "dsi_lp_mode"; - qcom,mdss-dsi-CABC_off-command-state = "dsi_lp_mode"; - qcom,mdss-dsi-CE_on-command-state = "dsi_lp_mode"; - qcom,mdss-dsi-CE_off-command-state = "dsi_lp_mode"; - qcom,mdss-dsi-cold_gamma-command-state = "dsi_lp_mode"; - qcom,mdss-dsi-warm_gamma-command-state = "dsi_lp_mode"; - qcom,mdss-dsi-default_gamma-command-state = "dsi_lp_mode"; - qcom,mdss-white-command-state = "dsi_lp_mode"; - qcom,mdss-dsi-sRGB_on-command-state = "dsi_lp_mode"; - qcom,mdss-dsi-sRGB_off-command-state = "dsi_lp_mode"; - qcom,mdss-dsi-h-sync-pulse = <1>; - qcom,mdss-dsi-traffic-mode = "burst_mode"; - qcom,mdss-dsi-bllp-eof-power-mode; - qcom,mdss-dsi-bllp-power-mode; - qcom,mdss-dsi-lane-0-state; - qcom,mdss-dsi-lane-1-state; - qcom,mdss-dsi-lane-2-state; - qcom,mdss-dsi-lane-3-state; - qcom,mdss-dsi-panel-timings = [7d 25 1d 00 37 33 - 22 27 1e 03 04 00]; - qcom,mdss-dsi-t-clk-post = <0x0E>; - qcom,mdss-dsi-t-clk-pre = <0x35>; - qcom,mdss-dsi-bl-min-level = <1>; - qcom,mdss-dsi-bl-max-level = <4095>; - qcom,mdss-dsi-dma-trigger = "trigger_sw"; - qcom,mdss-dsi-mdp-trigger = "none"; - qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; - qcom,mdss-dsi-reset-sequence = <1 5>, <0 5>, <1 30>; - //qcom,mdss-dsi-tx-eot-append; - qcom,esd-check-enabled; - qcom,mdss-dsi-panel-status-command = [06 01 00 01 05 00 01 0A]; - qcom,mdss-dsi-panel-status-command-mode = "dsi_lp_mode"; - qcom,mdss-dsi-panel-status-check-mode = "TE_check_NT35596"; - qcom,mdss-dsi-panel-status-read-length = <1>; - qcom,mdss-dsi-panel-status-value = <0x9C>; - qcom,mdss-dsi-panel-max-error-count = <3>; - qcom,mdss-pan-physical-width-dimension = <69>; - qcom,mdss-pan-physical-height-dimension = <122>; - }; -}; diff --git a/arch/arm/boot/dts/qcom/msm-audio-e7.dtsi b/arch/arm/boot/dts/qcom/msm-audio-e7.dtsi deleted file mode 100644 index 853fb27dcee4..000000000000 --- a/arch/arm/boot/dts/qcom/msm-audio-e7.dtsi +++ /dev/null @@ -1,707 +0,0 @@ -/* - * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved. - * Copyright (C) 2018 XiaoMi, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -&soc { - - pcm0: qcom,msm-pcm { - compatible = "qcom,msm-pcm-dsp"; - qcom,msm-pcm-dsp-id = <0>; - }; - - routing: qcom,msm-pcm-routing { - compatible = "qcom,msm-pcm-routing"; - }; - - pcm2: qcom,msm-ultra-low-latency { - compatible = "qcom,msm-pcm-dsp"; - qcom,msm-pcm-dsp-id = <2>; - qcom,msm-pcm-low-latency; - qcom,latency-level = "ultra"; - }; - - pcm1: qcom,msm-pcm-low-latency { - compatible = "qcom,msm-pcm-dsp"; - qcom,msm-pcm-dsp-id = <1>; - qcom,msm-pcm-low-latency; - qcom,latency-level = "regular"; - }; - - pcm2: qcom,msm-ultra-low-latency { - compatible = "qcom,msm-pcm-dsp"; - qcom,msm-pcm-dsp-id = <2>; - qcom,msm-pcm-low-latency; - qcom,latency-level = "ultra"; - }; - - cpe: qcom,msm-cpe-lsm { - compatible = "qcom,msm-cpe-lsm"; - }; - - lpa: qcom,msm-pcm-lpa { - compatible = "qcom,msm-pcm-lpa"; - }; - - compress: qcom,msm-compress-dsp { - compatible = "qcom,msm-compress-dsp"; - }; - - voip: qcom,msm-voip-dsp { - compatible = "qcom,msm-voip-dsp"; - }; - - voice: qcom,msm-pcm-voice { - compatible = "qcom,msm-pcm-voice"; - qcom,destroy-cvd; - }; - - stub_codec: qcom,msm-stub-codec { - compatible = "qcom,msm-stub-codec"; - }; - - qcom,msm-dai-fe { - compatible = "qcom,msm-dai-fe"; - }; - - afe: qcom,msm-pcm-afe { - compatible = "qcom,msm-pcm-afe"; - }; - - loopback: qcom,msm-pcm-loopback { - compatible = "qcom,msm-pcm-loopback"; - }; - - qcom,msm-dai-mi2s { - compatible = "qcom,msm-dai-mi2s"; - dai_mi2s0: qcom,msm-dai-q6-mi2s-prim { - compatible = "qcom,msm-dai-q6-mi2s"; - qcom,msm-dai-q6-mi2s-dev-id = <0>; - qcom,msm-mi2s-rx-lines = <3>; - qcom,msm-mi2s-tx-lines = <0>; - }; - - dai_mi2s1: qcom,msm-dai-q6-mi2s-sec { - compatible = "qcom,msm-dai-q6-mi2s"; - qcom,msm-dai-q6-mi2s-dev-id = <1>; - qcom,msm-mi2s-rx-lines = <1>; - qcom,msm-mi2s-tx-lines = <0>; - }; - - dai_mi2s3: qcom,msm-dai-q6-mi2s-quat { - compatible = "qcom,msm-dai-q6-mi2s"; - qcom,msm-dai-q6-mi2s-dev-id = <3>; - qcom,msm-mi2s-rx-lines = <1>; - qcom,msm-mi2s-tx-lines = <2>; - }; - - dai_mi2s2: qcom,msm-dai-q6-mi2s-tert { - compatible = "qcom,msm-dai-q6-mi2s"; - qcom,msm-dai-q6-mi2s-dev-id = <2>; - qcom,msm-mi2s-rx-lines = <0>; - qcom,msm-mi2s-tx-lines = <3>; - }; - - dai_mi2s5: qcom,msm-dai-q6-mi2s-quin { - compatible = "qcom,msm-dai-q6-mi2s"; - qcom,msm-dai-q6-mi2s-dev-id = <5>; - qcom,msm-mi2s-rx-lines = <1>; - qcom,msm-mi2s-tx-lines = <2>; - }; - - dai_mi2s6: qcom,msm-dai-q6-mi2s-senary { - compatible = "qcom,msm-dai-q6-mi2s"; - qcom,msm-dai-q6-mi2s-dev-id = <6>; - qcom,msm-mi2s-rx-lines = <0>; - qcom,msm-mi2s-tx-lines = <3>; - }; - }; - - lsm: qcom,msm-lsm-client { - compatible = "qcom,msm-lsm-client"; - }; - - qcom,msm-dai-q6 { - compatible = "qcom,msm-dai-q6"; - sb_0_rx: qcom,msm-dai-q6-sb-0-rx { - compatible = "qcom,msm-dai-q6-dev"; - qcom,msm-dai-q6-dev-id = <16384>; - }; - - sb_0_tx: qcom,msm-dai-q6-sb-0-tx { - compatible = "qcom,msm-dai-q6-dev"; - qcom,msm-dai-q6-dev-id = <16385>; - }; - - sb_1_rx: qcom,msm-dai-q6-sb-1-rx { - compatible = "qcom,msm-dai-q6-dev"; - qcom,msm-dai-q6-dev-id = <16386>; - }; - - sb_1_tx: qcom,msm-dai-q6-sb-1-tx { - compatible = "qcom,msm-dai-q6-dev"; - qcom,msm-dai-q6-dev-id = <16387>; - }; - - sb_2_rx: qcom,msm-dai-q6-sb-2-rx { - compatible = "qcom,msm-dai-q6-dev"; - qcom,msm-dai-q6-dev-id = <16388>; - }; - - sb_2_tx: qcom,msm-dai-q6-sb-2-tx { - compatible = "qcom,msm-dai-q6-dev"; - qcom,msm-dai-q6-dev-id = <16389>; - }; - - - sb_3_rx: qcom,msm-dai-q6-sb-3-rx { - compatible = "qcom,msm-dai-q6-dev"; - qcom,msm-dai-q6-dev-id = <16390>; - }; - - sb_3_tx: qcom,msm-dai-q6-sb-3-tx { - compatible = "qcom,msm-dai-q6-dev"; - qcom,msm-dai-q6-dev-id = <16391>; - }; - - sb_4_rx: qcom,msm-dai-q6-sb-4-rx { - compatible = "qcom,msm-dai-q6-dev"; - qcom,msm-dai-q6-dev-id = <16392>; - }; - - sb_4_tx: qcom,msm-dai-q6-sb-4-tx { - compatible = "qcom,msm-dai-q6-dev"; - qcom,msm-dai-q6-dev-id = <16393>; - }; - - sb_5_tx: qcom,msm-dai-q6-sb-5-tx { - compatible = "qcom,msm-dai-q6-dev"; - qcom,msm-dai-q6-dev-id = <16395>; - }; - - sb_5_rx: qcom,msm-dai-q6-sb-5-rx { - compatible = "qcom,msm-dai-q6-dev"; - qcom,msm-dai-q6-dev-id = <16394>; - }; - - bt_sco_rx: qcom,msm-dai-q6-bt-sco-rx { - compatible = "qcom,msm-dai-q6-dev"; - qcom,msm-dai-q6-dev-id = <12288>; - }; - - bt_sco_tx: qcom,msm-dai-q6-bt-sco-tx { - compatible = "qcom,msm-dai-q6-dev"; - qcom,msm-dai-q6-dev-id = <12289>; - }; - - int_fm_rx: qcom,msm-dai-q6-int-fm-rx { - compatible = "qcom,msm-dai-q6-dev"; - qcom,msm-dai-q6-dev-id = <12292>; - }; - - int_fm_tx: qcom,msm-dai-q6-int-fm-tx { - compatible = "qcom,msm-dai-q6-dev"; - qcom,msm-dai-q6-dev-id = <12293>; - }; - - afe_pcm_rx: qcom,msm-dai-q6-be-afe-pcm-rx { - compatible = "qcom,msm-dai-q6-dev"; - qcom,msm-dai-q6-dev-id = <224>; - }; - - afe_pcm_tx: qcom,msm-dai-q6-be-afe-pcm-tx { - compatible = "qcom,msm-dai-q6-dev"; - qcom,msm-dai-q6-dev-id = <225>; - }; - - afe_proxy_rx: qcom,msm-dai-q6-afe-proxy-rx { - compatible = "qcom,msm-dai-q6-dev"; - qcom,msm-dai-q6-dev-id = <241>; - }; - - afe_proxy_tx: qcom,msm-dai-q6-afe-proxy-tx { - compatible = "qcom,msm-dai-q6-dev"; - qcom,msm-dai-q6-dev-id = <240>; - }; - - afe_loopback_tx: qcom,msm-dai-q6-afe-loopback-tx { - compatible = "qcom,msm-dai-q6-dev"; - qcom,msm-dai-q6-dev-id = <24577>; - }; - - incall_record_rx: qcom,msm-dai-q6-incall-record-rx { - compatible = "qcom,msm-dai-q6-dev"; - qcom,msm-dai-q6-dev-id = <32771>; - }; - - incall_record_tx: qcom,msm-dai-q6-incall-record-tx { - compatible = "qcom,msm-dai-q6-dev"; - qcom,msm-dai-q6-dev-id = <32772>; - }; - - incall_music_rx: qcom,msm-dai-q6-incall-music-rx { - compatible = "qcom,msm-dai-q6-dev"; - qcom,msm-dai-q6-dev-id = <32773>; - }; - - incall_music_2_rx: qcom,msm-dai-q6-incall-music-2-rx { - compatible = "qcom,msm-dai-q6-dev"; - qcom,msm-dai-q6-dev-id = <32770>; - }; - - sb_6_rx: qcom,msm-dai-q6-sb-6-rx { - compatible = "qcom,msm-dai-q6-dev"; - qcom,msm-dai-q6-dev-id = <16396>; - }; - }; - - hostless: qcom,msm-pcm-hostless { - compatible = "qcom,msm-pcm-hostless"; - }; - - dai_pri_auxpcm: qcom,msm-pri-auxpcm { - compatible = "qcom,msm-auxpcm-dev"; - qcom,msm-cpudai-auxpcm-mode = <0>, <0>; - qcom,msm-cpudai-auxpcm-sync = <1>, <1>; - qcom,msm-cpudai-auxpcm-frame = <5>, <4>; - qcom,msm-cpudai-auxpcm-quant = <2>, <2>; - qcom,msm-cpudai-auxpcm-num-slots = <1>, <1>; - qcom,msm-cpudai-auxpcm-slot-mapping = <1>, <1>; - qcom,msm-cpudai-auxpcm-data = <0>, <0>; - qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>, <2048000>; - qcom,msm-auxpcm-interface = "primary"; - }; - - hdmi_dba: qcom,msm-hdmi-dba-codec-rx { - compatible = "qcom,msm-hdmi-dba-codec-rx"; - qcom,dba-bridge-chip = "adv7533"; - }; - - qcom,msm-audio-ion { - compatible = "qcom,msm-audio-ion"; - qcom,smmu-version = <1>; - qcom,smmu-enabled; - iommus = <&adsp_io 1>; - }; - - qcom,msm-adsp-loader { - compatible = "qcom,adsp-loader"; - qcom,adsp-state = <0>; - }; - - qcom,avtimer@c0a300c { - compatible = "qcom,avtimer"; - reg = <0x0c0a300c 0x4>, - <0x0c0a3010 0x4>; - reg-names = "avtimer_lsb_addr", "avtimer_msb_addr"; - qcom,clk-div = <27>; - }; - - int_codec: sound { - status = "ok"; - compatible = "qcom,msm8952-audio-codec"; - qcom,model = "msm8952-snd-card-mtp"; - reg = <0xc051000 0x4>, - <0xc051004 0x4>, - <0xc055000 0x4>, - <0xc052000 0x4>; - reg-names = "csr_gp_io_mux_mic_ctl", - "csr_gp_io_mux_spkr_ctl", - "csr_gp_io_lpaif_pri_pcm_pri_mode_muxsel", - "csr_gp_io_mux_quin_ctl"; - - qcom,msm-ext-pa = "primary"; - qcom,msm-mclk-freq = <9600000>; - qcom,msm-mbhc-hphl-swh = <0>; - qcom,msm-mbhc-gnd-swh = <0>; - qcom,msm-hs-micbias-type = "internal"; - qcom,msm-micbias1-ext-cap; - qcom,audio-routing = - "RX_BIAS", "MCLK", - "SPK_RX_BIAS", "MCLK", - "INT_LDO_H", "MCLK", - "MIC BIAS External", "Handset Mic", - "MIC BIAS Internal2", "Headset Mic", - "MIC BIAS External", "Secondary Mic", - "AMIC1", "MIC BIAS External", - "AMIC2", "MIC BIAS Internal2", - "AMIC3", "MIC BIAS External"; - - - qcom,msm-gpios = - "pri_i2s", - "us_eu_gpio", - "quin_i2s"; - qcom,pinctrl-names = - "all_off", - "pri_i2s_act", - "us_eu_gpio_act", - "pri_i2s_us_eu_gpio_act", - "quin_act", - "quin_pri_i2s_act", - "quin_us_eu_gpio_act", - "quin_us_eu_gpio_pri_i2s_act"; - pinctrl-names = - "all_off", - "pri_i2s_act", - "us_eu_gpio_act", - "pri_i2s_us_eu_gpio_act", - "quin_act", - "quin_pri_i2s_act", - "quin_us_eu_gpio_act", - "quin_us_eu_gpio_pri_i2s_act"; - pinctrl-0 = <&cdc_pdm_lines_sus - &cdc_pdm_lines_2_sus &cross_conn_det_sus - &pri_tlmm_lines_sus &pri_tlmm_ws_sus>; - pinctrl-1 = <&cdc_pdm_lines_act - &cdc_pdm_lines_2_act &cross_conn_det_sus - &pri_tlmm_lines_sus &pri_tlmm_ws_sus>; - pinctrl-2 = <&cdc_pdm_lines_sus - &cdc_pdm_lines_2_sus &cross_conn_det_act - &pri_tlmm_lines_sus &pri_tlmm_ws_sus>; - pinctrl-3 = <&cdc_pdm_lines_act - &cdc_pdm_lines_2_act &cross_conn_det_act - &pri_tlmm_lines_sus &pri_tlmm_ws_sus>; - pinctrl-4 = <&cdc_pdm_lines_sus - &cdc_pdm_lines_2_sus &cross_conn_det_sus - &pri_tlmm_lines_act &pri_tlmm_ws_act>; - pinctrl-5 = <&cdc_pdm_lines_act - &cdc_pdm_lines_2_act &cross_conn_det_sus - &pri_tlmm_lines_act &pri_tlmm_ws_act>; - pinctrl-6 = <&cdc_pdm_lines_sus - &cdc_pdm_lines_2_sus &cross_conn_det_act - &pri_tlmm_lines_act &pri_tlmm_ws_act>; - pinctrl-7 = <&cdc_pdm_lines_act - &cdc_pdm_lines_2_act &cross_conn_det_act - &pri_tlmm_lines_act &pri_tlmm_ws_act>; - - asoc-platform = <&pcm0>, <&pcm1>, <&pcm2>, <&voip>, <&voice>, - <&loopback>, <&compress>, <&hostless>, - <&afe>, <&lsm>, <&routing>, <&lpa>; - asoc-platform-names = "msm-pcm-dsp.0", "msm-pcm-dsp.1", - "msm-pcm-dsp.2", "msm-voip-dsp", - "msm-pcm-voice", "msm-pcm-loopback", - "msm-compress-dsp", "msm-pcm-hostless", - "msm-pcm-afe", "msm-lsm-client", - "msm-pcm-routing", "msm-pcm-lpa"; - asoc-cpu = <&dai_pri_auxpcm>, - <&dai_mi2s0>, <&dai_mi2s1>, - <&dai_mi2s2>, <&dai_mi2s3>, - <&dai_mi2s5>, <&dai_mi2s6>, - <&sb_0_rx>, <&sb_0_tx>, <&sb_1_rx>, <&sb_1_tx>, - <&sb_3_rx>, <&sb_3_tx>, <&sb_4_rx>, <&sb_4_tx>, - <&bt_sco_rx>, <&bt_sco_tx>, - <&int_fm_rx>, <&int_fm_tx>, - <&afe_pcm_rx>, <&afe_pcm_tx>, - <&afe_proxy_rx>, <&afe_proxy_tx>, - <&incall_record_rx>, <&incall_record_tx>, - <&incall_music_rx>, <&incall_music_2_rx>; - asoc-cpu-names = "msm-dai-q6-auxpcm.1", - "msm-dai-q6-mi2s.0", "msm-dai-q6-mi2s.1", - "msm-dai-q6-mi2s.2", "msm-dai-q6-mi2s.3", - "msm-dai-q6-mi2s.5", "msm-dai-q6-mi2s.6", - "msm-dai-q6-dev.16384", "msm-dai-q6-dev.16385", - "msm-dai-q6-dev.16386", "msm-dai-q6-dev.16387", - "msm-dai-q6-dev.16390", "msm-dai-q6-dev.16391", - "msm-dai-q6-dev.16392", "msm-dai-q6-dev.16393", - "msm-dai-q6-dev.12288", "msm-dai-q6-dev.12289", - "msm-dai-q6-dev.12292", "msm-dai-q6-dev.12293", - "msm-dai-q6-dev.224", "msm-dai-q6-dev.225", - "msm-dai-q6-dev.241", "msm-dai-q6-dev.240", - "msm-dai-q6-dev.32771", "msm-dai-q6-dev.32772", - "msm-dai-q6-dev.32773", "msm-dai-q6-dev.32770"; - }; - - ext_codec: sound-9335 { - status = "disabled"; - compatible = "qcom,msm8952-audio-slim-codec"; - qcom,model = "msm8952-tasha-snd-card"; - reg = <0xc051000 0x4>, - <0xc051004 0x4>, - <0xc055000 0x4>, - <0xc052000 0x4>; - - reg-names = "csr_gp_io_mux_mic_ctl", - "csr_gp_io_mux_spkr_ctl", - "csr_gp_io_lpaif_pri_pcm_pri_mode_muxsel", - "csr_gp_io_mux_quin_ctl"; - - qcom,audio-routing = - "AIF4 VI", "MCLK", - "AIF4 VI", "MICBIAS_REGULATOR", - "RX_BIAS", "MCLK", - "MADINPUT", "MCLK", - "AIF4 MAD", "MICBIAS_REGULATOR", - "AMIC2", "MIC BIAS2", - "MIC BIAS2", "Headset Mic", - "AMIC3", "MIC BIAS2", - "MIC BIAS2", "ANCRight Headset Mic", - "AMIC4", "MIC BIAS2", - "MIC BIAS2", "ANCLeft Headset Mic", - "AMIC5", "MIC BIAS3", - "MIC BIAS3", "Handset Mic", - "AMIC6", "MIC BIAS4", - "MIC BIAS4", "Analog Mic6", - "DMIC0", "MIC BIAS1", - "MIC BIAS1", "Digital Mic0", - "DMIC1", "MIC BIAS1", - "MIC BIAS1", "Digital Mic1", - "DMIC2", "MIC BIAS3", - "MIC BIAS3", "Digital Mic2", - "DMIC3", "MIC BIAS3", - "MIC BIAS3", "Digital Mic3", - "DMIC4", "MIC BIAS4", - "MIC BIAS4", "Digital Mic4", - "DMIC5", "MIC BIAS4", - "MIC BIAS4", "Digital Mic5", - "MIC BIAS1", "MICBIAS_REGULATOR", - "MIC BIAS2", "MICBIAS_REGULATOR", - "MIC BIAS3", "MICBIAS_REGULATOR", - "MIC BIAS4", "MICBIAS_REGULATOR", - "SpkrLeft IN", "SPK1 OUT", - "SpkrRight IN", "SPK2 OUT"; - - qcom,hdmi-dba-codec-rx; - - qcom,msm-gpios = - "quin_i2s", - "us_eu_gpio"; - qcom,pinctrl-names = - "all_off", - "quin_act", - "us_eu_gpio_act", - "quin_us_eu_gpio_act"; - pinctrl-names = - "all_off", - "quin_act", - "us_eu_gpio_act", - "quin_us_eu_gpio_act"; - pinctrl-0 = <&pri_tlmm_lines_sus &pri_tlmm_ws_sus - &cross_conn_det_sus>; - pinctrl-1 = <&pri_tlmm_lines_act &pri_tlmm_ws_act - &cross_conn_det_sus>; - pinctrl-2 = <&pri_tlmm_lines_sus &pri_tlmm_ws_sus - &cross_conn_det_act>; - pinctrl-3 = <&pri_tlmm_lines_act &pri_tlmm_ws_act - &cross_conn_det_act>; - - qcom,msm-mbhc-hphl-swh = <0>; - qcom,msm-mbhc-gnd-swh = <0>; - qcom,tasha-mclk-clk-freq = <9600000>; - asoc-platform = <&pcm0>, <&pcm1>, <&pcm2>, <&voip>, <&voice>, - <&loopback>, <&compress>, <&hostless>, - <&afe>, <&lsm>, <&routing>, <&cpe>, <&lpa>; - asoc-platform-names = "msm-pcm-dsp.0", "msm-pcm-dsp.1", - "msm-pcm-dsp.2", "msm-voip-dsp", - "msm-pcm-voice", "msm-pcm-loopback", - "msm-compress-dsp", "msm-pcm-hostless", - "msm-pcm-afe", "msm-lsm-client", - "msm-pcm-routing", "msm-cpe-lsm", - "msm-pcm-lpa"; - asoc-cpu = <&dai_pri_auxpcm>, - <&dai_mi2s2>, <&dai_mi2s3>, <&dai_mi2s5>, - <&sb_0_rx>, <&sb_0_tx>, <&sb_1_rx>, <&sb_1_tx>, - <&sb_2_rx>, <&sb_2_tx>, <&sb_3_rx>, <&sb_3_tx>, - <&sb_4_rx>, <&sb_4_tx>, <&sb_5_tx>, - <&afe_pcm_rx>, <&afe_pcm_tx>, - <&afe_proxy_rx>, <&afe_proxy_tx>, - <&incall_record_rx>, <&incall_record_tx>, - <&incall_music_rx>, <&incall_music_2_rx>, - <&sb_5_rx>, <&bt_sco_rx>, - <&bt_sco_tx>, <&int_fm_rx>, <&int_fm_tx>, - <&sb_6_rx>; - asoc-cpu-names = "msm-dai-q6-auxpcm.1", - "msm-dai-q6-mi2s.2", - "msm-dai-q6-mi2s.3", "msm-dai-q6-mi2s.5", - "msm-dai-q6-dev.16384", "msm-dai-q6-dev.16385", - "msm-dai-q6-dev.16386", "msm-dai-q6-dev.16387", - "msm-dai-q6-dev.16388", "msm-dai-q6-dev.16389", - "msm-dai-q6-dev.16390", "msm-dai-q6-dev.16391", - "msm-dai-q6-dev.16392", "msm-dai-q6-dev.16393", - "msm-dai-q6-dev.16395", "msm-dai-q6-dev.224", - "msm-dai-q6-dev.225", "msm-dai-q6-dev.241", - "msm-dai-q6-dev.240", "msm-dai-q6-dev.32771", - "msm-dai-q6-dev.32772", "msm-dai-q6-dev.32773", - "msm-dai-q6-dev.32770", "msm-dai-q6-dev.16394", - "msm-dai-q6-dev.12288", "msm-dai-q6-dev.12289", - "msm-dai-q6-dev.12292", "msm-dai-q6-dev.12293", - "msm-dai-q6-dev.16396"; - asoc-codec = <&stub_codec>, <&hdmi_dba>; - asoc-codec-names = "msm-stub-codec.1", "msm-hdmi-dba-codec-rx"; - }; - - i2c@78b6000 { - status = "okay"; - tas2557@4c { - compatible = "ti,tas2557"; - reg = <0x4c>; - ti,cdc-reset-gpio = <&tlmm 86 0>; - ti,irq-gpio = <&tlmm 87 0x0>; - ti,i2s-bits = <16>; /* support 16, 24, 32 */ - ti,bypass-tmax = <0>; /* 0, not bypass; 1, bypass */ - status = "ok"; - pinctrl-names = "smartpa_irq_active"; - pinctrl-0 = <&smartpa_irq_active>; - }; - wsa881x_i2c_e: wsa881x-i2c-codec@e { - status = "disabled"; - compatible = "qcom,wsa881x-i2c-codec"; - reg = <0x0e>; - qcom,msm-gpios = "wsa_clk", - "wsa_reset", - "wsa_vi"; - qcom,pinctrl-names = "all_off", - "wsa_clk", - "wsa_active", - "wsa_clk_active", - "wsa_vi", - "wsa_clk_vi", - "wsa_active_vi", - "wsa_all"; - pinctrl-names = "all_off", - "wsa_clk", - "wsa_active", - "wsa_clk_active", - "wsa_vi", - "wsa_clk_vi", - "wsa_active_vi", - "wsa_all"; - pinctrl-0 = <&wsa_clk_off &wsa_reset_off &wsa_vi_off>; - pinctrl-1 = <&wsa_clk_on &wsa_reset_off &wsa_vi_off>; - pinctrl-2 = <&wsa_clk_off &wsa_reset_on &wsa_vi_off>; - pinctrl-3 = <&wsa_clk_on &wsa_reset_on &wsa_vi_off>; - pinctrl-4 = <&wsa_clk_off &wsa_reset_off &wsa_vi_on>; - pinctrl-5 = <&wsa_clk_on &wsa_reset_off &wsa_vi_on>; - pinctrl-6 = <&wsa_clk_off &wsa_reset_on &wsa_vi_on>; - pinctrl-7 = <&wsa_clk_on &wsa_reset_on &wsa_vi_on>; - }; - wsa881x_i2c_44: wsa881x-i2c-codec@44 { - status = "disabled"; - - compatible = "qcom,wsa881x-i2c-codec"; - reg = <0x44>; - }; - wsa881x_i2c_f: wsa881x-i2c-codec@f { - status = "disabled"; - - compatible = "qcom,wsa881x-i2c-codec"; - reg = <0x0f>; - qcom,msm-gpios = "wsa_clk", - "wsa_reset", - "wsa_vi"; - qcom,pinctrl-names = "all_off", - "wsa_clk", - "wsa_active", - "wsa_clk_active", - "wsa_vi", - "wsa_clk_vi", - "wsa_active_vi", - "wsa_all"; - pinctrl-names = "all_off", - "wsa_clk", - "wsa_active", - "wsa_clk_active", - "wsa_vi", - "wsa_clk_vi", - "wsa_active_vi", - "wsa_all"; - pinctrl-0 = <&wsa_clk_off &wsa_reset_off &wsa_vi_off>; - pinctrl-1 = <&wsa_clk_on &wsa_reset_off &wsa_vi_off>; - pinctrl-2 = <&wsa_clk_off &wsa_reset_on &wsa_vi_off>; - pinctrl-3 = <&wsa_clk_on &wsa_reset_on &wsa_vi_off>; - pinctrl-4 = <&wsa_clk_off &wsa_reset_off &wsa_vi_on>; - pinctrl-5 = <&wsa_clk_on &wsa_reset_off &wsa_vi_on>; - pinctrl-6 = <&wsa_clk_off &wsa_reset_on &wsa_vi_on>; - pinctrl-7 = <&wsa_clk_on &wsa_reset_on &wsa_vi_on>; - }; - wsa881x_i2c_45: wsa881x-i2c-codec@45 { - status = "disabled"; - compatible = "qcom,wsa881x-i2c-codec"; - reg = <0x45>; - }; - }; - - wcd9xxx_intc: wcd9xxx-irq { - status = "disabled"; - compatible = "qcom,wcd9xxx-irq"; - interrupt-controller; - #interrupt-cells = <1>; - interrupt-names = "cdc-int"; - pinctrl-names = "default"; - pinctrl-0 = <&wcd_intr_default>; - }; - - wcd_rst_gpio: wcd_gpio_ctrl { - status = "disabled"; - compatible = "qcom,wcd-gpio-ctrl"; - pinctrl-names = "aud_active", "aud_sleep"; - pinctrl-0 = <&cdc_reset_active>; - pinctrl-1 = <&cdc_reset_sleep>; - }; - - clock_audio: audio_ext_clk { - status = "disabled"; - compatible = "qcom,audio-ref-clk"; - clock-names = "osr_clk"; - qcom,node_has_rpm_clock; - #clock-cells = <1>; - }; -}; - -&adsp_io { - qcom,virtual-addr-pool = <0x10000000 0x0fffffff>; - #iommu-cells = <1>; -}; - -&slim_msm { - status = "disabled"; - dai_slim: msm_dai_slim { - status = "disabled"; - compatible = "qcom,msm-dai-slim"; - elemental-addr = [ff ff ff fe 17 02]; - }; - - wcd9335: tasha_codec { - status = "disabled"; - compatible = "qcom,tasha-slim-pgd"; - elemental-addr = [00 01 A0 01 17 02]; - - interrupt-parent = <&wcd9xxx_intc>; - interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 - 17 18 19 20 21 22 23 24 25 26 27 28 29 - 30>; - - qcom,wcd-rst-gpio-node = <&wcd_rst_gpio>; - - clock-names = "wcd_clk"; - clocks = <&clock_audio clk_audio_pmi_clk>; - - qcom,cdc-static-supplies = - "cdc-vdd-buck", - "cdc-buck-sido", - "cdc-vdd-tx-h", - "cdc-vdd-rx-h", - "cdc-vdd-px"; - - qcom,cdc-on-demand-supplies = "cdc-vdd-mic-bias"; - - qcom,cdc-micbias1-mv = <1800>; - qcom,cdc-micbias2-mv = <1800>; - qcom,cdc-micbias3-mv = <1800>; - qcom,cdc-micbias4-mv = <1800>; - - qcom,cdc-mclk-clk-rate = <9600000>; - qcom,cdc-slim-ifd = "tasha-slim-ifd"; - qcom,cdc-slim-ifd-elemental-addr = [00 00 A0 01 17 02]; - qcom,cdc-dmic-sample-rate = <2400000>; - }; -}; diff --git a/arch/arm/boot/dts/qcom/msm-audio.dtsi b/arch/arm/boot/dts/qcom/msm-audio.dtsi index 5c819cb74ddf..777fcdf1d27b 100644 --- a/arch/arm/boot/dts/qcom/msm-audio.dtsi +++ b/arch/arm/boot/dts/qcom/msm-audio.dtsi @@ -1,6 +1,5 @@ /* * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved. - * Copyright (C) 2018 XiaoMi, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -307,7 +306,7 @@ }; int_codec: sound { - status = "ok"; + status = "disabled"; compatible = "qcom,msm8952-audio-codec"; qcom,model = "msm8952-snd-card-mtp"; reg = <0xc051000 0x4>, @@ -323,19 +322,22 @@ qcom,msm-mclk-freq = <9600000>; qcom,msm-mbhc-hphl-swh = <0>; qcom,msm-mbhc-gnd-swh = <0>; - qcom,msm-hs-micbias-type = "internal"; + qcom,msm-hs-micbias-type = "external"; qcom,msm-micbias1-ext-cap; qcom,audio-routing = "RX_BIAS", "MCLK", "SPK_RX_BIAS", "MCLK", "INT_LDO_H", "MCLK", "MIC BIAS External", "Handset Mic", - "MIC BIAS Internal2", "Headset Mic", + "MIC BIAS External2", "Headset Mic", "MIC BIAS External", "Secondary Mic", "AMIC1", "MIC BIAS External", - "AMIC2", "MIC BIAS Internal2", - "AMIC3", "MIC BIAS External"; + "AMIC2", "MIC BIAS External2", + "AMIC3", "MIC BIAS External", + "WSA_SPK OUT", "VDD_WSA_SWITCH", + "SpkrMono WSA_IN", "WSA_SPK OUT"; + qcom,hdmi-dba-codec-rx; qcom,msm-gpios = "pri_i2s", @@ -540,19 +542,6 @@ }; i2c@78b6000 { - status = "okay"; - spkamp@3a {/* max98927 smartpa device*/ - compatible = "maxim,max98927L"; - status = "okay"; - reg = <0x3a>; - mono_stereo_mode = <0>; - interleave_mode = <0>; - vmon-l-slot = <1>; - imon-l-slot = <1>; - vmon-r-slot = <1>; - imon-r-slot = <1>; - maxim,98927-reset-gpio = <&tlmm 89 0>; - }; wsa881x_i2c_e: wsa881x-i2c-codec@e { status = "disabled"; compatible = "qcom,wsa881x-i2c-codec"; diff --git a/arch/arm/boot/dts/qcom/msm-pm8953-e7.dtsi b/arch/arm/boot/dts/qcom/msm-pm8953-e7.dtsi deleted file mode 100644 index 9008167f2d31..000000000000 --- a/arch/arm/boot/dts/qcom/msm-pm8953-e7.dtsi +++ /dev/null @@ -1,304 +0,0 @@ -/* - * Copyright (c) 2015-2016, The Linux Foundation. All rights reserved. - * Copyright (C) 2018 XiaoMi, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -&spmi_bus { - - qcom,pm8953@0 { - spmi-slave-container; - reg = <0x0>; - #address-cells = <1>; - #size-cells = <1>; - - pm8953_revid: qcom,revid@100 { - compatible = "qcom,qpnp-revid"; - reg = <0x100 0x100>; - }; - - qcom,power-on@800 { - compatible = "qcom,qpnp-power-on"; - reg = <0x800 0x100>; - interrupts = <0x0 0x8 0x0>, - <0x0 0x8 0x1>, - <0x0 0x8 0x4>, - <0x0 0x8 0x5>; - interrupt-names = "kpdpwr", "resin", - "resin-bark", "kpdpwr-resin-bark"; - qcom,pon-dbc-delay = <15625>; - qcom,system-reset; - qcom,store-hard-reset-reason; - - qcom,pon_1 { - qcom,pon-type = <0>; - qcom,pull-up = <1>; - qcom,support-reset = <1>; - qcom,s1-timer = <6720>; - qcom,s2-timer = <0>; - qcom,s2-type = <7>; - linux,code = <116>; - }; - - qcom,pon_2 { - qcom,pon-type = <1>; - qcom,pull-up = <1>; - linux,code = <114>; - }; - qcom,pon_3 { - qcom,pon-type = <3>; - qcom,support-reset = <1>; - qcom,pull-up = <1>; - qcom,s1-timer = <3072>; - qcom,s2-timer = <2000>; - qcom,s2-type = <7>; - qcom,use-bark; - }; - }; - - pm8953_temp_alarm: qcom,temp-alarm@2400 { - compatible = "qcom,qpnp-temp-alarm"; - reg = <0x2400 0x100>; - interrupts = <0x0 0x24 0x0>; - label = "pm8953_tz"; - qcom,channel-num = <8>; - qcom,threshold-set = <0>; - qcom,temp_alarm-vadc = <&pm8953_vadc>; - }; - - pm8953_coincell: qcom,coincell@2800 { - compatible = "qcom,qpnp-coincell"; - reg = <0x2800 0x100>; - }; - - pm8953_mpps: mpps { - compatible = "qcom,qpnp-pin"; - spmi-dev-container; - gpio-controller; - #gpio-cells = <2>; - #address-cells = <1>; - #size-cells = <1>; - label = "pm8953-mpp"; - - mpp@a000 { - reg = <0xa000 0x100>; - qcom,pin-num = <1>; - status = "disabled"; - }; - - mpp@a100 { - reg = <0xa100 0x100>; - qcom,pin-num = <2>; - }; - - mpp@a200 { - reg = <0xa200 0x100>; - qcom,pin-num = <3>; - status = "disabled"; - }; - - mpp@a300 { - reg = <0xa300 0x100>; - qcom,pin-num = <4>; - }; - }; - - pm8953_gpios: gpios { - spmi-dev-container; - compatible = "qcom,qpnp-pin"; - gpio-controller; - #gpio-cells = <2>; - #address-cells = <1>; - #size-cells = <1>; - label = "pm8953-gpio"; - - gpio@c000 { - reg = <0xc000 0x100>; - qcom,pin-num = <1>; - status = "disabled"; - }; - - gpio@c100 { - reg = <0xc100 0x100>; - qcom,pin-num = <2>; - status = "disabled"; - }; - - gpio@c200 { - reg = <0xc200 0x100>; - qcom,pin-num = <3>; - status = "disabled"; - }; - - gpio@c300 { - reg = <0xc300 0x100>; - qcom,pin-num = <4>; - status = "disabled"; - }; - - gpio@c400 { - reg = <0xc400 0x100>; - qcom,pin-num = <5>; - status = "disabled"; - }; - - gpio@c500 { - reg = <0xc500 0x100>; - qcom,pin-num = <6>; - status = "disabled"; - }; - - gpio@c600 { - reg = <0xc600 0x100>; - qcom,pin-num = <7>; - status = "disabled"; - }; - - gpio@c700 { - reg = <0xc700 0x100>; - qcom,pin-num = <8>; - /* - status = "disabled"; - */ - qcom,master-en = <0>;/* disable this gpio */ - }; - }; - - pm8953_vadc: vadc@3100 { - compatible = "qcom,qpnp-vadc"; - reg = <0x3100 0x100>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <0x0 0x31 0x0>; - interrupt-names = "eoc-int-en-set"; - qcom,adc-bit-resolution = <15>; - qcom,adc-vdd-reference = <1800>; - qcom,vadc-poll-eoc; - - chan@8 { - label = "die_temp"; - reg = <8>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <3>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; - }; - - chan@9 { - label = "ref_625mv"; - reg = <9>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; - }; - - chan@a { - label = "ref_1250v"; - reg = <0xa>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; - }; - - chan@c { - label = "ref_buf_625mv"; - reg = <0xc>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; - }; - }; - - pm8953_adc_tm: vadc@3400 { - compatible = "qcom,qpnp-adc-tm"; - reg = <0x3400 0x100>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <0x0 0x34 0x0>, - <0x0 0x34 0x3>, - <0x0 0x34 0x4>; - interrupt-names = "eoc-int-en-set", - "high-thr-en-set", - "low-thr-en-set"; - qcom,adc-bit-resolution = <15>; - qcom,adc-vdd-reference = <1800>; - qcom,adc_tm-vadc = <&pm8953_vadc>; - - }; - - pm8953_rtc: qcom,pm8953_rtc { - spmi-dev-container; - compatible = "qcom,qpnp-rtc"; - #address-cells = <1>; - #size-cells = <1>; - qcom,qpnp-rtc-write = <0>; - qcom,qpnp-rtc-alarm-pwrup = <0>; - - qcom,pm8953_rtc_rw@6000 { - reg = <0x6000 0x100>; - }; - - qcom,pm8953_rtc_alarm@6100 { - reg = <0x6100 0x100>; - interrupts = <0x0 0x61 0x1>; - }; - }; -/* - pm8953_typec: qcom,pm8953_typec@bf00 { - compatible = "qcom,qpnp-typec"; - reg = <0xbf00 0x100>; - interrupts = <0x0 0xbf 0x0>, - <0x0 0xbf 0x1>, - <0x0 0xbf 0x2>, - <0x0 0xbf 0x3>, - <0x0 0xbf 0x4>, - <0x0 0xbf 0x6>, - <0x0 0xbf 0x7>; - - interrupt-names = "vrd-change", - "ufp-detect", - "ufp-detach", - "dfp-detect", - "dfp-detach", - "vbus-err", - "vconn-oc"; - }; -*/ - }; - - pm8953_1: qcom,pm8953@1 { - spmi-slave-container; - reg = <0x1>; - #address-cells = <1>; - #size-cells = <1>; - - pm8953_pwm: pwm@bc00 { - status = "disabled"; - compatible = "qcom,qpnp-pwm"; - reg = <0xbc00 0x100>; - reg-names = "qpnp-lpg-channel-base"; - qcom,channel-id = <0>; - qcom,supported-sizes = <6>, <9>; - #pwm-cells = <2>; - }; - }; -}; diff --git a/arch/arm/boot/dts/qcom/msm-pm8953.dtsi b/arch/arm/boot/dts/qcom/msm-pm8953.dtsi index 84bf7ead1f6c..7fad9be18b27 100644 --- a/arch/arm/boot/dts/qcom/msm-pm8953.dtsi +++ b/arch/arm/boot/dts/qcom/msm-pm8953.dtsi @@ -39,10 +39,6 @@ qcom,pon_1 { qcom,pon-type = <0>; qcom,pull-up = <1>; - qcom,support-reset = <1>; - qcom,s1-timer = <6720>; - qcom,s2-timer = <0>; - qcom,s2-type = <7>; linux,code = <116>; }; @@ -51,15 +47,6 @@ qcom,pull-up = <1>; linux,code = <114>; }; - qcom,pon_3 { - qcom,pon-type = <3>; - qcom,support-reset = <1>; - qcom,pull-up = <1>; - qcom,s1-timer = <3072>; - qcom,s2-timer = <2000>; - qcom,s2-type = <1>; - qcom,use-bark; - }; }; pm8953_temp_alarm: qcom,temp-alarm@2400 { @@ -163,10 +150,7 @@ gpio@c700 { reg = <0xc700 0x100>; qcom,pin-num = <8>; - /* status = "disabled"; - */ - qcom,master-en = <0>;/* disable this gpio */ }; }; @@ -260,7 +244,7 @@ interrupts = <0x0 0x61 0x1>; }; }; -/* + pm8953_typec: qcom,pm8953_typec@bf00 { compatible = "qcom,qpnp-typec"; reg = <0xbf00 0x100>; @@ -280,7 +264,6 @@ "vbus-err", "vconn-oc"; }; -*/ }; pm8953_1: qcom,pm8953@1 { diff --git a/arch/arm/boot/dts/qcom/msm-pmi8940.dtsi b/arch/arm/boot/dts/qcom/msm-pmi8940.dtsi index 41619e231bd9..59001baad55f 100644 --- a/arch/arm/boot/dts/qcom/msm-pmi8940.dtsi +++ b/arch/arm/boot/dts/qcom/msm-pmi8940.dtsi @@ -1,6 +1,5 @@ /* * Copyright (c) 2016-2017, The Linux Foundation. All rights reserved. - * Copyright (C) 2018 XiaoMi, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -495,7 +494,6 @@ qcom,fs-curr-ua = <20000>; qcom,en-phase-stag; qcom,led-strings-list = [00 01]; - qcom,en-cabc; qcom,en-ext-pfet-sc-pro; qcom,cons-sync-write-delay-us = <1000>; }; diff --git a/arch/arm/boot/dts/qcom/msm-pmi8950-e7.dtsi b/arch/arm/boot/dts/qcom/msm-pmi8950-e7.dtsi deleted file mode 100644 index adaf8aa89ebe..000000000000 --- a/arch/arm/boot/dts/qcom/msm-pmi8950-e7.dtsi +++ /dev/null @@ -1,662 +0,0 @@ -/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved. - * Copyright (C) 2018 XiaoMi, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include - -&spmi_bus { - - qcom,pmi8950@2 { - spmi-slave-container; - reg = <0x2>; - #address-cells = <1>; - #size-cells = <1>; - - pmi8950_revid: qcom,revid@100 { - compatible = "qcom,qpnp-revid"; - reg = <0x100 0x100>; - }; - - qcom,power-on@800 { - compatible = "qcom,qpnp-power-on"; - reg = <0x800 0x100>; - qcom,secondary-pon-reset; - qcom,hard-reset-poweroff-type = - ; - - pon_perph_reg: qcom,pon_perph_reg { - regulator-name = "pon_spare_reg"; - qcom,pon-spare-reg-addr = <0x8c>; - qcom,pon-spare-reg-bit = <1>; - }; - }; - - pmi8950_vadc: vadc@3100 { - compatible = "qcom,qpnp-vadc"; - reg = <0x3100 0x100>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <0x2 0x31 0x0>; - interrupt-names = "eoc-int-en-set"; - qcom,adc-bit-resolution = <15>; - qcom,adc-vdd-reference = <1800>; - qcom,vadc-poll-eoc; - - chan@0 { - label = "usbin"; - reg = <0>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <4>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; - }; - - chan@1 { - label = "dcin"; - reg = <1>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <4>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; - }; - - chan@3 { - label = "vchg_sns"; - reg = <3>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <1>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; - }; - - chan@9 { - label = "ref_625mv"; - reg = <9>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; - }; - - chan@a { - label = "ref_1250v"; - reg = <0xa>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; - }; - - chan@d { - label = "chg_temp"; - reg = <0xd>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <16>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; - qcom,vadc-thermal-node; - }; - - chan@43 { - label = "usb_dp"; - reg = <0x43>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <1>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; - }; - - chan@44 { - label = "usb_dm"; - reg = <0x44>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <1>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; - }; - chan@10 { - label = "pcba_vadc"; - reg = <0x10>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; //1:1 - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <1>; - qcom,fast-avg-setup = <2>; - }; - }; - - pmi8950_gpios: gpios { - spmi-dev-container; - compatible = "qcom,qpnp-pin"; - gpio-controller; - #gpio-cells = <2>; - #address-cells = <1>; - #size-cells = <1>; - label = "pmi8950-gpio"; - - gpio@c000 { - reg = <0xc000 0x100>; - qcom,pin-num = <1>; - status = "disabled"; - }; - - gpio@c100 { - reg = <0xc100 0x100>; - qcom,pin-num = <2>; - status = "disabled"; - }; - }; - - pmi8950_mpps: mpps { - spmi-dev-container; - compatible = "qcom,qpnp-pin"; - gpio-controller; - #gpio-cells = <2>; - #address-cells = <1>; - #size-cells = <1>; - label = "pmi8950-mpp"; - - mpp@a000 { - reg = <0xa000 0x100>; - qcom,pin-num = <1>; - qcom,mode = <4>; /* AIN input */ - qcom,invert = <1>; /* Enable MPP */ - com,ain-route = <0>; /* AMUX 5 */ - qcom,master-en = <1>; - qcom,src-sel = <0>; /* Function constant */ - status = "okay"; - }; - - mpp@a100 { - reg = <0xa100 0x100>; - qcom,pin-num = <2>; - status = "disabled"; - }; - - mpp@a200 { - reg = <0xa200 0x100>; - qcom,pin-num = <3>; - status = "disabled"; - }; - - mpp@a300 { - reg = <0xa300 0x100>; - qcom,pin-num = <4>; - status = "disabled"; - }; - }; - - pmi8950_charger: qcom,qpnp-smbcharger { - spmi-dev-container; - compatible = "qcom,qpnp-smbcharger"; - #address-cells = <1>; - #size-cells = <1>; - - qcom,iterm-ma = <200>; - qcom,float-voltage-mv = <4380>; - qcom,resume-delta-mv = <50>; - qcom,chg-inhibit-fg; - qcom,rparasitics-uohm = <100000>; - qcom,bms-psy-name = "bms"; - qcom,charge-unknown-battery; - qcom,thermal-mitigation = <1500 700 600 0>; - //qcom,parallel-usb-min-current-ma = <1400>; - //qcom,parallel-usb-9v-min-current-ma = <900>; - //qcom,parallel-allowed-lowering-ma = <500>; - qcom,pmic-revid = <&pmi8950_revid>; - qcom,force-aicl-rerun; - qcom,aicl-rerun-period-s = <180>; - qcom,override-usb-current; - qcom,fastchg-current-comp = <1200>; - qcom,float-voltage-comp = <15>; - qcom,chgr@1000 { - reg = <0x1000 0x100>; - interrupts = <0x2 0x10 0x0>, - <0x2 0x10 0x1>, - <0x2 0x10 0x2>, - <0x2 0x10 0x3>, - <0x2 0x10 0x4>, - <0x2 0x10 0x5>, - <0x2 0x10 0x6>, - <0x2 0x10 0x7>; - - interrupt-names = "chg-error", - "chg-inhibit", - "chg-prechg-sft", - "chg-complete-chg-sft", - "chg-p2f-thr", - "chg-rechg-thr", - "chg-taper-thr", - "chg-tcc-thr"; - }; - - qcom,otg@1100 { - reg = <0x1100 0x100>; - interrupts = <0x2 0x11 0x0>, - <0x2 0x11 0x1>, - <0x2 0x11 0x3>; - interrupt-names = "otg-fail", - "otg-oc", - "usbid-change"; - }; - - qcom,bat-if@1200 { - reg = <0x1200 0x100>; - interrupts = <0x2 0x12 0x0>, - <0x2 0x12 0x1>, - <0x2 0x12 0x2>, - <0x2 0x12 0x3>, - <0x2 0x12 0x4>, - <0x2 0x12 0x5>, - <0x2 0x12 0x6>, - <0x2 0x12 0x7>; - - interrupt-names = "batt-hot", - "batt-warm", - "batt-cold", - "batt-cool", - "batt-ov", - "batt-low", - "batt-missing", - "batt-term-missing"; - }; - - qcom,usb-chgpth@1300 { - reg = <0x1300 0x100>; - interrupts = <0x2 0x13 0x0>, - <0x2 0x13 0x1>, - <0x2 0x13 0x2>, - <0x2 0x13 0x5>; - - interrupt-names = "usbin-uv", - "usbin-ov", - "usbin-src-det", - "aicl-done"; - }; - - qcom,dc-chgpth@1400 { - reg = <0x1400 0x100>; - interrupts = <0x2 0x14 0x0>, - <0x2 0x14 0x1>; - interrupt-names = "dcin-uv", - "dcin-ov"; - }; - - qcom,chgr-misc@1600 { - reg = <0x1600 0x100>; - interrupts = <0x2 0x16 0x0>, - <0x2 0x16 0x1>, - <0x2 0x16 0x2>, - <0x2 0x16 0x3>, - <0x2 0x16 0x4>, - <0x2 0x16 0x5>; - - interrupt-names = "power-ok", - "temp-shutdown", - "wdog-timeout", - "flash-fail", - "otst2", - "otst3"; - }; - - smbcharger_charger_otg: qcom,smbcharger-boost-otg { - regulator-name = "smbcharger_charger_otg"; - }; - }; - - pmi8950_fg: qcom,fg { - spmi-dev-container; - compatible = "qcom,qpnp-fg"; - #address-cells = <1>; - #size-cells = <1>; - qcom,resume-soc-raw = <254>; - status = "okay"; - qcom,bcl-lm-threshold-ma = <127>; - qcom,bcl-mh-threshold-ma = <405>; - qcom,fg-iterm-ma = <300>; - qcom,fg-chg-iterm-ma = <200>; - qcom,pmic-revid = <&pmi8950_revid>; - qcom,fg-cutoff-voltage-mv = <3400>; - qcom,cycle-counter-en; - qcom,hold-soc-while-full; - qcom,capacity-learning-on; - qcom,fg-cc-cv-threshold-mv =<4370>; - qcom,vbat-estimate-diff-mv = <200>; - qcom,fg-soc@4000 { - status = "okay"; - reg = <0x4000 0x100>; - interrupts = <0x2 0x40 0x0>, - <0x2 0x40 0x1>, - <0x2 0x40 0x2>, - <0x2 0x40 0x3>, - <0x2 0x40 0x4>, - <0x2 0x40 0x5>, - <0x2 0x40 0x6>; - - interrupt-names = "high-soc", - "low-soc", - "full-soc", - "empty-soc", - "delta-soc", - "first-est-done", - "update-soc"; - }; - - qcom,fg-batt@4100 { - reg = <0x4100 0x100>; - interrupts = <0x2 0x41 0x0>, - <0x2 0x41 0x1>, - <0x2 0x41 0x2>, - <0x2 0x41 0x3>, - <0x2 0x41 0x4>, - <0x2 0x41 0x5>, - <0x2 0x41 0x6>, - <0x2 0x41 0x7>; - - interrupt-names = "soft-cold", - "soft-hot", - "vbatt-low", - "batt-ided", - "batt-id-req", - "batt-unknown", - "batt-missing", - "batt-match"; - }; - - qcom,revid-tp-rev@1f1 { - reg = <0x1f1 0x1>; - }; - - qcom,fg-memif@4400 { - status = "okay"; - reg = <0x4400 0x100>; - interrupts = <0x2 0x44 0x0>, - <0x2 0x44 0x2>; - - interrupt-names = "mem-avail", - "data-rcvry-sug"; - }; - }; - - bcl@4200 { - compatible = "qcom,msm-bcl"; - reg = <0x4200 0xFF 0x88E 0x2>; - reg-names = "fg_user_adc", "pon_spare"; - interrupts = <0x2 0x42 0x0>, - <0x2 0x42 0x1>; - interrupt-names = "bcl-high-ibat-int", - "bcl-low-vbat-int"; - qcom,vbat-scaling-factor = <39000>; - qcom,vbat-gain-numerator = <1>; - qcom,vbat-gain-denominator = <128>; - qcom,vbat-polling-delay-ms = <100>; - qcom,ibat-scaling-factor = <39000>; - qcom,ibat-gain-numerator = <1>; - qcom,ibat-gain-denominator = <128>; - qcom,ibat-offset-numerator = <1200>; - qcom,ibat-offset-denominator = <1>; - qcom,ibat-polling-delay-ms = <100>; - qcom,inhibit-derating-ua = <550000>; - }; - - qcom,leds@a100 { - compatible = "qcom,leds-qpnp"; - reg = <0xa100 0x100>; - label = "mpp"; - }; - }; - - qcom,pmi8950@3 { - spmi-slave-container; - reg = <0x3>; - #address-cells = <1>; - #size-cells = <1>; - - pmi8950_pwm: pwm@b000 { - status = "disabled"; - compatible = "qcom,qpnp-pwm"; - reg = <0xb000 0x100>; - reg-names = "qpnp-lpg-channel-base"; - qcom,channel-id = <0>; - qcom,supported-sizes = <6>, <9>; - #pwm-cells = <2>; - }; - - labibb: qpnp-labibb-regulator { - status = "okay"; - spmi-dev-container; - compatible = "qcom,qpnp-labibb-regulator"; - #address-cells = <1>; - #size-cells = <1>; - qcom,pmic-revid = <&pmi8950_revid>; - - ibb_regulator: qcom,ibb@dc00 { - reg = <0xdc00 0x100>; - reg-names = "ibb_reg"; - regulator-name = "ibb_reg"; - - regulator-min-microvolt = <4600000>; - regulator-max-microvolt = <6000000>; - - qcom,qpnp-ibb-min-voltage = <1400000>; - qcom,qpnp-ibb-step-size = <100000>; - qcom,qpnp-ibb-slew-rate = <2000000>; - qcom,qpnp-ibb-use-default-voltage; - qcom,qpnp-ibb-init-voltage = <5500000>; - qcom,qpnp-ibb-init-amoled-voltage = <4000000>; - qcom,qpnp-ibb-init-lcd-voltage = <5500000>; - - qcom,qpnp-ibb-soft-start = <1000>; - - qcom,qpnp-ibb-discharge-resistor = <32>; - qcom,qpnp-ibb-lab-pwrup-delay = <8000>; - qcom,qpnp-ibb-lab-pwrdn-delay = <8000>; - qcom,qpnp-ibb-en-discharge; - - qcom,qpnp-ibb-full-pull-down; - qcom,qpnp-ibb-pull-down-enable; - qcom,qpnp-ibb-switching-clock-frequency = <1480>; - qcom,qpnp-ibb-limit-maximum-current = <200>; - qcom,qpnp-ibb-debounce-cycle = <16>; - qcom,qpnp-ibb-limit-max-current-enable; - qcom,qpnp-ibb-ps-enable; - }; - - lab_regulator: qcom,lab@de00 { - reg = <0xde00 0x100>; - reg-names = "lab"; - regulator-name = "lab_reg"; - - regulator-min-microvolt = <4600000>; - regulator-max-microvolt = <6000000>; - - qcom,qpnp-lab-min-voltage = <4600000>; - qcom,qpnp-lab-step-size = <100000>; - qcom,qpnp-lab-slew-rate = <5000>; - qcom,qpnp-lab-use-default-voltage; - qcom,qpnp-lab-init-voltage = <5500000>; - qcom,qpnp-lab-init-amoled-voltage = <4600000>; - qcom,qpnp-lab-init-lcd-voltage = <5500000>; - - qcom,qpnp-lab-soft-start = <800>; - - qcom,qpnp-lab-full-pull-down; - qcom,qpnp-lab-pull-down-enable; - qcom,qpnp-lab-switching-clock-frequency = - <1600>; - qcom,qpnp-lab-limit-maximum-current = <200>; - qcom,qpnp-lab-limit-max-current-enable; - qcom,qpnp-lab-ps-threshold = <40>; - qcom,qpnp-lab-ps-enable; - qcom,qpnp-lab-nfet-size = <100>; - qcom,qpnp-lab-pfet-size = <100>; - qcom,qpnp-lab-max-precharge-time = <500>; - }; - - }; - - wled: qcom,leds@d800 { - compatible = "qcom,qpnp-wled"; - reg = <0xd800 0x100>, - <0xd900 0x100>, - <0xdc00 0x100>, - <0xde00 0x100>; - reg-names = "qpnp-wled-ctrl-base", - "qpnp-wled-sink-base", - "qpnp-wled-ibb-base", - "qpnp-wled-lab-base"; - interrupts = <0x3 0xd8 0x2>; - interrupt-names = "sc-irq"; - status = "okay"; - linux,name = "wled"; - linux,default-trigger = "bkl-trigger"; - qcom,fdbk-output = "auto"; - qcom,vref-mv = <350>; - qcom,switch-freq-khz = <800>; - qcom,ovp-mv = <19400>; - qcom,ilim-ma = <980>; - qcom,boost-duty-ns = <26>; - qcom,mod-freq-khz = <9600>; - qcom,dim-mode = "hybrid"; - qcom,dim-method = "linear"; - qcom,hyb-thres = <625>; - qcom,sync-dly-us = <800>; - qcom,fs-curr-ua = <20000>; - qcom,led-strings-list = [00 01 02]; - qcom,en-cabc; - qcom,en-ext-pfet-sc-pro; - qcom,cons-sync-write-delay-us = <1000>; - }; - - flash_led: qcom,leds@d300 { - compatible = "qcom,qpnp-flash-led"; - status = "okay"; - reg = <0xd300 0x100>; - label = "flash"; - qcom,headroom = <500>; - qcom,startup-dly = <128>; - qcom,clamp-curr = <200>; - qcom,pmic-charger-support; - qcom,self-check-enabled; - qcom,thermal-derate-enabled; - qcom,thermal-derate-threshold = <100>; - qcom,thermal-derate-rate = "5_PERCENT"; - qcom,current-ramp-enabled; - qcom,ramp_up_step = "6P7_US"; - qcom,ramp_dn_step = "6P7_US"; - qcom,vph-pwr-droop-enabled; - qcom,vph-pwr-droop-threshold = <3000>; - qcom,vph-pwr-droop-debounce-time = <10>; - qcom,headroom-sense-ch0-enabled; - qcom,headroom-sense-ch1-enabled; - qcom,pmic-revid = <&pmi8950_revid>; - - pmi8950_flash0: qcom,flash_0 { - label = "flash"; - qcom,led-name = "led:flash_0"; - qcom,default-led-trigger = - "flash0_trigger"; - qcom,max-current = <1000>; - qcom,duration = <1280>; - qcom,id = <0>; - qcom,current = <1000>; - }; - - pmi8950_flash1: qcom,flash_1 { - label = "flash"; - qcom,led-name = "led:flash_1"; - qcom,default-led-trigger = - "flash1_trigger"; - qcom,max-current = <1000>; - qcom,duration = <1280>; - qcom,id = <1>; - qcom,current = <625>; - }; - - pmi8950_torch0: qcom,torch_0 { - label = "torch"; - qcom,led-name = "led:torch_0"; - qcom,default-led-trigger = - "torch0_trigger"; - qcom,max-current = <200>; - qcom,id = <0>; - qcom,current = <120>; - }; - - pmi8950_torch1: qcom,torch_1 { - label = "torch"; - qcom,led-name = "led:torch_1"; - qcom,default-led-trigger = - "torch1_trigger"; - qcom,max-current = <200>; - qcom,id = <1>; - qcom,current = <120>; - }; - - pmi8950_switch: qcom,switch { - label = "switch"; - qcom,led-name = "led:switch"; - qcom,default-led-trigger = - "switch_trigger"; - qcom,max-current = <1000>; - qcom,duration = <1280>; - qcom,id = <2>; - qcom,current = <625>; - reg0 { - regulator-name = "pon_spare_reg"; - }; - }; - }; - - pmi_haptic: qcom,haptic@c000 { - compatible = "qcom,qpnp-haptic"; - reg = <0xc000 0x100>; - interrupts = <0x3 0xc0 0x0>, - <0x3 0xc0 0x1>; - interrupt-names = "sc-irq", "play-irq"; - qcom,pmic-revid = <&pmi8950_revid>; - vcc_pon-supply = <&pon_perph_reg>; - qcom,play-mode = "direct"; - qcom,wave-play-rate-us = <5263>; - qcom,actuator-type = "erm"; - qcom,wave-shape = "square"; - qcom,vmax-mv = <3000>; - qcom,ilim-ma = <800>; - qcom,sc-deb-cycles = <8>; - qcom,int-pwm-freq-khz = <505>; - qcom,en-brake; - qcom,brake-pattern = [03 03 00 00]; - qcom,use-play-irq; - qcom,use-sc-irq; - qcom,wave-samples = [3e 3e 3e 3e 3e 3e 3e 3e]; - qcom,wave-rep-cnt = <1>; - qcom,wave-samp-rep-cnt = <1>; - }; - }; -}; diff --git a/arch/arm/boot/dts/qcom/msm-pmi8950.dtsi b/arch/arm/boot/dts/qcom/msm-pmi8950.dtsi index 8f968bf8476b..a7146546f309 100644 --- a/arch/arm/boot/dts/qcom/msm-pmi8950.dtsi +++ b/arch/arm/boot/dts/qcom/msm-pmi8950.dtsi @@ -1,5 +1,4 @@ /* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved. - * Copyright (C) 2018 XiaoMi, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -139,16 +138,6 @@ qcom,hw-settle-time = <0>; qcom,fast-avg-setup = <0>; }; - chan@10 { - label = "pcba_vadc"; - reg = <0x10>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; //1:1 - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <1>; - qcom,fast-avg-setup = <2>; - }; }; pmi8950_gpios: gpios { @@ -185,12 +174,7 @@ mpp@a000 { reg = <0xa000 0x100>; qcom,pin-num = <1>; - qcom,mode = <4>; /* AIN input */ - qcom,invert = <1>; /* Enable MPP */ - com,ain-route = <0>; /* AMUX 5 */ - qcom,master-en = <1>; - qcom,src-sel = <0>; /* Function constant */ - status = "okay"; + status = "disabled"; }; mpp@a100 { @@ -218,23 +202,21 @@ #address-cells = <1>; #size-cells = <1>; - qcom,iterm-ma = <200>; - qcom,float-voltage-mv = <4400>; - qcom,resume-delta-mv = <50>; + qcom,iterm-ma = <100>; + qcom,float-voltage-mv = <4200>; + qcom,resume-delta-mv = <200>; qcom,chg-inhibit-fg; qcom,rparasitic-uohm = <100000>; qcom,bms-psy-name = "bms"; - qcom,charge-unknown-battery; qcom,thermal-mitigation = <1500 700 600 0>; - //qcom,parallel-usb-min-current-ma = <1400>; - //qcom,parallel-usb-9v-min-current-ma = <900>; - //qcom,parallel-allowed-lowering-ma = <500>; + qcom,parallel-usb-min-current-ma = <1400>; + qcom,parallel-usb-9v-min-current-ma = <900>; + qcom,parallel-allowed-lowering-ma = <500>; qcom,pmic-revid = <&pmi8950_revid>; qcom,force-aicl-rerun; qcom,aicl-rerun-period-s = <180>; - qcom,override-usb-current; - qcom,fastchg-current-comp = <900>; - qcom,float-voltage-comp = <16>; + qcom,autoadjust-vfloat; + qcom,chgr@1000 { reg = <0x1000 0x100>; interrupts = <0x2 0x10 0x0>, @@ -335,19 +317,17 @@ compatible = "qcom,qpnp-fg"; #address-cells = <1>; #size-cells = <1>; - qcom,resume-soc-raw = <253>; + qcom,resume-soc = <95>; status = "okay"; qcom,bcl-lm-threshold-ma = <127>; qcom,bcl-mh-threshold-ma = <405>; - qcom,fg-iterm-ma = <300>; - qcom,fg-chg-iterm-ma = <200>; + qcom,fg-iterm-ma = <150>; + qcom,fg-chg-iterm-ma = <100>; qcom,pmic-revid = <&pmi8950_revid>; - qcom,fg-cutoff-voltage-mv = <3400>; + qcom,fg-cutoff-voltage-mv = <3500>; qcom,cycle-counter-en; - qcom,hold-soc-while-full; qcom,capacity-learning-on; - qcom,fg-cc-cv-threshold-mv =<4390>; - qcom,vbat-estimate-diff-mv = <250>; + qcom,fg-soc@4000 { status = "okay"; reg = <0x4000 0x100>; @@ -539,7 +519,7 @@ qcom,fdbk-output = "auto"; qcom,vref-mv = <350>; qcom,switch-freq-khz = <800>; - qcom,ovp-mv = <19400>; + qcom,ovp-mv = <29500>; qcom,ilim-ma = <980>; qcom,boost-duty-ns = <26>; qcom,mod-freq-khz = <9600>; @@ -548,8 +528,7 @@ qcom,hyb-thres = <625>; qcom,sync-dly-us = <800>; qcom,fs-curr-ua = <20000>; - qcom,led-strings-list = [00 01 02]; - qcom,en-cabc; + qcom,led-strings-list = [00 01]; qcom,en-ext-pfet-sc-pro; qcom,cons-sync-write-delay-us = <1000>; }; @@ -585,7 +564,7 @@ qcom,max-current = <1000>; qcom,duration = <1280>; qcom,id = <0>; - qcom,current = <1000>; + qcom,current = <625>; }; pmi8950_flash1: qcom,flash_1 { @@ -599,16 +578,6 @@ qcom,current = <625>; }; - pmi8950_flashlight: qcom,flashlight { - label = "torch"; - qcom,led-name = "flashlight"; - qcom,default-led-trigger = - "torch0_trigger"; - qcom,max-current = <200>; - qcom,id = <0>; - qcom,current = <120>; - }; - pmi8950_torch0: qcom,torch_0 { label = "torch"; qcom,led-name = "led:torch_0"; @@ -656,7 +625,7 @@ qcom,wave-play-rate-us = <5263>; qcom,actuator-type = "erm"; qcom,wave-shape = "square"; - qcom,vmax-mv = <3000>; + qcom,vmax-mv = <2000>; qcom,ilim-ma = <800>; qcom,sc-deb-cycles = <8>; qcom,int-pwm-freq-khz = <505>; diff --git a/arch/arm/boot/dts/qcom/msm8937-audio-cdp.dtsi b/arch/arm/boot/dts/qcom/msm8937-audio-cdp.dtsi index e6bb40120166..c97c40963059 100644 --- a/arch/arm/boot/dts/qcom/msm8937-audio-cdp.dtsi +++ b/arch/arm/boot/dts/qcom/msm8937-audio-cdp.dtsi @@ -31,14 +31,6 @@ status = "okay"; }; -&wsa881x_i2c_e { - status = "okay"; -}; - -&wsa881x_i2c_44 { - status = "okay"; -}; - &wsa881x_i2c_f { status = "okay"; }; diff --git a/arch/arm/boot/dts/qcom/msm8953-audio-e7.dtsi b/arch/arm/boot/dts/qcom/msm8953-audio-e7.dtsi deleted file mode 100644 index 450dec46b4eb..000000000000 --- a/arch/arm/boot/dts/qcom/msm8953-audio-e7.dtsi +++ /dev/null @@ -1,265 +0,0 @@ -/* - * Copyright (c) 2015-2016, The Linux Foundation. All rights reserved. - * Copyright (C) 2018 XiaoMi, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include "msm8953-wsa881x.dtsi" - -&int_codec { - qcom,model = "msm8953-snd-card-mtp"; - - qcom,cdc-us-euro-gpios = <&tlmm 63 0>; - qcom,msm-mbhc-hphl-swh = <1>; - qcom,msm-mbhc-gnd-swh = <1>; - qcom,msm-hs-micbias-type = "internal"; - qcom,msm-micbias1-ext-cap; - - qcom,msm-gpios = - "pri_i2s", - "us_eu_gpio", - "quin_i2s", - "comp_gpio"; - qcom,pinctrl-names = - "all_off", - "pri_i2s_act", - "us_eu_gpio_act", - "pri_i2s_us_eu_gpio_act", - "quin_act", - "quin_pri_i2s_act", - "quin_us_eu_gpio_act", - "quin_us_eu_gpio_pri_i2s_act", - "comp_gpio_act", - "comp_gpio_pri_i2s_act", - "comp_gpio_us_eu_gpio_act", - "comp_gpio_pri_i2s_us_eu_gpio_act", - "comp_gpio_quin_act", - "comp_gpio_quin_pri_i2s_act", - "comp_gpio_quin_us_eu_gpio_act", - "comp_gpio_quin_us_eu_gpio_pri_i2s_act"; - - pinctrl-names = - "all_off", - "pri_i2s_act", - "us_eu_gpio_act", - "pri_i2s_us_eu_gpio_act", - "quin_act", - "quin_pri_i2s_act", - "quin_us_eu_gpio_act", - "quin_us_eu_gpio_pri_i2s_act", - "comp_gpio_act", - "comp_gpio_pri_i2s_act", - "comp_gpio_us_eu_gpio_act", - "comp_gpio_pri_i2s_us_eu_gpio_act", - "comp_gpio_quin_act", - "comp_gpio_quin_pri_i2s_act", - "comp_gpio_quin_us_eu_gpio_act", - "comp_gpio_quin_us_eu_gpio_pri_i2s_act"; - - pinctrl-0 = <&cdc_pdm_lines_sus &cdc_pdm_comp_lines_sus - &cdc_pdm_lines_2_sus &cross_conn_det_sus - &pri_tlmm_lines_sus &pri_tlmm_ws_sus>; - pinctrl-1 = <&cdc_pdm_lines_act &cdc_pdm_comp_lines_sus - &cdc_pdm_lines_2_act &cross_conn_det_sus - &pri_tlmm_lines_sus &pri_tlmm_ws_sus>; - pinctrl-2 = <&cdc_pdm_lines_sus &cdc_pdm_comp_lines_sus - &cdc_pdm_lines_2_sus &cross_conn_det_act - &pri_tlmm_lines_sus &pri_tlmm_ws_sus>; - pinctrl-3 = <&cdc_pdm_lines_act &cdc_pdm_comp_lines_sus - &cdc_pdm_lines_2_act &cross_conn_det_act - &pri_tlmm_lines_sus &pri_tlmm_ws_sus>; - pinctrl-4 = <&cdc_pdm_lines_sus &cdc_pdm_comp_lines_sus - &cdc_pdm_lines_2_sus &cross_conn_det_sus - &pri_tlmm_lines_act &pri_tlmm_ws_act>; - pinctrl-5 = <&cdc_pdm_lines_act &cdc_pdm_comp_lines_sus - &cdc_pdm_lines_2_act &cross_conn_det_sus - &pri_tlmm_lines_act &pri_tlmm_ws_act>; - pinctrl-6 = <&cdc_pdm_lines_sus &cdc_pdm_comp_lines_sus - &cdc_pdm_lines_2_sus &cross_conn_det_act - &pri_tlmm_lines_act &pri_tlmm_ws_act>; - pinctrl-7 = <&cdc_pdm_lines_act &cdc_pdm_comp_lines_sus - &cdc_pdm_lines_2_act &cross_conn_det_act - &pri_tlmm_lines_act &pri_tlmm_ws_act>; - pinctrl-8 = <&cdc_pdm_lines_sus &cdc_pdm_comp_lines_act - &cdc_pdm_lines_2_sus &cross_conn_det_sus - &pri_tlmm_lines_sus &pri_tlmm_ws_sus>; - pinctrl-9 = <&cdc_pdm_lines_act &cdc_pdm_comp_lines_act - &cdc_pdm_lines_2_act &cross_conn_det_sus - &pri_tlmm_lines_sus &pri_tlmm_ws_sus>; - pinctrl-10 = <&cdc_pdm_lines_sus &cdc_pdm_comp_lines_act - &cdc_pdm_lines_2_sus &cross_conn_det_act - &pri_tlmm_lines_sus &pri_tlmm_ws_sus>; - pinctrl-11 = <&cdc_pdm_lines_act &cdc_pdm_comp_lines_act - &cdc_pdm_lines_2_act &cross_conn_det_act - &pri_tlmm_lines_sus &pri_tlmm_ws_sus>; - pinctrl-12 = <&cdc_pdm_lines_sus &cdc_pdm_comp_lines_act - &cdc_pdm_lines_2_sus &cross_conn_det_sus - &pri_tlmm_lines_act &pri_tlmm_ws_act>; - pinctrl-13 = <&cdc_pdm_lines_act &cdc_pdm_comp_lines_act - &cdc_pdm_lines_2_act &cross_conn_det_sus - &pri_tlmm_lines_act &pri_tlmm_ws_act>; - pinctrl-14 = <&cdc_pdm_lines_sus &cdc_pdm_comp_lines_act - &cdc_pdm_lines_2_sus &cross_conn_det_act - &pri_tlmm_lines_act &pri_tlmm_ws_act>; - pinctrl-15 = <&cdc_pdm_lines_act &cdc_pdm_comp_lines_act - &cdc_pdm_lines_2_act &cross_conn_det_act - &pri_tlmm_lines_act &pri_tlmm_ws_act>; - - asoc-codec = <&stub_codec>, <&pm8953_diangu_dig>, <&hdmi_dba>; - asoc-codec-names = "msm-stub-codec.1", "cajon_codec", - "msm-hdmi-dba-codec-rx"; - -}; - -&pm8953_gpios { - gpio@c000 { - status = "ok"; - qcom,mode = <1>; - qcom,pull = <5>; - qcom,vin-sel = <0>; - qcom,src-sel = <2>; - qcom,master-en = <1>; - qcom,out-strength = <2>; - }; -}; - -&ext_codec { - qcom,model = "msm8953-tasha-snd-card"; - - qcom,cdc-us-euro-gpios = <&tlmm 63 0>; - qcom,msm-mbhc-hphl-swh = <0>; - qcom,msm-mbhc-gnd-swh = <0>; - - qcom,wsa-max-devs = <2>; - qcom,wsa-devs = <&wsa881x_211>, <&wsa881x_212>, - <&wsa881x_213>, <&wsa881x_214>; - qcom,wsa-aux-dev-prefix = "SpkrLeft", "SpkrRight", - "SpkrLeft", "SpkrRight"; -}; - -&wcd9xxx_intc { - interrupt-parent = <&tlmm>; - interrupts = <73 0>; - qcom,gpio-connect = <&tlmm 73 0>; -}; - -&clock_audio { - qcom,audio-ref-clk-gpio = <&pm8953_gpios 1 0>; - qcom,lpass-mclk-id = "pri_mclk"; - clocks = <&clock_gcc clk_div_clk2>; - pinctrl-names = "sleep", "active"; - pinctrl-0 = <&cdc_mclk2_sleep>; - pinctrl-1 = <&cdc_mclk2_active>; -}; - -&pm8953_1 { - pm8953_diangu_dig: 8953_wcd_codec@f000 { - compatible = "qcom,msm8x16_wcd_codec"; - reg = <0xf000 0x100>; - interrupt-parent = <&spmi_bus>; - interrupts = <0x1 0xf0 0x0>, - <0x1 0xf0 0x1>, - <0x1 0xf0 0x2>, - <0x1 0xf0 0x3>, - <0x1 0xf0 0x4>, - <0x1 0xf0 0x5>, - <0x1 0xf0 0x6>, - <0x1 0xf0 0x7>; - interrupt-names = "spk_cnp_int", - "spk_clip_int", - "spk_ocp_int", - "ins_rem_det1", - "but_rel_det", - "but_press_det", - "ins_rem_det", - "mbhc_int"; - - cdc-vdda-cp-supply = <&pm8953_s4>; - qcom,cdc-vdda-cp-voltage = <1900000 2050000>; - qcom,cdc-vdda-cp-current = <500000>; - - cdc-vdd-io-supply = <&pm8953_l5>; - qcom,cdc-vdd-io-voltage = <1800000 1800000>; - qcom,cdc-vdd-io-current = <5000>; - - cdc-vdd-pa-supply = <&pm8953_s4>; - qcom,cdc-vdd-pa-voltage = <1900000 2050000>; - qcom,cdc-vdd-pa-current = <260000>; - - cdc-vdd-mic-bias-supply = <&pm8953_l13>; - qcom,cdc-vdd-mic-bias-voltage = <3125000 3125000>; - qcom,cdc-vdd-mic-bias-current = <5000>; - - qcom,cdc-mclk-clk-rate = <9600000>; - - qcom,cdc-static-supplies = "cdc-vdd-io", - "cdc-vdd-pa", - "cdc-vdda-cp"; - - qcom,cdc-on-demand-supplies = "cdc-vdd-mic-bias"; - qcom,dig-cdc-base-addr = <0xc0f0000>; - }; - - pm8953_diangu_analog: 8953_wcd_codec@f100 { - compatible = "qcom,msm8x16_wcd_codec"; - reg = <0xf100 0x100>; - interrupt-parent = <&spmi_bus>; - interrupts = <0x1 0xf1 0x0>, - <0x1 0xf1 0x1>, - <0x1 0xf1 0x2>, - <0x1 0xf1 0x3>, - <0x1 0xf1 0x4>, - <0x1 0xf1 0x5>; - interrupt-names = "ear_ocp_int", - "hphr_ocp_int", - "hphl_ocp_det", - "ear_cnp_int", - "hphr_cnp_int", - "hphl_cnp_int"; - qcom,dig-cdc-base-addr = <0xc0f0000>; - }; -}; - -&wcd_rst_gpio { - qcom,cdc-rst-n-gpio = <&tlmm 67 0>; -}; - -&wcd9335 { - clock-names = "wcd_clk", "wcd_native_clk"; - clocks = <&clock_audio clk_audio_pmi_clk>, - <&clock_audio clk_audio_ap_clk2>; - - qcom,cdc-reset-gpio = <&tlmm 67 0>; - - cdc-vdd-buck-supply = <&eldo2_8953>; - qcom,cdc-vdd-buck-voltage = <1800000 1800000>; - qcom,cdc-vdd-buck-current = <650000>; - - cdc-buck-sido-supply = <&eldo2_8953>; - qcom,cdc-buck-sido-voltage = <1800000 1800000>; - qcom,cdc-buck-sido-current = <150000>; - - cdc-vdd-tx-h-supply = <&eldo2_8953>; - qcom,cdc-vdd-tx-h-voltage = <1800000 1800000>; - qcom,cdc-vdd-tx-h-current = <25000>; - - cdc-vdd-rx-h-supply = <&eldo2_8953>; - qcom,cdc-vdd-rx-h-voltage = <1800000 1800000>; - qcom,cdc-vdd-rx-h-current = <25000>; - - cdc-vdd-px-supply = <&eldo2_8953>; - qcom,cdc-vdd-px-voltage = <1800000 1800000>; - qcom,cdc-vdd-px-current = <10000>; - - cdc-vdd-mic-bias-supply = <&pm8953_l13>; - qcom,cdc-vdd-mic-bias-voltage = <3125000 3125000>; - qcom,cdc-vdd-mic-bias-current = <15000>; -}; diff --git a/arch/arm/boot/dts/qcom/msm8953-audio.dtsi b/arch/arm/boot/dts/qcom/msm8953-audio.dtsi index 450dec46b4eb..386bc5fc7b57 100644 --- a/arch/arm/boot/dts/qcom/msm8953-audio.dtsi +++ b/arch/arm/boot/dts/qcom/msm8953-audio.dtsi @@ -1,6 +1,5 @@ /* * Copyright (c) 2015-2016, The Linux Foundation. All rights reserved. - * Copyright (C) 2018 XiaoMi, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -18,8 +17,8 @@ qcom,model = "msm8953-snd-card-mtp"; qcom,cdc-us-euro-gpios = <&tlmm 63 0>; - qcom,msm-mbhc-hphl-swh = <1>; - qcom,msm-mbhc-gnd-swh = <1>; + qcom,msm-mbhc-hphl-swh = <0>; + qcom,msm-mbhc-gnd-swh = <0>; qcom,msm-hs-micbias-type = "internal"; qcom,msm-micbias1-ext-cap; @@ -116,7 +115,12 @@ asoc-codec = <&stub_codec>, <&pm8953_diangu_dig>, <&hdmi_dba>; asoc-codec-names = "msm-stub-codec.1", "cajon_codec", "msm-hdmi-dba-codec-rx"; + asoc-wsa-codec-names = "wsa881x-i2c-codec.2-000f"; + asoc-wsa-codec-prefixes = "SpkrMono"; + msm-vdd-wsa-switch-supply = <&pm8953_l5>; + qcom,msm-vdd-wsa-switch-voltage = <1800000>; + qcom,msm-vdd-wsa-switch-current = <10000>; }; &pm8953_gpios { diff --git a/arch/arm/boot/dts/qcom/msm8953-camera-sensor-qrd-e7.dtsi b/arch/arm/boot/dts/qcom/msm8953-camera-sensor-qrd-e7.dtsi deleted file mode 100644 index ac7420a6f41d..000000000000 --- a/arch/arm/boot/dts/qcom/msm8953-camera-sensor-qrd-e7.dtsi +++ /dev/null @@ -1,402 +0,0 @@ -/* - * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved. - * Copyright (C) 2018 XiaoMi, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -&soc { - led_flash0: qcom,camera-flash { - cell-index = <0>; - compatible = "qcom,camera-flash"; - qcom,flash-type = <1>; - qcom,flash-source = <&pmi8950_flash0 &pmi8950_flash1>; - qcom,torch-source = <&pmi8950_torch0 &pmi8950_torch1>; - qcom,switch-source = <&pmi8950_switch>; - }; - - led_flash2: qcom,camera-frontflash { - cell-index = <2>; - compatible = "qcom,camera-frontflash"; - qcom,flash-type = <1>; - gpios = <&tlmm 36 0>; - qcom,gpio-req-tbl-num = <0>; - qcom,gpio-req-tbl-flags = <1>; - qcom,gpio-req-tbl-label = "FRONT_FLASH"; - }; -}; - -&cci { - actuator0: qcom,actuator@0 { - cell-index = <0>; - reg = <0x0>; - compatible = "qcom,actuator"; - qcom,cci-master = <0>; - cam_vaf-supply = <&pm8953_l17>; - qcom,cam-vreg-name = "cam_vaf"; - qcom,cam-vreg-min-voltage = <2850000>; - qcom,cam-vreg-max-voltage = <2850000>; - qcom,cam-vreg-op-mode = <80000>; - }; - - eeprom0: qcom,eeprom@ { - cell-index = <0>; - qcom,eeprom-name = "vince_ov12a10_sunny"; - compatible = "qcom,eeprom"; - qcom,slave-addr = <0xb0>; - qcom,cci-master = <0>; - reg = <0x0>; - qcom,num-blocks = <1>; - qcom,page0 = <0 0x0 2 0x01 1 1>; - qcom,poll0 = <0 0x0 2 0x0 1 0>; - qcom,mem0 = <5444 0x0 2 0x0 1 0>; - - cam_vio-supply = <&pm8953_l6>; - cam_vdig-supply = <&pm8953_l2>; - cam_vaf-supply = <&pm8953_l17>; - cam_vana-supply = <&pm8953_l22>; - qcom,cam-vreg-name = "cam_vio", "cam_vdig", "cam_vaf", - "cam_vana"; - qcom,cam-vreg-min-voltage = <0 1100000 2850000 2800000>; - qcom,cam-vreg-max-voltage = <0 1200000 2850000 2800000>; - qcom,cam-vreg-op-mode = <0 105000 100000 80000>; - pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cam_sensor_mclk0_default - &cam_sensor_rear_default - &cam_sensor_rear_vana>; - pinctrl-1 = <&cam_sensor_mclk0_sleep &cam_sensor_rear_sleep - &cam_sensor_rear_vana_sleep>; - gpios = <&tlmm 26 0>, - <&tlmm 33 0>, - <&tlmm 62 0>; - qcom,gpio-reset = <1>; - qcom,gpio-vana = <2>; - qcom,gpio-req-tbl-num = <0 1 2>; - qcom,gpio-req-tbl-flags = <1 0 0>; - qcom,gpio-req-tbl-label = "CAMIF_MCLK0", - "CAM_RESET0", - "CAM_VANA"; - qcom,cam-power-seq-type = "sensor_gpio", "sensor_gpio", "sensor_vreg", - "sensor_vreg", "sensor_vreg", "sensor_vreg", "sensor_clk" , "sensor_gpio", "sensor_gpio"; - qcom,cam-power-seq-val = "sensor_gpio_reset", "sensor_gpio_standby", "cam_vana", - "cam_vdig", "cam_vio", "cam_vaf", "sensor_cam_mclk", "sensor_gpio_reset", "sensor_gpio_standby"; - qcom,cam-power-seq-cfg-val = <0 0 1 1 1 1 24000000 1 1>; - qcom,cam-power-seq-delay = <1 1 0 0 0 0 10 1 1>; - status = "ok"; - clocks = <&clock_gcc clk_mclk0_clk_src>, - <&clock_gcc clk_gcc_camss_mclk0_clk>; - clock-names = "cam_src_clk", "cam_clk"; - qcom,clock-rates = <24000000 0>; - }; - - eeprom1: qcom,eeprom@1 { - cell-index = <0>; - qcom,eeprom-name = "vince_imx486_ofilm"; - compatible = "qcom,eeprom"; - qcom,slave-addr = <0xA0>; - qcom,cci-master = <0>; - reg = <0x0>; - qcom,num-blocks = <1>; - qcom,page0 = <0 0x0 2 0x01 1 1>; - qcom,poll0 = <0 0x0 2 0x0 1 0>; - qcom,mem0 = <5444 0x0 2 0x0 1 0>; - - cam_vio-supply = <&pm8953_l6>; - cam_vdig-supply = <&pm8953_l2>; - cam_vaf-supply = <&pm8953_l17>; - cam_vana-supply = <&pm8953_l22>; - qcom,cam-vreg-name = "cam_vio", "cam_vdig", "cam_vaf", - "cam_vana"; - qcom,cam-vreg-min-voltage = <0 1100000 2850000 2800000>; - qcom,cam-vreg-max-voltage = <0 1200000 2850000 2800000>; - qcom,cam-vreg-op-mode = <0 105000 100000 80000>; - pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cam_sensor_mclk0_default - &cam_sensor_rear_default - &cam_sensor_rear_vana>; - pinctrl-1 = <&cam_sensor_mclk0_sleep &cam_sensor_rear_sleep - &cam_sensor_rear_vana_sleep>; - gpios = <&tlmm 26 0>, - <&tlmm 33 0>, - <&tlmm 62 0>; - qcom,gpio-reset = <1>; - qcom,gpio-vana = <2>; - qcom,gpio-req-tbl-num = <0 1 2>; - qcom,gpio-req-tbl-flags = <1 0 0>; - qcom,gpio-req-tbl-label = "CAMIF_MCLK0", - "CAM_RESET0", - "CAM_VANA"; - qcom,cam-power-seq-type = "sensor_gpio", "sensor_gpio", "sensor_vreg", - "sensor_vreg", "sensor_vreg", "sensor_vreg", "sensor_clk" , "sensor_gpio", "sensor_gpio"; - qcom,cam-power-seq-val = "sensor_gpio_reset", "sensor_gpio_standby", "cam_vana", - "cam_vdig", "cam_vio", "cam_vaf", "sensor_cam_mclk", "sensor_gpio_reset", "sensor_gpio_standby"; - qcom,cam-power-seq-cfg-val = <0 0 1 1 1 1 24000000 1 1>; - qcom,cam-power-seq-delay = <1 1 0 0 0 0 10 1 1>; - status = "ok"; - clocks = <&clock_gcc clk_mclk0_clk_src>, - <&clock_gcc clk_gcc_camss_mclk0_clk>; - clock-names = "cam_src_clk", "cam_clk"; - qcom,clock-rates = <24000000 0>; - }; - - eeprom3: qcom,eeprom@3 { - cell-index = <3>; - reg = <0x3>; - compatible = "qcom,eeprom"; - qcom,cci-master = <1>; - - qcom,eeprom-name = "vince_ov5675_qtech"; - qcom,slave-addr = <0x6c>; - - qcom,num-blocks = <10>; - qcom,page0 = <1 0x0100 2 0x01 1 1>; - qcom,poll0 = <0 0x0 2 0 1 1>; - qcom,mem0 = <0 0x0 2 0 1 0>; - - qcom,page1 = <1 0x5001 2 0x02 1 1>; - qcom,poll1 = <0 0x0 2 0 1 1>; - qcom,mem1 = <0 0x0 2 0 1 0>; - - qcom,page2 = <1 0x3d84 2 0xc0 1 1>; - qcom,poll2 = <0 0x0 2 0 1 1>; - qcom,mem2 = <0 0x0 2 0 1 0>; - - qcom,page3 = <1 0x3d88 2 0x70 1 1>; - qcom,poll3 = <0 0x0 2 0 1 1>; - qcom,mem3 = <0 0x0 2 0 1 0>; - - qcom,page4 = <1 0x3d89 2 0x10 1 1>; - qcom,poll4 = <0 0x0 2 0 1 1>; - qcom,mem4 = <0 0x0 2 0 1 0>; - - qcom,page5 = <1 0x3d8a 2 0x70 1 0>; - qcom,poll5 = <0 0x0 2 0 1 1>; - qcom,mem5 = <0 0x0 2 0 1 0>; - - qcom,page6 = <1 0x3d8b 2 0x29 1 10>; - qcom,poll6 = <0 0x0 2 0 1 1>; - qcom,mem6 = <0 0x0 2 0 1 0>; - - qcom,page7 = <1 0x3d81 2 0x01 1 10>; - qcom,poll7 = <0 0x0 2 0 1 1>; - qcom,mem7 = <0 0x0 2 0 1 0>; - - qcom,page8 = <0 0x0 2 0 1 0>; - qcom,poll8 = <0 0x0 2 0 1 1>; - qcom,mem8 = <148 0x7010 2 0 1 5>; - - qcom,page9 = <1 0x5001 2 0x03 1 5>; - qcom,pageen9 = <1 0x0100 2 0x00 1 5>; - qcom,poll9 = <0 0x0 2 0 1 1>; - qcom,mem9 = <0 0x0 2 0 1 0>; - - cam_vdig-supply = <&pm8953_l23>; - cam_vana-supply = <&pm8953_l22>; - cam_vio-supply = <&pm8953_l6>; - qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana"; - qcom,cam-vreg-min-voltage = <1200000 0 2800000>; - qcom,cam-vreg-max-voltage = <1200000 0 2800000>; - qcom,cam-vreg-op-mode = <105000 0 80000>; - qcom,gpio-no-mux = <0>; - pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cam_sensor_mclk1_default - &cam_sensor_front1_default>; - pinctrl-1 = <&cam_sensor_mclk1_sleep &cam_sensor_front1_sleep>; - gpios = <&tlmm 27 0>, - <&tlmm 129 0>; - qcom,gpio-reset = <1>; - qcom,gpio-req-tbl-num = <0 1>; - qcom,gpio-req-tbl-flags = <1 0>; - qcom,gpio-req-tbl-label = "CAMIF_MCLK2", - "CAM_RESET2"; - qcom,cam-power-seq-type = "sensor_gpio", "sensor_vreg", - "sensor_vreg", "sensor_vreg", "sensor_clk" , "sensor_gpio"; - qcom,cam-power-seq-val = "sensor_gpio_reset", "cam_vana", - "cam_vdig", "cam_vio", "sensor_cam_mclk", "sensor_gpio_reset"; - qcom,cam-power-seq-cfg-val = <0 1 1 1 24000000 1>; - qcom,cam-power-seq-delay = <1 0 0 0 10 1>; - - status = "ok"; - clocks = <&clock_gcc clk_mclk1_clk_src>, - <&clock_gcc clk_gcc_camss_mclk1_clk>; - clock-names = "cam_src_clk", "cam_clk"; - qcom,clock-rates = <24000000 0>; - }; - - eeprom4: qcom,eeprom@4 { - cell-index = <4>; - reg = <0x4>; - compatible = "qcom,eeprom"; - qcom,cci-master = <1>; - - qcom,eeprom-name = "vince_ov5675_ofilm"; - qcom,slave-addr = <0x6c>; - - qcom,num-blocks = <10>; - qcom,page0 = <1 0x0100 2 0x01 1 1>; - qcom,poll0 = <0 0x0 2 0 1 1>; - qcom,mem0 = <0 0x0 2 0 1 0>; - - qcom,page1 = <1 0x5001 2 0x02 1 1>; - qcom,poll1 = <0 0x0 2 0 1 1>; - qcom,mem1 = <0 0x0 2 0 1 0>; - - qcom,page2 = <1 0x3d84 2 0xc0 1 1>; - qcom,poll2 = <0 0x0 2 0 1 1>; - qcom,mem2 = <0 0x0 2 0 1 0>; - - qcom,page3 = <1 0x3d88 2 0x70 1 1>; - qcom,poll3 = <0 0x0 2 0 1 1>; - qcom,mem3 = <0 0x0 2 0 1 0>; - - qcom,page4 = <1 0x3d89 2 0x10 1 1>; - qcom,poll4 = <0 0x0 2 0 1 1>; - qcom,mem4 = <0 0x0 2 0 1 0>; - - qcom,page5 = <1 0x3d8a 2 0x70 1 0>; - qcom,poll5 = <0 0x0 2 0 1 1>; - qcom,mem5 = <0 0x0 2 0 1 0>; - - qcom,page6 = <1 0x3d8b 2 0x29 1 10>; - qcom,poll6 = <0 0x0 2 0 1 1>; - qcom,mem6 = <0 0x0 2 0 1 0>; - - qcom,page7 = <1 0x3d81 2 0x01 1 10>; - qcom,poll7 = <0 0x0 2 0 1 1>; - qcom,mem7 = <0 0x0 2 0 1 0>; - - qcom,page8 = <0 0x0 2 0 1 0>; - qcom,poll8 = <0 0x0 2 0 1 1>; - qcom,mem8 = <148 0x7010 2 0 1 5>; - - qcom,page9 = <1 0x5001 2 0x03 1 5>; - qcom,pageen9 = <1 0x0100 2 0x00 1 5>; - qcom,poll9 = <0 0x0 2 0 1 1>; - qcom,mem9 = <0 0x0 2 0 1 0>; - - cam_vdig-supply = <&pm8953_l23>; - cam_vana-supply = <&pm8953_l22>; - cam_vio-supply = <&pm8953_l6>; - qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana"; - qcom,cam-vreg-min-voltage = <1200000 0 2800000>; - qcom,cam-vreg-max-voltage = <1200000 0 2800000>; - qcom,cam-vreg-op-mode = <105000 0 80000>; - qcom,gpio-no-mux = <0>; - pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cam_sensor_mclk1_default - &cam_sensor_front1_default>; - pinctrl-1 = <&cam_sensor_mclk1_sleep &cam_sensor_front1_sleep>; - gpios = <&tlmm 27 0>, - <&tlmm 129 0>; - qcom,gpio-reset = <1>; - qcom,gpio-req-tbl-num = <0 1>; - qcom,gpio-req-tbl-flags = <1 0>; - qcom,gpio-req-tbl-label = "CAMIF_MCLK2", - "CAM_RESET2"; - qcom,cam-power-seq-type = "sensor_gpio", "sensor_vreg", - "sensor_vreg", "sensor_vreg", "sensor_clk" , "sensor_gpio"; - qcom,cam-power-seq-val = "sensor_gpio_reset", "cam_vana", - "cam_vdig", "cam_vio", "sensor_cam_mclk", "sensor_gpio_reset"; - qcom,cam-power-seq-cfg-val = <0 1 1 1 24000000 1>; - qcom,cam-power-seq-delay = <1 0 0 0 10 1>; - - status = "ok"; - clocks = <&clock_gcc clk_mclk1_clk_src>, - <&clock_gcc clk_gcc_camss_mclk1_clk>; - clock-names = "cam_src_clk", "cam_clk"; - qcom,clock-rates = <24000000 0>; - }; - - qcom,camera@0 { - cell-index = <0>; - compatible = "qcom,camera"; - reg = <0x0>; - qcom,csiphy-sd-index = <0>; - qcom,csid-sd-index = <0>; - qcom,mount-angle = <90>; - qcom,led-flash-src = <&led_flash0>; - qcom,eeprom-src = <&eeprom0 &eeprom1 >; - qcom,actuator-src = <&actuator0>; - cam_vio-supply = <&pm8953_l6>; - cam_vdig-supply = <&pm8953_l2>; - cam_vaf-supply = <&pm8953_l17>; - cam_vana-supply = <&pm8953_l22>; - qcom,cam-vreg-name = "cam_vio", "cam_vdig", "cam_vaf", - "cam_vana"; - qcom,cam-vreg-min-voltage = <0 1100000 2850000 2800000>; - qcom,cam-vreg-max-voltage = <0 1200000 2850000 2800000>; - qcom,cam-vreg-op-mode = <0 105000 100000 80000>; - pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cam_sensor_mclk0_default - &cam_sensor_rear_default - &cam_sensor_rear_vana>; - pinctrl-1 = <&cam_sensor_mclk0_sleep - &cam_sensor_rear_sleep - &cam_sensor_rear_vana_sleep>; - gpios = <&tlmm 26 0>, - <&tlmm 33 0>, - <&tlmm 62 0>; - qcom,gpio-reset = <1>; - qcom,gpio-vana = <2>; - qcom,gpio-req-tbl-num = <0 1 2>; - qcom,gpio-req-tbl-flags = <1 0 0>; - qcom,gpio-req-tbl-label = "CAMIF_MCLK0", - "CAM_RESET0", - "CAM_VANA"; - qcom,sensor-position = <0>; - qcom,sensor-mode = <0>; - qcom,cci-master = <0>; - status = "ok"; - clocks = <&clock_gcc clk_mclk0_clk_src>, - <&clock_gcc clk_gcc_camss_mclk0_clk>; - clock-names = "cam_src_clk", "cam_clk"; - qcom,clock-rates = <24000000 0>; - }; - - qcom,camera@2 { - cell-index = <2>; - compatible = "qcom,camera"; - reg = <0x02>; - qcom,csiphy-sd-index = <2>; - qcom,csid-sd-index = <1>; - qcom,mount-angle = <270>; - // qcom,led-flash-src = <&led_flash2>; - // qcom,eeprom-src = <&eeprom3 &eeprom4>; - cam_vdig-supply = <&pm8953_l23>; - cam_vana-supply = <&pm8953_l22>; - cam_vio-supply = <&pm8953_l6>; - qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana"; - qcom,cam-vreg-min-voltage = <1200000 0 2800000>; - qcom,cam-vreg-max-voltage = <1200000 0 2800000>; - qcom,cam-vreg-op-mode = <105000 0 80000>; - qcom,gpio-no-mux = <0>; - pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cam_sensor_mclk1_default - &cam_sensor_front1_default>; - pinctrl-1 = <&cam_sensor_mclk1_sleep - &cam_sensor_front1_sleep>; - gpios = <&tlmm 27 0>, - <&tlmm 129 0>; - qcom,gpio-reset = <1>; - qcom,gpio-req-tbl-num = <0 1>; - qcom,gpio-req-tbl-flags = <1 0>; - qcom,gpio-req-tbl-label = "CAMIF_MCLK2", - "CAM_RESET2"; - qcom,sensor-position = <1>; - qcom,sensor-mode = <0>; - qcom,cci-master = <1>; - status = "ok"; - clocks = <&clock_gcc clk_mclk1_clk_src>, - <&clock_gcc clk_gcc_camss_mclk1_clk>; - clock-names = "cam_src_clk", "cam_clk"; - qcom,clock-rates = <24000000 0>; - }; - -}; diff --git a/arch/arm/boot/dts/qcom/msm8953-camera-sensor-qrd.dtsi b/arch/arm/boot/dts/qcom/msm8953-camera-sensor-qrd.dtsi index 691701f25f62..da00fb4624aa 100644 --- a/arch/arm/boot/dts/qcom/msm8953-camera-sensor-qrd.dtsi +++ b/arch/arm/boot/dts/qcom/msm8953-camera-sensor-qrd.dtsi @@ -1,6 +1,5 @@ /* * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved. - * Copyright (C) 2018 XiaoMi, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -12,17 +11,6 @@ * GNU General Public License for more details. */ -&soc { - led_flash0: qcom,camera-flash { - cell-index = <0>; - compatible = "qcom,camera-flash"; - qcom,flash-type = <1>; - qcom,flash-source = <&pmi8950_flash0>; - qcom,torch-source = <&pmi8950_torch0>; - qcom,switch-source = <&pmi8950_switch>; - }; -}; - &cci { actuator0: qcom,actuator@0 { cell-index = <0>; @@ -38,713 +26,192 @@ eeprom0: qcom,eeprom@0 { cell-index = <0>; - qcom,eeprom-name = "sakura_ov12a10_sunny"; - compatible = "qcom,eeprom"; - qcom,slave-addr = <0xa8>; - qcom,cci-master = <0>; - reg = <0x0>; - qcom,num-blocks = <1>; - qcom,page0 = <0 0x0 2 0x01 1 1>; - qcom,poll0 = <0 0x0 2 0x0 1 0>; - qcom,mem0 = <7158 0x0 2 0x0 1 0>; - - cam_vio-supply = <&pm8953_l6>; - cam_vdig-supply = <&pm8953_l2>; - cam_vaf-supply = <&pm8953_l17>; - cam_vana-supply = <&pm8953_l22>; - qcom,cam-vreg-name = "cam_vio", "cam_vdig", "cam_vaf", - "cam_vana"; - qcom,cam-vreg-min-voltage = <0 1100000 2850000 2800000>; - qcom,cam-vreg-max-voltage = <0 1200000 2850000 2800000>; - qcom,cam-vreg-op-mode = <0 105000 100000 80000>; - pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cam_sensor_mclk0_default - &cam_sensor_rear_default - &cam_sensor_rear_vana>; - pinctrl-1 = <&cam_sensor_mclk0_sleep &cam_sensor_rear_sleep - &cam_sensor_rear_vana_sleep>; - gpios = <&tlmm 26 0>, - <&tlmm 33 0>, - <&tlmm 62 0>; - qcom,gpio-reset = <1>; - qcom,gpio-vana = <2>; - qcom,gpio-req-tbl-num = <0 1 2>; - qcom,gpio-req-tbl-flags = <1 0 0>; - qcom,gpio-req-tbl-label = "CAMIF_MCLK0", - "CAM_RESET0", - "CAM_VANA"; - qcom,cam-power-seq-type = "sensor_gpio", "sensor_gpio", "sensor_vreg", - "sensor_vreg", "sensor_vreg", "sensor_vreg", "sensor_clk" , "sensor_gpio", "sensor_gpio"; - qcom,cam-power-seq-val = "sensor_gpio_reset", "sensor_gpio_standby", "cam_vana", - "cam_vdig", "cam_vio", "cam_vaf", "sensor_cam_mclk", "sensor_gpio_reset", "sensor_gpio_standby"; - qcom,cam-power-seq-cfg-val = <0 0 1 1 1 1 24000000 1 1>; - qcom,cam-power-seq-delay = <1 1 0 0 0 0 10 1 1>; - status = "ok"; - clocks = <&clock_gcc clk_mclk0_clk_src>, - <&clock_gcc clk_gcc_camss_mclk0_clk>; - clock-names = "cam_src_clk", "cam_clk"; - qcom,clock-rates = <24000000 0>; - }; - - eeprom1: qcom,eeprom@1 { - cell-index = <1>; - qcom,eeprom-name = "sakura_imx486_ofilm"; - compatible = "qcom,eeprom"; - qcom,slave-addr = <0xA8>; - qcom,cci-master = <0>; - reg = <0x01>; - qcom,num-blocks = <1>; - qcom,page0 = <0 0x0 2 0x01 1 1>; - qcom,poll0 = <0 0x0 2 0x0 1 0>; - qcom,mem0 = <7158 0x0 2 0x0 1 0>; - - cam_vio-supply = <&pm8953_l6>; - cam_vdig-supply = <&pm8953_l2>; - cam_vaf-supply = <&pm8953_l17>; - cam_vana-supply = <&pm8953_l22>; - qcom,cam-vreg-name = "cam_vio", "cam_vdig", "cam_vaf", - "cam_vana"; - qcom,cam-vreg-min-voltage = <0 1100000 2850000 2800000>; - qcom,cam-vreg-max-voltage = <0 1200000 2850000 2800000>; - qcom,cam-vreg-op-mode = <0 105000 100000 80000>; - pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cam_sensor_mclk0_default - &cam_sensor_rear_default - &cam_sensor_rear_vana>; - pinctrl-1 = <&cam_sensor_mclk0_sleep &cam_sensor_rear_sleep - &cam_sensor_rear_vana_sleep>; - gpios = <&tlmm 26 0>, - <&tlmm 33 0>, - <&tlmm 62 0>; - qcom,gpio-reset = <1>; - qcom,gpio-vana = <2>; - qcom,gpio-req-tbl-num = <0 1 2>; - qcom,gpio-req-tbl-flags = <1 0 0>; - qcom,gpio-req-tbl-label = "CAMIF_MCLK0", - "CAM_RESET0", - "CAM_VANA"; - qcom,cam-power-seq-type = "sensor_gpio", "sensor_gpio", "sensor_vreg", - "sensor_vreg", "sensor_vreg", "sensor_vreg", "sensor_clk" , "sensor_gpio", "sensor_gpio"; - qcom,cam-power-seq-val = "sensor_gpio_reset", "sensor_gpio_standby", "cam_vana", - "cam_vdig", "cam_vio", "cam_vaf", "sensor_cam_mclk", "sensor_gpio_reset", "sensor_gpio_standby"; - qcom,cam-power-seq-cfg-val = <0 0 1 1 1 1 24000000 1 1>; - qcom,cam-power-seq-delay = <1 1 0 0 0 0 10 1 1>; - status = "ok"; - clocks = <&clock_gcc clk_mclk0_clk_src>, - <&clock_gcc clk_gcc_camss_mclk0_clk>; - clock-names = "cam_src_clk", "cam_clk"; - qcom,clock-rates = <24000000 0>; - }; - - eeprom2: qcom,eeprom@2 { - cell-index = <2>; - reg = <0x2>; - compatible = "qcom,eeprom"; - qcom,cci-master = <1>; - - qcom,eeprom-name = "sakura_s5k5e8_ofilm"; - qcom,slave-addr = <0x5A>; - qcom,num-blocks = <27>; - - //init 4 - qcom,page0 = <1 0x0A00 2 0x4 1 1>; - qcom,poll0 = <0 0x0 2 0 1 1>; - qcom,mem0 = <0 0x0 2 0 1 0>; - //set 4 page - qcom,page1 = <1 0x0A02 2 0x4 1 1>; - qcom,poll1 = <0 0x0 2 0 1 1>; - qcom,mem1 = <0 0x0 2 0 1 0>; - //read value - qcom,page2 = <1 0x0A00 2 0x1 1 5>; - qcom,poll2 = <0 0x0 2 0 1 1>; - qcom,mem2 = <16 0x0A34 2 0 1 0>; - //init 5 - qcom,page3 = <1 0x0A00 2 0x4 1 1>; - qcom,poll3 = <0 0x0 2 0 1 1>; - qcom,mem3 = <0 0x0 2 0 1 0>; - //set 5 page - qcom,page4 = <1 0x0A02 2 0x5 1 1>; - qcom,poll4 = <0 0x0 2 0 1 1>; - qcom,mem4 = <0 0x0 2 0 1 0>; - //read value - qcom,page5 = <1 0x0A00 2 0x1 1 5>; - qcom,poll5 = <0 0x0 2 0 1 1>; - qcom,mem5 = <64 0x0A04 2 0 1 0>; - //init 6 - qcom,page6 = <1 0x0A00 2 0x4 1 1>; - qcom,poll6 = <0 0x0 2 0 1 1>; - qcom,mem6 = <0 0x0 2 0 1 0>; - //set 6 page - qcom,page7 = <1 0x0A02 2 0x6 1 1>; - qcom,poll7 = <0 0x0 2 0 1 1>; - qcom,mem7 = <0 0x0 2 0 1 0>; - //read value - qcom,page8 = <1 0x0A00 2 0x1 1 5>; - qcom,poll8 = <0 0x0 2 0 1 1>; - qcom,mem8 = <64 0x0A04 2 0 1 0>; - //init 7 - qcom,page9 = <1 0x0A00 2 0x4 1 1>; - qcom,poll9 = <0 0x0 2 0 1 1>; - qcom,mem9 = <0 0x0 2 0 1 0>; - //set 7 page - qcom,page10 = <1 0x0A02 2 0x7 1 1>; - qcom,poll10 = <0 0x0 2 0 1 1>; - qcom,mem10 = <0 0x0 2 0 1 0>; - //read value - qcom,page11 = <1 0x0A00 2 0x1 1 5>; - qcom,poll11 = <0 0x0 2 0 1 1>; - qcom,mem11 = <64 0x0A04 2 0 1 0>; - //init 8 - qcom,page12 = <1 0x0A00 2 0x4 1 1>; - qcom,poll12 = <0 0x0 2 0 1 1>; - qcom,mem12 = <0 0x0 2 0 1 0>; - //set 8 page - qcom,page13 = <1 0x0A02 2 0x8 1 1>; - qcom,poll13 = <0 0x0 2 0 1 1>; - qcom,mem13 = <0 0x0 2 0 1 0>; - //read value - qcom,page14 = <1 0x0A00 2 0x1 1 5>; - qcom,poll14 = <0 0x0 2 0 1 1>; - qcom,mem14 = <64 0x0A04 2 0 1 0>; - //init 9 - qcom,page15 = <1 0x0A00 2 0x4 1 1>; - qcom,poll15 = <0 0x0 2 0 1 1>; - qcom,mem15 = <0 0x0 2 0 1 0>; - //set 9 page - qcom,page16 = <1 0x0A02 2 0x9 1 1>; - qcom,poll16 = <0 0x0 2 0 1 1>; - qcom,mem16 = <0 0x0 2 0 1 0>; - //read value - qcom,page17 = <1 0x0A00 2 0x1 1 5>; - qcom,poll17 = <0 0x0 2 0 1 1>; - qcom,mem17 = <64 0x0A04 2 0 1 0>; - //init 10 - qcom,page18 = <1 0x0A00 2 0x4 1 1>; - qcom,poll18 = <0 0x0 2 0 1 1>; - qcom,mem18 = <0 0x0 2 0 1 0>; - //set 10 page - qcom,page19 = <1 0x0A02 2 0x0A 1 1>; - qcom,poll19 = <0 0x0 2 0 1 1>; - qcom,mem19 = <0 0x0 2 0 1 0>; - //read value - qcom,page20 = <1 0x0A00 2 0x1 1 5>; - qcom,poll20 = <0 0x0 2 0 1 1>; - qcom,mem20 = <24 0x0A04 2 0 1 0>; - //init 14 - qcom,page21 = <1 0x0A00 2 0x4 1 1>; - qcom,poll21 = <0 0x0 2 0 1 1>; - qcom,mem21 = <0 0x0 2 0 1 0>; - //set 14 page - qcom,page22 = <1 0x0A02 2 0x0E 1 1>; - qcom,poll22 = <0 0x0 2 0 1 1>; - qcom,mem22 = <0 0x0 2 0 1 0>; - //read value - qcom,page23 = <1 0x0A00 2 0x1 1 5>; - qcom,poll23 = <0 0x0 2 0 1 1>; - qcom,mem23 = <64 0x0A04 2 0 1 0>; - //init 15 - qcom,page24 = <1 0x0A00 2 0x4 1 1>; - qcom,poll24 = <0 0x0 2 0 1 1>; - qcom,mem24 = <0 0x0 2 0 1 0>; - //set 15 page - qcom,page25 = <1 0x0A02 2 0x0F 1 1>; - qcom,poll25 = <0 0x0 2 0 1 1>; - qcom,mem25 = <0 0x0 2 0 1 0>; - //read value - qcom,page26 = <1 0x0A00 2 0x1 1 5>; - qcom,poll26 = <0 0x0 2 0 1 1>; - qcom,mem26 = <15 0x0A04 2 0 1 0>; - - cam_vdig-supply = <&pm8953_l2>; - cam_vana-supply = <&pm8953_l22>; - cam_vio-supply = <&pm8953_l6>; - cam_vaf-supply = <&pm8953_l17>; - qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana"; - qcom,cam-vreg-min-voltage = <1200000 0 2800000>; - qcom,cam-vreg-max-voltage = <1200000 0 2800000>; - qcom,cam-vreg-op-mode = <105000 0 80000>; - pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cam_sensor_mclk2_default - &cam_sensor_front_default>; - pinctrl-1 = <&cam_sensor_mclk2_sleep - &cam_sensor_front_sleep>; - gpios = <&tlmm 28 0>, - <&tlmm 41 0>; - qcom,gpio-reset = <1>; - qcom,gpio-req-tbl-num = <0 1>; - qcom,gpio-req-tbl-flags = <1 0>; - qcom,gpio-req-tbl-label = "CAMIF_MCLK1", - "CAM_RESET1"; - qcom,cam-power-seq-type = "sensor_gpio", "sensor_vreg", - "sensor_vreg", "sensor_vreg", "sensor_clk" , "sensor_gpio"; - qcom,cam-power-seq-val = "sensor_gpio_reset", "cam_vana", - "cam_vdig", "cam_vio", "sensor_cam_mclk", "sensor_gpio_reset"; - qcom,cam-power-seq-cfg-val = <0 1 1 1 24000000 1>; - qcom,cam-power-seq-delay = <1 0 0 0 10 1>; - status = "ok"; - clocks = <&clock_gcc clk_mclk2_clk_src>, - <&clock_gcc clk_gcc_camss_mclk2_clk>; - clock-names = "cam_src_clk", "cam_clk"; - qcom,clock-rates = <24000000 0>; - }; - - eeprom3: qcom,eeprom@3 { - cell-index = <3>; - reg = <0x3>; - compatible = "qcom,eeprom"; - qcom,cci-master = <1>; - - qcom,eeprom-name = "sakura_s5k5e8_sunny"; - qcom,slave-addr = <0x5A>; - qcom,num-blocks = <27>; - - //init 4 - qcom,page0 = <1 0x0A00 2 0x4 1 1>; - qcom,poll0 = <0 0x0 2 0 1 1>; - qcom,mem0 = <0 0x0 2 0 1 0>; - //set 4 page - qcom,page1 = <1 0x0A02 2 0x4 1 1>; - qcom,poll1 = <0 0x0 2 0 1 1>; - qcom,mem1 = <0 0x0 2 0 1 0>; - //read value - qcom,page2 = <1 0x0A00 2 0x1 1 5>; - qcom,poll2 = <0 0x0 2 0 1 1>; - qcom,mem2 = <16 0x0A34 2 0 1 0>; - //init 5 - qcom,page3 = <1 0x0A00 2 0x4 1 1>; - qcom,poll3 = <0 0x0 2 0 1 1>; - qcom,mem3 = <0 0x0 2 0 1 0>; - //set 5 page - qcom,page4 = <1 0x0A02 2 0x5 1 1>; - qcom,poll4 = <0 0x0 2 0 1 1>; - qcom,mem4 = <0 0x0 2 0 1 0>; - //read value - qcom,page5 = <1 0x0A00 2 0x1 1 5>; - qcom,poll5 = <0 0x0 2 0 1 1>; - qcom,mem5 = <64 0x0A04 2 0 1 0>; - //init 6 - qcom,page6 = <1 0x0A00 2 0x4 1 1>; - qcom,poll6 = <0 0x0 2 0 1 1>; - qcom,mem6 = <0 0x0 2 0 1 0>; - //set 6 page - qcom,page7 = <1 0x0A02 2 0x6 1 1>; - qcom,poll7 = <0 0x0 2 0 1 1>; - qcom,mem7 = <0 0x0 2 0 1 0>; - //read value - qcom,page8 = <1 0x0A00 2 0x1 1 5>; - qcom,poll8 = <0 0x0 2 0 1 1>; - qcom,mem8 = <64 0x0A04 2 0 1 0>; - //init 7 - qcom,page9 = <1 0x0A00 2 0x4 1 1>; - qcom,poll9 = <0 0x0 2 0 1 1>; - qcom,mem9 = <0 0x0 2 0 1 0>; - //set 7 page - qcom,page10 = <1 0x0A02 2 0x7 1 1>; - qcom,poll10 = <0 0x0 2 0 1 1>; - qcom,mem10 = <0 0x0 2 0 1 0>; - //read value - qcom,page11 = <1 0x0A00 2 0x1 1 5>; - qcom,poll11 = <0 0x0 2 0 1 1>; - qcom,mem11 = <64 0x0A04 2 0 1 0>; - //init 8 - qcom,page12 = <1 0x0A00 2 0x4 1 1>; - qcom,poll12 = <0 0x0 2 0 1 1>; - qcom,mem12 = <0 0x0 2 0 1 0>; - //set 8 page - qcom,page13 = <1 0x0A02 2 0x8 1 1>; - qcom,poll13 = <0 0x0 2 0 1 1>; - qcom,mem13 = <0 0x0 2 0 1 0>; - //read value - qcom,page14 = <1 0x0A00 2 0x1 1 5>; - qcom,poll14 = <0 0x0 2 0 1 1>; - qcom,mem14 = <64 0x0A04 2 0 1 0>; - //init 9 - qcom,page15 = <1 0x0A00 2 0x4 1 1>; - qcom,poll15 = <0 0x0 2 0 1 1>; - qcom,mem15 = <0 0x0 2 0 1 0>; - //set 9 page - qcom,page16 = <1 0x0A02 2 0x9 1 1>; - qcom,poll16 = <0 0x0 2 0 1 1>; - qcom,mem16 = <0 0x0 2 0 1 0>; - //read value - qcom,page17 = <1 0x0A00 2 0x1 1 5>; - qcom,poll17 = <0 0x0 2 0 1 1>; - qcom,mem17 = <64 0x0A04 2 0 1 0>; - //init 10 - qcom,page18 = <1 0x0A00 2 0x4 1 1>; - qcom,poll18 = <0 0x0 2 0 1 1>; - qcom,mem18 = <0 0x0 2 0 1 0>; - //set 10 page - qcom,page19 = <1 0x0A02 2 0x0A 1 1>; - qcom,poll19 = <0 0x0 2 0 1 1>; - qcom,mem19 = <0 0x0 2 0 1 0>; - //read value - qcom,page20 = <1 0x0A00 2 0x1 1 5>; - qcom,poll20 = <0 0x0 2 0 1 1>; - qcom,mem20 = <24 0x0A04 2 0 1 0>; - //init 14 - qcom,page21 = <1 0x0A00 2 0x4 1 1>; - qcom,poll21 = <0 0x0 2 0 1 1>; - qcom,mem21 = <0 0x0 2 0 1 0>; - //set 14 page - qcom,page22 = <1 0x0A02 2 0x0E 1 1>; - qcom,poll22 = <0 0x0 2 0 1 1>; - qcom,mem22 = <0 0x0 2 0 1 0>; - //read value - qcom,page23 = <1 0x0A00 2 0x1 1 5>; - qcom,poll23 = <0 0x0 2 0 1 1>; - qcom,mem23 = <64 0x0A04 2 0 1 0>; - //init 15 - qcom,page24 = <1 0x0A00 2 0x4 1 1>; - qcom,poll24 = <0 0x0 2 0 1 1>; - qcom,mem24 = <0 0x0 2 0 1 0>; - //set 15 page - qcom,page25 = <1 0x0A02 2 0x0F 1 1>; - qcom,poll25 = <0 0x0 2 0 1 1>; - qcom,mem25 = <0 0x0 2 0 1 0>; - //read value - qcom,page26 = <1 0x0A00 2 0x1 1 5>; - qcom,poll26 = <0 0x0 2 0 1 1>; - qcom,mem26 = <15 0x0A04 2 0 1 0>; - + compatible = "qcom,eeprom"; + qcom,cci-master = <0>; + reg = <0x0>; + cam_vio-supply = <&pm8953_l6>; cam_vdig-supply = <&pm8953_l2>; - cam_vana-supply = <&pm8953_l22>; - cam_vio-supply = <&pm8953_l6>; - cam_vaf-supply = <&pm8953_l17>; - qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana"; - qcom,cam-vreg-min-voltage = <1200000 0 2800000>; - qcom,cam-vreg-max-voltage = <1200000 0 2800000>; - qcom,cam-vreg-op-mode = <105000 0 80000>; - pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cam_sensor_mclk2_default - &cam_sensor_front_default>; - pinctrl-1 = <&cam_sensor_mclk2_sleep - &cam_sensor_front_sleep>; - gpios = <&tlmm 28 0>, - <&tlmm 41 0>; - qcom,gpio-reset = <1>; - qcom,gpio-req-tbl-num = <0 1>; - qcom,gpio-req-tbl-flags = <1 0>; - qcom,gpio-req-tbl-label = "CAMIF_MCLK1", - "CAM_RESET1"; - qcom,cam-power-seq-type = "sensor_gpio", "sensor_vreg", - "sensor_vreg", "sensor_vreg", "sensor_clk" , "sensor_gpio"; - qcom,cam-power-seq-val = "sensor_gpio_reset", "cam_vana", - "cam_vdig", "cam_vio", "sensor_cam_mclk", "sensor_gpio_reset"; - qcom,cam-power-seq-cfg-val = <0 1 1 1 24000000 1>; - qcom,cam-power-seq-delay = <1 0 0 0 10 1>; - status = "ok"; - clocks = <&clock_gcc clk_mclk2_clk_src>, - <&clock_gcc clk_gcc_camss_mclk2_clk>; - clock-names = "cam_src_clk", "cam_clk"; - qcom,clock-rates = <24000000 0>; - }; - - eeprom4: qcom,eeprom@4 { - cell-index = <4>; - reg = <0x4>; - compatible = "qcom,eeprom"; - qcom,cci-master = <1>; - - qcom,eeprom-name = "sakura_ov5675_ofilm"; - qcom,slave-addr = <0x6c>; - - qcom,num-blocks = <10>; - qcom,page0 = <1 0x0100 2 0x01 1 1>; - qcom,poll0 = <0 0x0 2 0 1 1>; - qcom,mem0 = <0 0x0 2 0 1 0>; - - qcom,page1 = <1 0x5001 2 0x02 1 1>; - qcom,poll1 = <0 0x0 2 0 1 1>; - qcom,mem1 = <0 0x0 2 0 1 0>; - - qcom,page2 = <1 0x3d84 2 0xc0 1 1>; - qcom,poll2 = <0 0x0 2 0 1 1>; - qcom,mem2 = <0 0x0 2 0 1 0>; - - qcom,page3 = <1 0x3d88 2 0x70 1 1>; - qcom,poll3 = <0 0x0 2 0 1 1>; - qcom,mem3 = <0 0x0 2 0 1 0>; - - qcom,page4 = <1 0x3d89 2 0x10 1 1>; - qcom,poll4 = <0 0x0 2 0 1 1>; - qcom,mem4 = <0 0x0 2 0 1 0>; - - qcom,page5 = <1 0x3d8a 2 0x70 1 0>; - qcom,poll5 = <0 0x0 2 0 1 1>; - qcom,mem5 = <0 0x0 2 0 1 0>; - - qcom,page6 = <1 0x3d8b 2 0x29 1 10>; - qcom,poll6 = <0 0x0 2 0 1 1>; - qcom,mem6 = <0 0x0 2 0 1 0>; - - qcom,page7 = <1 0x3d81 2 0x01 1 10>; - qcom,poll7 = <0 0x0 2 0 1 1>; - qcom,mem7 = <0 0x0 2 0 1 0>; - - qcom,page8 = <0 0x0 2 0 1 0>; - qcom,poll8 = <0 0x0 2 0 1 1>; - qcom,mem8 = <148 0x7010 2 0 1 5>; - - qcom,page9 = <1 0x5001 2 0x03 1 5>; - qcom,pageen9 = <1 0x0100 2 0x00 1 5>; - qcom,poll9 = <0 0x0 2 0 1 1>; - qcom,mem9 = <0 0x0 2 0 1 0>; - - cam_vdig-supply = <&pm8953_l23>; - cam_vana-supply = <&pm8953_l22>; - cam_vio-supply = <&pm8953_l6>; - qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana"; - qcom,cam-vreg-min-voltage = <1200000 0 2800000>; - qcom,cam-vreg-max-voltage = <1200000 0 2800000>; - qcom,cam-vreg-op-mode = <105000 0 80000>; - qcom,gpio-no-mux = <0>; - pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cam_sensor_mclk1_default - &cam_sensor_front1_default - &cam_sensor_rear_vana>; - pinctrl-1 = <&cam_sensor_mclk1_sleep - &cam_sensor_front1_sleep - &cam_sensor_rear_vana_sleep>; - gpios = <&tlmm 27 0>, - <&tlmm 129 0>, - <&tlmm 62 0>; - qcom,gpio-reset = <1>; - qcom,gpio-vana = <2>; - qcom,gpio-req-tbl-num = <0 1 2>; - qcom,gpio-req-tbl-flags = <1 0 0>; - qcom,gpio-req-tbl-label = "CAMIF_MCLK2", - "CAM_RESET2", - "CAM_VANA"; - qcom,cam-power-seq-type = "sensor_gpio", "sensor_vreg", - "sensor_vreg", "sensor_vreg", "sensor_clk" , "sensor_gpio"; - qcom,cam-power-seq-val = "sensor_gpio_reset", "cam_vana", - "cam_vdig", "cam_vio", "sensor_cam_mclk", "sensor_gpio_reset"; - qcom,cam-power-seq-cfg-val = <0 1 1 1 24000000 1>; - qcom,cam-power-seq-delay = <1 0 0 0 10 1>; - - status = "ok"; - clocks = <&clock_gcc clk_mclk1_clk_src>, - <&clock_gcc clk_gcc_camss_mclk1_clk>; - clock-names = "cam_src_clk", "cam_clk"; - qcom,clock-rates = <24000000 0>; - }; - - eeprom5: qcom,eeprom@5 { - cell-index = <5>; - reg = <0x5>; - compatible = "qcom,eeprom"; - qcom,cci-master = <1>; - - qcom,eeprom-name = "sakura_ov5675_qtech"; - qcom,slave-addr = <0x20>; - - qcom,num-blocks = <10>; - qcom,page0 = <1 0x0100 2 0x01 1 1>; - qcom,poll0 = <0 0x0 2 0 1 1>; - qcom,mem0 = <0 0x0 2 0 1 0>; - - qcom,page1 = <1 0x5001 2 0x02 1 1>; - qcom,poll1 = <0 0x0 2 0 1 1>; - qcom,mem1 = <0 0x0 2 0 1 0>; - - qcom,page2 = <1 0x3d84 2 0xc0 1 1>; - qcom,poll2 = <0 0x0 2 0 1 1>; - qcom,mem2 = <0 0x0 2 0 1 0>; - - qcom,page3 = <1 0x3d88 2 0x70 1 1>; - qcom,poll3 = <0 0x0 2 0 1 1>; - qcom,mem3 = <0 0x0 2 0 1 0>; - - qcom,page4 = <1 0x3d89 2 0x10 1 1>; - qcom,poll4 = <0 0x0 2 0 1 1>; - qcom,mem4 = <0 0x0 2 0 1 0>; - - qcom,page5 = <1 0x3d8a 2 0x70 1 0>; - qcom,poll5 = <0 0x0 2 0 1 1>; - qcom,mem5 = <0 0x0 2 0 1 0>; - - qcom,page6 = <1 0x3d8b 2 0x29 1 10>; - qcom,poll6 = <0 0x0 2 0 1 1>; - qcom,mem6 = <0 0x0 2 0 1 0>; - - qcom,page7 = <1 0x3d81 2 0x01 1 10>; - qcom,poll7 = <0 0x0 2 0 1 1>; - qcom,mem7 = <0 0x0 2 0 1 0>; - - qcom,page8 = <0 0x0 2 0 1 0>; - qcom,poll8 = <0 0x0 2 0 1 1>; - qcom,mem8 = <148 0x7010 2 0 1 5>; - - qcom,page9 = <1 0x5001 2 0x03 1 5>; - qcom,pageen9 = <1 0x0100 2 0x00 1 5>; - qcom,poll9 = <0 0x0 2 0 1 1>; - qcom,mem9 = <0 0x0 2 0 1 0>; - - cam_vdig-supply = <&pm8953_l23>; - cam_vana-supply = <&pm8953_l22>; - cam_vio-supply = <&pm8953_l6>; - qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana"; - qcom,cam-vreg-min-voltage = <1200000 0 2800000>; - qcom,cam-vreg-max-voltage = <1200000 0 2800000>; - qcom,cam-vreg-op-mode = <105000 0 80000>; - qcom,gpio-no-mux = <0>; - pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cam_sensor_mclk1_default - &cam_sensor_front1_default - &cam_sensor_rear_vana>; - pinctrl-1 = <&cam_sensor_mclk1_sleep - &cam_sensor_front1_sleep - &cam_sensor_rear_vana_sleep>; - gpios = <&tlmm 27 0>, - <&tlmm 129 0>, - <&tlmm 62 0>; - qcom,gpio-reset = <1>; - qcom,gpio-vana = <2>; - qcom,gpio-req-tbl-num = <0 1 2>; - qcom,gpio-req-tbl-flags = <1 0 0>; - qcom,gpio-req-tbl-label = "CAMIF_MCLK2", - "CAM_RESET2", - "CAM_VANA"; - qcom,cam-power-seq-type = "sensor_gpio", "sensor_vreg", - "sensor_vreg", "sensor_vreg", "sensor_clk" , "sensor_gpio"; - qcom,cam-power-seq-val = "sensor_gpio_reset", "cam_vana", - "cam_vdig", "cam_vio", "sensor_cam_mclk", "sensor_gpio_reset"; - qcom,cam-power-seq-cfg-val = <0 1 1 1 24000000 1>; - qcom,cam-power-seq-delay = <1 0 0 0 10 1>; + cam_vaf-supply = <&pm8953_l17>; + qcom,cam-vreg-name = "cam_vio", "cam_vdig", "cam_vaf"; + qcom,cam-vreg-min-voltage = <0 1100000 2850000>; + qcom,cam-vreg-max-voltage = <0 1100000 2850000>; + qcom,cam-vreg-op-mode = <0 105000 100000>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_default + &cam_sensor_rear_default>; + pinctrl-1 = <&cam_sensor_mclk0_sleep &cam_sensor_rear_sleep>; + gpios = <&tlmm 26 0>, + <&tlmm 40 0>, + <&tlmm 39 0>; + qcom,gpio-reset = <1>; + qcom,gpio-standby = <2>; + qcom,gpio-req-tbl-num = <0 1 2>; + qcom,gpio-req-tbl-flags = <1 0 0>; + qcom,gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0", + "CAM_STANDBY0"; + status = "ok"; + clocks = <&clock_gcc clk_mclk0_clk_src>, + <&clock_gcc clk_gcc_camss_mclk0_clk>; + clock-names = "cam_src_clk", "cam_clk"; + qcom,clock-rates = <19200000 0>; + }; - status = "ok"; - clocks = <&clock_gcc clk_mclk1_clk_src>, - <&clock_gcc clk_gcc_camss_mclk1_clk>; - clock-names = "cam_src_clk", "cam_clk"; - qcom,clock-rates = <24000000 0>; - }; + eeprom2: qcom,eeprom@2 { + cell-index = <2>; + reg = <0x2>; + compatible = "qcom,eeprom"; + qcom,cci-master = <1>; + cam_vdig-supply = <&pm8953_l23>; + cam_vana-supply = <&pm8953_l22>; + cam_vio-supply = <&pm8953_l6>; + qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana"; + qcom,cam-vreg-min-voltage = <1200000 0 2800000>; + qcom,cam-vreg-max-voltage = <1200000 0 2800000>; + qcom,cam-vreg-op-mode = <105000 0 80000>; + qcom,gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_default + &cam_sensor_front1_default>; + pinctrl-1 = <&cam_sensor_mclk1_sleep &cam_sensor_front1_sleep>; + gpios = <&tlmm 27 0>, + <&tlmm 129 0>, + <&tlmm 130 0>; + qcom,gpio-reset = <1>; + qcom,gpio-standby = <2>; + qcom,gpio-req-tbl-num = <0 1 2>; + qcom,gpio-req-tbl-flags = <1 0 0>; + qcom,gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2", + "CAM_STANDBY2"; + qcom,sensor-mode = <0>; + status = "ok"; + clocks = <&clock_gcc clk_mclk1_clk_src>, + <&clock_gcc clk_gcc_camss_mclk1_clk>; + clock-names = "cam_src_clk", "cam_clk"; + qcom,clock-rates = <19200000 0>; + }; qcom,camera@0 { - cell-index = <0>; - compatible = "qcom,camera"; - reg = <0x0>; - qcom,csiphy-sd-index = <0>; - qcom,csid-sd-index = <0>; - qcom,mount-angle = <90>; - qcom,led-flash-src = <&led_flash0>; - qcom,eeprom-src = <&eeprom0 &eeprom1>; - qcom,actuator-src = <&actuator0>; - cam_vio-supply = <&pm8953_l6>; - cam_vdig-supply = <&pm8953_l2>; - cam_vaf-supply = <&pm8953_l17>; - cam_vana-supply = <&pm8953_l22>; - qcom,cam-vreg-name = "cam_vio", "cam_vdig", "cam_vaf", - "cam_vana"; - qcom,cam-vreg-min-voltage = <0 1100000 2850000 2800000>; - qcom,cam-vreg-max-voltage = <0 1200000 2850000 2800000>; - qcom,cam-vreg-op-mode = <0 105000 100000 80000>; - pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cam_sensor_mclk0_default - &cam_sensor_rear_default - &cam_sensor_rear_vana>; - pinctrl-1 = <&cam_sensor_mclk0_sleep - &cam_sensor_rear_sleep - &cam_sensor_rear_vana_sleep>; - gpios = <&tlmm 26 0>, - <&tlmm 33 0>, - <&tlmm 62 0>; - qcom,gpio-reset = <1>; - qcom,gpio-vana = <2>; - qcom,gpio-req-tbl-num = <0 1 2>; - qcom,gpio-req-tbl-flags = <1 0 0>; - qcom,gpio-req-tbl-label = "CAMIF_MCLK0", - "CAM_RESET0", - "CAM_VANA"; - qcom,sensor-position = <0>; - qcom,sensor-mode = <0>; - qcom,cci-master = <0>; - status = "ok"; - clocks = <&clock_gcc clk_mclk0_clk_src>, - <&clock_gcc clk_gcc_camss_mclk0_clk>; - clock-names = "cam_src_clk", "cam_clk"; - qcom,clock-rates = <24000000 0>; - }; - + cell-index = <0>; + compatible = "qcom,camera"; + reg = <0x0>; + qcom,csiphy-sd-index = <0>; + qcom,csid-sd-index = <0>; + qcom,mount-angle = <90>; + qcom,eeprom-src = <&eeprom0>; + qcom,actuator-src = <&actuator0>; + qcom,led-flash-src = <&led_flash0>; + cam_vdig-supply = <&pm8953_l2>; + cam_vio-supply = <&pm8953_l6>; + cam_vana-supply = <&pm8953_l22>; + qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana"; + qcom,cam-vreg-min-voltage = <1200000 0 2800000>; + qcom,cam-vreg-max-voltage = <1200000 0 2800000>; + qcom,cam-vreg-op-mode = <200000 0 80000>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_default + &cam_sensor_rear_default>; + pinctrl-1 = <&cam_sensor_mclk0_sleep + &cam_sensor_rear_sleep>; + gpios = <&tlmm 26 0>, + <&tlmm 40 0>, + <&tlmm 39 0>; + qcom,gpio-reset = <1>; + qcom,gpio-standby = <2>; + qcom,gpio-req-tbl-num = <0 1 2>; + qcom,gpio-req-tbl-flags = <1 0 0>; + qcom,gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0", + "CAM_STANDBY0"; + qcom,sensor-position = <0>; + qcom,sensor-mode = <0>; + qcom,cci-master = <0>; + status = "ok"; + clocks = <&clock_gcc clk_mclk0_clk_src>, + <&clock_gcc clk_gcc_camss_mclk0_clk>; + clock-names = "cam_src_clk", "cam_clk"; + qcom,clock-rates = <24000000 0>; + }; qcom,camera@1 { - cell-index = <1>; - compatible = "qcom,camera"; - reg = <0x1>; - qcom,csiphy-sd-index = <1>; - qcom,csid-sd-index = <1>; - qcom,mount-angle = <90>; - qcom,led-flash-src = <&led_flash0>; - qcom,eeprom-src = <&eeprom2 &eeprom3>; - cam_vdig-supply = <&pm8953_l2>; - cam_vana-supply = <&pm8953_l22>; - cam_vio-supply = <&pm8953_l6>; - qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana"; - qcom,cam-vreg-min-voltage = <1200000 0 2800000>; - qcom,cam-vreg-max-voltage = <1200000 0 2800000>; - qcom,cam-vreg-op-mode = <105000 0 80000>; - pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cam_sensor_mclk2_default - &cam_sensor_front_default>; - pinctrl-1 = <&cam_sensor_mclk2_sleep - &cam_sensor_front_sleep>; - gpios = <&tlmm 28 0>, - <&tlmm 41 0>; - qcom,gpio-reset = <1>; - qcom,gpio-req-tbl-num = <0 1>; - qcom,gpio-req-tbl-flags = <1 0>; - qcom,gpio-req-tbl-label = "CAMIF_MCLK1", - "CAM_RESET1"; - qcom,sensor-position = <0>; - qcom,sensor-mode = <0>; - qcom,cci-master = <1>; - status = "ok"; - clocks = <&clock_gcc clk_mclk2_clk_src>, - <&clock_gcc clk_gcc_camss_mclk2_clk>; - clock-names = "cam_src_clk", "cam_clk"; - qcom,clock-rates = <24000000 0>; - }; + cell-index = <1>; + compatible = "qcom,camera"; + reg = <0x1>; + qcom,csiphy-sd-index = <1>; + qcom,csid-sd-index = <1>; + qcom,mount-angle = <90>; + cam_vdig-supply = <&pm8953_l23>; + cam_vana-supply = <&pm8953_l22>; + cam_vio-supply = <&pm8953_l6>; + cam_vaf-supply = <&pm8953_l17>; + qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana", + "cam_vaf"; + qcom,cam-vreg-min-voltage = <1200000 0 2800000 2850000>; + qcom,cam-vreg-max-voltage = <1200000 0 2800000 2850000>; + qcom,cam-vreg-op-mode = <200000 0 80000 100000>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_default + &cam_sensor_front_default>; + pinctrl-1 = <&cam_sensor_mclk2_sleep + &cam_sensor_front_sleep>; + gpios = <&tlmm 28 0>, + <&tlmm 131 0>, + <&tlmm 132 0>; + qcom,gpio-reset = <1>; + qcom,gpio-standby = <2>; + qcom,gpio-req-tbl-num = <0 1 2>; + qcom,gpio-req-tbl-flags = <1 0 0>; + qcom,gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1", + "CAM_STANDBY1"; + qcom,sensor-position = <1>; + qcom,sensor-mode = <0>; + qcom,cci-master = <0>; + status = "disabled"; + clocks = <&clock_gcc clk_mclk2_clk_src>, + <&clock_gcc clk_gcc_camss_mclk2_clk>; + clock-names = "cam_src_clk", "cam_clk"; + qcom,clock-rates = <24000000 0>; + }; qcom,camera@2 { cell-index = <2>; - compatible = "qcom,camera"; - reg = <0x02>; - qcom,csiphy-sd-index = <2>; - qcom,csid-sd-index = <2>; - qcom,mount-angle = <270>; - qcom,eeprom-src = <&eeprom4 &eeprom5>; - cam_vdig-supply = <&pm8953_l23>; - cam_vana-supply = <&pm8953_l22>; - cam_vio-supply = <&pm8953_l6>; - qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana"; - qcom,cam-vreg-min-voltage = <1200000 0 2800000>; - qcom,cam-vreg-max-voltage = <1200000 0 2800000>; - qcom,cam-vreg-op-mode = <105000 0 80000>; - qcom,gpio-no-mux = <0>; - pinctrl-names = "cam_default", "cam_suspend"; - pinctrl-0 = <&cam_sensor_mclk1_default - &cam_sensor_front1_default - &cam_sensor_rear_vana>; - pinctrl-1 = <&cam_sensor_mclk1_sleep - &cam_sensor_front1_sleep - &cam_sensor_rear_vana_sleep>; - gpios = <&tlmm 27 0>, - <&tlmm 129 0>, - <&tlmm 62 0>; - qcom,gpio-reset = <1>; - qcom,gpio-vana = <2>; - qcom,gpio-req-tbl-num = <0 1 2>; - qcom,gpio-req-tbl-flags = <1 0 0>; - qcom,gpio-req-tbl-label = "CAMIF_MCLK2", - "CAM_RESET2", - "CAM_VANA"; - qcom,sensor-position = <1>; - qcom,sensor-mode = <0>; - qcom,cci-master = <1>; - status = "ok"; - clocks = <&clock_gcc clk_mclk1_clk_src>, - <&clock_gcc clk_gcc_camss_mclk1_clk>; - clock-names = "cam_src_clk", "cam_clk"; - qcom,clock-rates = <24000000 0>; - }; - + compatible = "qcom,camera"; + reg = <0x02>; + qcom,csiphy-sd-index = <2>; + qcom,csid-sd-index = <2>; + qcom,mount-angle = <270>; + qcom,eeprom-src = <&eeprom2>; + cam_vdig-supply = <&pm8953_l23>; + cam_vana-supply = <&pm8953_l22>; + cam_vio-supply = <&pm8953_l6>; + qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana"; + qcom,cam-vreg-min-voltage = <1200000 0 2800000>; + qcom,cam-vreg-max-voltage = <1200000 0 2800000>; + qcom,cam-vreg-op-mode = <105000 0 80000>; + qcom,gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_default + &cam_sensor_front1_default>; + pinctrl-1 = <&cam_sensor_mclk1_sleep + &cam_sensor_front1_sleep>; + gpios = <&tlmm 27 0>, + <&tlmm 129 0>, + <&tlmm 130 0>; + qcom,gpio-reset = <1>; + qcom,gpio-standby = <2>; + qcom,gpio-req-tbl-num = <0 1 2>; + qcom,gpio-req-tbl-flags = <1 0 0>; + qcom,gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2", + "CAM_STANDBY2"; + qcom,sensor-position = <1>; + qcom,sensor-mode = <0>; + qcom,cci-master = <1>; + status = "ok"; + clocks = <&clock_gcc clk_mclk1_clk_src>, + <&clock_gcc clk_gcc_camss_mclk1_clk>; + clock-names = "cam_src_clk", "cam_clk"; + qcom,clock-rates = <24000000 0>; + }; }; diff --git a/arch/arm/boot/dts/qcom/msm8953-cdp.dtsi b/arch/arm/boot/dts/qcom/msm8953-cdp.dtsi index 9de961b43d6f..01d462da5a9e 100644 --- a/arch/arm/boot/dts/qcom/msm8953-cdp.dtsi +++ b/arch/arm/boot/dts/qcom/msm8953-cdp.dtsi @@ -1,6 +1,5 @@ /* * Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. - * Copyright (C) 2018 XiaoMi, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -289,14 +288,12 @@ status = "ok"; }; -/* &pm8953_typec { ss-mux-supply = <&pm8953_l13>; qcom,ssmux-gpio = <&tlmm 139 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&typec_ssmux_config>; }; -*/ &pm8953_gpios { /* GPIO 2 (NFC_CLK_REQ) */ diff --git a/arch/arm/boot/dts/qcom/msm8953-cpu.dtsi b/arch/arm/boot/dts/qcom/msm8953-cpu.dtsi index 7d339fc9f591..14396de0838f 100644 --- a/arch/arm/boot/dts/qcom/msm8953-cpu.dtsi +++ b/arch/arm/boot/dts/qcom/msm8953-cpu.dtsi @@ -61,7 +61,6 @@ qcom,limits-info = <&mitigation_profile0>; qcom,ea = <&ea0>; efficiency = <1024>; - sched-energy-costs = <&CPU_COST_0 &CLUSTER_COST_0>; next-level-cache = <&L2_0>; L2_0: l2-cache { compatible = "arm,arch-cache"; @@ -89,7 +88,6 @@ qcom,limits-info = <&mitigation_profile1>; qcom,ea = <&ea1>; efficiency = <1024>; - sched-energy-costs = <&CPU_COST_0 &CLUSTER_COST_0>; next-level-cache = <&L2_0>; L1_I_1: l1-icache { compatible = "arm,arch-cache"; @@ -110,7 +108,6 @@ qcom,limits-info = <&mitigation_profile2>; qcom,ea = <&ea2>; efficiency = <1024>; - sched-energy-costs = <&CPU_COST_0 &CLUSTER_COST_0>; next-level-cache = <&L2_0>; L1_I_2: l1-icache { compatible = "arm,arch-cache"; @@ -131,7 +128,6 @@ qcom,limits-info = <&mitigation_profile3>; qcom,ea = <&ea3>; efficiency = <1024>; - sched-energy-costs = <&CPU_COST_0 &CLUSTER_COST_0>; next-level-cache = <&L2_0>; L1_I_3: l1-icache { compatible = "arm,arch-cache"; @@ -152,7 +148,6 @@ qcom,limits-info = <&mitigation_profile4>; qcom,ea = <&ea4>; efficiency = <1126>; - sched-energy-costs = <&CPU_COST_0 &CLUSTER_COST_1>; next-level-cache = <&L2_1>; L2_1: l2-cache { compatible = "arm,arch-cache"; @@ -180,7 +175,6 @@ qcom,limits-info = <&mitigation_profile5>; qcom,ea = <&ea5>; efficiency = <1126>; - sched-energy-costs = <&CPU_COST_0 &CLUSTER_COST_1>; next-level-cache = <&L2_1>; L1_I_101: l1-icache { compatible = "arm,arch-cache"; @@ -201,7 +195,6 @@ qcom,limits-info = <&mitigation_profile6>; qcom,ea = <&ea6>; efficiency = <1126>; - sched-energy-costs = <&CPU_COST_0 &CLUSTER_COST_1>; next-level-cache = <&L2_1>; L1_I_102: l1-icache { compatible = "arm,arch-cache"; @@ -222,7 +215,6 @@ qcom,limits-info = <&mitigation_profile7>; qcom,ea = <&ea7>; efficiency = <1126>; - sched-energy-costs = <&CPU_COST_0 &CLUSTER_COST_1>; next-level-cache = <&L2_1>; L1_I_103: l1-icache { compatible = "arm,arch-cache"; @@ -234,53 +226,6 @@ }; }; }; - - energy_costs: energy-costs { - compatible = "sched-energy"; - - CPU_COST_0: core-cost0 { - busy-cost-data = < - 652800 5 - 1036800 10 - 1401600 16 - 1689600 22 - 1804800 26 - 1958400 33 - 2016000 36 - >; - idle-cost-data = < - 4 3 2 1 - >; - }; - CLUSTER_COST_0: cluster-cost0 { - busy-cost-data = < - 652800 69 - 1036800 74 - 1401600 80 - 1689600 100 - 1804800 110 - 1958400 130 - 2016000 140 - >; - idle-cost-data = < - 4 3 2 1 - >; - }; - CLUSTER_COST_1: cluster-cost1 { - busy-cost-data = < - 652800 5 - 1036800 10 - 1401600 16 - 1689600 95 - 1804800 105 - 1958400 125 - 2016000 135 - >; - idle-cost-data = < - 4 3 2 1 - >; - }; - }; }; &soc { diff --git a/arch/arm/boot/dts/qcom/msm8953-daisy.dtsi b/arch/arm/boot/dts/qcom/msm8953-daisy.dtsi deleted file mode 100644 index c33370ca2601..000000000000 --- a/arch/arm/boot/dts/qcom/msm8953-daisy.dtsi +++ /dev/null @@ -1,2605 +0,0 @@ -/* - * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved. - * Copyright (C) 2018 XiaoMi, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include "skeleton64.dtsi" -#include -#include -#include - -/ { - model = "Qualcomm Technologies, Inc. MSM 8953"; - compatible = "qcom,msm8953"; - qcom,msm-id = <293 0x0>; - interrupt-parent = <&intc>; - - chosen { - bootargs = "sched_enable_hmp=1 sched_enable_power_aware=1"; - }; - - firmware: firmware { - android { - compatible = "android,firmware"; - fstab { - compatible = "android,fstab"; - vendor { - compatible = "android,vendor"; - dev = "/dev/block/platform/soc/7824900.sdhci/by-name/vendor"; - type = "ext4"; - mnt_flags = "ro,barrier=1,discard"; - fsmgr_flags = "wait,slotselect"; - status = "ok"; - }; - system { - compatible = "android,system"; - dev = "/dev/block/platform/soc/7824900.sdhci/by-name/system"; - type = "ext4"; - mnt_flags = "ro,barrier=1,discard"; - fsmgr_flags = "wait,slotselect"; - status = "disable"; - }; - - }; - }; - }; - - reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; - - other_ext_mem: other_ext_region@0 { - compatible = "removed-dma-pool"; - no-map; - reg = <0x0 0x84A00000 0x0 0x1E00000>; - }; - - modem_mem: modem_region@0 { - compatible = "removed-dma-pool"; - no-map; - reg = <0x0 0x86c00000 0x0 0x6a00000>; - }; - - adsp_fw_mem: adsp_fw_region@0 { - compatible = "removed-dma-pool"; - no-map; - reg = <0x0 0x8d600000 0x0 0x1200000>; - }; - - wcnss_fw_mem: wcnss_fw_region@0 { - compatible = "removed-dma-pool"; - no-map; - reg = <0x0 0x8e800000 0x0 0x700000>; - }; - - venus_mem: venus_region@0 { - compatible = "shared-dma-pool"; - reusable; - alloc-ranges = <0x0 0x80000000 0x0 0x10000000>; - alignment = <0 0x400000>; - size = <0 0x0800000>; - }; - - secure_mem: secure_region@0 { - compatible = "shared-dma-pool"; - reusable; - alignment = <0 0x400000>; - size = <0 0x09800000>; - }; - - qseecom_mem: qseecom_region@0 { - compatible = "shared-dma-pool"; - reusable; - alignment = <0 0x400000>; - size = <0 0x1000000>; - }; - - adsp_mem: adsp_region@0 { - compatible = "shared-dma-pool"; - reusable; - size = <0 0x400000>; - }; - - dfps_data_mem: dfps_data_mem@90000000 { - reg = <0 0x90000000 0 0x1000>; - label = "dfps_data_mem"; - }; - - cont_splash_mem: splash_region@0x90001000 { - reg = <0x0 0x90001000 0x0 0x13ff000>; - label = "cont_splash_mem"; - }; - - gpu_mem: gpu_region@0 { - compatible = "shared-dma-pool"; - reusable; - alloc-ranges = <0x0 0x80000000 0x0 0x10000000>; - alignment = <0 0x400000>; - size = <0 0x800000>; - }; - pstore_reserve_mem: pstore_reserve_mem_region@0 { - compatible = "removed-dma-pool"; - no-map; - reg = <0x0 0x9ff00000 0x0 0x00100000>; - }; - }; - - aliases { - /* smdtty devices */ - smd1 = &smdtty_apps_fm; - smd2 = &smdtty_apps_riva_bt_acl; - smd3 = &smdtty_apps_riva_bt_cmd; - smd4 = &smdtty_mbalbridge; - smd5 = &smdtty_apps_riva_ant_cmd; - smd6 = &smdtty_apps_riva_ant_data; - smd7 = &smdtty_data1; - smd8 = &smdtty_data4; - smd11 = &smdtty_data11; - smd21 = &smdtty_data21; - smd36 = &smdtty_loopback; - sdhc1 = &sdhc_1; /* SDC1 eMMC slot */ - sdhc2 = &sdhc_2; /* SDC2 for SD card */ - i2c2 = &i2c_2; - i2c3 = &i2c_3; - i2c5 = &i2c_5; - spi3 = &spi_3; - spi6 = &spi_6; - }; - - soc: soc { }; - -}; - -#include "msm8953-pinctrl.dtsi" -#include "msm8953-cpu.dtsi" -#include "msm8953-gpu.dtsi" -#include "msm8953-ion.dtsi" -#include "msm8953-smp2p.dtsi" -#include "msm-arm-smmu-8953.dtsi" -#include "msm8953-coresight.dtsi" -#include "msm8953-bus.dtsi" -#include "msm8953-iommu-domains.dtsi" -#include "msm8953-vidc.dtsi" -#include "msm8953-pm.dtsi" - -&soc { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0 0 0xffffffff>; - compatible = "simple-bus"; - - apc_apm: apm@b111000 { - compatible = "qcom,msm8953-apm"; - reg = <0xb111000 0x1000>; - reg-names = "pm-apcc-glb"; - qcom,apm-post-halt-delay = <0x2>; - qcom,apm-halt-clk-delay = <0x11>; - qcom,apm-resume-clk-delay = <0x10>; - qcom,apm-sel-switch-delay = <0x01>; - }; - - intc: interrupt-controller@b000000 { - compatible = "qcom,msm-qgic2"; - interrupt-controller; - #interrupt-cells = <3>; - reg = <0x0b000000 0x1000>, - <0x0b002000 0x1000>; - }; - - arm64-cpu-erp { - compatible = "arm,arm64-cpu-erp"; - interrupts = <0 275 0>, - <0 276 0>, - <0 273 0>, - <0 274 0>; - interrupt-names = "pri-dbe-irq", - "sec-dbe-irq", - "pri-ext-irq", - "sec-ext-irq"; - poll-delay-ms = <5000>; - }; - - qcom,msm-gladiator@b1c0000 { - compatible = "qcom,msm-gladiator"; - reg = <0x0b1c0000 0x4000>; - reg-names = "gladiator_base"; - interrupts = <0 22 0>; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts = <1 2 0xff08>, - <1 3 0xff08>, - <1 4 0xff08>, - <1 1 0xff08>; - clock-frequency = <19200000>; - }; - - timer@b120000 { - #address-cells = <1>; - #size-cells = <1>; - ranges; - compatible = "arm,armv7-timer-mem"; - reg = <0xb120000 0x1000>; - clock-frequency = <19200000>; - - frame@b121000 { - frame-number = <0>; - interrupts = <0 8 0x4>, - <0 7 0x4>; - reg = <0xb121000 0x1000>, - <0xb122000 0x1000>; - }; - - frame@b123000 { - frame-number = <1>; - interrupts = <0 9 0x4>; - reg = <0xb123000 0x1000>; - status = "disabled"; - }; - - frame@b124000 { - frame-number = <2>; - interrupts = <0 10 0x4>; - reg = <0xb124000 0x1000>; - status = "disabled"; - }; - - frame@b125000 { - frame-number = <3>; - interrupts = <0 11 0x4>; - reg = <0xb125000 0x1000>; - status = "disabled"; - }; - - frame@b126000 { - frame-number = <4>; - interrupts = <0 12 0x4>; - reg = <0xb126000 0x1000>; - status = "disabled"; - }; - - frame@b127000 { - frame-number = <5>; - interrupts = <0 13 0x4>; - reg = <0xb127000 0x1000>; - status = "disabled"; - }; - - frame@b128000 { - frame-number = <6>; - interrupts = <0 14 0x4>; - reg = <0xb128000 0x1000>; - status = "disabled"; - }; - }; - qcom,rmtfs_sharedmem@00000000 { - compatible = "qcom,sharedmem-uio"; - reg = <0x00000000 0x00180000>; - reg-names = "rmtfs"; - qcom,client-id = <0x00000001>; - }; - - restart@4ab000 { - compatible = "qcom,pshold"; - reg = <0x4ab000 0x4>, - <0x193d100 0x4>; - reg-names = "pshold-base", "tcsr-boot-misc-detect"; - }; - - qcom,mpm2-sleep-counter@4a3000 { - compatible = "qcom,mpm2-sleep-counter"; - reg = <0x4a3000 0x1000>; - clock-frequency = <32768>; - }; - - cpu-pmu { - compatible = "arm,armv8-pmuv3"; - interrupts = <1 7 0xff00>; - }; - - qcom,sps { - compatible = "qcom,msm_sps_4k"; - qcom,pipe-attr-ee; - }; - - tsens: tsens@4a8000 { - compatible = "qcom,msm8953-tsens"; - reg = <0x4a8000 0x2000>, - <0xa4000 0x1000>; - reg-names = "tsens_physical", "tsens_eeprom_physical"; - interrupts = <0 184 0>, <0 314 0>; - interrupt-names = "tsens-upper-lower", "tsens-critical"; - qcom,client-id = <1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>; - qcom,sensor-id = <1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>; - qcom,sensors = <15>; - qcom,slope = <3200 3200 3200 3200 3200 3200 3200 3200 - 3200 3200 3200 3200 3200 3200 3200>; - qcom,valid-status-check; - }; - - qcom,sensor-information { - compatible = "qcom,sensor-information"; - sensor_information0: qcom,sensor-information-0 { - qcom,sensor-type = "tsens"; - qcom,sensor-name = "tsens_tz_sensor0"; - qcom,scaling-factor = <10>; - }; - - sensor_information1: qcom,sensor-information-1 { - qcom,sensor-type = "tsens"; - qcom,sensor-name = "tsens_tz_sensor1"; - qcom,scaling-factor = <10>; - }; - - sensor_information2: qcom,sensor-information-2 { - qcom,sensor-type = "tsens"; - qcom,sensor-name = "tsens_tz_sensor2"; - qcom,alias-name = "pop_mem"; - qcom,scaling-factor = <10>; - }; - - sensor_information3: qcom,sensor-information-3 { - qcom,sensor-type = "tsens"; - qcom,sensor-name = "tsens_tz_sensor3"; - qcom,scaling-factor = <10>; - }; - - sensor_information4: qcom,sensor-information-4 { - qcom,sensor-type = "tsens"; - qcom,sensor-name = "tsens_tz_sensor4"; - qcom,scaling-factor = <10>; - }; - - sensor_information5: qcom,sensor-information-5 { - qcom,sensor-type = "tsens"; - qcom,sensor-name = "tsens_tz_sensor5"; - qcom,scaling-factor = <10>; - }; - - sensor_information6: qcom,sensor-information-6 { - qcom,sensor-type = "tsens"; - qcom,sensor-name = "tsens_tz_sensor6"; - qcom,scaling-factor = <10>; - }; - - sensor_information7: qcom,sensor-information-7 { - qcom,sensor-type = "tsens"; - qcom,sensor-name = "tsens_tz_sensor7"; - qcom,scaling-factor = <10>; - }; - - sensor_information8: qcom,sensor-information-8 { - qcom,sensor-type = "tsens"; - qcom,sensor-name = "tsens_tz_sensor8"; - qcom,scaling-factor = <10>; - qcom,alias-name = "L2_cache_1"; - }; - - sensor_information9: qcom,sensor-information-9 { - qcom,sensor-type = "tsens"; - qcom,sensor-name = "tsens_tz_sensor9"; - qcom,scaling-factor = <10>; - }; - - sensor_information10: qcom,sensor-information-10 { - qcom,sensor-type = "tsens"; - qcom,sensor-name = "tsens_tz_sensor10"; - qcom,scaling-factor = <10>; - }; - - sensor_information11: qcom,sensor-information-11 { - qcom,sensor-type = "tsens"; - qcom,sensor-name = "tsens_tz_sensor11"; - qcom,scaling-factor = <10>; - }; - - sensor_information12: qcom,sensor-information-12 { - qcom,sensor-type = "tsens"; - qcom,sensor-name = "tsens_tz_sensor12"; - qcom,scaling-factor = <10>; - }; - - sensor_information13: qcom,sensor-information-13 { - qcom,sensor-type = "tsens"; - qcom,sensor-name = "tsens_tz_sensor13"; - qcom,scaling-factor = <10>; - qcom,alias-name = "L2_cache_0"; - }; - - sensor_information14: qcom,sensor-information-14 { - qcom,sensor-type = "tsens"; - qcom,sensor-name = "tsens_tz_sensor14"; - qcom,scaling-factor = <10>; - }; - - sensor_information15: qcom,sensor-information-15 { - qcom,sensor-type = "tsens"; - qcom,sensor-name = "tsens_tz_sensor15"; - qcom,alias-name = "gpu"; - qcom,scaling-factor = <10>; - }; - - sensor_information16: qcom,sensor-information-16 { - qcom,sensor-type = "alarm"; - qcom,sensor-name = "pm8953_tz"; - qcom,scaling-factor = <1000>; - }; - - sensor_information17: qcom,sensor-information-17 { - qcom,sensor-type = "adc"; - qcom,sensor-name = "pa_therm0"; - }; - - sensor_information18: qcom,sensor-information-18 { - qcom,sensor-type = "adc"; - qcom,sensor-name = "pa_therm1"; - }; - - sensor_information19: qcom,sensor-information-19 { - qcom,sensor-type = "adc"; - qcom,sensor-name = "xo_therm"; - }; - - sensor_information20: qcom,sensor-information-20 { - qcom,sensor-type = "adc"; - qcom,sensor-name = "xo_therm_buf"; - }; - - sensor_information21: qcom,sensor-information-21 { - qcom,sensor-type = "adc"; - qcom,sensor-name = "case_therm"; - }; - }; - - mitigation_profile0: qcom,limit_info-0 { - qcom,temperature-sensor = <&sensor_information9>; - qcom,boot-frequency-mitigate; - qcom,hotplug-mitigation-enable; - qcom,emergency-frequency-mitigate; - }; - - mitigation_profile1: qcom,limit_info-1 { - qcom,temperature-sensor = <&sensor_information10>; - qcom,boot-frequency-mitigate; - qcom,hotplug-mitigation-enable; - qcom,emergency-frequency-mitigate; - }; - - mitigation_profile2: qcom,limit_info-2 { - qcom,temperature-sensor = <&sensor_information11>; - qcom,boot-frequency-mitigate; - qcom,hotplug-mitigation-enable; - qcom,emergency-frequency-mitigate; - }; - - mitigation_profile3: qcom,limit_info-3 { - qcom,temperature-sensor = <&sensor_information12>; - qcom,boot-frequency-mitigate; - qcom,hotplug-mitigation-enable; - qcom,emergency-frequency-mitigate; - }; - - mitigation_profile4: qcom,limit_info-4 { - qcom,temperature-sensor = <&sensor_information4>; - qcom,boot-frequency-mitigate; - qcom,hotplug-mitigation-enable; - qcom,emergency-frequency-mitigate; - }; - - mitigation_profile5: qcom,limit_info-5 { - qcom,temperature-sensor = <&sensor_information5>; - qcom,boot-frequency-mitigate; - qcom,hotplug-mitigation-enable; - qcom,emergency-frequency-mitigate; - }; - - mitigation_profile6: qcom,limit_info-6 { - qcom,temperature-sensor = <&sensor_information6>; - qcom,boot-frequency-mitigate; - qcom,hotplug-mitigation-enable; - qcom,emergency-frequency-mitigate; - }; - - mitigation_profile7: qcom,limit_info-7 { - qcom,temperature-sensor = <&sensor_information7>; - qcom,boot-frequency-mitigate; - qcom,hotplug-mitigation-enable; - qcom,emergency-frequency-mitigate; - }; - - qcom,msm-thermal { - compatible = "qcom,msm-thermal"; - qcom,sensor-id = <9>; - qcom,poll-ms = <250>; - qcom,limit-temp = <60>; - qcom,temp-hysteresis = <10>; - qcom,freq-step = <2>; - qcom,core-limit-temp = <80>; - qcom,core-temp-hysteresis = <10>; - qcom,hotplug-temp = <105>; - qcom,hotplug-temp-hysteresis = <15>; - qcom,freq-mitigation-temp = <105>; - qcom,freq-mitigation-temp-hysteresis = <15>; - qcom,freq-mitigation-value = <1036800>; - qcom,therm-reset-temp = <115>; - qcom,online-hotplug-core; - qcom,synchronous-cluster-id = <0 1>; - qcom,synchronous-cluster-map = <0 4 &CPU0 &CPU1 &CPU2 &CPU3>, - <1 4 &CPU4 &CPU5 &CPU6 &CPU7>; - qcom,disable-cx-phase-ctrl; - qcom,disable-gfx-phase-ctrl; - qcom,disable-vdd-mx; - qcom,disable-psm; - qcom,disable-ocr; - qcom,vdd-restriction-temp = <5>; - qcom,vdd-restriction-temp-hysteresis = <10>; - vdd-dig-supply = <&pm8953_s2_floor_level>; - vdd-gfx-supply = <&gfx_vreg_corner>; - - qcom,vdd-dig-rstr { - qcom,vdd-rstr-reg = "vdd-dig"; - qcom,levels = ; - qcom,min-level = ; - }; - - qcom,vdd-gfx-rstr { - qcom,vdd-rstr-reg = "vdd-gfx"; - qcom,levels = <5 7 7>; /* Nominal, Turbo, Turbo */ - qcom,min-level = <1>; /* No Request */ - }; - - msm_thermal_freq: qcom,vdd-apps-rstr { - qcom,vdd-rstr-reg = "vdd-apps"; - qcom,levels = <1689600>; - qcom,freq-req; - }; - }; - - qcom,bcl { - compatible = "qcom,bcl"; - qcom,bcl-enable; - qcom,bcl-framework-interface; - qcom,bcl-freq-control-list = <&CPU0 &CPU1 &CPU2 &CPU3 - &CPU4 &CPU5 &CPU6 &CPU7>; - qcom,bcl-hotplug-list = <&CPU6 &CPU7>; - qcom,bcl-soc-hotplug-list = <&CPU4 &CPU5 &CPU6 &CPU7>; - qcom,ibat-monitor { - qcom,low-threshold-uamp = <3400000>; - qcom,high-threshold-uamp = <4200000>; - qcom,mitigation-freq-khz = <1689600>; - qcom,vph-high-threshold-uv = <3500000>; - qcom,vph-low-threshold-uv = <3200000>; - qcom,soc-low-threshold = <10>; - qcom,thermal-handle = <&msm_thermal_freq>; - }; - }; - - qcom,msm-core@a0000 { - compatible = "qcom,apss-core-ea"; - reg = <0xa0000 0x1000>; - qcom,low-hyst-temp = <100>; - qcom,high-hyst-temp = <100>; - - ea0: ea0 { - sensor = <&sensor_information9>; - }; - - ea1: ea1 { - sensor = <&sensor_information10>; - }; - - ea2: ea2 { - sensor = <&sensor_information11>; - }; - - ea3: ea3 { - sensor = <&sensor_information12>; - }; - - ea4: ea4 { - sensor = <&sensor_information4>; - }; - - ea5: ea5 { - sensor = <&sensor_information5>; - }; - - ea6: ea6 { - sensor = <&sensor_information6>; - }; - - ea7: ea7 { - sensor = <&sensor_information7>; - }; - }; - - blsp1_uart0: serial@78af000 { - compatible = "qcom,msm-lsuart-v14"; - reg = <0x78af000 0x200>; - interrupts = <0 107 0>; - status = "disabled"; - clocks = <&clock_gcc clk_gcc_blsp1_uart1_apps_clk>, - <&clock_gcc clk_gcc_blsp1_ahb_clk>; - clock-names = "core_clk", "iface_clk"; - }; - - blsp1_uart1: uart@78b0000 { - compatible = "qcom,msm-hsuart-v14"; - reg = <0x78b0000 0x200>, - <0x7884000 0x1f000>; - reg-names = "core_mem", "bam_mem"; - - interrupt-names = "core_irq", "bam_irq", "wakeup_irq"; - #address-cells = <0>; - interrupt-parent = <&blsp1_uart1>; - interrupts = <0 1 2>; - #interrupt-cells = <1>; - interrupt-map-mask = <0xffffffff>; - interrupt-map = <0 &intc 0 108 0 - 1 &intc 0 238 0 - 2 &tlmm 13 0>; - - qcom,inject-rx-on-wakeup; - qcom,rx-char-to-inject = <0xFD>; - qcom,master-id = <86>; - clock-names = "core_clk", "iface_clk"; - clocks = <&clock_gcc clk_gcc_blsp1_uart2_apps_clk>, - <&clock_gcc clk_gcc_blsp1_ahb_clk>; - pinctrl-names = "sleep", "default"; - pinctrl-0 = <&hsuart_sleep>; - pinctrl-1 = <&hsuart_active>; - qcom,bam-tx-ep-pipe-index = <2>; - qcom,bam-rx-ep-pipe-index = <3>; - qcom,msm-bus,name = "blsp1_uart1"; - qcom,msm-bus,num-cases = <2>; - qcom,msm-bus,num-paths = <1>; - qcom,msm-bus,vectors-KBps = - <86 512 0 0>, - <86 512 500 800>; - status = "disabled"; - }; - - blsp2_uart0: uart@7aef000 { - compatible = "qcom,msm-hsuart-v14"; - reg = <0x7aef000 0x200>, - <0x7ac4000 0x1f000>; - reg-names = "core_mem", "bam_mem"; - - interrupt-names = "core_irq", "bam_irq", "wakeup_irq"; - #address-cells = <0>; - interrupt-parent = <&blsp2_uart0>; - interrupts = <0 1 2>; - #interrupt-cells = <1>; - interrupt-map-mask = <0xffffffff>; - interrupt-map = <0 &intc 0 306 0 - 1 &intc 0 239 0 - 2 &tlmm 17 0>; - - qcom,inject-rx-on-wakeup; - qcom,rx-char-to-inject = <0xFD>; - qcom,master-id = <84>; - clock-names = "core_clk", "iface_clk"; - clocks = <&clock_gcc clk_gcc_blsp2_uart1_apps_clk>, - <&clock_gcc clk_gcc_blsp2_ahb_clk>; - pinctrl-names = "sleep", "default"; - pinctrl-0 = <&blsp2_uart0_sleep>; - pinctrl-1 = <&blsp2_uart0_active>; - qcom,bam-tx-ep-pipe-index = <0>; - qcom,bam-rx-ep-pipe-index = <1>; - qcom,msm-bus,name = "blsp2_uart0"; - qcom,msm-bus,num-cases = <2>; - qcom,msm-bus,num-paths = <1>; - qcom,msm-bus,vectors-KBps = - <84 512 0 0>, - <84 512 500 800>; - status = "disabled"; - }; - - dma_blsp1: qcom,sps-dma@7884000 { /* BLSP1 */ - #dma-cells = <4>; - compatible = "qcom,sps-dma"; - reg = <0x7884000 0x1f000>; - interrupts = <0 238 0>; - qcom,summing-threshold = <10>; - }; - - dma_blsp2: qcom,sps-dma@7ac4000 { /* BLSP2 */ - #dma-cells = <4>; - compatible = "qcom,sps-dma"; - reg = <0x7ac4000 0x1f000>; - interrupts = <0 239 0>; - qcom,summing-threshold = <10>; - }; - - spi_3: spi@78b7000 { /* BLSP1 QUP3 */ - compatible = "qcom,spi-qup-v2"; - #address-cells = <1>; - #size-cells = <0>; - reg-names = "spi_physical", "spi_bam_physical"; - reg = <0x78b7000 0x600>, - <0x7884000 0x1f000>; - interrupt-names = "spi_irq", "spi_bam_irq"; - interrupts = <0 97 0>, <0 238 0>; - spi-max-frequency = <19200000>; - pinctrl-names = "spi_default", "spi_sleep"; - pinctrl-0 = <&spi3_default &spi3_cs0_active>; - pinctrl-1 = <&spi3_sleep &spi3_cs0_sleep>; - clocks = <&clock_gcc clk_gcc_blsp1_ahb_clk>, - <&clock_gcc clk_gcc_blsp1_qup3_spi_apps_clk>; - clock-names = "iface_clk", "core_clk"; - qcom,infinite-mode = <0>; - qcom,use-bam; - qcom,use-pinctrl; - qcom,ver-reg-exists; - qcom,bam-consumer-pipe-index = <8>; - qcom,bam-producer-pipe-index = <9>; - qcom,master-id = <86>; - }; - - spi_6: spi@7af6000 { /* BLSP2 QUP2 */ - compatible = "qcom,spi-qup-v2"; - #address-cells = <1>; - #size-cells = <0>; - reg-names = "spi_physical", "spi_bam_physical"; - reg = <0x7af6000 0x600>, - <0x7ac4000 0x1f000>; - interrupt-names = "spi_irq", "spi_bam_irq"; - interrupts = <0 300 0>, <0 239 0>; - spi-max-frequency = <50000000>; - pinctrl-names = "spi_default", "spi_sleep"; - pinctrl-0 = <&spi6_default &spi6_cs0_active>; - pinctrl-1 = <&spi6_sleep &spi6_cs0_sleep>; - clocks = <&clock_gcc clk_gcc_blsp2_ahb_clk>, - <&clock_gcc clk_gcc_blsp2_qup2_spi_apps_clk>; - clock-names = "iface_clk", "core_clk"; - qcom,infinite-mode = <0>; - qcom,use-bam; - qcom,use-pinctrl; - qcom,ver-reg-exists; - qcom,bam-consumer-pipe-index = <6>; - qcom,bam-producer-pipe-index = <7>; - qcom,master-id = <84>; - }; - - i2c_2: i2c@78b6000 { /* BLSP1 QUP2 */ - compatible = "qcom,i2c-msm-v2"; - #address-cells = <1>; - #size-cells = <0>; - reg-names = "qup_phys_addr"; - reg = <0x78b6000 0x600>; - interrupt-names = "qup_irq"; - interrupts = <0 96 0>; - qcom,clk-freq-out = <400000>; - qcom,clk-freq-in = <19200000>; - clock-names = "iface_clk", "core_clk"; - clocks = <&clock_gcc clk_gcc_blsp1_ahb_clk>, - <&clock_gcc clk_gcc_blsp1_qup2_i2c_apps_clk>; - - pinctrl-names = "i2c_active", "i2c_sleep"; - pinctrl-0 = <&i2c_2_active>; - pinctrl-1 = <&i2c_2_sleep>; - qcom,noise-rjct-scl = <0>; - qcom,noise-rjct-sda = <0>; - qcom,master-id = <86>; - dmas = <&dma_blsp1 6 64 0x20000020 0x20>, - <&dma_blsp1 7 32 0x20000020 0x20>; - dma-names = "tx", "rx"; - - /* DSI_TO_HDMI I2C configuration */ - adv7533@39 { - compatible = "adv7533"; - reg = <0x39>; - instance_id = <0>; - adi,video-mode = <3>; /* 3 = 1080p */ - adi,main-addr = <0x39>; - adi,cec-dsi-addr = <0x3C>; - adi,enable-audio; - pinctrl-names = "pmx_adv7533_active", - "pmx_adv7533_suspend"; - pinctrl-0 = <&adv7533_int_active>; - pinctrl-1 = <&adv7533_int_suspend>; - adi,irq-gpio = <&tlmm 90 0x2002>; - hpd-5v-en-supply = <&adv_vreg>; - qcom,supply-names = "hpd-5v-en"; - qcom,min-voltage-level = <0>; - qcom,max-voltage-level = <0>; - qcom,enable-load = <0>; - qcom,disable-load = <0>; - }; - }; - - i2c_3: i2c@78b7000 { /* BLSP1 QUP3 */ - compatible = "qcom,i2c-msm-v2"; - #address-cells = <1>; - #size-cells = <0>; - reg-names = "qup_phys_addr"; - reg = <0x78b7000 0x600>; - interrupt-names = "qup_irq"; - interrupts = <0 97 0>; - qcom,clk-freq-out = <400000>; - qcom,clk-freq-in = <19200000>; - clock-names = "iface_clk", "core_clk"; - clocks = <&clock_gcc clk_gcc_blsp1_ahb_clk>, - <&clock_gcc clk_gcc_blsp1_qup3_i2c_apps_clk>; - - pinctrl-names = "i2c_active", "i2c_sleep"; - pinctrl-0 = <&i2c_3_active>; - pinctrl-1 = <&i2c_3_sleep>; - qcom,noise-rjct-scl = <0>; - qcom,noise-rjct-sda = <0>; - qcom,master-id = <86>; - dmas = <&dma_blsp1 8 64 0x20000020 0x20>, - <&dma_blsp1 9 32 0x20000020 0x20>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - i2c_5: i2c@7af5000 { /* BLSP2 QUP1 */ - compatible = "qcom,i2c-msm-v2"; - #address-cells = <1>; - #size-cells = <0>; - reg-names = "qup_phys_addr"; - reg = <0x7af5000 0x600>; - interrupt-names = "qup_irq"; - interrupts = <0 299 0>; - qcom,clk-freq-out = <400000>; - qcom,clk-freq-in = <19200000>; - clock-names = "iface_clk", "core_clk"; - clocks = <&clock_gcc clk_gcc_blsp2_ahb_clk>, - <&clock_gcc clk_gcc_blsp2_qup1_i2c_apps_clk>; - - pinctrl-names = "i2c_active", "i2c_sleep"; - pinctrl-0 = <&i2c_5_active>; - pinctrl-1 = <&i2c_5_sleep>; - qcom,noise-rjct-scl = <0>; - qcom,noise-rjct-sda = <0>; - qcom,master-id = <84>; - dmas = <&dma_blsp2 4 64 0x20000020 0x20>, - <&dma_blsp2 5 32 0x20000020 0x20>; - dma-names = "tx", "rx"; - }; - - slim_msm: slim@c140000{ - cell-index = <1>; - compatible = "qcom,slim-ngd"; - reg = <0xc140000 0x2c000>, - <0xc104000 0x2a000>; - reg-names = "slimbus_physical", "slimbus_bam_physical"; - interrupts = <0 163 0>, <0 180 0>; - interrupt-names = "slimbus_irq", "slimbus_bam_irq"; - qcom,apps-ch-pipes = <0x600000>; - qcom,ea-pc = <0x200>; - status = "disabled"; - }; - - dcc: dcc@b3000 { - compatible = "qcom,dcc"; - reg = <0xb3000 0x1000>, - <0xb4000 0x800>; - reg-names = "dcc-base", "dcc-ram-base"; - - clocks = <&clock_gcc clk_gcc_dcc_clk>; - clock-names = "dcc_clk"; - - qcom,save-reg; - }; - - clock_gcc: qcom,gcc@1800000 { - compatible = "qcom,gcc-8953"; - reg = <0x1800000 0x80000>, - <0x00a4124 0x08>; - reg-names = "cc_base", "efuse"; - vdd_dig-supply = <&pm8953_s2_level>; - #clock-cells = <1>; - }; - - clock_gcc_mdss: qcom,gcc-mdss@1800000 { - compatible = "qcom,gcc-mdss-8953"; - reg = <0x1800000 0x80000>; - reg-names = "cc_base"; - clock-names = "pclk0_src", "pclk1_src", - "byte0_src", "byte1_src"; - clocks = <&mdss_dsi0_pll clk_dsi0pll_pixel_clk_mux>, - <&mdss_dsi1_pll clk_dsi1pll_pixel_clk_mux>, - <&mdss_dsi0_pll clk_dsi0pll_byte_clk_mux>, - <&mdss_dsi1_pll clk_dsi1pll_byte_clk_mux>; - #clock-cells = <1>; - }; - - clock_debug: qcom,cc-debug@1874000 { - compatible = "qcom,cc-debug-8953"; - reg = <0x1874000 0x4>; - reg-names = "cc_base"; - clocks = <&clock_cpu clk_cpu_debug_pri_mux>; - clock-names = "debug_cpu_clk"; - #clock-cells = <1>; - }; - - clock_gcc_gfx: qcom,gcc-gfx@1800000 { - compatible = "qcom,gcc-gfx-8953"; - reg = <0x1800000 0x80000>; - reg-names = "cc_base"; - vdd_gfx-supply = <&gfx_vreg_corner>; - qcom,gfxfreq-corner = - < 0 0 >, - < 133330000 1 >, /* Min SVS */ - < 216000000 2 >, /* Low SVS */ - < 320000000 3 >, /* SVS */ - < 400000000 4 >, /* SVS Plus */ - < 510000000 5 >, /* NOM */ - < 560000000 6 >, /* Nom Plus */ - < 650000000 7 >; /* Turbo */ - #clock-cells = <1>; - }; - - clock_cpu: qcom,cpu-clock-8953@b116000 { - compatible = "qcom,cpu-clock-8953"; - reg = <0xb114000 0x68>, - <0xb014000 0x68>, - <0xb116000 0x400>, - <0xb111050 0x08>, - <0xb011050 0x08>, - <0xb1d1050 0x08>, - <0x00a4124 0x08>; - reg-names = "rcgwr-c0-base", "rcgwr-c1-base", - "c0-pll", "c0-mux", "c1-mux", - "cci-mux", "efuse"; - vdd-mx-supply = <&pm8953_s7_level_ao>; - vdd-cl-supply = <&apc_vreg>; - clocks = <&clock_gcc clk_xo_a_clk_src>; - clock-names = "xo_a"; - qcom,num-clusters = <2>; - qcom,speed0-bin-v0-cl = - < 0 0>, - < 652800000 1>, - < 1036800000 2>, - < 1401600000 3>, - < 1689600000 4>, - < 1804800000 5>, - < 1958400000 6>, - < 2016000000 7>; - qcom,speed0-bin-v0-cci = - < 0 0>, - < 261120000 1>, - < 414720000 2>, - < 560640000 3>, - < 675840000 4>, - < 721920000 5>, - < 783360000 6>, - < 806400000 7>; - qcom,speed2-bin-v0-cl = - < 0 0>, - < 652800000 1>, - < 1036800000 2>, - < 1401600000 3>, - < 1689600000 4>, - < 1804800000 5>, - < 1958400000 6>, - < 2016000000 7>; - qcom,speed2-bin-v0-cci = - < 0 0>, - < 261120000 1>, - < 414720000 2>, - < 560640000 3>, - < 675840000 4>, - < 721920000 5>, - < 783360000 6>, - < 806400000 7>; - qcom,speed7-bin-v0-cl = - < 0 0>, - < 652800000 1>, - < 1036800000 2>, - < 1401600000 3>, - < 1689600000 4>, - < 1804800000 5>, - < 1958400000 6>, - < 2016000000 7>, - < 2150400000 8>, - < 2208000000 9>; - qcom,speed7-bin-v0-cci = - < 0 0>, - < 261120000 1>, - < 414720000 2>, - < 560640000 3>, - < 675840000 4>, - < 721920000 5>, - < 783360000 6>, - < 806400000 7>, - < 860160000 8>, - < 883200000 9>; - qcom,speed6-bin-v0-cl = - < 0 0>, - < 652800000 1>, - < 1036800000 2>, - < 1401600000 3>, - < 1689600000 4>, - < 1804800000 5>; - qcom,speed6-bin-v0-cci = - < 0 0>, - < 261120000 1>, - < 414720000 2>, - < 560640000 3>, - < 675840000 4>, - < 721920000 5>; - #clock-cells = <1>; - }; - - msm_cpufreq: qcom,msm-cpufreq { - compatible = "qcom,msm-cpufreq"; - clock-names = "l2_clk", "cpu0_clk", "cpu1_clk", "cpu2_clk", - "cpu3_clk", "cpu4_clk", "cpu5_clk", - "cpu6_clk", "cpu7_clk"; - clocks = <&clock_cpu clk_cci_clk>, - <&clock_cpu clk_a53_pwr_clk>, - <&clock_cpu clk_a53_pwr_clk>, - <&clock_cpu clk_a53_pwr_clk>, - <&clock_cpu clk_a53_pwr_clk>, - <&clock_cpu clk_a53_pwr_clk>, - <&clock_cpu clk_a53_pwr_clk>, - <&clock_cpu clk_a53_pwr_clk>, - <&clock_cpu clk_a53_pwr_clk>; - - qcom,cpufreq-table = - < 652800 >, - < 1036800 >, - < 1401600 >, - < 1689600 >, - < 1804800 >, - < 1958400 >, - < 2016000 >, - < 2150400 >, - < 2208000 >; - }; - - cpubw: qcom,cpubw { - compatible = "qcom,devbw"; - governor = "cpufreq"; - qcom,src-dst-ports = <1 512>; - qcom,active-only; - qcom,bw-tbl = - < 769 /* 100.8 MHz */ >, - < 1611 /* 211.2 MHz */ >, /*Low SVS*/ - < 2124 /* 278.4 MHz */ >, - < 2929 /* 384 MHz */ >, - < 3221 /* 422.4 MHz */ >, /* SVS */ - < 4248 /* 556.8 MHz */ >, - < 5126 /* 672 MHz */ >, - < 5859 /* 768 MHz */ >, /* SVS+ */ - < 6152 /* 806.4 MHz */ >, - < 6445 /* 844.8 MHz */ >, /* NOM */ - < 7104 /* 931.2 MHz */ >; /* TURBO */ - }; - - mincpubw: qcom,mincpubw { - compatible = "qcom,devbw"; - governor = "cpufreq"; - qcom,src-dst-ports = <1 512>; - qcom,active-only; - qcom,bw-tbl = - < 769 /* 100.8 MHz */ >, - < 1611 /* 211.2 MHz */ >, /*Low SVS*/ - < 2124 /* 278.4 MHz */ >, - < 2929 /* 384 MHz */ >, - < 3221 /* 422.4 MHz */ >, /* SVS */ - < 4248 /* 556.8 MHz */ >, - < 5126 /* 672 MHz */ >, - < 5859 /* 768 MHz */ >, /* SVS+ */ - < 6152 /* 806.4 MHz */ >, - < 6445 /* 844.8 MHz */ >, /* NOM */ - < 7104 /* 931.2 MHz */ >; /* TURBO */ - }; - - qcom,cpu-bwmon { - compatible = "qcom,bimc-bwmon2"; - reg = <0x408000 0x300>, <0x401000 0x200>; - reg-names = "base", "global_base"; - interrupts = <0 183 4>; - qcom,mport = <0>; - qcom,target-dev = <&cpubw>; - }; - - devfreq-cpufreq { - cpubw-cpufreq { - target-dev = <&cpubw>; - cpu-to-dev-map = - < 652800 1611>, - < 1036800 3221>, - < 1401600 5859>, - < 1689600 6445>, - < 1804800 7104>, - < 1958400 7104>, - < 2208000 7104>; - }; - - mincpubw-cpufreq { - target-dev = <&mincpubw>; - cpu-to-dev-map = - < 652800 1611 >, - < 1401600 3221 >, - < 2208000 5859 >; - }; - }; - - rpm_bus: qcom,rpm-smd { - compatible = "qcom,rpm-smd"; - rpm-channel-name = "rpm_requests"; - rpm-channel-type = <15>; /* SMD_APPS_RPM */ - }; - - qcom,ipc-spinlock@1905000 { - compatible = "qcom,ipc-spinlock-sfpb"; - reg = <0x1905000 0x8000>; - qcom,num-locks = <8>; - }; - - qcom,smem@86300000 { - compatible = "qcom,smem"; - reg = <0x86300000 0x100000>, - <0x0b011008 0x4>, - <0x60000 0x8000>, - <0x193d000 0x8>; - reg-names = "smem", "irq-reg-base", - "aux-mem1", "smem_targ_info_reg"; - qcom,mpu-enabled; - - qcom,smd-modem { - compatible = "qcom,smd"; - qcom,smd-edge = <0>; - qcom,smd-irq-offset = <0x0>; - qcom,smd-irq-bitmask = <0x1000>; - interrupts = <0 25 1>; - label = "modem"; - qcom,not-loadable; - }; - - qcom,smsm-modem { - compatible = "qcom,smsm"; - qcom,smsm-edge = <0>; - qcom,smsm-irq-offset = <0x0>; - qcom,smsm-irq-bitmask = <0x2000>; - interrupts = <0 26 1>; - }; - - qcom,smd-wcnss { - compatible = "qcom,smd"; - qcom,smd-edge = <6>; - qcom,smd-irq-offset = <0x0>; - qcom,smd-irq-bitmask = <0x20000>; - interrupts = <0 142 1>; - label = "wcnss"; - }; - - qcom,smsm-wcnss { - compatible = "qcom,smsm"; - qcom,smsm-edge = <6>; - qcom,smsm-irq-offset = <0x0>; - qcom,smsm-irq-bitmask = <0x80000>; - interrupts = <0 144 1>; - }; - - qcom,smd-adsp { - compatible = "qcom,smd"; - qcom,smd-edge = <1>; - qcom,smd-irq-offset = <0x0>; - qcom,smd-irq-bitmask = <0x100>; - interrupts = <0 289 1>; - label = "adsp"; - }; - - qcom,smsm-adsp { - compatible = "qcom,smsm"; - qcom,smsm-edge = <1>; - qcom,smsm-irq-offset = <0x0>; - qcom,smsm-irq-bitmask = <0x200>; - interrupts = <0 290 1>; - }; - - qcom,smd-rpm { - compatible = "qcom,smd"; - qcom,smd-edge = <15>; - qcom,smd-irq-offset = <0x0>; - qcom,smd-irq-bitmask = <0x1>; - interrupts = <0 168 1>; - label = "rpm"; - qcom,irq-no-suspend; - qcom,not-loadable; - }; - }; - - qcom,wdt@b017000 { - compatible = "qcom,msm-watchdog"; - reg = <0xb017000 0x1000>; - reg-names = "wdt-base"; - interrupts = <0 3 0>, <0 4 0>; - qcom,bark-time = <11000>; - qcom,pet-time = <10000>; - qcom,ipi-ping; - qcom,wakeup-enable; - }; - - qcom,chd { - compatible = "qcom,core-hang-detect"; - qcom,threshold-arr = <0xb1880b0 0xb1980b0 0xb1a80b0 - 0xb1b80b0 0xb0880b0 0xb0980b0 0xb0a80b0 0xb0b80b0>; - qcom,config-arr = <0xb1880b8 0xb1980b8 0xb1a80b8 - 0xb1b80b8 0xb0880b8 0xb0980b8 0xb0a80b8 0xb0b80b8>; - }; - - qcom,msm-rtb { - compatible = "qcom,msm-rtb"; - qcom,rtb-size = <0x100000>; - }; - - qcom,msm-imem@8600000 { - compatible = "qcom,msm-imem"; - reg = <0x08600000 0x1000>; - ranges = <0x0 0x08600000 0x1000>; - #address-cells = <1>; - #size-cells = <1>; - - mem_dump_table@10 { - compatible = "qcom,msm-imem-mem_dump_table"; - reg = <0x10 8>; - }; - - dload_type@18 { - compatible = "qcom,msm-imem-dload-type"; - reg = <0x18 4>; - }; - - restart_reason@65c { - compatible = "qcom,msm-imem-restart_reason"; - reg = <0x65c 4>; - }; - - boot_stats@6b0 { - compatible = "qcom,msm-imem-boot_stats"; - reg = <0x6b0 32>; - }; - - pil@94c { - compatible = "qcom,msm-imem-pil"; - reg = <0x94c 200>; - - }; - }; - - qcom,memshare { - compatible = "qcom,memshare"; - - qcom,client_1 { - compatible = "qcom,memshare-peripheral"; - qcom,peripheral-size = <0x200000>; - qcom,client-id = <0>; - qcom,allocate-boot-time; - label = "modem"; - }; - - qcom,client_2 { - compatible = "qcom,memshare-peripheral"; - qcom,peripheral-size = <0x300000>; - qcom,client-id = <2>; - label = "modem"; - }; - - mem_client_3_size: qcom,client_3 { - compatible = "qcom,memshare-peripheral"; - qcom,peripheral-size = <0x0>; - qcom,client-id = <1>; - label = "modem"; - }; - }; - - jtag_fuse: jtagfuse@a601c { - compatible = "qcom,jtag-fuse-v2"; - reg = <0xa601c 0x8>; - reg-names = "fuse-base"; - }; - - sn_fuse: snfuse@0xa4128 { - compatible = "qcom,sn-fuse"; - reg = <0xa4128 0x4>; - reg-names = "sn-base"; - }; - - jtag_mm0: jtagmm@619c000 { - compatible = "qcom,jtagv8-mm"; - reg = <0x619c000 0x1000>, - <0x6190000 0x1000>; - reg-names = "etm-base", "debug-base"; - - qcom,coresight-jtagmm-cpu = <&CPU0>; - - clocks = <&clock_gcc clk_qdss_clk>, - <&clock_gcc clk_qdss_a_clk>; - clock-names = "core_clk", "core_a_clk"; - }; - - jtag_mm1: jtagmm@619d000 { - compatible = "qcom,jtagv8-mm"; - reg = <0x619d000 0x1000>, - <0x6192000 0x1000>; - reg-names = "etm-base", "debug-base"; - - qcom,coresight-jtagmm-cpu = <&CPU1>; - - clocks = <&clock_gcc clk_qdss_clk>, - <&clock_gcc clk_qdss_a_clk>; - clock-names = "core_clk", "core_a_clk"; - }; - - jtag_mm2: jtagmm@619e000 { - compatible = "qcom,jtagv8-mm"; - reg = <0x619e000 0x1000>, - <0x6194000 0x1000>; - reg-names = "etm-base", "debug-base"; - - qcom,coresight-jtagmm-cpu = <&CPU2>; - - clocks = <&clock_gcc clk_qdss_clk>, - <&clock_gcc clk_qdss_a_clk>; - clock-names = "core_clk", "core_a_clk"; - }; - - jtag_mm3: jtagmm@619f000 { - compatible = "qcom,jtagv8-mm"; - reg = <0x619f000 0x1000>, - <0x6196000 0x1000>; - reg-names = "etm-base", "debug-base"; - - qcom,coresight-jtagmm-cpu = <&CPU3>; - - clocks = <&clock_gcc clk_qdss_clk>, - <&clock_gcc clk_qdss_a_clk>; - clock-names = "core_clk", "core_a_clk"; - }; - - jtag_mm4: jtagmm@61bc000 { - compatible = "qcom,jtagv8-mm"; - reg = <0x61bc000 0x1000>, - <0x61b0000 0x1000>; - reg-names = "etm-base", "debug-base"; - - qcom,coresight-jtagmm-cpu = <&CPU4>; - - clocks = <&clock_gcc clk_qdss_clk>, - <&clock_gcc clk_qdss_a_clk>; - clock-names = "core_clk", "core_a_clk"; - }; - - jtag_mm5: jtagmm@61bd000 { - compatible = "qcom,jtagv8-mm"; - reg = <0x61bd000 0x1000>, - <0x61b2000 0x1000>; - reg-names = "etm-base", "debug-base"; - - qcom,coresight-jtagmm-cpu = <&CPU5>; - - clocks = <&clock_gcc clk_qdss_clk>, - <&clock_gcc clk_qdss_a_clk>; - clock-names = "core_clk", "core_a_clk"; - }; - - jtag_mm6: jtagmm@61be000 { - compatible = "qcom,jtagv8-mm"; - reg = <0x61be000 0x1000>, - <0x61b4000 0x1000>; - reg-names = "etm-base", "debug-base"; - - qcom,coresight-jtagmm-cpu = <&CPU6>; - - clocks = <&clock_gcc clk_qdss_clk>, - <&clock_gcc clk_qdss_a_clk>; - clock-names = "core_clk", "core_a_clk"; - }; - - jtag_mm7: jtagmm@61bf000 { - compatible = "qcom,jtagv8-mm"; - reg = <0x61bf000 0x1000>, - <0x61b6000 0x1000>; - reg-names = "etm-base", "debug-base"; - - qcom,coresight-jtagmm-cpu = <&CPU7>; - - clocks = <&clock_gcc clk_qdss_clk>, - <&clock_gcc clk_qdss_a_clk>; - clock-names = "core_clk", "core_a_clk"; - }; - - ipa_hw: qcom,ipa@07900000 { - compatible = "qcom,ipa"; - reg = <0x07900000 0x4effc>, <0x07904000 0x26934>; - reg-names = "ipa-base", "bam-base"; - interrupts = <0 228 0>, - <0 230 0>; - interrupt-names = "ipa-irq", "bam-irq"; - qcom,ipa-hw-ver = <6>; /* IPA core version = IPAv2.6L */ - qcom,ipa-hw-mode = <0>; /* IPA hw type = Normal */ - qcom,wan-rx-ring-size = <192>; /* IPA WAN-rx-ring-size*/ - qcom,lan-rx-ring-size = <192>; /* IPA LAN-rx-ring-size*/ - clock-names = "core_clk"; - clocks = <&clock_gcc clk_ipa_clk>; - qcom,ee = <0>; - qcom,use-ipa-tethering-bridge; - qcom,modem-cfg-emb-pipe-flt; - qcom,msm-bus,name = "ipa"; - qcom,msm-bus,num-cases = <3>; - qcom,msm-bus,num-paths = <1>; - qcom,msm-bus,vectors-KBps = - <90 512 0 0>, /* No BIMC vote (ab=0 Mbps, ib=0 Mbps ~ 0MHZ) */ - <90 512 100000 800000>, /* SVS (ab=100, ib=800 ~ 50MHz) */ - <90 512 100000 1200000>; /* PERF (ab=100, ib=1200 ~ 75MHz) */ - qcom,bus-vector-names = "MIN", "SVS", "PERF"; - }; - - qcom,rmnet-ipa { - compatible = "qcom,rmnet-ipa"; - qcom,rmnet-ipa-ssr; - qcom,ipa-loaduC; - qcom,ipa-advertise-sg-support; - }; - - qcom,smdtty { - compatible = "qcom,smdtty"; - - smdtty_apps_fm: qcom,smdtty-apps-fm { - qcom,smdtty-remote = "wcnss"; - qcom,smdtty-port-name = "APPS_FM"; - }; - - smdtty_apps_riva_bt_acl: smdtty-apps-riva-bt-acl { - qcom,smdtty-remote = "wcnss"; - qcom,smdtty-port-name = "APPS_RIVA_BT_ACL"; - }; - - smdtty_apps_riva_bt_cmd: qcom,smdtty-apps-riva-bt-cmd { - qcom,smdtty-remote = "wcnss"; - qcom,smdtty-port-name = "APPS_RIVA_BT_CMD"; - }; - - smdtty_mbalbridge: qcom,smdtty-mbalbridge { - qcom,smdtty-remote = "modem"; - qcom,smdtty-port-name = "MBALBRIDGE"; - }; - - smdtty_apps_riva_ant_cmd: smdtty-apps-riva-ant-cmd { - qcom,smdtty-remote = "wcnss"; - qcom,smdtty-port-name = "APPS_RIVA_ANT_CMD"; - }; - - smdtty_apps_riva_ant_data: smdtty-apps-riva-ant-data { - qcom,smdtty-remote = "wcnss"; - qcom,smdtty-port-name = "APPS_RIVA_ANT_DATA"; - }; - - smdtty_data1: qcom,smdtty-data1 { - qcom,smdtty-remote = "modem"; - qcom,smdtty-port-name = "DATA1"; - }; - - smdtty_data4: qcom,smdtty-data4 { - qcom,smdtty-remote = "modem"; - qcom,smdtty-port-name = "DATA4"; - }; - - smdtty_data11: qcom,smdtty-data11 { - qcom,smdtty-remote = "modem"; - qcom,smdtty-port-name = "DATA11"; - }; - - smdtty_data21: qcom,smdtty-data21 { - qcom,smdtty-remote = "modem"; - qcom,smdtty-port-name = "DATA21"; - }; - - smdtty_loopback: smdtty-loopback { - qcom,smdtty-remote = "modem"; - qcom,smdtty-port-name = "LOOPBACK"; - qcom,smdtty-dev-name = "LOOPBACK_TTY"; - }; - }; - - qcom,smdpkt { - compatible = "qcom,smdpkt"; - - qcom,smdpkt-data5-cntl { - qcom,smdpkt-remote = "modem"; - qcom,smdpkt-port-name = "DATA5_CNTL"; - qcom,smdpkt-dev-name = "smdcntl0"; - }; - - qcom,smdpkt-data22 { - qcom,smdpkt-remote = "modem"; - qcom,smdpkt-port-name = "DATA22"; - qcom,smdpkt-dev-name = "smd22"; - }; - - qcom,smdpkt-data40-cntl { - qcom,smdpkt-remote = "modem"; - qcom,smdpkt-port-name = "DATA40_CNTL"; - qcom,smdpkt-dev-name = "smdcntl8"; - }; - - qcom,smdpkt-apr-apps2 { - qcom,smdpkt-remote = "adsp"; - qcom,smdpkt-port-name = "apr_apps2"; - qcom,smdpkt-dev-name = "apr_apps2"; - }; - - qcom,smdpkt-loopback { - qcom,smdpkt-remote = "modem"; - qcom,smdpkt-port-name = "LOOPBACK"; - qcom,smdpkt-dev-name = "smd_pkt_loopback"; - }; - }; - - qcom,iris-fm { - compatible = "qcom,iris_fm"; - }; - - qcom,wcnss-wlan@0a000000 { - compatible = "qcom,wcnss_wlan"; - reg = <0x0a000000 0x280000>, - <0x0b011008 0x04>, - <0x0a21b000 0x3000>, - <0x03204000 0x00000100>, - <0x03200800 0x00000200>, - <0x0a100400 0x00000200>, - <0x0a205050 0x00000200>, - <0x0a219000 0x00000020>, - <0x0a080488 0x00000008>, - <0x0a080fb0 0x00000008>, - <0x0a08040c 0x00000008>, - <0x0a0120a8 0x00000008>, - <0x0a012448 0x00000008>, - <0x0a080c00 0x00000001>; - - reg-names = "wcnss_mmio", "wcnss_fiq", - "pronto_phy_base", "riva_phy_base", - "riva_ccu_base", "pronto_a2xb_base", - "pronto_ccpu_base", "pronto_saw2_base", - "wlan_tx_phy_aborts","wlan_brdg_err_source", - "wlan_tx_status", "alarms_txctl", - "alarms_tactl", "pronto_mcu_base"; - - interrupts = <0 145 0 0 146 0>; - interrupt-names = "wcnss_wlantx_irq", "wcnss_wlanrx_irq"; - - qcom,pronto-vddmx-supply = <&pm8953_s7_level_ao>; - qcom,pronto-vddcx-supply = <&pm8953_s2_level>; - qcom,pronto-vddpx-supply = <&pm8953_l5>; - qcom,iris-vddxo-supply = <&pm8953_l7>; - qcom,iris-vddrfa-supply = <&pm8953_l19>; - qcom,iris-vddpa-supply = <&pm8953_l9>; - qcom,iris-vdddig-supply = <&pm8953_l5>; - - qcom,iris-vddxo-voltage-level = <1800000 0 1800000>; - qcom,iris-vddrfa-voltage-level = <1380000 0 1380000>; - qcom,iris-vddpa-voltage-level = <3300000 0 3300000>; - qcom,iris-vdddig-voltage-level = <1800000 0 1800000>; - - qcom,vddmx-voltage-level = ; - qcom,vddcx-voltage-level = ; - qcom,vddpx-voltage-level = <1800000 0 1800000>; - - qcom,iris-vddxo-current = <10000>; - qcom,iris-vddrfa-current = <100000>; - qcom,iris-vddpa-current = <515000>; - qcom,iris-vdddig-current = <10000>; - - qcom,pronto-vddmx-current = <0>; - qcom,pronto-vddcx-current = <0>; - qcom,pronto-vddpx-current = <0>; - - pinctrl-names = "wcnss_default", "wcnss_sleep", - "wcnss_gpio_default"; - pinctrl-0 = <&wcnss_default>; - pinctrl-1 = <&wcnss_sleep>; - pinctrl-2 = <&wcnss_gpio_default>; - - gpios = <&tlmm 76 0>, <&tlmm 77 0>, <&tlmm 78 0>, - <&tlmm 79 0>, <&tlmm 80 0>; - - clocks = <&clock_gcc clk_xo_wlan_clk>, - <&clock_gcc clk_rf_clk2>, - <&clock_debug clk_gcc_debug_mux>, - <&clock_gcc clk_wcnss_m_clk>; - - clock-names = "xo", "rf_clk", "measure", "wcnss_debug"; - - qcom,has-autodetect-xo; - qcom,is-pronto-v3; - qcom,has-pronto-hw; - qcom,has-vsys-adc-channel; - qcom,has-a2xb-split-reg; - qcom,wcnss-adc_tm = <&pm8953_adc_tm>; - }; - - qcom_rng: qrng@e3000 { - compatible = "qcom,msm-rng"; - reg = <0xe3000 0x1000>; - qcom,msm-rng-iface-clk; - qcom,no-qrng-config; - qcom,msm-bus,name = "msm-rng-noc"; - qcom,msm-bus,num-cases = <2>; - qcom,msm-bus,num-paths = <1>; - qcom,msm-bus,vectors-KBps = - <1 618 0 0>, /* No vote */ - <1 618 0 800>; /* 100 MB/s */ - clocks = <&clock_gcc clk_gcc_prng_ahb_clk>; - clock-names = "iface_clk"; - }; - - qcom_tzlog: tz-log@08600720 { - compatible = "qcom,tz-log"; - reg = <0x08600720 0x2000>; - }; - - qcom_crypto: qcrypto@720000 { - compatible = "qcom,qcrypto"; - reg = <0x720000 0x20000>, - <0x704000 0x20000>; - reg-names = "crypto-base","crypto-bam-base"; - interrupts = <0 207 0>; - qcom,bam-pipe-pair = <2>; - qcom,ce-hw-instance = <0>; - qcom,ce-device = <0>; - qcom,ce-hw-shared; - qcom,clk-mgmt-sus-res; - qcom,msm-bus,name = "qcrypto-noc"; - qcom,msm-bus,num-cases = <2>; - qcom,msm-bus,num-paths = <1>; - qcom,msm-bus,vectors-KBps = - <55 512 0 0>, - <55 512 393600 393600>; - clocks = <&clock_gcc clk_crypto_clk_src>, - <&clock_gcc clk_gcc_crypto_clk>, - <&clock_gcc clk_gcc_crypto_ahb_clk>, - <&clock_gcc clk_gcc_crypto_axi_clk>; - clock-names = "core_clk_src", "core_clk", - "iface_clk", "bus_clk"; - qcom,use-sw-aes-cbc-ecb-ctr-algo; - qcom,use-sw-aes-xts-algo; - qcom,use-sw-aes-ccm-algo; - qcom,use-sw-ahash-algo; - qcom,use-sw-hmac-algo; - qcom,use-sw-aead-algo; - qcom,ce-opp-freq = <100000000>; - }; - - qcom_cedev: qcedev@720000 { - compatible = "qcom,qcedev"; - reg = <0x720000 0x20000>, - <0x704000 0x20000>; - reg-names = "crypto-base","crypto-bam-base"; - interrupts = <0 207 0>; - qcom,bam-pipe-pair = <1>; - qcom,ce-hw-instance = <0>; - qcom,ce-device = <0>; - qcom,ce-hw-shared; - qcom,msm-bus,name = "qcedev-noc"; - qcom,msm-bus,num-cases = <2>; - qcom,msm-bus,num-paths = <1>; - qcom,msm-bus,vectors-KBps = - <55 512 0 0>, - <55 512 393600 393600>; - clocks = <&clock_gcc clk_crypto_clk_src>, - <&clock_gcc clk_gcc_crypto_clk>, - <&clock_gcc clk_gcc_crypto_ahb_clk>, - <&clock_gcc clk_gcc_crypto_axi_clk>; - clock-names = "core_clk_src", "core_clk", - "iface_clk", "bus_clk"; - qcom,ce-opp-freq = <100000000>; - }; - - qcom_seecom: qseecom@84A00000 { - compatible = "qcom,qseecom"; - reg = <0x84A00000 0x1900000>; - reg-names = "secapp-region"; - qcom,hlos-num-ce-hw-instances = <1>; - qcom,hlos-ce-hw-instance = <0>; - qcom,qsee-ce-hw-instance = <0>; - qcom,disk-encrypt-pipe-pair = <2>; - qcom,support-fde; - qcom,msm-bus,name = "qseecom-noc"; - qcom,msm-bus,num-cases = <4>; - qcom,msm-bus,num-paths = <1>; - qcom,support-bus-scaling; - qcom,msm-bus,vectors-KBps = - <55 512 0 0>, - <55 512 0 0>, - <55 512 120000 1200000>, - <55 512 393600 3936000>; - clocks = <&clock_gcc clk_crypto_clk_src>, - <&clock_gcc clk_gcc_crypto_clk>, - <&clock_gcc clk_gcc_crypto_ahb_clk>, - <&clock_gcc clk_gcc_crypto_axi_clk>; - clock-names = "core_clk_src", "core_clk", - "iface_clk", "bus_clk"; - qcom,ce-opp-freq = <100000000>; - }; - - qcom,ipc_router { - compatible = "qcom,ipc_router"; - qcom,node-id = <1>; - }; - - qcom,ipc_router_modem_xprt { - compatible = "qcom,ipc_router_smd_xprt"; - qcom,ch-name = "IPCRTR"; - qcom,xprt-remote = "modem"; - qcom,xprt-linkid = <1>; - qcom,xprt-version = <1>; - qcom,fragmented-data; - qcom,disable-pil-loading; - }; - - qcom,ipc_router_q6_xprt { - compatible = "qcom,ipc_router_smd_xprt"; - qcom,ch-name = "IPCRTR"; - qcom,xprt-remote = "adsp"; - qcom,xprt-linkid = <1>; - qcom,xprt-version = <1>; - qcom,fragmented-data; - }; - - qcom,ipc_router_wcnss_xprt { - compatible = "qcom,ipc_router_smd_xprt"; - qcom,ch-name = "IPCRTR"; - qcom,xprt-remote = "wcnss"; - qcom,xprt-linkid = <1>; - qcom,xprt-version = <1>; - qcom,fragmented-data; - }; - - qcom,adsprpc-mem { - compatible = "qcom,msm-adsprpc-mem-region"; - memory-region = <&adsp_mem>; - }; - - qcom,adsprpc_domains { - compatible = "qcom,msm-fastrpc-legacy-compute-cb"; - qcom,msm_fastrpc_compute_cb { - qcom,adsp-shared-phandle = <&adsp_shared>; - qcom,adsp-shared-sids = - <0x8 0x9 0xa 0xb 0xc 0xd 0xe 0xf>; - qcom,virtual-addr-pool = <0x80000000 0x7FFFFFFF>; - }; - }; - - sdcc1_ice: sdcc1ice@7803000 { - compatible = "qcom,ice"; - reg = <0x7803000 0x8000>; - interrupt-names = "sdcc_ice_nonsec_level_irq", - "sdcc_ice_sec_level_irq"; - interrupts = <0 312 0>, <0 313 0>; - qcom,enable-ice-clk; - clock-names = "ice_core_clk_src", "ice_core_clk", - "bus_clk", "iface_clk"; - clocks = <&clock_gcc clk_sdcc1_ice_core_clk_src>, - <&clock_gcc clk_gcc_sdcc1_ice_core_clk>, - <&clock_gcc clk_gcc_sdcc1_apps_clk>, - <&clock_gcc clk_gcc_sdcc1_ahb_clk>; - qcom,op-freq-hz = <270000000>, <0>, <0>, <0>; - qcom,msm-bus,name = "sdcc_ice_noc"; - qcom,msm-bus,num-cases = <2>; - qcom,msm-bus,num-paths = <1>; - qcom,msm-bus,vectors-KBps = - <78 512 0 0>, /* No vote */ - <78 512 1000 0>; /* Max. bandwidth */ - qcom,bus-vector-names = "MIN", "MAX"; - qcom,instance-type = "sdcc"; - }; - - sdhc_1: sdhci@7824900 { - compatible = "qcom,sdhci-msm"; - reg = <0x7824900 0x500>, <0x7824000 0x800>, <0x7824e00 0x200>; - reg-names = "hc_mem", "core_mem", "cmdq_mem"; - - interrupts = <0 123 0>, <0 138 0>; - interrupt-names = "hc_irq", "pwr_irq"; - - sdhc-msm-crypto = <&sdcc1_ice>; - qcom,bus-width = <8>; - - qcom,devfreq,freq-table = <50000000 200000000>; - - qcom,pm-qos-irq-type = "affine_irq"; - qcom,pm-qos-irq-latency = <2 213>; - - qcom,pm-qos-cpu-groups = <0x0f 0xf0>; - qcom,pm-qos-cmdq-latency-us = <2 213>, <2 213>; - - qcom,pm-qos-legacy-latency-us = <2 213>, <2 213>; - - qcom,msm-bus,name = "sdhc1"; - qcom,msm-bus,num-cases = <9>; - qcom,msm-bus,num-paths = <1>; - qcom,msm-bus,vectors-KBps = <78 512 0 0>, /* No vote */ - <78 512 1046 3200>, /* 400 KB/s*/ - <78 512 52286 160000>, /* 20 MB/s */ - <78 512 65360 200000>, /* 25 MB/s */ - <78 512 130718 400000>, /* 50 MB/s */ - <78 512 130718 400000>, /* 100 MB/s */ - <78 512 261438 800000>, /* 200 MB/s */ - <78 512 261438 800000>, /* 400 MB/s */ - <78 512 1338562 4096000>; /* Max. bandwidth */ - qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000 - 100000000 200000000 400000000 4294967295>; - - clocks = <&clock_gcc clk_gcc_sdcc1_ahb_clk>, - <&clock_gcc clk_gcc_sdcc1_apps_clk>, - <&clock_gcc clk_gcc_sdcc1_ice_core_clk>; - clock-names = "iface_clk", "core_clk", "ice_core_clk"; - qcom,ice-clk-rates = <270000000 160000000>; - qcom,large-address-bus; - - status = "disabled"; - }; - - sdhc_2: sdhci@7864900 { - compatible = "qcom,sdhci-msm"; - reg = <0x7864900 0x500>, <0x7864000 0x800>; - reg-names = "hc_mem", "core_mem"; - - interrupts = <0 125 0>, <0 221 0>; - interrupt-names = "hc_irq", "pwr_irq"; - - qcom,bus-width = <4>; - - qcom,pm-qos-irq-type = "affine_irq"; - qcom,pm-qos-irq-latency = <2 213>; - - qcom,pm-qos-cpu-groups = <0x0f 0xf0>; - qcom,pm-qos-legacy-latency-us = <2 213>, <2 213>; - - qcom,devfreq,freq-table = <50000000 200000000>; - - qcom,msm-bus,name = "sdhc2"; - qcom,msm-bus,num-cases = <8>; - qcom,msm-bus,num-paths = <1>; - qcom,msm-bus,vectors-KBps = <81 512 0 0>, /* No vote */ - <81 512 1046 3200>, /* 400 KB/s*/ - <81 512 52286 160000>, /* 20 MB/s */ - <81 512 65360 200000>, /* 25 MB/s */ - <81 512 130718 400000>, /* 50 MB/s */ - <81 512 261438 800000>, /* 100 MB/s */ - <81 512 261438 800000>, /* 200 MB/s */ - <81 512 1338562 4096000>; /* Max. bandwidth */ - qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000 - 100000000 200000000 4294967295>; - - clocks = <&clock_gcc clk_gcc_sdcc2_ahb_clk>, - <&clock_gcc clk_gcc_sdcc2_apps_clk>; - clock-names = "iface_clk", "core_clk"; - - qcom,large-address-bus; - status = "disabled"; - }; - - spmi_bus: qcom,spmi@200f000 { - compatible = "qcom,spmi-pmic-arb"; - reg = <0x200f000 0x1000>, - <0x2400000 0x800000>, - <0x2c00000 0x800000>, - <0x3800000 0x200000>, - <0x200a000 0x2100>; - reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; - interrupts = <0 190 0>; - qcom,pmic-arb-channel = <0>; - qcom,pmic-arb-max-peripherals = <256>; - qcom,pmic-arb-max-periph-interrupts = <256>; - qcom,pmic-arb-ee = <0>; - #interrupt-cells = <3>; - interrupt-controller; - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - }; - - qcom,memshare { - compatible = "qcom,memshare"; - - qcom,client_1 { - compatible = "qcom,memshare-peripheral"; - qcom,peripheral-size = <0x200000>; - qcom,client-id = <0>; - qcom,allocate-boot-time; - label = "modem"; - }; - - qcom,client_2 { - compatible = "qcom,memshare-peripheral"; - qcom,peripheral-size = <0x300000>; - qcom,client-id = <2>; - label = "modem"; - }; - - qcom,client_3 { - compatible = "qcom,memshare-peripheral"; - qcom,peripheral-size = <0x0>; - qcom,client-id = <1>; - label = "modem"; - }; - }; - - qcom,mss@4080000 { - compatible = "qcom,pil-q6v55-mss"; - reg = <0x04080000 0x100>, - <0x0194f000 0x010>, - <0x01950000 0x008>, - <0x01951000 0x008>, - <0x04020000 0x040>, - <0x01871000 0x004>; - reg-names = "qdsp6_base", "halt_q6", "halt_modem", "halt_nc", - "rmb_base", "restart_reg"; - - interrupts = <0 24 1>; - vdd_mss-supply = <&pm8953_s1>; - vdd_cx-supply = <&pm8953_s2_level>; - vdd_cx-voltage = ; - vdd_mx-supply = <&pm8953_s7_level_ao>; - vdd_mx-uV = ; - vdd_pll-supply = <&pm8953_l7>; - qcom,vdd_pll = <1800000>; - - clocks = <&clock_gcc clk_xo_pil_mss_clk>, - <&clock_gcc clk_gcc_mss_cfg_ahb_clk>, - <&clock_gcc clk_gcc_mss_q6_bimc_axi_clk>, - <&clock_gcc clk_gcc_boot_rom_ahb_clk>; - clock-names = "xo", "iface_clk", "bus_clk", "mem_clk"; - qcom,proxy-clock-names = "xo"; - qcom,active-clock-names = "iface_clk", "bus_clk", "mem_clk"; - - qcom,pas-id = <5>; - qcom,pil-mss-memsetup; - qcom,firmware-name = "modem"; - qcom,pil-self-auth; - qcom,sysmon-id = <0>; - qcom,ssctl-instance-id = <0x12>; - qcom,qdsp6v56-1-10; - - /* GPIO inputs from mss */ - qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_1_in 0 0>; - qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_1_in 1 0>; - qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_1_in 2 0>; - qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_1_in 3 0>; - qcom,gpio-shutdown-ack = <&smp2pgpio_ssr_smp2p_1_in 7 0>; - - /* GPIO output to mss */ - qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_1_out 0 0>; - memory-region = <&modem_mem>; - }; - - qcom,lpass@c200000 { - compatible = "qcom,pil-tz-generic"; - reg = <0xc200000 0x00100>; - interrupts = <0 293 1>; - - vdd_cx-supply = <&pm8953_s2_level>; - qcom,proxy-reg-names = "vdd_cx"; - qcom,vdd_cx-uV-uA = ; - - clocks = <&clock_gcc clk_xo_pil_lpass_clk>, - <&clock_gcc clk_gcc_crypto_clk>, - <&clock_gcc clk_gcc_crypto_ahb_clk>, - <&clock_gcc clk_gcc_crypto_axi_clk>, - <&clock_gcc clk_crypto_clk_src>; - clock-names = "xo", "scm_core_clk", "scm_iface_clk", - "scm_bus_clk", "scm_core_clk_src"; - qcom,proxy-clock-names = "xo", "scm_core_clk", "scm_iface_clk", - "scm_bus_clk", "scm_core_clk_src"; - qcom,scm_core_clk_src-freq = <80000000>; - - qcom,pas-id = <1>; - qcom,complete-ramdump; - qcom,proxy-timeout-ms = <10000>; - qcom,smem-id = <423>; - qcom,sysmon-id = <1>; - qcom,ssctl-instance-id = <0x14>; - qcom,firmware-name = "adsp"; - - /* GPIO inputs from lpass */ - qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_2_in 0 0>; - qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_2_in 2 0>; - qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_2_in 1 0>; - qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_2_in 3 0>; - - /* GPIO output to lpass */ - qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_2_out 0 0>; - - memory-region = <&adsp_fw_mem>; - }; - - qcom,venus@1de0000 { - compatible = "qcom,pil-tz-generic"; - reg = <0x1de0000 0x4000>; - - vdd-supply = <&gdsc_venus>; - qcom,proxy-reg-names = "vdd"; - - clocks = <&clock_gcc clk_gcc_venus0_vcodec0_clk>, - <&clock_gcc clk_gcc_venus0_ahb_clk>, - <&clock_gcc clk_gcc_venus0_axi_clk>, - <&clock_gcc clk_gcc_crypto_clk>, - <&clock_gcc clk_gcc_crypto_ahb_clk>, - <&clock_gcc clk_gcc_crypto_axi_clk>, - <&clock_gcc clk_crypto_clk_src>; - - clock-names = "core_clk", "iface_clk", "bus_clk", - "scm_core_clk", "scm_iface_clk", - "scm_bus_clk", "scm_core_clk_src"; - - qcom,proxy-clock-names = "core_clk", "iface_clk", - "bus_clk", "scm_core_clk", - "scm_iface_clk", "scm_bus_clk", - "scm_core_clk_src"; - qcom,scm_core_clk_src-freq = <80000000>; - - qcom,msm-bus,name = "pil-venus"; - qcom,msm-bus,num-cases = <2>; - qcom,msm-bus,num-paths = <1>; - qcom,msm-bus,vectors-KBps = - <63 512 0 0>, - <63 512 0 304000>; - - qcom,pas-id = <9>; - qcom,proxy-timeout-ms = <100>; - qcom,firmware-name = "venus"; - memory-region = <&venus_mem>; - }; - - qcom,msm-ssc-sensors { - compatible = "qcom,msm-ssc-sensors"; - }; - - qcom,pronto@a21b000 { - compatible = "qcom,pil-tz-generic"; - reg = <0x0a21b000 0x3000>; - interrupts = <0 149 1>; - - vdd_pronto_pll-supply = <&pm8953_l7>; - proxy-reg-names = "vdd_pronto_pll"; - vdd_pronto_pll-uV-uA = <1800000 18000>; - clocks = <&clock_gcc clk_xo_pil_pronto_clk>, - <&clock_gcc clk_gcc_crypto_clk>, - <&clock_gcc clk_gcc_crypto_ahb_clk>, - <&clock_gcc clk_gcc_crypto_axi_clk>, - <&clock_gcc clk_crypto_clk_src>; - - clock-names = "xo", "scm_core_clk", "scm_iface_clk", - "scm_bus_clk", "scm_core_clk_src"; - qcom,proxy-clock-names = "xo", "scm_core_clk", "scm_iface_clk", - "scm_bus_clk", "scm_core_clk_src"; - qcom,scm_core_clk_src = <80000000>; - - qcom,pas-id = <6>; - qcom,proxy-timeout-ms = <10000>; - qcom,smem-id = <422>; - qcom,sysmon-id = <6>; - qcom,ssctl-instance-id = <0x13>; - qcom,firmware-name = "wcnss"; - - /* GPIO inputs from wcnss */ - qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_4_in 0 0>; - qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_4_in 1 0>; - qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_4_in 2 0>; - qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_4_in 3 0>; - - /* GPIO output to wcnss */ - qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_4_out 0 0>; - memory-region = <&wcnss_fw_mem>; - }; - - usb3: ssusb@7000000{ - compatible = "qcom,dwc-usb3-msm"; - reg = <0x07000000 0xfc000>, - <0x0007e000 0x400>; - reg-names = "core_base", - "ahb2phy_base"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - - interrupts = <0 136 0>, <0 220 0>, <0 134 0>; - interrupt-names = "hs_phy_irq", "ss_phy_irq", "pwr_event_irq"; - - USB3_GDSC-supply = <&gdsc_usb30>; - qcom,usb-dbm = <&dbm_1p5>; - qcom,msm-bus,name = "usb3"; - qcom,msm-bus,num-cases = <3>; - qcom,msm-bus,num-paths = <1>; - qcom,detect-dpdm-floating; - qcom,msm-bus,vectors-KBps = - <61 512 0 0>, - <61 512 240000 800000>, - <61 512 240000 800000>; - - qcom,dwc-usb3-msm-tx-fifo-size = <21288>; - - clocks = <&clock_gcc clk_gcc_usb30_master_clk>, - <&clock_gcc clk_gcc_pcnoc_usb3_axi_clk>, - <&clock_gcc clk_gcc_usb30_mock_utmi_clk>, - <&clock_gcc clk_gcc_usb30_sleep_clk>, - <&clock_gcc clk_xo_dwc3_clk>, - <&clock_gcc clk_gcc_usb_phy_cfg_ahb_clk>; - - clock-names = "core_clk", "iface_clk", "utmi_clk", - "sleep_clk", "xo", "cfg_ahb_clk"; - - dwc3@7000000 { - compatible = "snps,dwc3"; - reg = <0x07000000 0xc8d0>; - interrupt-parent = <&intc>; - interrupts = <0 140 0>; - usb-phy = <&qusb_phy>, <&ssphy>; - tx-fifo-resize; - snps,usb3-u1u2-disable; - snps,nominal-elastic-buffer; - snps,is-utmi-l1-suspend; - snps,hird-threshold = /bits/ 8 <0x0>; - }; - - qcom,usbbam@7104000 { - compatible = "qcom,usb-bam-msm"; - reg = <0x07104000 0x1a934>; - interrupt-parent = <&intc>; - interrupts = <0 135 0>; - - qcom,bam-type = <0>; - qcom,usb-bam-fifo-baseaddr = <0x08605000>; - qcom,usb-bam-num-pipes = <8>; - qcom,ignore-core-reset-ack; - qcom,disable-clk-gating; - qcom,usb-bam-override-threshold = <0x4001>; - qcom,usb-bam-max-mbps-highspeed = <400>; - qcom,usb-bam-max-mbps-superspeed = <3600>; - qcom,reset-bam-on-connect; - - qcom,pipe0 { - label = "ssusb-ipa-out-0"; - qcom,usb-bam-mem-type = <1>; - qcom,dir = <0>; - qcom,pipe-num = <0>; - qcom,peer-bam = <1>; - qcom,src-bam-pipe-index = <1>; - qcom,data-fifo-size = <0x8000>; - qcom,descriptor-fifo-size = <0x2000>; - }; - - qcom,pipe1 { - label = "ssusb-ipa-in-0"; - qcom,usb-bam-mem-type = <1>; - qcom,dir = <1>; - qcom,pipe-num = <0>; - qcom,peer-bam = <1>; - qcom,dst-bam-pipe-index = <0>; - qcom,data-fifo-size = <0x8000>; - qcom,descriptor-fifo-size = <0x2000>; - }; - - qcom,pipe2 { - label = "ssusb-qdss-in-0"; - qcom,usb-bam-mem-type = <2>; - qcom,dir = <1>; - qcom,pipe-num = <0>; - qcom,peer-bam = <0>; - qcom,peer-bam-physical-address = <0x06044000>; - qcom,src-bam-pipe-index = <0>; - qcom,dst-bam-pipe-index = <2>; - qcom,data-fifo-offset = <0x0>; - qcom,data-fifo-size = <0xe00>; - qcom,descriptor-fifo-offset = <0xe00>; - qcom,descriptor-fifo-size = <0x200>; - }; - - qcom,pipe3 { - label = "ssusb-dpl-ipa-in-1"; - qcom,usb-bam-mem-type = <1>; - qcom,dir = <1>; - qcom,pipe-num = <1>; - qcom,peer-bam = <1>; - qcom,dst-bam-pipe-index = <2>; - qcom,data-fifo-size = <0x8000>; - qcom,descriptor-fifo-size = <0x2000>; - }; - }; - }; - - qusb_phy: qusb@79000 { - compatible = "qcom,qusb2phy"; - reg = <0x079000 0x180>, - <0x01841030 0x4>, - <0x0193f044 0x4>, - <0x0193f020 0x4>; - reg-names = "qusb_phy_base", - "ref_clk_addr", - "tcsr_phy_clk_scheme_sel", - "tcsr_phy_level_shift_keeper"; - - USB3_GDSC-supply = <&gdsc_usb30>; - vdd-supply = <&pm8953_l3>; - vdda18-supply = <&pm8953_l7>; - vdda33-supply = <&pm8953_l13>; - qcom,vdd-voltage-level = <0 925000 925000>; - - qcom,qusb-phy-init-seq = <0xF8 0x80 - 0x93 0x84 - 0x83 0x88 - 0xC7 0x8C - 0x14 0x9C - 0x30 0x08 - 0x79 0x0C - 0x21 0x10 - 0x00 0x90 - 0x9F 0x1C - 0x00 0x18>; - phy_type= "utmi"; - - clocks = <&clock_gcc clk_bb_clk1>, - <&clock_gcc clk_gcc_qusb_ref_clk>, - <&clock_gcc clk_gcc_usb_phy_cfg_ahb_clk>, - <&clock_gcc clk_gcc_qusb2_phy_reset>, - <&clock_gcc clk_gcc_pcnoc_usb3_axi_clk>, - <&clock_gcc clk_gcc_usb30_master_clk>; - - clock-names = "ref_clk_src", "ref_clk", "cfg_ahb_clk", - "phy_reset", "iface_clk", "core_clk"; - - }; - - usb_nop_phy: usb_nop_phy { - status = "disabled"; - compatible = "usb-nop-xceiv"; - }; - - - ssphy: ssphy@78000 { - compatible = "qcom,usb-ssphy-qmp"; - reg = <0x78000 0x9f8>, - <0x0193f244 0x4>, - <0x0193f044 0x4>; - reg-names = "qmp_phy_base", - "vls_clamp_reg", - "tcsr_phy_clk_scheme_sel"; - qcom,qmp-phy-init-seq = <0xac 0x14 0x1a 0x00 - 0x34 0x08 0x08 0x00 - 0x174 0x30 0x30 0x00 - 0x3c 0x06 0x06 0x00 - 0xb4 0x00 0x00 0x00 - 0xb8 0x08 0x08 0x00 - 0x194 0x06 0x06 0x3e8 - 0x19c 0x01 0x01 0x00 - 0x178 0x00 0x00 0x00 - 0xd0 0x82 0x82 0x00 - 0xdc 0x55 0x55 0x00 - 0xe0 0x55 0x55 0x00 - 0xe4 0x03 0x03 0x00 - 0x78 0x0b 0x0b 0x00 - 0x84 0x16 0x16 0x00 - 0x90 0x28 0x28 0x00 - 0x108 0x80 0x80 0x00 - 0x10c 0x00 0x00 0x00 - 0x184 0x0a 0x0a 0x00 - 0x4c 0x15 0x15 0x00 - 0x50 0x34 0x34 0x00 - 0x54 0x00 0x00 0x00 - 0xc8 0x00 0x00 0x00 - 0x18c 0x00 0x00 0x00 - 0xcc 0x00 0x00 0x00 - 0x128 0x00 0x00 0x00 - 0x0c 0x0a 0x0a 0x00 - 0x10 0x01 0x01 0x00 - 0x1c 0x31 0x31 0x00 - 0x20 0x01 0x01 0x00 - 0x14 0x00 0x00 0x00 - 0x18 0x00 0x00 0x00 - 0x24 0xde 0xde 0x00 - 0x28 0x07 0x07 0x00 - 0x48 0x0f 0x0f 0x00 - 0x70 0x0f 0x0f 0x00 - 0x100 0x80 0x80 0x00 - 0x440 0x0b 0x0b 0x00 - 0x4d8 0x02 0x02 0x00 - 0x4dc 0x6c 0x6c 0x00 - 0x4e0 0xbb 0xbb 0x00 - 0x508 0x77 0x77 0x00 - 0x50c 0x80 0x80 0x00 - 0x514 0x03 0x03 0x00 - 0x51c 0x16 0x16 0x00 - 0x448 0x75 0x75 0x00 - 0x454 0x00 0x00 0x00 - 0x40c 0x0a 0x0a 0x00 - 0x41c 0x06 0x06 0x00 - 0x510 0x00 0x00 0x00 - 0x268 0x45 0x45 0x00 - 0x2ac 0x12 0x12 0x00 - 0x294 0x06 0x06 0x00 - 0x254 0x00 0x00 0x00 - 0x8c8 0x83 0x83 0x00 - 0x8c4 0x02 0x02 0x00 - 0x8cc 0x09 0x09 0x00 - 0x8d0 0xa2 0xa2 0x00 - 0x8d4 0x85 0x85 0x00 - 0x880 0xd1 0xd1 0x00 - 0x884 0x1f 0x1f 0x00 - 0x888 0x47 0x47 0x00 - 0x80c 0x9f 0x9f 0x00 - 0x824 0x17 0x17 0x00 - 0x828 0x0f 0x0f 0x00 - 0x8b8 0x75 0x75 0x00 - 0x8bc 0x13 0x13 0x00 - 0x8b0 0x86 0x86 0x00 - 0x8a0 0x04 0x04 0x00 - 0x88c 0x44 0x44 0x00 - 0x870 0xe7 0xe7 0x00 - 0x874 0x03 0x03 0x00 - 0x878 0x40 0x40 0x00 - 0x87c 0x00 0x00 0x00 - 0x9d8 0x88 0x88 0x00 - 0xffffffff 0xffffffff 0x00 0x00>; - qcom,qmp-phy-reg-offset = <0x988 0x98c 0x990 0x994 - 0x974 0x8d8 0x8dc 0x804 0x800 - 0x808>; - vdd-supply = <&pm8953_l3>; - core-supply = <&pm8953_l7>; - qcom,vdd-voltage-level = <0 925000 925000>; - qcom,vbus-valid-override; - - clocks = <&clock_gcc clk_gcc_usb3_aux_clk>, - <&clock_gcc clk_gcc_usb3_pipe_clk>, - <&clock_gcc clk_gcc_usb_phy_cfg_ahb_clk>, - <&clock_gcc clk_gcc_usb3_phy_reset>, - <&clock_gcc clk_gcc_usb3phy_phy_reset>, - <&clock_gcc clk_bb_clk1>, - <&clock_gcc clk_gcc_usb_ss_ref_clk>; - - clock-names = "aux_clk", "pipe_clk", "cfg_ahb_clk", "phy_reset", - "phy_phy_reset", "ref_clk_src", "ref_clk"; - - }; - - dbm_1p5: dbm@70f8000 { - compatible = "qcom,usb-dbm-1p5"; - reg = <0x070f8000 0x300>; - qcom,reset-ep-after-lpm-resume; - }; - - android_usb@86000c8 { - compatible = "qcom,android-usb"; - reg = <0x086000c8 0xc8>; - qcom,pm-qos-latency = <2 213 11028>; - }; -}; - -#include "msm-pm8953-rpm-regulator.dtsi" -#include "msm-pm8953.dtsi" -#include "msm8953-regulator.dtsi" -#include "msm-audio.dtsi" -#include "msm8953-audio.dtsi" -#include "msm-gdsc-8916.dtsi" -#include "msm8953-camera.dtsi" -#include "msm8953-mdss.dtsi" -#include "msm8953-mdss-pll.dtsi" - -&gdsc_venus { - clock-names = "bus_clk", "core_clk"; - clocks = <&clock_gcc clk_gcc_venus0_axi_clk>, - <&clock_gcc clk_gcc_venus0_vcodec0_clk>; - status = "okay"; -}; - -&gdsc_venus_core0 { - qcom,support-hw-trigger; - clock-names ="core0_clk"; - clocks = <&clock_gcc clk_gcc_venus0_core0_vcodec0_clk>; - status = "okay"; -}; - -&gdsc_mdss { - clock-names = "core_clk", "bus_clk"; - clocks = <&clock_gcc clk_gcc_mdss_mdp_clk>, - <&clock_gcc clk_gcc_mdss_axi_clk>; - proxy-supply = <&gdsc_mdss>; - qcom,proxy-consumer-enable; - status = "okay"; -}; - -&gdsc_oxili_gx { - clock-names = "core_root_clk"; - clocks =<&clock_gcc_gfx clk_gfx3d_clk_src>; - qcom,force-enable-root-clk; - parent-supply = <&gfx_vreg_corner>; - status = "okay"; -}; - -&gdsc_jpeg { - clock-names = "core_clk", "bus_clk"; - clocks = <&clock_gcc clk_gcc_camss_jpeg0_clk>, - <&clock_gcc clk_gcc_camss_jpeg_axi_clk>; - status = "okay"; -}; - -&gdsc_vfe { - clock-names = "core_clk", "bus_clk", "micro_clk", - "csi_clk"; - clocks = <&clock_gcc clk_gcc_camss_vfe0_clk>, - <&clock_gcc clk_gcc_camss_vfe_axi_clk>, - <&clock_gcc clk_gcc_camss_micro_ahb_clk>, - <&clock_gcc clk_gcc_camss_csi_vfe0_clk>; - status = "okay"; -}; - -&gdsc_vfe1 { - clock-names = "core_clk", "bus_clk", "micro_clk", - "csi_clk"; - clocks = <&clock_gcc clk_gcc_camss_vfe1_clk>, - <&clock_gcc clk_gcc_camss_vfe1_axi_clk>, - <&clock_gcc clk_gcc_camss_micro_ahb_clk>, - <&clock_gcc clk_gcc_camss_csi_vfe1_clk>; - status = "okay"; -}; - -&gdsc_cpp { - clock-names = "core_clk", "bus_clk"; - clocks = <&clock_gcc clk_gcc_camss_cpp_clk>, - <&clock_gcc clk_gcc_camss_cpp_axi_clk>; - status = "okay"; -}; - -&gdsc_oxili_cx { - clock-names = "core_clk"; - clocks = <&clock_gcc_gfx clk_gcc_oxili_gfx3d_clk>; - status = "okay"; -}; - -&gdsc_usb30 { - status = "okay"; -}; - -&pm8953_mpps { - mpp@a100 { - /* MPP2 - PA_THERM config */ - qcom,mode = <4>; /* AIN input */ - qcom,invert = <1>; /* Enable MPP */ - qcom,ain-route = <1>; /* AMUX 6 */ - qcom,master-en = <1>; - qcom,src-sel = <0>; /* Function constant */ - }; - - mpp@a300 { - /* MPP4 - CASE_THERM config */ - qcom,mode = <4>; /* AIN input */ - qcom,invert = <1>; /* Enable MPP */ - qcom,ain-route = <3>; /* AMUX 8 */ - qcom,master-en = <1>; - qcom,src-sel = <0>; /* Function constant */ - }; -}; - -&pm8953_vadc { - chan@5 { - label = "vcoin"; - reg = <5>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <1>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; - }; - - chan@7 { - label = "vph_pwr"; - reg = <7>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <1>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; - }; - - chan@36 { - label = "pa_therm0"; - reg = <0x36>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <2>; - qcom,hw-settle-time = <2>; - qcom,fast-avg-setup = <0>; - }; - - chan@11 { - label = "pa_therm1"; - reg = <0x11>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <2>; - qcom,hw-settle-time = <2>; - qcom,fast-avg-setup = <0>; - qcom,vadc-thermal-node; - }; - - chan@32 { - label = "xo_therm"; - reg = <0x32>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <4>; - qcom,hw-settle-time = <2>; - qcom,fast-avg-setup = <0>; - qcom,vadc-thermal-node; - }; - - chan@3c { - label = "xo_therm_buf"; - reg = <0x3c>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <4>; - qcom,hw-settle-time = <2>; - qcom,fast-avg-setup = <0>; - qcom,vadc-thermal-node; - }; - - chan@13 { - label = "case_therm"; - reg = <0x13>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <2>; - qcom,hw-settle-time = <2>; - qcom,fast-avg-setup = <0>; - qcom,vadc-thermal-node; - }; -}; - -&pm8953_adc_tm { - chan@36 { - label = "pa_therm0"; - reg = <0x36>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <2>; - qcom,hw-settle-time = <2>; - qcom,fast-avg-setup = <0>; - qcom,btm-channel-number = <0x48>; - qcom,thermal-node; - }; - - chan@7 { - label = "vph_pwr"; - reg = <0x7>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <1>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; - qcom,btm-channel-number = <0x68>; - }; -}; diff --git a/arch/arm/boot/dts/qcom/msm8953-e7.dtsi b/arch/arm/boot/dts/qcom/msm8953-e7.dtsi deleted file mode 100644 index a48d7d2bea6b..000000000000 --- a/arch/arm/boot/dts/qcom/msm8953-e7.dtsi +++ /dev/null @@ -1,2605 +0,0 @@ -/* - * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved. - * Copyright (C) 2018 XiaoMi, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include "skeleton64.dtsi" -#include -#include -#include - -/ { - model = "Qualcomm Technologies, Inc. MSM 8953"; - compatible = "qcom,msm8953"; - qcom,msm-id = <293 0x0>; - interrupt-parent = <&intc>; - - chosen { - bootargs = "sched_enable_hmp=1 sched_enable_power_aware=1"; - }; - - firmware: firmware { - android { - compatible = "android,firmware"; - fstab { - compatible = "android,fstab"; - vendor { - compatible = "android,vendor"; - dev = "/dev/block/platform/soc/7824900.sdhci/by-name/vendor"; - type = "ext4"; - mnt_flags = "ro,barrier=1,discard"; - fsmgr_flags = "wait"; - status = "disable"; - }; - system { - compatible = "android,system"; - dev = "/dev/block/platform/soc/7824900.sdhci/by-name/system"; - type = "ext4"; - mnt_flags = "ro,barrier=1,discard"; - fsmgr_flags = "wait"; - status = "ok"; - }; - - }; - }; - }; - - reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; - - other_ext_mem: other_ext_region@0 { - compatible = "removed-dma-pool"; - no-map; - reg = <0x0 0x84A00000 0x0 0x1E00000>; - }; - - modem_mem: modem_region@0 { - compatible = "removed-dma-pool"; - no-map; - reg = <0x0 0x86c00000 0x0 0x6a00000>; - }; - - adsp_fw_mem: adsp_fw_region@0 { - compatible = "removed-dma-pool"; - no-map; - reg = <0x0 0x8d600000 0x0 0x1200000>; - }; - - wcnss_fw_mem: wcnss_fw_region@0 { - compatible = "removed-dma-pool"; - no-map; - reg = <0x0 0x8e800000 0x0 0x700000>; - }; - - venus_mem: venus_region@0 { - compatible = "shared-dma-pool"; - reusable; - alloc-ranges = <0x0 0x80000000 0x0 0x10000000>; - alignment = <0 0x400000>; - size = <0 0x0800000>; - }; - - secure_mem: secure_region@0 { - compatible = "shared-dma-pool"; - reusable; - alignment = <0 0x400000>; - size = <0 0x09800000>; - }; - - qseecom_mem: qseecom_region@0 { - compatible = "shared-dma-pool"; - reusable; - alignment = <0 0x400000>; - size = <0 0x1000000>; - }; - - adsp_mem: adsp_region@0 { - compatible = "shared-dma-pool"; - reusable; - size = <0 0x400000>; - }; - - dfps_data_mem: dfps_data_mem@90000000 { - reg = <0 0x90000000 0 0x1000>; - label = "dfps_data_mem"; - }; - - cont_splash_mem: splash_region@0x90001000 { - reg = <0x0 0x90001000 0x0 0x13ff000>; - label = "cont_splash_mem"; - }; - - gpu_mem: gpu_region@0 { - compatible = "shared-dma-pool"; - reusable; - alloc-ranges = <0x0 0x80000000 0x0 0x10000000>; - alignment = <0 0x400000>; - size = <0 0x800000>; - }; - pstore_reserve_mem: pstore_reserve_mem_region@0 { - compatible = "removed-dma-pool"; - no-map; - reg = <0x0 0x9ff00000 0x0 0x00100000>; - }; - }; - - aliases { - /* smdtty devices */ - smd1 = &smdtty_apps_fm; - smd2 = &smdtty_apps_riva_bt_acl; - smd3 = &smdtty_apps_riva_bt_cmd; - smd4 = &smdtty_mbalbridge; - smd5 = &smdtty_apps_riva_ant_cmd; - smd6 = &smdtty_apps_riva_ant_data; - smd7 = &smdtty_data1; - smd8 = &smdtty_data4; - smd11 = &smdtty_data11; - smd21 = &smdtty_data21; - smd36 = &smdtty_loopback; - sdhc1 = &sdhc_1; /* SDC1 eMMC slot */ - sdhc2 = &sdhc_2; /* SDC2 for SD card */ - i2c2 = &i2c_2; - i2c3 = &i2c_3; - i2c5 = &i2c_5; - spi3 = &spi_3; - spi6 = &spi_6; - }; - - soc: soc { }; - -}; - -#include "msm8953-pinctrl-e7.dtsi" -#include "msm8953-cpu.dtsi" -#include "msm8953-gpu.dtsi" -#include "msm8953-ion.dtsi" -#include "msm8953-smp2p.dtsi" -#include "msm-arm-smmu-8953.dtsi" -#include "msm8953-coresight.dtsi" -#include "msm8953-bus.dtsi" -#include "msm8953-iommu-domains.dtsi" -#include "msm8953-vidc.dtsi" -#include "msm8953-pm.dtsi" - -&soc { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0 0 0xffffffff>; - compatible = "simple-bus"; - - apc_apm: apm@b111000 { - compatible = "qcom,msm8953-apm"; - reg = <0xb111000 0x1000>; - reg-names = "pm-apcc-glb"; - qcom,apm-post-halt-delay = <0x2>; - qcom,apm-halt-clk-delay = <0x11>; - qcom,apm-resume-clk-delay = <0x10>; - qcom,apm-sel-switch-delay = <0x01>; - }; - - intc: interrupt-controller@b000000 { - compatible = "qcom,msm-qgic2"; - interrupt-controller; - #interrupt-cells = <3>; - reg = <0x0b000000 0x1000>, - <0x0b002000 0x1000>; - }; - - arm64-cpu-erp { - compatible = "arm,arm64-cpu-erp"; - interrupts = <0 275 0>, - <0 276 0>, - <0 273 0>, - <0 274 0>; - interrupt-names = "pri-dbe-irq", - "sec-dbe-irq", - "pri-ext-irq", - "sec-ext-irq"; - poll-delay-ms = <5000>; - }; - - qcom,msm-gladiator@b1c0000 { - compatible = "qcom,msm-gladiator"; - reg = <0x0b1c0000 0x4000>; - reg-names = "gladiator_base"; - interrupts = <0 22 0>; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts = <1 2 0xff08>, - <1 3 0xff08>, - <1 4 0xff08>, - <1 1 0xff08>; - clock-frequency = <19200000>; - }; - - timer@b120000 { - #address-cells = <1>; - #size-cells = <1>; - ranges; - compatible = "arm,armv7-timer-mem"; - reg = <0xb120000 0x1000>; - clock-frequency = <19200000>; - - frame@b121000 { - frame-number = <0>; - interrupts = <0 8 0x4>, - <0 7 0x4>; - reg = <0xb121000 0x1000>, - <0xb122000 0x1000>; - }; - - frame@b123000 { - frame-number = <1>; - interrupts = <0 9 0x4>; - reg = <0xb123000 0x1000>; - status = "disabled"; - }; - - frame@b124000 { - frame-number = <2>; - interrupts = <0 10 0x4>; - reg = <0xb124000 0x1000>; - status = "disabled"; - }; - - frame@b125000 { - frame-number = <3>; - interrupts = <0 11 0x4>; - reg = <0xb125000 0x1000>; - status = "disabled"; - }; - - frame@b126000 { - frame-number = <4>; - interrupts = <0 12 0x4>; - reg = <0xb126000 0x1000>; - status = "disabled"; - }; - - frame@b127000 { - frame-number = <5>; - interrupts = <0 13 0x4>; - reg = <0xb127000 0x1000>; - status = "disabled"; - }; - - frame@b128000 { - frame-number = <6>; - interrupts = <0 14 0x4>; - reg = <0xb128000 0x1000>; - status = "disabled"; - }; - }; - qcom,rmtfs_sharedmem@00000000 { - compatible = "qcom,sharedmem-uio"; - reg = <0x00000000 0x00180000>; - reg-names = "rmtfs"; - qcom,client-id = <0x00000001>; - }; - - restart@4ab000 { - compatible = "qcom,pshold"; - reg = <0x4ab000 0x4>, - <0x193d100 0x4>; - reg-names = "pshold-base", "tcsr-boot-misc-detect"; - }; - - qcom,mpm2-sleep-counter@4a3000 { - compatible = "qcom,mpm2-sleep-counter"; - reg = <0x4a3000 0x1000>; - clock-frequency = <32768>; - }; - - cpu-pmu { - compatible = "arm,armv8-pmuv3"; - interrupts = <1 7 0xff00>; - }; - - qcom,sps { - compatible = "qcom,msm_sps_4k"; - qcom,pipe-attr-ee; - }; - - tsens: tsens@4a8000 { - compatible = "qcom,msm8953-tsens"; - reg = <0x4a8000 0x2000>, - <0xa4000 0x1000>; - reg-names = "tsens_physical", "tsens_eeprom_physical"; - interrupts = <0 184 0>, <0 314 0>; - interrupt-names = "tsens-upper-lower", "tsens-critical"; - qcom,client-id = <1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>; - qcom,sensor-id = <1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>; - qcom,sensors = <15>; - qcom,slope = <3200 3200 3200 3200 3200 3200 3200 3200 - 3200 3200 3200 3200 3200 3200 3200>; - qcom,valid-status-check; - }; - - qcom,sensor-information { - compatible = "qcom,sensor-information"; - sensor_information0: qcom,sensor-information-0 { - qcom,sensor-type = "tsens"; - qcom,sensor-name = "tsens_tz_sensor0"; - qcom,scaling-factor = <10>; - }; - - sensor_information1: qcom,sensor-information-1 { - qcom,sensor-type = "tsens"; - qcom,sensor-name = "tsens_tz_sensor1"; - qcom,scaling-factor = <10>; - }; - - sensor_information2: qcom,sensor-information-2 { - qcom,sensor-type = "tsens"; - qcom,sensor-name = "tsens_tz_sensor2"; - qcom,alias-name = "pop_mem"; - qcom,scaling-factor = <10>; - }; - - sensor_information3: qcom,sensor-information-3 { - qcom,sensor-type = "tsens"; - qcom,sensor-name = "tsens_tz_sensor3"; - qcom,scaling-factor = <10>; - }; - - sensor_information4: qcom,sensor-information-4 { - qcom,sensor-type = "tsens"; - qcom,sensor-name = "tsens_tz_sensor4"; - qcom,scaling-factor = <10>; - }; - - sensor_information5: qcom,sensor-information-5 { - qcom,sensor-type = "tsens"; - qcom,sensor-name = "tsens_tz_sensor5"; - qcom,scaling-factor = <10>; - }; - - sensor_information6: qcom,sensor-information-6 { - qcom,sensor-type = "tsens"; - qcom,sensor-name = "tsens_tz_sensor6"; - qcom,scaling-factor = <10>; - }; - - sensor_information7: qcom,sensor-information-7 { - qcom,sensor-type = "tsens"; - qcom,sensor-name = "tsens_tz_sensor7"; - qcom,scaling-factor = <10>; - }; - - sensor_information8: qcom,sensor-information-8 { - qcom,sensor-type = "tsens"; - qcom,sensor-name = "tsens_tz_sensor8"; - qcom,scaling-factor = <10>; - qcom,alias-name = "L2_cache_1"; - }; - - sensor_information9: qcom,sensor-information-9 { - qcom,sensor-type = "tsens"; - qcom,sensor-name = "tsens_tz_sensor9"; - qcom,scaling-factor = <10>; - }; - - sensor_information10: qcom,sensor-information-10 { - qcom,sensor-type = "tsens"; - qcom,sensor-name = "tsens_tz_sensor10"; - qcom,scaling-factor = <10>; - }; - - sensor_information11: qcom,sensor-information-11 { - qcom,sensor-type = "tsens"; - qcom,sensor-name = "tsens_tz_sensor11"; - qcom,scaling-factor = <10>; - }; - - sensor_information12: qcom,sensor-information-12 { - qcom,sensor-type = "tsens"; - qcom,sensor-name = "tsens_tz_sensor12"; - qcom,scaling-factor = <10>; - }; - - sensor_information13: qcom,sensor-information-13 { - qcom,sensor-type = "tsens"; - qcom,sensor-name = "tsens_tz_sensor13"; - qcom,scaling-factor = <10>; - qcom,alias-name = "L2_cache_0"; - }; - - sensor_information14: qcom,sensor-information-14 { - qcom,sensor-type = "tsens"; - qcom,sensor-name = "tsens_tz_sensor14"; - qcom,scaling-factor = <10>; - }; - - sensor_information15: qcom,sensor-information-15 { - qcom,sensor-type = "tsens"; - qcom,sensor-name = "tsens_tz_sensor15"; - qcom,alias-name = "gpu"; - qcom,scaling-factor = <10>; - }; - - sensor_information16: qcom,sensor-information-16 { - qcom,sensor-type = "alarm"; - qcom,sensor-name = "pm8953_tz"; - qcom,scaling-factor = <1000>; - }; - - sensor_information17: qcom,sensor-information-17 { - qcom,sensor-type = "adc"; - qcom,sensor-name = "pa_therm0"; - }; - - sensor_information18: qcom,sensor-information-18 { - qcom,sensor-type = "adc"; - qcom,sensor-name = "pa_therm1"; - }; - - sensor_information19: qcom,sensor-information-19 { - qcom,sensor-type = "adc"; - qcom,sensor-name = "xo_therm"; - }; - - sensor_information20: qcom,sensor-information-20 { - qcom,sensor-type = "adc"; - qcom,sensor-name = "xo_therm_buf"; - }; - - sensor_information21: qcom,sensor-information-21 { - qcom,sensor-type = "adc"; - qcom,sensor-name = "case_therm"; - }; - }; - - mitigation_profile0: qcom,limit_info-0 { - qcom,temperature-sensor = <&sensor_information9>; - qcom,boot-frequency-mitigate; - qcom,hotplug-mitigation-enable; - qcom,emergency-frequency-mitigate; - }; - - mitigation_profile1: qcom,limit_info-1 { - qcom,temperature-sensor = <&sensor_information10>; - qcom,boot-frequency-mitigate; - qcom,hotplug-mitigation-enable; - qcom,emergency-frequency-mitigate; - }; - - mitigation_profile2: qcom,limit_info-2 { - qcom,temperature-sensor = <&sensor_information11>; - qcom,boot-frequency-mitigate; - qcom,hotplug-mitigation-enable; - qcom,emergency-frequency-mitigate; - }; - - mitigation_profile3: qcom,limit_info-3 { - qcom,temperature-sensor = <&sensor_information12>; - qcom,boot-frequency-mitigate; - qcom,hotplug-mitigation-enable; - qcom,emergency-frequency-mitigate; - }; - - mitigation_profile4: qcom,limit_info-4 { - qcom,temperature-sensor = <&sensor_information4>; - qcom,boot-frequency-mitigate; - qcom,hotplug-mitigation-enable; - qcom,emergency-frequency-mitigate; - }; - - mitigation_profile5: qcom,limit_info-5 { - qcom,temperature-sensor = <&sensor_information5>; - qcom,boot-frequency-mitigate; - qcom,hotplug-mitigation-enable; - qcom,emergency-frequency-mitigate; - }; - - mitigation_profile6: qcom,limit_info-6 { - qcom,temperature-sensor = <&sensor_information6>; - qcom,boot-frequency-mitigate; - qcom,hotplug-mitigation-enable; - qcom,emergency-frequency-mitigate; - }; - - mitigation_profile7: qcom,limit_info-7 { - qcom,temperature-sensor = <&sensor_information7>; - qcom,boot-frequency-mitigate; - qcom,hotplug-mitigation-enable; - qcom,emergency-frequency-mitigate; - }; - - qcom,msm-thermal { - compatible = "qcom,msm-thermal"; - qcom,sensor-id = <9>; - qcom,poll-ms = <250>; - qcom,limit-temp = <60>; - qcom,temp-hysteresis = <10>; - qcom,freq-step = <2>; - qcom,core-limit-temp = <80>; - qcom,core-temp-hysteresis = <10>; - qcom,hotplug-temp = <105>; - qcom,hotplug-temp-hysteresis = <15>; - qcom,freq-mitigation-temp = <105>; - qcom,freq-mitigation-temp-hysteresis = <15>; - qcom,freq-mitigation-value = <1036800>; - qcom,therm-reset-temp = <115>; - qcom,online-hotplug-core; - qcom,synchronous-cluster-id = <0 1>; - qcom,synchronous-cluster-map = <0 4 &CPU0 &CPU1 &CPU2 &CPU3>, - <1 4 &CPU4 &CPU5 &CPU6 &CPU7>; - qcom,disable-cx-phase-ctrl; - qcom,disable-gfx-phase-ctrl; - qcom,disable-vdd-mx; - qcom,disable-psm; - qcom,disable-ocr; - qcom,vdd-restriction-temp = <5>; - qcom,vdd-restriction-temp-hysteresis = <10>; - vdd-dig-supply = <&pm8953_s2_floor_level>; - vdd-gfx-supply = <&gfx_vreg_corner>; - - qcom,vdd-dig-rstr { - qcom,vdd-rstr-reg = "vdd-dig"; - qcom,levels = ; - qcom,min-level = ; - }; - - qcom,vdd-gfx-rstr { - qcom,vdd-rstr-reg = "vdd-gfx"; - qcom,levels = <5 7 7>; /* Nominal, Turbo, Turbo */ - qcom,min-level = <1>; /* No Request */ - }; - - msm_thermal_freq: qcom,vdd-apps-rstr { - qcom,vdd-rstr-reg = "vdd-apps"; - qcom,levels = <1689600>; - qcom,freq-req; - }; - }; - - qcom,bcl { - compatible = "qcom,bcl"; - qcom,bcl-enable; - qcom,bcl-framework-interface; - qcom,bcl-freq-control-list = <&CPU0 &CPU1 &CPU2 &CPU3 - &CPU4 &CPU5 &CPU6 &CPU7>; - qcom,bcl-hotplug-list = <&CPU6 &CPU7>; - qcom,bcl-soc-hotplug-list = <&CPU4 &CPU5 &CPU6 &CPU7>; - qcom,ibat-monitor { - qcom,low-threshold-uamp = <3400000>; - qcom,high-threshold-uamp = <4200000>; - qcom,mitigation-freq-khz = <1689600>; - qcom,vph-high-threshold-uv = <3500000>; - qcom,vph-low-threshold-uv = <3200000>; - qcom,soc-low-threshold = <10>; - qcom,thermal-handle = <&msm_thermal_freq>; - }; - }; - - qcom,msm-core@a0000 { - compatible = "qcom,apss-core-ea"; - reg = <0xa0000 0x1000>; - qcom,low-hyst-temp = <100>; - qcom,high-hyst-temp = <100>; - - ea0: ea0 { - sensor = <&sensor_information9>; - }; - - ea1: ea1 { - sensor = <&sensor_information10>; - }; - - ea2: ea2 { - sensor = <&sensor_information11>; - }; - - ea3: ea3 { - sensor = <&sensor_information12>; - }; - - ea4: ea4 { - sensor = <&sensor_information4>; - }; - - ea5: ea5 { - sensor = <&sensor_information5>; - }; - - ea6: ea6 { - sensor = <&sensor_information6>; - }; - - ea7: ea7 { - sensor = <&sensor_information7>; - }; - }; - - blsp1_uart0: serial@78af000 { - compatible = "qcom,msm-lsuart-v14"; - reg = <0x78af000 0x200>; - interrupts = <0 107 0>; - status = "disabled"; - clocks = <&clock_gcc clk_gcc_blsp1_uart1_apps_clk>, - <&clock_gcc clk_gcc_blsp1_ahb_clk>; - clock-names = "core_clk", "iface_clk"; - }; - - blsp1_uart1: uart@78b0000 { - compatible = "qcom,msm-hsuart-v14"; - reg = <0x78b0000 0x200>, - <0x7884000 0x1f000>; - reg-names = "core_mem", "bam_mem"; - - interrupt-names = "core_irq", "bam_irq", "wakeup_irq"; - #address-cells = <0>; - interrupt-parent = <&blsp1_uart1>; - interrupts = <0 1 2>; - #interrupt-cells = <1>; - interrupt-map-mask = <0xffffffff>; - interrupt-map = <0 &intc 0 108 0 - 1 &intc 0 238 0 - 2 &tlmm 13 0>; - - qcom,inject-rx-on-wakeup; - qcom,rx-char-to-inject = <0xFD>; - qcom,master-id = <86>; - clock-names = "core_clk", "iface_clk"; - clocks = <&clock_gcc clk_gcc_blsp1_uart2_apps_clk>, - <&clock_gcc clk_gcc_blsp1_ahb_clk>; - pinctrl-names = "sleep", "default"; - pinctrl-0 = <&hsuart_sleep>; - pinctrl-1 = <&hsuart_active>; - qcom,bam-tx-ep-pipe-index = <2>; - qcom,bam-rx-ep-pipe-index = <3>; - qcom,msm-bus,name = "blsp1_uart1"; - qcom,msm-bus,num-cases = <2>; - qcom,msm-bus,num-paths = <1>; - qcom,msm-bus,vectors-KBps = - <86 512 0 0>, - <86 512 500 800>; - status = "disabled"; - }; - - blsp2_uart0: uart@7aef000 { - compatible = "qcom,msm-hsuart-v14"; - reg = <0x7aef000 0x200>, - <0x7ac4000 0x1f000>; - reg-names = "core_mem", "bam_mem"; - - interrupt-names = "core_irq", "bam_irq", "wakeup_irq"; - #address-cells = <0>; - interrupt-parent = <&blsp2_uart0>; - interrupts = <0 1 2>; - #interrupt-cells = <1>; - interrupt-map-mask = <0xffffffff>; - interrupt-map = <0 &intc 0 306 0 - 1 &intc 0 239 0 - 2 &tlmm 17 0>; - - qcom,inject-rx-on-wakeup; - qcom,rx-char-to-inject = <0xFD>; - qcom,master-id = <84>; - clock-names = "core_clk", "iface_clk"; - clocks = <&clock_gcc clk_gcc_blsp2_uart1_apps_clk>, - <&clock_gcc clk_gcc_blsp2_ahb_clk>; - pinctrl-names = "sleep", "default"; - pinctrl-0 = <&blsp2_uart0_sleep>; - pinctrl-1 = <&blsp2_uart0_active>; - qcom,bam-tx-ep-pipe-index = <0>; - qcom,bam-rx-ep-pipe-index = <1>; - qcom,msm-bus,name = "blsp2_uart0"; - qcom,msm-bus,num-cases = <2>; - qcom,msm-bus,num-paths = <1>; - qcom,msm-bus,vectors-KBps = - <84 512 0 0>, - <84 512 500 800>; - status = "disabled"; - }; - - dma_blsp1: qcom,sps-dma@7884000 { /* BLSP1 */ - #dma-cells = <4>; - compatible = "qcom,sps-dma"; - reg = <0x7884000 0x1f000>; - interrupts = <0 238 0>; - qcom,summing-threshold = <10>; - }; - - dma_blsp2: qcom,sps-dma@7ac4000 { /* BLSP2 */ - #dma-cells = <4>; - compatible = "qcom,sps-dma"; - reg = <0x7ac4000 0x1f000>; - interrupts = <0 239 0>; - qcom,summing-threshold = <10>; - }; - - spi_3: spi@78b7000 { /* BLSP1 QUP3 */ - compatible = "qcom,spi-qup-v2"; - #address-cells = <1>; - #size-cells = <0>; - reg-names = "spi_physical", "spi_bam_physical"; - reg = <0x78b7000 0x600>, - <0x7884000 0x1f000>; - interrupt-names = "spi_irq", "spi_bam_irq"; - interrupts = <0 97 0>, <0 238 0>; - spi-max-frequency = <19200000>; - pinctrl-names = "spi_default", "spi_sleep"; - pinctrl-0 = <&spi3_default &spi3_cs0_active>; - pinctrl-1 = <&spi3_sleep &spi3_cs0_sleep>; - clocks = <&clock_gcc clk_gcc_blsp1_ahb_clk>, - <&clock_gcc clk_gcc_blsp1_qup3_spi_apps_clk>; - clock-names = "iface_clk", "core_clk"; - qcom,infinite-mode = <0>; - qcom,use-bam; - qcom,use-pinctrl; - qcom,ver-reg-exists; - qcom,bam-consumer-pipe-index = <8>; - qcom,bam-producer-pipe-index = <9>; - qcom,master-id = <86>; - }; - - spi_6: spi@7af6000 { /* BLSP2 QUP2 */ - compatible = "qcom,spi-qup-v2"; - #address-cells = <1>; - #size-cells = <0>; - reg-names = "spi_physical", "spi_bam_physical"; - reg = <0x7af6000 0x600>, - <0x7ac4000 0x1f000>; - interrupt-names = "spi_irq", "spi_bam_irq"; - interrupts = <0 300 0>, <0 239 0>; - spi-max-frequency = <50000000>; - pinctrl-names = "spi_default", "spi_sleep"; - pinctrl-0 = <&spi6_default &spi6_cs0_active>; - pinctrl-1 = <&spi6_sleep &spi6_cs0_sleep>; - clocks = <&clock_gcc clk_gcc_blsp2_ahb_clk>, - <&clock_gcc clk_gcc_blsp2_qup2_spi_apps_clk>; - clock-names = "iface_clk", "core_clk"; - qcom,infinite-mode = <0>; - qcom,use-bam; - qcom,use-pinctrl; - qcom,ver-reg-exists; - qcom,bam-consumer-pipe-index = <6>; - qcom,bam-producer-pipe-index = <7>; - qcom,master-id = <84>; - }; - - i2c_2: i2c@78b6000 { /* BLSP1 QUP2 */ - compatible = "qcom,i2c-msm-v2"; - #address-cells = <1>; - #size-cells = <0>; - reg-names = "qup_phys_addr"; - reg = <0x78b6000 0x600>; - interrupt-names = "qup_irq"; - interrupts = <0 96 0>; - qcom,clk-freq-out = <400000>; - qcom,clk-freq-in = <19200000>; - clock-names = "iface_clk", "core_clk"; - clocks = <&clock_gcc clk_gcc_blsp1_ahb_clk>, - <&clock_gcc clk_gcc_blsp1_qup2_i2c_apps_clk>; - - pinctrl-names = "i2c_active", "i2c_sleep"; - pinctrl-0 = <&i2c_2_active>; - pinctrl-1 = <&i2c_2_sleep>; - qcom,noise-rjct-scl = <0>; - qcom,noise-rjct-sda = <0>; - qcom,master-id = <86>; - dmas = <&dma_blsp1 6 64 0x20000020 0x20>, - <&dma_blsp1 7 32 0x20000020 0x20>; - dma-names = "tx", "rx"; - - /* DSI_TO_HDMI I2C configuration */ - adv7533@39 { - compatible = "adv7533"; - reg = <0x39>; - instance_id = <0>; - adi,video-mode = <3>; /* 3 = 1080p */ - adi,main-addr = <0x39>; - adi,cec-dsi-addr = <0x3C>; - adi,enable-audio; - pinctrl-names = "pmx_adv7533_active", - "pmx_adv7533_suspend"; - pinctrl-0 = <&adv7533_int_active>; - pinctrl-1 = <&adv7533_int_suspend>; - adi,irq-gpio = <&tlmm 90 0x2002>; - hpd-5v-en-supply = <&adv_vreg>; - qcom,supply-names = "hpd-5v-en"; - qcom,min-voltage-level = <0>; - qcom,max-voltage-level = <0>; - qcom,enable-load = <0>; - qcom,disable-load = <0>; - }; - }; - - i2c_3: i2c@78b7000 { /* BLSP1 QUP3 */ - compatible = "qcom,i2c-msm-v2"; - #address-cells = <1>; - #size-cells = <0>; - reg-names = "qup_phys_addr"; - reg = <0x78b7000 0x600>; - interrupt-names = "qup_irq"; - interrupts = <0 97 0>; - qcom,clk-freq-out = <400000>; - qcom,clk-freq-in = <19200000>; - clock-names = "iface_clk", "core_clk"; - clocks = <&clock_gcc clk_gcc_blsp1_ahb_clk>, - <&clock_gcc clk_gcc_blsp1_qup3_i2c_apps_clk>; - - pinctrl-names = "i2c_active", "i2c_sleep"; - pinctrl-0 = <&i2c_3_active>; - pinctrl-1 = <&i2c_3_sleep>; - qcom,noise-rjct-scl = <0>; - qcom,noise-rjct-sda = <0>; - qcom,master-id = <86>; - dmas = <&dma_blsp1 8 64 0x20000020 0x20>, - <&dma_blsp1 9 32 0x20000020 0x20>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - i2c_5: i2c@7af5000 { /* BLSP2 QUP1 */ - compatible = "qcom,i2c-msm-v2"; - #address-cells = <1>; - #size-cells = <0>; - reg-names = "qup_phys_addr"; - reg = <0x7af5000 0x600>; - interrupt-names = "qup_irq"; - interrupts = <0 299 0>; - qcom,clk-freq-out = <400000>; - qcom,clk-freq-in = <19200000>; - clock-names = "iface_clk", "core_clk"; - clocks = <&clock_gcc clk_gcc_blsp2_ahb_clk>, - <&clock_gcc clk_gcc_blsp2_qup1_i2c_apps_clk>; - - pinctrl-names = "i2c_active", "i2c_sleep"; - pinctrl-0 = <&i2c_5_active>; - pinctrl-1 = <&i2c_5_sleep>; - qcom,noise-rjct-scl = <0>; - qcom,noise-rjct-sda = <0>; - qcom,master-id = <84>; - dmas = <&dma_blsp2 4 64 0x20000020 0x20>, - <&dma_blsp2 5 32 0x20000020 0x20>; - dma-names = "tx", "rx"; - }; - - slim_msm: slim@c140000{ - cell-index = <1>; - compatible = "qcom,slim-ngd"; - reg = <0xc140000 0x2c000>, - <0xc104000 0x2a000>; - reg-names = "slimbus_physical", "slimbus_bam_physical"; - interrupts = <0 163 0>, <0 180 0>; - interrupt-names = "slimbus_irq", "slimbus_bam_irq"; - qcom,apps-ch-pipes = <0x600000>; - qcom,ea-pc = <0x200>; - status = "disabled"; - }; - - dcc: dcc@b3000 { - compatible = "qcom,dcc"; - reg = <0xb3000 0x1000>, - <0xb4000 0x800>; - reg-names = "dcc-base", "dcc-ram-base"; - - clocks = <&clock_gcc clk_gcc_dcc_clk>; - clock-names = "dcc_clk"; - - qcom,save-reg; - }; - - clock_gcc: qcom,gcc@1800000 { - compatible = "qcom,gcc-8953"; - reg = <0x1800000 0x80000>, - <0x00a4124 0x08>; - reg-names = "cc_base", "efuse"; - vdd_dig-supply = <&pm8953_s2_level>; - #clock-cells = <1>; - }; - - clock_gcc_mdss: qcom,gcc-mdss@1800000 { - compatible = "qcom,gcc-mdss-8953"; - reg = <0x1800000 0x80000>; - reg-names = "cc_base"; - clock-names = "pclk0_src", "pclk1_src", - "byte0_src", "byte1_src"; - clocks = <&mdss_dsi0_pll clk_dsi0pll_pixel_clk_mux>, - <&mdss_dsi1_pll clk_dsi1pll_pixel_clk_mux>, - <&mdss_dsi0_pll clk_dsi0pll_byte_clk_mux>, - <&mdss_dsi1_pll clk_dsi1pll_byte_clk_mux>; - #clock-cells = <1>; - }; - - clock_debug: qcom,cc-debug@1874000 { - compatible = "qcom,cc-debug-8953"; - reg = <0x1874000 0x4>; - reg-names = "cc_base"; - clocks = <&clock_cpu clk_cpu_debug_pri_mux>; - clock-names = "debug_cpu_clk"; - #clock-cells = <1>; - }; - - clock_gcc_gfx: qcom,gcc-gfx@1800000 { - compatible = "qcom,gcc-gfx-8953"; - reg = <0x1800000 0x80000>; - reg-names = "cc_base"; - vdd_gfx-supply = <&gfx_vreg_corner>; - qcom,gfxfreq-corner = - < 0 0 >, - < 133330000 1 >, /* Min SVS */ - < 216000000 2 >, /* Low SVS */ - < 320000000 3 >, /* SVS */ - < 400000000 4 >, /* SVS Plus */ - < 510000000 5 >, /* NOM */ - < 560000000 6 >, /* Nom Plus */ - < 650000000 7 >; /* Turbo */ - #clock-cells = <1>; - }; - - clock_cpu: qcom,cpu-clock-8953@b116000 { - compatible = "qcom,cpu-clock-8953"; - reg = <0xb114000 0x68>, - <0xb014000 0x68>, - <0xb116000 0x400>, - <0xb111050 0x08>, - <0xb011050 0x08>, - <0xb1d1050 0x08>, - <0x00a4124 0x08>; - reg-names = "rcgwr-c0-base", "rcgwr-c1-base", - "c0-pll", "c0-mux", "c1-mux", - "cci-mux", "efuse"; - vdd-mx-supply = <&pm8953_s7_level_ao>; - vdd-cl-supply = <&apc_vreg>; - clocks = <&clock_gcc clk_xo_a_clk_src>; - clock-names = "xo_a"; - qcom,num-clusters = <2>; - qcom,speed0-bin-v0-cl = - < 0 0>, - < 652800000 1>, - < 1036800000 2>, - < 1401600000 3>, - < 1689600000 4>, - < 1804800000 5>, - < 1958400000 6>, - < 2016000000 7>; - qcom,speed0-bin-v0-cci = - < 0 0>, - < 261120000 1>, - < 414720000 2>, - < 560640000 3>, - < 675840000 4>, - < 721920000 5>, - < 783360000 6>, - < 806400000 7>; - qcom,speed2-bin-v0-cl = - < 0 0>, - < 652800000 1>, - < 1036800000 2>, - < 1401600000 3>, - < 1689600000 4>, - < 1804800000 5>, - < 1958400000 6>, - < 2016000000 7>; - qcom,speed2-bin-v0-cci = - < 0 0>, - < 261120000 1>, - < 414720000 2>, - < 560640000 3>, - < 675840000 4>, - < 721920000 5>, - < 783360000 6>, - < 806400000 7>; - qcom,speed7-bin-v0-cl = - < 0 0>, - < 652800000 1>, - < 1036800000 2>, - < 1401600000 3>, - < 1689600000 4>, - < 1804800000 5>, - < 1958400000 6>, - < 2016000000 7>, - < 2150400000 8>, - < 2208000000 9>; - qcom,speed7-bin-v0-cci = - < 0 0>, - < 261120000 1>, - < 414720000 2>, - < 560640000 3>, - < 675840000 4>, - < 721920000 5>, - < 783360000 6>, - < 806400000 7>, - < 860160000 8>, - < 883200000 9>; - qcom,speed6-bin-v0-cl = - < 0 0>, - < 652800000 1>, - < 1036800000 2>, - < 1401600000 3>, - < 1689600000 4>, - < 1804800000 5>; - qcom,speed6-bin-v0-cci = - < 0 0>, - < 261120000 1>, - < 414720000 2>, - < 560640000 3>, - < 675840000 4>, - < 721920000 5>; - #clock-cells = <1>; - }; - - msm_cpufreq: qcom,msm-cpufreq { - compatible = "qcom,msm-cpufreq"; - clock-names = "l2_clk", "cpu0_clk", "cpu1_clk", "cpu2_clk", - "cpu3_clk", "cpu4_clk", "cpu5_clk", - "cpu6_clk", "cpu7_clk"; - clocks = <&clock_cpu clk_cci_clk>, - <&clock_cpu clk_a53_pwr_clk>, - <&clock_cpu clk_a53_pwr_clk>, - <&clock_cpu clk_a53_pwr_clk>, - <&clock_cpu clk_a53_pwr_clk>, - <&clock_cpu clk_a53_pwr_clk>, - <&clock_cpu clk_a53_pwr_clk>, - <&clock_cpu clk_a53_pwr_clk>, - <&clock_cpu clk_a53_pwr_clk>; - - qcom,cpufreq-table = - < 652800 >, - < 1036800 >, - < 1401600 >, - < 1689600 >, - < 1804800 >, - < 1958400 >, - < 2016000 >, - < 2150400 >, - < 2208000 >; - }; - - cpubw: qcom,cpubw { - compatible = "qcom,devbw"; - governor = "cpufreq"; - qcom,src-dst-ports = <1 512>; - qcom,active-only; - qcom,bw-tbl = - < 769 /* 100.8 MHz */ >, - < 1611 /* 211.2 MHz */ >, /*Low SVS*/ - < 2124 /* 278.4 MHz */ >, - < 2929 /* 384 MHz */ >, - < 3221 /* 422.4 MHz */ >, /* SVS */ - < 4248 /* 556.8 MHz */ >, - < 5126 /* 672 MHz */ >, - < 5859 /* 768 MHz */ >, /* SVS+ */ - < 6152 /* 806.4 MHz */ >, - < 6445 /* 844.8 MHz */ >, /* NOM */ - < 7104 /* 931.2 MHz */ >; /* TURBO */ - }; - - mincpubw: qcom,mincpubw { - compatible = "qcom,devbw"; - governor = "cpufreq"; - qcom,src-dst-ports = <1 512>; - qcom,active-only; - qcom,bw-tbl = - < 769 /* 100.8 MHz */ >, - < 1611 /* 211.2 MHz */ >, /*Low SVS*/ - < 2124 /* 278.4 MHz */ >, - < 2929 /* 384 MHz */ >, - < 3221 /* 422.4 MHz */ >, /* SVS */ - < 4248 /* 556.8 MHz */ >, - < 5126 /* 672 MHz */ >, - < 5859 /* 768 MHz */ >, /* SVS+ */ - < 6152 /* 806.4 MHz */ >, - < 6445 /* 844.8 MHz */ >, /* NOM */ - < 7104 /* 931.2 MHz */ >; /* TURBO */ - }; - - qcom,cpu-bwmon { - compatible = "qcom,bimc-bwmon2"; - reg = <0x408000 0x300>, <0x401000 0x200>; - reg-names = "base", "global_base"; - interrupts = <0 183 4>; - qcom,mport = <0>; - qcom,target-dev = <&cpubw>; - }; - - devfreq-cpufreq { - cpubw-cpufreq { - target-dev = <&cpubw>; - cpu-to-dev-map = - < 652800 1611>, - < 1036800 3221>, - < 1401600 5859>, - < 1689600 6445>, - < 1804800 7104>, - < 1958400 7104>, - < 2208000 7104>; - }; - - mincpubw-cpufreq { - target-dev = <&mincpubw>; - cpu-to-dev-map = - < 652800 1611 >, - < 1401600 3221 >, - < 2208000 5859 >; - }; - }; - - rpm_bus: qcom,rpm-smd { - compatible = "qcom,rpm-smd"; - rpm-channel-name = "rpm_requests"; - rpm-channel-type = <15>; /* SMD_APPS_RPM */ - }; - - qcom,ipc-spinlock@1905000 { - compatible = "qcom,ipc-spinlock-sfpb"; - reg = <0x1905000 0x8000>; - qcom,num-locks = <8>; - }; - - qcom,smem@86300000 { - compatible = "qcom,smem"; - reg = <0x86300000 0x100000>, - <0x0b011008 0x4>, - <0x60000 0x8000>, - <0x193d000 0x8>; - reg-names = "smem", "irq-reg-base", - "aux-mem1", "smem_targ_info_reg"; - qcom,mpu-enabled; - - qcom,smd-modem { - compatible = "qcom,smd"; - qcom,smd-edge = <0>; - qcom,smd-irq-offset = <0x0>; - qcom,smd-irq-bitmask = <0x1000>; - interrupts = <0 25 1>; - label = "modem"; - qcom,not-loadable; - }; - - qcom,smsm-modem { - compatible = "qcom,smsm"; - qcom,smsm-edge = <0>; - qcom,smsm-irq-offset = <0x0>; - qcom,smsm-irq-bitmask = <0x2000>; - interrupts = <0 26 1>; - }; - - qcom,smd-wcnss { - compatible = "qcom,smd"; - qcom,smd-edge = <6>; - qcom,smd-irq-offset = <0x0>; - qcom,smd-irq-bitmask = <0x20000>; - interrupts = <0 142 1>; - label = "wcnss"; - }; - - qcom,smsm-wcnss { - compatible = "qcom,smsm"; - qcom,smsm-edge = <6>; - qcom,smsm-irq-offset = <0x0>; - qcom,smsm-irq-bitmask = <0x80000>; - interrupts = <0 144 1>; - }; - - qcom,smd-adsp { - compatible = "qcom,smd"; - qcom,smd-edge = <1>; - qcom,smd-irq-offset = <0x0>; - qcom,smd-irq-bitmask = <0x100>; - interrupts = <0 289 1>; - label = "adsp"; - }; - - qcom,smsm-adsp { - compatible = "qcom,smsm"; - qcom,smsm-edge = <1>; - qcom,smsm-irq-offset = <0x0>; - qcom,smsm-irq-bitmask = <0x200>; - interrupts = <0 290 1>; - }; - - qcom,smd-rpm { - compatible = "qcom,smd"; - qcom,smd-edge = <15>; - qcom,smd-irq-offset = <0x0>; - qcom,smd-irq-bitmask = <0x1>; - interrupts = <0 168 1>; - label = "rpm"; - qcom,irq-no-suspend; - qcom,not-loadable; - }; - }; - - qcom,wdt@b017000 { - compatible = "qcom,msm-watchdog"; - reg = <0xb017000 0x1000>; - reg-names = "wdt-base"; - interrupts = <0 3 0>, <0 4 0>; - qcom,bark-time = <11000>; - qcom,pet-time = <10000>; - qcom,ipi-ping; - qcom,wakeup-enable; - }; - - qcom,chd { - compatible = "qcom,core-hang-detect"; - qcom,threshold-arr = <0xb1880b0 0xb1980b0 0xb1a80b0 - 0xb1b80b0 0xb0880b0 0xb0980b0 0xb0a80b0 0xb0b80b0>; - qcom,config-arr = <0xb1880b8 0xb1980b8 0xb1a80b8 - 0xb1b80b8 0xb0880b8 0xb0980b8 0xb0a80b8 0xb0b80b8>; - }; - - qcom,msm-rtb { - compatible = "qcom,msm-rtb"; - qcom,rtb-size = <0x100000>; - }; - - qcom,msm-imem@8600000 { - compatible = "qcom,msm-imem"; - reg = <0x08600000 0x1000>; - ranges = <0x0 0x08600000 0x1000>; - #address-cells = <1>; - #size-cells = <1>; - - mem_dump_table@10 { - compatible = "qcom,msm-imem-mem_dump_table"; - reg = <0x10 8>; - }; - - dload_type@18 { - compatible = "qcom,msm-imem-dload-type"; - reg = <0x18 4>; - }; - - restart_reason@65c { - compatible = "qcom,msm-imem-restart_reason"; - reg = <0x65c 4>; - }; - - boot_stats@6b0 { - compatible = "qcom,msm-imem-boot_stats"; - reg = <0x6b0 32>; - }; - - pil@94c { - compatible = "qcom,msm-imem-pil"; - reg = <0x94c 200>; - - }; - }; - - qcom,memshare { - compatible = "qcom,memshare"; - - qcom,client_1 { - compatible = "qcom,memshare-peripheral"; - qcom,peripheral-size = <0x200000>; - qcom,client-id = <0>; - qcom,allocate-boot-time; - label = "modem"; - }; - - qcom,client_2 { - compatible = "qcom,memshare-peripheral"; - qcom,peripheral-size = <0x300000>; - qcom,client-id = <2>; - label = "modem"; - }; - - mem_client_3_size: qcom,client_3 { - compatible = "qcom,memshare-peripheral"; - qcom,peripheral-size = <0x0>; - qcom,client-id = <1>; - label = "modem"; - }; - }; - - jtag_fuse: jtagfuse@a601c { - compatible = "qcom,jtag-fuse-v2"; - reg = <0xa601c 0x8>; - reg-names = "fuse-base"; - }; - - sn_fuse: snfuse@0xa4128 { - compatible = "qcom,sn-fuse"; - reg = <0xa4128 0x4>; - reg-names = "sn-base"; - }; - - jtag_mm0: jtagmm@619c000 { - compatible = "qcom,jtagv8-mm"; - reg = <0x619c000 0x1000>, - <0x6190000 0x1000>; - reg-names = "etm-base", "debug-base"; - - qcom,coresight-jtagmm-cpu = <&CPU0>; - - clocks = <&clock_gcc clk_qdss_clk>, - <&clock_gcc clk_qdss_a_clk>; - clock-names = "core_clk", "core_a_clk"; - }; - - jtag_mm1: jtagmm@619d000 { - compatible = "qcom,jtagv8-mm"; - reg = <0x619d000 0x1000>, - <0x6192000 0x1000>; - reg-names = "etm-base", "debug-base"; - - qcom,coresight-jtagmm-cpu = <&CPU1>; - - clocks = <&clock_gcc clk_qdss_clk>, - <&clock_gcc clk_qdss_a_clk>; - clock-names = "core_clk", "core_a_clk"; - }; - - jtag_mm2: jtagmm@619e000 { - compatible = "qcom,jtagv8-mm"; - reg = <0x619e000 0x1000>, - <0x6194000 0x1000>; - reg-names = "etm-base", "debug-base"; - - qcom,coresight-jtagmm-cpu = <&CPU2>; - - clocks = <&clock_gcc clk_qdss_clk>, - <&clock_gcc clk_qdss_a_clk>; - clock-names = "core_clk", "core_a_clk"; - }; - - jtag_mm3: jtagmm@619f000 { - compatible = "qcom,jtagv8-mm"; - reg = <0x619f000 0x1000>, - <0x6196000 0x1000>; - reg-names = "etm-base", "debug-base"; - - qcom,coresight-jtagmm-cpu = <&CPU3>; - - clocks = <&clock_gcc clk_qdss_clk>, - <&clock_gcc clk_qdss_a_clk>; - clock-names = "core_clk", "core_a_clk"; - }; - - jtag_mm4: jtagmm@61bc000 { - compatible = "qcom,jtagv8-mm"; - reg = <0x61bc000 0x1000>, - <0x61b0000 0x1000>; - reg-names = "etm-base", "debug-base"; - - qcom,coresight-jtagmm-cpu = <&CPU4>; - - clocks = <&clock_gcc clk_qdss_clk>, - <&clock_gcc clk_qdss_a_clk>; - clock-names = "core_clk", "core_a_clk"; - }; - - jtag_mm5: jtagmm@61bd000 { - compatible = "qcom,jtagv8-mm"; - reg = <0x61bd000 0x1000>, - <0x61b2000 0x1000>; - reg-names = "etm-base", "debug-base"; - - qcom,coresight-jtagmm-cpu = <&CPU5>; - - clocks = <&clock_gcc clk_qdss_clk>, - <&clock_gcc clk_qdss_a_clk>; - clock-names = "core_clk", "core_a_clk"; - }; - - jtag_mm6: jtagmm@61be000 { - compatible = "qcom,jtagv8-mm"; - reg = <0x61be000 0x1000>, - <0x61b4000 0x1000>; - reg-names = "etm-base", "debug-base"; - - qcom,coresight-jtagmm-cpu = <&CPU6>; - - clocks = <&clock_gcc clk_qdss_clk>, - <&clock_gcc clk_qdss_a_clk>; - clock-names = "core_clk", "core_a_clk"; - }; - - jtag_mm7: jtagmm@61bf000 { - compatible = "qcom,jtagv8-mm"; - reg = <0x61bf000 0x1000>, - <0x61b6000 0x1000>; - reg-names = "etm-base", "debug-base"; - - qcom,coresight-jtagmm-cpu = <&CPU7>; - - clocks = <&clock_gcc clk_qdss_clk>, - <&clock_gcc clk_qdss_a_clk>; - clock-names = "core_clk", "core_a_clk"; - }; - - ipa_hw: qcom,ipa@07900000 { - compatible = "qcom,ipa"; - reg = <0x07900000 0x4effc>, <0x07904000 0x26934>; - reg-names = "ipa-base", "bam-base"; - interrupts = <0 228 0>, - <0 230 0>; - interrupt-names = "ipa-irq", "bam-irq"; - qcom,ipa-hw-ver = <6>; /* IPA core version = IPAv2.6L */ - qcom,ipa-hw-mode = <0>; /* IPA hw type = Normal */ - qcom,wan-rx-ring-size = <192>; /* IPA WAN-rx-ring-size*/ - qcom,lan-rx-ring-size = <192>; /* IPA LAN-rx-ring-size*/ - clock-names = "core_clk"; - clocks = <&clock_gcc clk_ipa_clk>; - qcom,ee = <0>; - qcom,use-ipa-tethering-bridge; - qcom,modem-cfg-emb-pipe-flt; - qcom,msm-bus,name = "ipa"; - qcom,msm-bus,num-cases = <3>; - qcom,msm-bus,num-paths = <1>; - qcom,msm-bus,vectors-KBps = - <90 512 0 0>, /* No BIMC vote (ab=0 Mbps, ib=0 Mbps ~ 0MHZ) */ - <90 512 100000 800000>, /* SVS (ab=100, ib=800 ~ 50MHz) */ - <90 512 100000 1200000>; /* PERF (ab=100, ib=1200 ~ 75MHz) */ - qcom,bus-vector-names = "MIN", "SVS", "PERF"; - }; - - qcom,rmnet-ipa { - compatible = "qcom,rmnet-ipa"; - qcom,rmnet-ipa-ssr; - qcom,ipa-loaduC; - qcom,ipa-advertise-sg-support; - }; - - qcom,smdtty { - compatible = "qcom,smdtty"; - - smdtty_apps_fm: qcom,smdtty-apps-fm { - qcom,smdtty-remote = "wcnss"; - qcom,smdtty-port-name = "APPS_FM"; - }; - - smdtty_apps_riva_bt_acl: smdtty-apps-riva-bt-acl { - qcom,smdtty-remote = "wcnss"; - qcom,smdtty-port-name = "APPS_RIVA_BT_ACL"; - }; - - smdtty_apps_riva_bt_cmd: qcom,smdtty-apps-riva-bt-cmd { - qcom,smdtty-remote = "wcnss"; - qcom,smdtty-port-name = "APPS_RIVA_BT_CMD"; - }; - - smdtty_mbalbridge: qcom,smdtty-mbalbridge { - qcom,smdtty-remote = "modem"; - qcom,smdtty-port-name = "MBALBRIDGE"; - }; - - smdtty_apps_riva_ant_cmd: smdtty-apps-riva-ant-cmd { - qcom,smdtty-remote = "wcnss"; - qcom,smdtty-port-name = "APPS_RIVA_ANT_CMD"; - }; - - smdtty_apps_riva_ant_data: smdtty-apps-riva-ant-data { - qcom,smdtty-remote = "wcnss"; - qcom,smdtty-port-name = "APPS_RIVA_ANT_DATA"; - }; - - smdtty_data1: qcom,smdtty-data1 { - qcom,smdtty-remote = "modem"; - qcom,smdtty-port-name = "DATA1"; - }; - - smdtty_data4: qcom,smdtty-data4 { - qcom,smdtty-remote = "modem"; - qcom,smdtty-port-name = "DATA4"; - }; - - smdtty_data11: qcom,smdtty-data11 { - qcom,smdtty-remote = "modem"; - qcom,smdtty-port-name = "DATA11"; - }; - - smdtty_data21: qcom,smdtty-data21 { - qcom,smdtty-remote = "modem"; - qcom,smdtty-port-name = "DATA21"; - }; - - smdtty_loopback: smdtty-loopback { - qcom,smdtty-remote = "modem"; - qcom,smdtty-port-name = "LOOPBACK"; - qcom,smdtty-dev-name = "LOOPBACK_TTY"; - }; - }; - - qcom,smdpkt { - compatible = "qcom,smdpkt"; - - qcom,smdpkt-data5-cntl { - qcom,smdpkt-remote = "modem"; - qcom,smdpkt-port-name = "DATA5_CNTL"; - qcom,smdpkt-dev-name = "smdcntl0"; - }; - - qcom,smdpkt-data22 { - qcom,smdpkt-remote = "modem"; - qcom,smdpkt-port-name = "DATA22"; - qcom,smdpkt-dev-name = "smd22"; - }; - - qcom,smdpkt-data40-cntl { - qcom,smdpkt-remote = "modem"; - qcom,smdpkt-port-name = "DATA40_CNTL"; - qcom,smdpkt-dev-name = "smdcntl8"; - }; - - qcom,smdpkt-apr-apps2 { - qcom,smdpkt-remote = "adsp"; - qcom,smdpkt-port-name = "apr_apps2"; - qcom,smdpkt-dev-name = "apr_apps2"; - }; - - qcom,smdpkt-loopback { - qcom,smdpkt-remote = "modem"; - qcom,smdpkt-port-name = "LOOPBACK"; - qcom,smdpkt-dev-name = "smd_pkt_loopback"; - }; - }; - - qcom,iris-fm { - compatible = "qcom,iris_fm"; - }; - - qcom,wcnss-wlan@0a000000 { - compatible = "qcom,wcnss_wlan"; - reg = <0x0a000000 0x280000>, - <0x0b011008 0x04>, - <0x0a21b000 0x3000>, - <0x03204000 0x00000100>, - <0x03200800 0x00000200>, - <0x0a100400 0x00000200>, - <0x0a205050 0x00000200>, - <0x0a219000 0x00000020>, - <0x0a080488 0x00000008>, - <0x0a080fb0 0x00000008>, - <0x0a08040c 0x00000008>, - <0x0a0120a8 0x00000008>, - <0x0a012448 0x00000008>, - <0x0a080c00 0x00000001>; - - reg-names = "wcnss_mmio", "wcnss_fiq", - "pronto_phy_base", "riva_phy_base", - "riva_ccu_base", "pronto_a2xb_base", - "pronto_ccpu_base", "pronto_saw2_base", - "wlan_tx_phy_aborts","wlan_brdg_err_source", - "wlan_tx_status", "alarms_txctl", - "alarms_tactl", "pronto_mcu_base"; - - interrupts = <0 145 0 0 146 0>; - interrupt-names = "wcnss_wlantx_irq", "wcnss_wlanrx_irq"; - - qcom,pronto-vddmx-supply = <&pm8953_s7_level_ao>; - qcom,pronto-vddcx-supply = <&pm8953_s2_level>; - qcom,pronto-vddpx-supply = <&pm8953_l5>; - qcom,iris-vddxo-supply = <&pm8953_l7>; - qcom,iris-vddrfa-supply = <&pm8953_l19>; - qcom,iris-vddpa-supply = <&pm8953_l9>; - qcom,iris-vdddig-supply = <&pm8953_l5>; - - qcom,iris-vddxo-voltage-level = <1800000 0 1800000>; - qcom,iris-vddrfa-voltage-level = <1380000 0 1380000>; - qcom,iris-vddpa-voltage-level = <3300000 0 3300000>; - qcom,iris-vdddig-voltage-level = <1800000 0 1800000>; - - qcom,vddmx-voltage-level = ; - qcom,vddcx-voltage-level = ; - qcom,vddpx-voltage-level = <1800000 0 1800000>; - - qcom,iris-vddxo-current = <10000>; - qcom,iris-vddrfa-current = <100000>; - qcom,iris-vddpa-current = <515000>; - qcom,iris-vdddig-current = <10000>; - - qcom,pronto-vddmx-current = <0>; - qcom,pronto-vddcx-current = <0>; - qcom,pronto-vddpx-current = <0>; - - pinctrl-names = "wcnss_default", "wcnss_sleep", - "wcnss_gpio_default"; - pinctrl-0 = <&wcnss_default>; - pinctrl-1 = <&wcnss_sleep>; - pinctrl-2 = <&wcnss_gpio_default>; - - gpios = <&tlmm 76 0>, <&tlmm 77 0>, <&tlmm 78 0>, - <&tlmm 79 0>, <&tlmm 80 0>; - - clocks = <&clock_gcc clk_xo_wlan_clk>, - <&clock_gcc clk_rf_clk2>, - <&clock_debug clk_gcc_debug_mux>, - <&clock_gcc clk_wcnss_m_clk>; - - clock-names = "xo", "rf_clk", "measure", "wcnss_debug"; - - qcom,has-autodetect-xo; - qcom,is-pronto-v3; - qcom,has-pronto-hw; - qcom,has-vsys-adc-channel; - qcom,has-a2xb-split-reg; - qcom,wcnss-adc_tm = <&pm8953_adc_tm>; - }; - - qcom_rng: qrng@e3000 { - compatible = "qcom,msm-rng"; - reg = <0xe3000 0x1000>; - qcom,msm-rng-iface-clk; - qcom,no-qrng-config; - qcom,msm-bus,name = "msm-rng-noc"; - qcom,msm-bus,num-cases = <2>; - qcom,msm-bus,num-paths = <1>; - qcom,msm-bus,vectors-KBps = - <1 618 0 0>, /* No vote */ - <1 618 0 800>; /* 100 MB/s */ - clocks = <&clock_gcc clk_gcc_prng_ahb_clk>; - clock-names = "iface_clk"; - }; - - qcom_tzlog: tz-log@08600720 { - compatible = "qcom,tz-log"; - reg = <0x08600720 0x2000>; - }; - - qcom_crypto: qcrypto@720000 { - compatible = "qcom,qcrypto"; - reg = <0x720000 0x20000>, - <0x704000 0x20000>; - reg-names = "crypto-base","crypto-bam-base"; - interrupts = <0 207 0>; - qcom,bam-pipe-pair = <2>; - qcom,ce-hw-instance = <0>; - qcom,ce-device = <0>; - qcom,ce-hw-shared; - qcom,clk-mgmt-sus-res; - qcom,msm-bus,name = "qcrypto-noc"; - qcom,msm-bus,num-cases = <2>; - qcom,msm-bus,num-paths = <1>; - qcom,msm-bus,vectors-KBps = - <55 512 0 0>, - <55 512 393600 393600>; - clocks = <&clock_gcc clk_crypto_clk_src>, - <&clock_gcc clk_gcc_crypto_clk>, - <&clock_gcc clk_gcc_crypto_ahb_clk>, - <&clock_gcc clk_gcc_crypto_axi_clk>; - clock-names = "core_clk_src", "core_clk", - "iface_clk", "bus_clk"; - qcom,use-sw-aes-cbc-ecb-ctr-algo; - qcom,use-sw-aes-xts-algo; - qcom,use-sw-aes-ccm-algo; - qcom,use-sw-ahash-algo; - qcom,use-sw-hmac-algo; - qcom,use-sw-aead-algo; - qcom,ce-opp-freq = <100000000>; - }; - - qcom_cedev: qcedev@720000 { - compatible = "qcom,qcedev"; - reg = <0x720000 0x20000>, - <0x704000 0x20000>; - reg-names = "crypto-base","crypto-bam-base"; - interrupts = <0 207 0>; - qcom,bam-pipe-pair = <1>; - qcom,ce-hw-instance = <0>; - qcom,ce-device = <0>; - qcom,ce-hw-shared; - qcom,msm-bus,name = "qcedev-noc"; - qcom,msm-bus,num-cases = <2>; - qcom,msm-bus,num-paths = <1>; - qcom,msm-bus,vectors-KBps = - <55 512 0 0>, - <55 512 393600 393600>; - clocks = <&clock_gcc clk_crypto_clk_src>, - <&clock_gcc clk_gcc_crypto_clk>, - <&clock_gcc clk_gcc_crypto_ahb_clk>, - <&clock_gcc clk_gcc_crypto_axi_clk>; - clock-names = "core_clk_src", "core_clk", - "iface_clk", "bus_clk"; - qcom,ce-opp-freq = <100000000>; - }; - - qcom_seecom: qseecom@84A00000 { - compatible = "qcom,qseecom"; - reg = <0x84A00000 0x1900000>; - reg-names = "secapp-region"; - qcom,hlos-num-ce-hw-instances = <1>; - qcom,hlos-ce-hw-instance = <0>; - qcom,qsee-ce-hw-instance = <0>; - qcom,disk-encrypt-pipe-pair = <2>; - qcom,support-fde; - qcom,msm-bus,name = "qseecom-noc"; - qcom,msm-bus,num-cases = <4>; - qcom,msm-bus,num-paths = <1>; - qcom,support-bus-scaling; - qcom,msm-bus,vectors-KBps = - <55 512 0 0>, - <55 512 0 0>, - <55 512 120000 1200000>, - <55 512 393600 3936000>; - clocks = <&clock_gcc clk_crypto_clk_src>, - <&clock_gcc clk_gcc_crypto_clk>, - <&clock_gcc clk_gcc_crypto_ahb_clk>, - <&clock_gcc clk_gcc_crypto_axi_clk>; - clock-names = "core_clk_src", "core_clk", - "iface_clk", "bus_clk"; - qcom,ce-opp-freq = <100000000>; - }; - - qcom,ipc_router { - compatible = "qcom,ipc_router"; - qcom,node-id = <1>; - }; - - qcom,ipc_router_modem_xprt { - compatible = "qcom,ipc_router_smd_xprt"; - qcom,ch-name = "IPCRTR"; - qcom,xprt-remote = "modem"; - qcom,xprt-linkid = <1>; - qcom,xprt-version = <1>; - qcom,fragmented-data; - qcom,disable-pil-loading; - }; - - qcom,ipc_router_q6_xprt { - compatible = "qcom,ipc_router_smd_xprt"; - qcom,ch-name = "IPCRTR"; - qcom,xprt-remote = "adsp"; - qcom,xprt-linkid = <1>; - qcom,xprt-version = <1>; - qcom,fragmented-data; - }; - - qcom,ipc_router_wcnss_xprt { - compatible = "qcom,ipc_router_smd_xprt"; - qcom,ch-name = "IPCRTR"; - qcom,xprt-remote = "wcnss"; - qcom,xprt-linkid = <1>; - qcom,xprt-version = <1>; - qcom,fragmented-data; - }; - - qcom,adsprpc-mem { - compatible = "qcom,msm-adsprpc-mem-region"; - memory-region = <&adsp_mem>; - }; - - qcom,adsprpc_domains { - compatible = "qcom,msm-fastrpc-legacy-compute-cb"; - qcom,msm_fastrpc_compute_cb { - qcom,adsp-shared-phandle = <&adsp_shared>; - qcom,adsp-shared-sids = - <0x8 0x9 0xa 0xb 0xc 0xd 0xe 0xf>; - qcom,virtual-addr-pool = <0x80000000 0x7FFFFFFF>; - }; - }; - - sdcc1_ice: sdcc1ice@7803000 { - compatible = "qcom,ice"; - reg = <0x7803000 0x8000>; - interrupt-names = "sdcc_ice_nonsec_level_irq", - "sdcc_ice_sec_level_irq"; - interrupts = <0 312 0>, <0 313 0>; - qcom,enable-ice-clk; - clock-names = "ice_core_clk_src", "ice_core_clk", - "bus_clk", "iface_clk"; - clocks = <&clock_gcc clk_sdcc1_ice_core_clk_src>, - <&clock_gcc clk_gcc_sdcc1_ice_core_clk>, - <&clock_gcc clk_gcc_sdcc1_apps_clk>, - <&clock_gcc clk_gcc_sdcc1_ahb_clk>; - qcom,op-freq-hz = <270000000>, <0>, <0>, <0>; - qcom,msm-bus,name = "sdcc_ice_noc"; - qcom,msm-bus,num-cases = <2>; - qcom,msm-bus,num-paths = <1>; - qcom,msm-bus,vectors-KBps = - <78 512 0 0>, /* No vote */ - <78 512 1000 0>; /* Max. bandwidth */ - qcom,bus-vector-names = "MIN", "MAX"; - qcom,instance-type = "sdcc"; - }; - - sdhc_1: sdhci@7824900 { - compatible = "qcom,sdhci-msm"; - reg = <0x7824900 0x500>, <0x7824000 0x800>, <0x7824e00 0x200>; - reg-names = "hc_mem", "core_mem", "cmdq_mem"; - - interrupts = <0 123 0>, <0 138 0>; - interrupt-names = "hc_irq", "pwr_irq"; - - sdhc-msm-crypto = <&sdcc1_ice>; - qcom,bus-width = <8>; - - qcom,devfreq,freq-table = <50000000 200000000>; - - qcom,pm-qos-irq-type = "affine_irq"; - qcom,pm-qos-irq-latency = <2 213>; - - qcom,pm-qos-cpu-groups = <0x0f 0xf0>; - qcom,pm-qos-cmdq-latency-us = <2 213>, <2 213>; - - qcom,pm-qos-legacy-latency-us = <2 213>, <2 213>; - - qcom,msm-bus,name = "sdhc1"; - qcom,msm-bus,num-cases = <9>; - qcom,msm-bus,num-paths = <1>; - qcom,msm-bus,vectors-KBps = <78 512 0 0>, /* No vote */ - <78 512 1046 3200>, /* 400 KB/s*/ - <78 512 52286 160000>, /* 20 MB/s */ - <78 512 65360 200000>, /* 25 MB/s */ - <78 512 130718 400000>, /* 50 MB/s */ - <78 512 130718 400000>, /* 100 MB/s */ - <78 512 261438 800000>, /* 200 MB/s */ - <78 512 261438 800000>, /* 400 MB/s */ - <78 512 1338562 4096000>; /* Max. bandwidth */ - qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000 - 100000000 200000000 400000000 4294967295>; - - clocks = <&clock_gcc clk_gcc_sdcc1_ahb_clk>, - <&clock_gcc clk_gcc_sdcc1_apps_clk>, - <&clock_gcc clk_gcc_sdcc1_ice_core_clk>; - clock-names = "iface_clk", "core_clk", "ice_core_clk"; - qcom,ice-clk-rates = <270000000 160000000>; - qcom,large-address-bus; - - status = "disabled"; - }; - - sdhc_2: sdhci@7864900 { - compatible = "qcom,sdhci-msm"; - reg = <0x7864900 0x500>, <0x7864000 0x800>; - reg-names = "hc_mem", "core_mem"; - - interrupts = <0 125 0>, <0 221 0>; - interrupt-names = "hc_irq", "pwr_irq"; - - qcom,bus-width = <4>; - - qcom,pm-qos-irq-type = "affine_irq"; - qcom,pm-qos-irq-latency = <2 213>; - - qcom,pm-qos-cpu-groups = <0x0f 0xf0>; - qcom,pm-qos-legacy-latency-us = <2 213>, <2 213>; - - qcom,devfreq,freq-table = <50000000 200000000>; - - qcom,msm-bus,name = "sdhc2"; - qcom,msm-bus,num-cases = <8>; - qcom,msm-bus,num-paths = <1>; - qcom,msm-bus,vectors-KBps = <81 512 0 0>, /* No vote */ - <81 512 1046 3200>, /* 400 KB/s*/ - <81 512 52286 160000>, /* 20 MB/s */ - <81 512 65360 200000>, /* 25 MB/s */ - <81 512 130718 400000>, /* 50 MB/s */ - <81 512 261438 800000>, /* 100 MB/s */ - <81 512 261438 800000>, /* 200 MB/s */ - <81 512 1338562 4096000>; /* Max. bandwidth */ - qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000 - 100000000 200000000 4294967295>; - - clocks = <&clock_gcc clk_gcc_sdcc2_ahb_clk>, - <&clock_gcc clk_gcc_sdcc2_apps_clk>; - clock-names = "iface_clk", "core_clk"; - - qcom,large-address-bus; - status = "disabled"; - }; - - spmi_bus: qcom,spmi@200f000 { - compatible = "qcom,spmi-pmic-arb"; - reg = <0x200f000 0x1000>, - <0x2400000 0x800000>, - <0x2c00000 0x800000>, - <0x3800000 0x200000>, - <0x200a000 0x2100>; - reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; - interrupts = <0 190 0>; - qcom,pmic-arb-channel = <0>; - qcom,pmic-arb-max-peripherals = <256>; - qcom,pmic-arb-max-periph-interrupts = <256>; - qcom,pmic-arb-ee = <0>; - #interrupt-cells = <3>; - interrupt-controller; - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - }; - - qcom,memshare { - compatible = "qcom,memshare"; - - qcom,client_1 { - compatible = "qcom,memshare-peripheral"; - qcom,peripheral-size = <0x200000>; - qcom,client-id = <0>; - qcom,allocate-boot-time; - label = "modem"; - }; - - qcom,client_2 { - compatible = "qcom,memshare-peripheral"; - qcom,peripheral-size = <0x300000>; - qcom,client-id = <2>; - label = "modem"; - }; - - qcom,client_3 { - compatible = "qcom,memshare-peripheral"; - qcom,peripheral-size = <0x0>; - qcom,client-id = <1>; - label = "modem"; - }; - }; - - qcom,mss@4080000 { - compatible = "qcom,pil-q6v55-mss"; - reg = <0x04080000 0x100>, - <0x0194f000 0x010>, - <0x01950000 0x008>, - <0x01951000 0x008>, - <0x04020000 0x040>, - <0x01871000 0x004>; - reg-names = "qdsp6_base", "halt_q6", "halt_modem", "halt_nc", - "rmb_base", "restart_reg"; - - interrupts = <0 24 1>; - vdd_mss-supply = <&pm8953_s1>; - vdd_cx-supply = <&pm8953_s2_level>; - vdd_cx-voltage = ; - vdd_mx-supply = <&pm8953_s7_level_ao>; - vdd_mx-uV = ; - vdd_pll-supply = <&pm8953_l7>; - qcom,vdd_pll = <1800000>; - - clocks = <&clock_gcc clk_xo_pil_mss_clk>, - <&clock_gcc clk_gcc_mss_cfg_ahb_clk>, - <&clock_gcc clk_gcc_mss_q6_bimc_axi_clk>, - <&clock_gcc clk_gcc_boot_rom_ahb_clk>; - clock-names = "xo", "iface_clk", "bus_clk", "mem_clk"; - qcom,proxy-clock-names = "xo"; - qcom,active-clock-names = "iface_clk", "bus_clk", "mem_clk"; - - qcom,pas-id = <5>; - qcom,pil-mss-memsetup; - qcom,firmware-name = "modem"; - qcom,pil-self-auth; - qcom,sysmon-id = <0>; - qcom,ssctl-instance-id = <0x12>; - qcom,qdsp6v56-1-10; - - /* GPIO inputs from mss */ - qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_1_in 0 0>; - qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_1_in 1 0>; - qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_1_in 2 0>; - qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_1_in 3 0>; - qcom,gpio-shutdown-ack = <&smp2pgpio_ssr_smp2p_1_in 7 0>; - - /* GPIO output to mss */ - qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_1_out 0 0>; - memory-region = <&modem_mem>; - }; - - qcom,lpass@c200000 { - compatible = "qcom,pil-tz-generic"; - reg = <0xc200000 0x00100>; - interrupts = <0 293 1>; - - vdd_cx-supply = <&pm8953_s2_level>; - qcom,proxy-reg-names = "vdd_cx"; - qcom,vdd_cx-uV-uA = ; - - clocks = <&clock_gcc clk_xo_pil_lpass_clk>, - <&clock_gcc clk_gcc_crypto_clk>, - <&clock_gcc clk_gcc_crypto_ahb_clk>, - <&clock_gcc clk_gcc_crypto_axi_clk>, - <&clock_gcc clk_crypto_clk_src>; - clock-names = "xo", "scm_core_clk", "scm_iface_clk", - "scm_bus_clk", "scm_core_clk_src"; - qcom,proxy-clock-names = "xo", "scm_core_clk", "scm_iface_clk", - "scm_bus_clk", "scm_core_clk_src"; - qcom,scm_core_clk_src-freq = <80000000>; - - qcom,pas-id = <1>; - qcom,complete-ramdump; - qcom,proxy-timeout-ms = <10000>; - qcom,smem-id = <423>; - qcom,sysmon-id = <1>; - qcom,ssctl-instance-id = <0x14>; - qcom,firmware-name = "adsp"; - - /* GPIO inputs from lpass */ - qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_2_in 0 0>; - qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_2_in 2 0>; - qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_2_in 1 0>; - qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_2_in 3 0>; - - /* GPIO output to lpass */ - qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_2_out 0 0>; - - memory-region = <&adsp_fw_mem>; - }; - - qcom,venus@1de0000 { - compatible = "qcom,pil-tz-generic"; - reg = <0x1de0000 0x4000>; - - vdd-supply = <&gdsc_venus>; - qcom,proxy-reg-names = "vdd"; - - clocks = <&clock_gcc clk_gcc_venus0_vcodec0_clk>, - <&clock_gcc clk_gcc_venus0_ahb_clk>, - <&clock_gcc clk_gcc_venus0_axi_clk>, - <&clock_gcc clk_gcc_crypto_clk>, - <&clock_gcc clk_gcc_crypto_ahb_clk>, - <&clock_gcc clk_gcc_crypto_axi_clk>, - <&clock_gcc clk_crypto_clk_src>; - - clock-names = "core_clk", "iface_clk", "bus_clk", - "scm_core_clk", "scm_iface_clk", - "scm_bus_clk", "scm_core_clk_src"; - - qcom,proxy-clock-names = "core_clk", "iface_clk", - "bus_clk", "scm_core_clk", - "scm_iface_clk", "scm_bus_clk", - "scm_core_clk_src"; - qcom,scm_core_clk_src-freq = <80000000>; - - qcom,msm-bus,name = "pil-venus"; - qcom,msm-bus,num-cases = <2>; - qcom,msm-bus,num-paths = <1>; - qcom,msm-bus,vectors-KBps = - <63 512 0 0>, - <63 512 0 304000>; - - qcom,pas-id = <9>; - qcom,proxy-timeout-ms = <100>; - qcom,firmware-name = "venus"; - memory-region = <&venus_mem>; - }; - - qcom,msm-ssc-sensors { - compatible = "qcom,msm-ssc-sensors"; - }; - - qcom,pronto@a21b000 { - compatible = "qcom,pil-tz-generic"; - reg = <0x0a21b000 0x3000>; - interrupts = <0 149 1>; - - vdd_pronto_pll-supply = <&pm8953_l7>; - proxy-reg-names = "vdd_pronto_pll"; - vdd_pronto_pll-uV-uA = <1800000 18000>; - clocks = <&clock_gcc clk_xo_pil_pronto_clk>, - <&clock_gcc clk_gcc_crypto_clk>, - <&clock_gcc clk_gcc_crypto_ahb_clk>, - <&clock_gcc clk_gcc_crypto_axi_clk>, - <&clock_gcc clk_crypto_clk_src>; - - clock-names = "xo", "scm_core_clk", "scm_iface_clk", - "scm_bus_clk", "scm_core_clk_src"; - qcom,proxy-clock-names = "xo", "scm_core_clk", "scm_iface_clk", - "scm_bus_clk", "scm_core_clk_src"; - qcom,scm_core_clk_src = <80000000>; - - qcom,pas-id = <6>; - qcom,proxy-timeout-ms = <10000>; - qcom,smem-id = <422>; - qcom,sysmon-id = <6>; - qcom,ssctl-instance-id = <0x13>; - qcom,firmware-name = "wcnss"; - - /* GPIO inputs from wcnss */ - qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_4_in 0 0>; - qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_4_in 1 0>; - qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_4_in 2 0>; - qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_4_in 3 0>; - - /* GPIO output to wcnss */ - qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_4_out 0 0>; - memory-region = <&wcnss_fw_mem>; - }; - - usb3: ssusb@7000000{ - compatible = "qcom,dwc-usb3-msm"; - reg = <0x07000000 0xfc000>, - <0x0007e000 0x400>; - reg-names = "core_base", - "ahb2phy_base"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - - interrupts = <0 136 0>, <0 220 0>, <0 134 0>; - interrupt-names = "hs_phy_irq", "ss_phy_irq", "pwr_event_irq"; - - USB3_GDSC-supply = <&gdsc_usb30>; - qcom,usb-dbm = <&dbm_1p5>; - qcom,msm-bus,name = "usb3"; - qcom,msm-bus,num-cases = <3>; - qcom,msm-bus,num-paths = <1>; - qcom,detect-dpdm-floating; - qcom,msm-bus,vectors-KBps = - <61 512 0 0>, - <61 512 240000 800000>, - <61 512 240000 800000>; - - qcom,dwc-usb3-msm-tx-fifo-size = <21288>; - - clocks = <&clock_gcc clk_gcc_usb30_master_clk>, - <&clock_gcc clk_gcc_pcnoc_usb3_axi_clk>, - <&clock_gcc clk_gcc_usb30_mock_utmi_clk>, - <&clock_gcc clk_gcc_usb30_sleep_clk>, - <&clock_gcc clk_xo_dwc3_clk>, - <&clock_gcc clk_gcc_usb_phy_cfg_ahb_clk>; - - clock-names = "core_clk", "iface_clk", "utmi_clk", - "sleep_clk", "xo", "cfg_ahb_clk"; - - dwc3@7000000 { - compatible = "snps,dwc3"; - reg = <0x07000000 0xc8d0>; - interrupt-parent = <&intc>; - interrupts = <0 140 0>; - usb-phy = <&qusb_phy>, <&ssphy>; - tx-fifo-resize; - snps,usb3-u1u2-disable; - snps,nominal-elastic-buffer; - snps,is-utmi-l1-suspend; - snps,hird-threshold = /bits/ 8 <0x0>; - }; - - qcom,usbbam@7104000 { - compatible = "qcom,usb-bam-msm"; - reg = <0x07104000 0x1a934>; - interrupt-parent = <&intc>; - interrupts = <0 135 0>; - - qcom,bam-type = <0>; - qcom,usb-bam-fifo-baseaddr = <0x08605000>; - qcom,usb-bam-num-pipes = <8>; - qcom,ignore-core-reset-ack; - qcom,disable-clk-gating; - qcom,usb-bam-override-threshold = <0x4001>; - qcom,usb-bam-max-mbps-highspeed = <400>; - qcom,usb-bam-max-mbps-superspeed = <3600>; - qcom,reset-bam-on-connect; - - qcom,pipe0 { - label = "ssusb-ipa-out-0"; - qcom,usb-bam-mem-type = <1>; - qcom,dir = <0>; - qcom,pipe-num = <0>; - qcom,peer-bam = <1>; - qcom,src-bam-pipe-index = <1>; - qcom,data-fifo-size = <0x8000>; - qcom,descriptor-fifo-size = <0x2000>; - }; - - qcom,pipe1 { - label = "ssusb-ipa-in-0"; - qcom,usb-bam-mem-type = <1>; - qcom,dir = <1>; - qcom,pipe-num = <0>; - qcom,peer-bam = <1>; - qcom,dst-bam-pipe-index = <0>; - qcom,data-fifo-size = <0x8000>; - qcom,descriptor-fifo-size = <0x2000>; - }; - - qcom,pipe2 { - label = "ssusb-qdss-in-0"; - qcom,usb-bam-mem-type = <2>; - qcom,dir = <1>; - qcom,pipe-num = <0>; - qcom,peer-bam = <0>; - qcom,peer-bam-physical-address = <0x06044000>; - qcom,src-bam-pipe-index = <0>; - qcom,dst-bam-pipe-index = <2>; - qcom,data-fifo-offset = <0x0>; - qcom,data-fifo-size = <0xe00>; - qcom,descriptor-fifo-offset = <0xe00>; - qcom,descriptor-fifo-size = <0x200>; - }; - - qcom,pipe3 { - label = "ssusb-dpl-ipa-in-1"; - qcom,usb-bam-mem-type = <1>; - qcom,dir = <1>; - qcom,pipe-num = <1>; - qcom,peer-bam = <1>; - qcom,dst-bam-pipe-index = <2>; - qcom,data-fifo-size = <0x8000>; - qcom,descriptor-fifo-size = <0x2000>; - }; - }; - }; - - qusb_phy: qusb@79000 { - compatible = "qcom,qusb2phy"; - reg = <0x079000 0x180>, - <0x01841030 0x4>, - <0x0193f044 0x4>, - <0x0193f020 0x4>; - reg-names = "qusb_phy_base", - "ref_clk_addr", - "tcsr_phy_clk_scheme_sel", - "tcsr_phy_level_shift_keeper"; - - USB3_GDSC-supply = <&gdsc_usb30>; - vdd-supply = <&pm8953_l3>; - vdda18-supply = <&pm8953_l7>; - vdda33-supply = <&pm8953_l13>; - qcom,vdd-voltage-level = <0 925000 925000>; - - qcom,qusb-phy-init-seq = <0xF8 0x80 - 0x53 0x84 - 0x93 0x88 - 0xCf 0x8C - 0x14 0x9C - 0x30 0x08 - 0x79 0x0C - 0x21 0x10 - 0x00 0x90 - 0x9F 0x1C - 0x00 0x18>; - phy_type= "utmi"; - - clocks = <&clock_gcc clk_bb_clk1>, - <&clock_gcc clk_gcc_qusb_ref_clk>, - <&clock_gcc clk_gcc_usb_phy_cfg_ahb_clk>, - <&clock_gcc clk_gcc_qusb2_phy_reset>, - <&clock_gcc clk_gcc_pcnoc_usb3_axi_clk>, - <&clock_gcc clk_gcc_usb30_master_clk>; - - clock-names = "ref_clk_src", "ref_clk", "cfg_ahb_clk", - "phy_reset", "iface_clk", "core_clk"; - - }; - - usb_nop_phy: usb_nop_phy { - status = "disabled"; - compatible = "usb-nop-xceiv"; - }; - - - ssphy: ssphy@78000 { - compatible = "qcom,usb-ssphy-qmp"; - reg = <0x78000 0x9f8>, - <0x0193f244 0x4>, - <0x0193f044 0x4>; - reg-names = "qmp_phy_base", - "vls_clamp_reg", - "tcsr_phy_clk_scheme_sel"; - qcom,qmp-phy-init-seq = <0xac 0x14 0x1a 0x00 - 0x34 0x08 0x08 0x00 - 0x174 0x30 0x30 0x00 - 0x3c 0x06 0x06 0x00 - 0xb4 0x00 0x00 0x00 - 0xb8 0x08 0x08 0x00 - 0x194 0x06 0x06 0x3e8 - 0x19c 0x01 0x01 0x00 - 0x178 0x00 0x00 0x00 - 0xd0 0x82 0x82 0x00 - 0xdc 0x55 0x55 0x00 - 0xe0 0x55 0x55 0x00 - 0xe4 0x03 0x03 0x00 - 0x78 0x0b 0x0b 0x00 - 0x84 0x16 0x16 0x00 - 0x90 0x28 0x28 0x00 - 0x108 0x80 0x80 0x00 - 0x10c 0x00 0x00 0x00 - 0x184 0x0a 0x0a 0x00 - 0x4c 0x15 0x15 0x00 - 0x50 0x34 0x34 0x00 - 0x54 0x00 0x00 0x00 - 0xc8 0x00 0x00 0x00 - 0x18c 0x00 0x00 0x00 - 0xcc 0x00 0x00 0x00 - 0x128 0x00 0x00 0x00 - 0x0c 0x0a 0x0a 0x00 - 0x10 0x01 0x01 0x00 - 0x1c 0x31 0x31 0x00 - 0x20 0x01 0x01 0x00 - 0x14 0x00 0x00 0x00 - 0x18 0x00 0x00 0x00 - 0x24 0xde 0xde 0x00 - 0x28 0x07 0x07 0x00 - 0x48 0x0f 0x0f 0x00 - 0x70 0x0f 0x0f 0x00 - 0x100 0x80 0x80 0x00 - 0x440 0x0b 0x0b 0x00 - 0x4d8 0x02 0x02 0x00 - 0x4dc 0x6c 0x6c 0x00 - 0x4e0 0xbb 0xbb 0x00 - 0x508 0x77 0x77 0x00 - 0x50c 0x80 0x80 0x00 - 0x514 0x03 0x03 0x00 - 0x51c 0x16 0x16 0x00 - 0x448 0x75 0x75 0x00 - 0x454 0x00 0x00 0x00 - 0x40c 0x0a 0x0a 0x00 - 0x41c 0x06 0x06 0x00 - 0x510 0x00 0x00 0x00 - 0x268 0x45 0x45 0x00 - 0x2ac 0x12 0x12 0x00 - 0x294 0x06 0x06 0x00 - 0x254 0x00 0x00 0x00 - 0x8c8 0x83 0x83 0x00 - 0x8c4 0x02 0x02 0x00 - 0x8cc 0x09 0x09 0x00 - 0x8d0 0xa2 0xa2 0x00 - 0x8d4 0x85 0x85 0x00 - 0x880 0xd1 0xd1 0x00 - 0x884 0x1f 0x1f 0x00 - 0x888 0x47 0x47 0x00 - 0x80c 0x9f 0x9f 0x00 - 0x824 0x17 0x17 0x00 - 0x828 0x0f 0x0f 0x00 - 0x8b8 0x75 0x75 0x00 - 0x8bc 0x13 0x13 0x00 - 0x8b0 0x86 0x86 0x00 - 0x8a0 0x04 0x04 0x00 - 0x88c 0x44 0x44 0x00 - 0x870 0xe7 0xe7 0x00 - 0x874 0x03 0x03 0x00 - 0x878 0x40 0x40 0x00 - 0x87c 0x00 0x00 0x00 - 0x9d8 0x88 0x88 0x00 - 0xffffffff 0xffffffff 0x00 0x00>; - qcom,qmp-phy-reg-offset = <0x988 0x98c 0x990 0x994 - 0x974 0x8d8 0x8dc 0x804 0x800 - 0x808>; - vdd-supply = <&pm8953_l3>; - core-supply = <&pm8953_l7>; - qcom,vdd-voltage-level = <0 925000 925000>; - qcom,vbus-valid-override; - - clocks = <&clock_gcc clk_gcc_usb3_aux_clk>, - <&clock_gcc clk_gcc_usb3_pipe_clk>, - <&clock_gcc clk_gcc_usb_phy_cfg_ahb_clk>, - <&clock_gcc clk_gcc_usb3_phy_reset>, - <&clock_gcc clk_gcc_usb3phy_phy_reset>, - <&clock_gcc clk_bb_clk1>, - <&clock_gcc clk_gcc_usb_ss_ref_clk>; - - clock-names = "aux_clk", "pipe_clk", "cfg_ahb_clk", "phy_reset", - "phy_phy_reset", "ref_clk_src", "ref_clk"; - - }; - - dbm_1p5: dbm@70f8000 { - compatible = "qcom,usb-dbm-1p5"; - reg = <0x070f8000 0x300>; - qcom,reset-ep-after-lpm-resume; - }; - - android_usb@86000c8 { - compatible = "qcom,android-usb"; - reg = <0x086000c8 0xc8>; - qcom,pm-qos-latency = <2 213 11028>; - }; -}; - -#include "msm-pm8953-rpm-regulator.dtsi" -#include "msm-pm8953-e7.dtsi" -#include "msm8953-regulator.dtsi" -#include "msm-audio-e7.dtsi" -#include "msm8953-audio-e7.dtsi" -#include "msm-gdsc-8916.dtsi" -#include "msm8953-camera.dtsi" -#include "msm8953-mdss.dtsi" -#include "msm8953-mdss-pll.dtsi" - -&gdsc_venus { - clock-names = "bus_clk", "core_clk"; - clocks = <&clock_gcc clk_gcc_venus0_axi_clk>, - <&clock_gcc clk_gcc_venus0_vcodec0_clk>; - status = "okay"; -}; - -&gdsc_venus_core0 { - qcom,support-hw-trigger; - clock-names ="core0_clk"; - clocks = <&clock_gcc clk_gcc_venus0_core0_vcodec0_clk>; - status = "okay"; -}; - -&gdsc_mdss { - clock-names = "core_clk", "bus_clk"; - clocks = <&clock_gcc clk_gcc_mdss_mdp_clk>, - <&clock_gcc clk_gcc_mdss_axi_clk>; - proxy-supply = <&gdsc_mdss>; - qcom,proxy-consumer-enable; - status = "okay"; -}; - -&gdsc_oxili_gx { - clock-names = "core_root_clk"; - clocks =<&clock_gcc_gfx clk_gfx3d_clk_src>; - qcom,force-enable-root-clk; - parent-supply = <&gfx_vreg_corner>; - status = "okay"; -}; - -&gdsc_jpeg { - clock-names = "core_clk", "bus_clk"; - clocks = <&clock_gcc clk_gcc_camss_jpeg0_clk>, - <&clock_gcc clk_gcc_camss_jpeg_axi_clk>; - status = "okay"; -}; - -&gdsc_vfe { - clock-names = "core_clk", "bus_clk", "micro_clk", - "csi_clk"; - clocks = <&clock_gcc clk_gcc_camss_vfe0_clk>, - <&clock_gcc clk_gcc_camss_vfe_axi_clk>, - <&clock_gcc clk_gcc_camss_micro_ahb_clk>, - <&clock_gcc clk_gcc_camss_csi_vfe0_clk>; - status = "okay"; -}; - -&gdsc_vfe1 { - clock-names = "core_clk", "bus_clk", "micro_clk", - "csi_clk"; - clocks = <&clock_gcc clk_gcc_camss_vfe1_clk>, - <&clock_gcc clk_gcc_camss_vfe1_axi_clk>, - <&clock_gcc clk_gcc_camss_micro_ahb_clk>, - <&clock_gcc clk_gcc_camss_csi_vfe1_clk>; - status = "okay"; -}; - -&gdsc_cpp { - clock-names = "core_clk", "bus_clk"; - clocks = <&clock_gcc clk_gcc_camss_cpp_clk>, - <&clock_gcc clk_gcc_camss_cpp_axi_clk>; - status = "okay"; -}; - -&gdsc_oxili_cx { - clock-names = "core_clk"; - clocks = <&clock_gcc_gfx clk_gcc_oxili_gfx3d_clk>; - status = "okay"; -}; - -&gdsc_usb30 { - status = "okay"; -}; - -&pm8953_mpps { - mpp@a100 { - /* MPP2 - PA_THERM config */ - qcom,mode = <4>; /* AIN input */ - qcom,invert = <1>; /* Enable MPP */ - qcom,ain-route = <1>; /* AMUX 6 */ - qcom,master-en = <1>; - qcom,src-sel = <0>; /* Function constant */ - }; - - mpp@a300 { - /* MPP4 - CASE_THERM config */ - qcom,mode = <4>; /* AIN input */ - qcom,invert = <1>; /* Enable MPP */ - qcom,ain-route = <3>; /* AMUX 8 */ - qcom,master-en = <1>; - qcom,src-sel = <0>; /* Function constant */ - }; -}; - -&pm8953_vadc { - chan@5 { - label = "vcoin"; - reg = <5>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <1>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; - }; - - chan@7 { - label = "vph_pwr"; - reg = <7>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <1>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; - }; - - chan@36 { - label = "pa_therm0"; - reg = <0x36>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <2>; - qcom,hw-settle-time = <2>; - qcom,fast-avg-setup = <0>; - }; - - chan@11 { - label = "pa_therm1"; - reg = <0x11>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <2>; - qcom,hw-settle-time = <2>; - qcom,fast-avg-setup = <0>; - qcom,vadc-thermal-node; - }; - - chan@32 { - label = "xo_therm"; - reg = <0x32>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <4>; - qcom,hw-settle-time = <2>; - qcom,fast-avg-setup = <0>; - qcom,vadc-thermal-node; - }; - - chan@3c { - label = "xo_therm_buf"; - reg = <0x3c>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <4>; - qcom,hw-settle-time = <2>; - qcom,fast-avg-setup = <0>; - qcom,vadc-thermal-node; - }; - - chan@13 { - label = "case_therm"; - reg = <0x13>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <2>; - qcom,hw-settle-time = <2>; - qcom,fast-avg-setup = <0>; - qcom,vadc-thermal-node; - }; -}; - -&pm8953_adc_tm { - chan@36 { - label = "pa_therm0"; - reg = <0x36>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <2>; - qcom,hw-settle-time = <2>; - qcom,fast-avg-setup = <0>; - qcom,btm-channel-number = <0x48>; - qcom,thermal-node; - }; - - chan@7 { - label = "vph_pwr"; - reg = <0x7>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <1>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; - qcom,btm-channel-number = <0x68>; - }; -}; diff --git a/arch/arm/boot/dts/qcom/msm8953-mdss-panels.dtsi b/arch/arm/boot/dts/qcom/msm8953-mdss-panels.dtsi index 19bd25dd019b..a481b684ce5d 100644 --- a/arch/arm/boot/dts/qcom/msm8953-mdss-panels.dtsi +++ b/arch/arm/boot/dts/qcom/msm8953-mdss-panels.dtsi @@ -1,5 +1,4 @@ -/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved. - * Copyright (C) 2018 XiaoMi, Inc. +/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -25,17 +24,8 @@ #include "dsi-panel-lt8912-480p-video.dtsi" #include "dsi-panel-lt8912-1080p-video.dtsi" #include "dsi-panel-lgd-incell-sw49106-fhd-video.dtsi" -#include "dsi-panel-otm1911-fhd-video.dtsi" -#include "dsi-panel-otm1911-fhdplus-video.dtsi" -#include "dsi-panel-ili7807-fhdplus-video.dtsi" -#include "dsi-panel-hx8399c-fhdplus-video.dtsi" -/*add begin for E7 display*/ -#include "dsi-panel-td4310-fhdplus-video_e7.dtsi" -#include "dsi-panel-td4310-fhdplus-video_e7_g55.dtsi" -#include "dsi-panel-td4310-ebbg-fhdplus-video_e7.dtsi" -#include "dsi-panel-nt36672-tianma-fhdplus-video_e7.dtsi" -#include "dsi-panel-nt36672-csot-fhdplus-video_e7.dtsi" -/*add end for E7 display*/ +#include "dsi-panel-hx83100a-800p-video.dtsi" + &soc { dsi_panel_pwr_supply: dsi_panel_pwr_supply { #address-cells = <1>; @@ -47,7 +37,6 @@ qcom,supply-min-voltage = <2850000>; qcom,supply-max-voltage = <2850000>; qcom,supply-enable-load = <100000>; - qcom,supply-post-on-sleep= <2>; qcom,supply-disable-load = <100>; }; @@ -57,62 +46,11 @@ qcom,supply-min-voltage = <1800000>; qcom,supply-max-voltage = <1800000>; qcom,supply-enable-load = <100000>; - qcom,supply-post-on-sleep= <2>; qcom,supply-disable-load = <100>; }; }; }; -/*add begin for E7 display*/ -&dsi_td4310_fhdplus_e7_vid { - qcom,mdss-dsi-panel-timings-phy-v2 = [25 1f 09 0a 06 03 04 a0 - 25 1f 09 0a 06 03 04 a0 - 25 1f 09 0a 06 03 04 a0 - 25 1f 09 0a 06 03 04 a0 - 25 1f 08 0a 06 03 04 a0]; -}; - -&dsi_td4310_fhdplus_e7_g55_vid { - qcom,mdss-dsi-panel-timings-phy-v2 = [25 1f 09 0a 06 03 04 a0 - 25 1f 09 0a 06 03 04 a0 - 25 1f 09 0a 06 03 04 a0 - 25 1f 09 0a 06 03 04 a0 - 25 1f 08 0a 06 03 04 a0]; -}; - -&dsi_td4310_ebbg_fhdplus_e7_vid { - qcom,mdss-dsi-panel-timings-phy-v2 = [19 1F 09 0A 06 03 04 a0 - 19 1F 09 0A 06 03 04 a0 - 19 1F 09 0A 06 03 04 a0 - 19 1F 09 0A 06 03 04 a0 - 19 1E 08 0A 06 03 04 a0]; -}; - -&dsi_nt36672_tianma_fhdplus_e7_vid { - qcom,mdss-dsi-panel-timings-phy-v2 = [24 1F 08 09 05 03 04 a0 - 24 1F 08 09 05 03 04 a0 - 24 1F 08 09 05 03 04 a0 - 24 1F 08 09 05 03 04 a0 - 24 1C 08 09 05 03 04 a0]; -}; - -&dsi_nt36672_csot_fhdplus_e7_vid { - qcom,mdss-dsi-panel-timings-phy-v2 = [25 1f 09 0a 06 03 04 a0 - 25 1f 09 0a 06 03 04 a0 - 25 1f 09 0a 06 03 04 a0 - 25 1f 09 0a 06 03 04 a0 - 25 1e 08 0a 06 03 04 a0]; -}; -/*add end for E7 display*/ - -&dsi_otm1911_fhd_vid { - qcom,mdss-dsi-panel-timings-phy-v2 = [23 1e 07 08 05 03 04 a0 - 23 1e 07 08 05 03 04 a0 - 23 1e 07 08 05 03 04 a0 - 23 1e 07 08 05 03 04 a0 - 23 18 07 08 05 03 04 a0]; -}; - &dsi_truly_1080_vid { qcom,mdss-dsi-panel-timings-phy-v2 = [23 1e 08 09 05 03 04 a0 23 1e 08 09 05 03 04 a0 @@ -178,3 +116,11 @@ qcom,mdss-dsi-t-clk-post = <0x0d>; qcom,mdss-dsi-t-clk-pre = <0x30>; }; + +&dsi_boyi_hx83100a_800p_video { + qcom,mdss-dsi-panel-timings-phy-v2 = [1f 1c 05 06 03 03 04 a0 + 1f 1c 05 06 03 03 04 a0 + 1f 1c 05 06 03 03 04 a0 + 1f 1c 05 06 03 03 04 a0 + 1f 10 05 06 03 03 04 a0]; +}; diff --git a/arch/arm/boot/dts/qcom/msm8953-mdss-pll.dtsi b/arch/arm/boot/dts/qcom/msm8953-mdss-pll.dtsi index 2813aa60742f..a279453a1c74 100644 --- a/arch/arm/boot/dts/qcom/msm8953-mdss-pll.dtsi +++ b/arch/arm/boot/dts/qcom/msm8953-mdss-pll.dtsi @@ -1,5 +1,4 @@ /* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved. - * Copyright (C) 2018 XiaoMi, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -29,7 +28,8 @@ clock-names = "iface_clk"; clock-rate = <0>; - + qcom,dsi-pll-ssc-en; + qcom,dsi-pll-ssc-mode = "down-spread"; /* Memory region for passing dynamic refresh pll codes */ memory-region = <&dfps_data_mem>; @@ -61,7 +61,8 @@ gdsc-supply = <&gdsc_mdss>; - + qcom,dsi-pll-ssc-en; + qcom,dsi-pll-ssc-mode = "down-spread"; clocks = <&clock_gcc clk_gcc_mdss_ahb_clk>; clock-names = "iface_clk"; clock-rate = <0>; diff --git a/arch/arm/boot/dts/qcom/msm8953-mdss.dtsi b/arch/arm/boot/dts/qcom/msm8953-mdss.dtsi index eba6ce219de4..2131dc35bc3f 100644 --- a/arch/arm/boot/dts/qcom/msm8953-mdss.dtsi +++ b/arch/arm/boot/dts/qcom/msm8953-mdss.dtsi @@ -1,5 +1,4 @@ /* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved. - * Copyright (C) 2018 XiaoMi, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -32,7 +31,7 @@ /* Fudge factors */ qcom,mdss-ab-factor = <1 1>; /* 1 time */ qcom,mdss-ib-factor = <1 1>; /* 1 time */ - qcom,mdss-clk-factor = <110 100>; /* 1.10 times */ + qcom,mdss-clk-factor = <105 100>; /* 1.05 times */ qcom,max-mixer-width = <2048>; qcom,max-pipe-width = <2048>; diff --git a/arch/arm/boot/dts/qcom/msm8953-mtp.dtsi b/arch/arm/boot/dts/qcom/msm8953-mtp.dtsi index 3e43bfcde2ca..d805dd67b87d 100644 --- a/arch/arm/boot/dts/qcom/msm8953-mtp.dtsi +++ b/arch/arm/boot/dts/qcom/msm8953-mtp.dtsi @@ -1,6 +1,5 @@ /* * Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. - * Copyright (C) 2018 XiaoMi, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -250,14 +249,12 @@ status = "ok"; }; -/* &pm8953_typec { ss-mux-supply = <&pm8953_l13>; qcom,ssmux-gpio = <&tlmm 139 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&typec_ssmux_config>; }; -*/ &pm8953_gpios { /* GPIO 2 (NFC_CLK_REQ) */ diff --git a/arch/arm/boot/dts/qcom/msm8953-pinctrl-e7.dtsi b/arch/arm/boot/dts/qcom/msm8953-pinctrl-e7.dtsi deleted file mode 100644 index d21a840ee38c..000000000000 --- a/arch/arm/boot/dts/qcom/msm8953-pinctrl-e7.dtsi +++ /dev/null @@ -1,1848 +0,0 @@ -/* - * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved. - * Copyright (C) 2018 XiaoMi, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -&soc { - tlmm: pinctrl@1000000 { - compatible = "qcom,msm8953-pinctrl"; - reg = <0x1000000 0x300000>; - interrupts = <0 208 0>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - - pmx-uartconsole { - uart_console_active: uart_console_active { - mux { - pins = "gpio4", "gpio5"; - function = "blsp_uart2"; - }; - - config { - pins = "gpio4", "gpio5"; - drive-strength = <2>; - bias-disable; - }; - }; - - uart_console_sleep: uart_console_sleep { - mux { - pins = "gpio4", "gpio5"; - function = "blsp_uart2"; - }; - - config { - pins = "gpio4", "gpio5"; - drive-strength = <2>; - bias-pull-down; - }; - }; - - }; - cci { - cci0_active: cci0_active { - /* cci0 active state */ - mux { - /* CLK, DATA */ - pins = "gpio29", "gpio30"; - function = "cci_i2c"; - }; - - config { - pins = "gpio29", "gpio30"; - drive-strength = <2>; /* 2 MA */ - bias-disable; /* No PULL */ - }; - }; - - cci0_suspend: cci0_suspend { - /* cci0 suspended state */ - mux { - /* CLK, DATA */ - pins = "gpio29", "gpio30"; - function = "cci_i2c"; - }; - - config { - pins = "gpio29", "gpio30"; - drive-strength = <2>; /* 2 MA */ - bias-disable; /* No PULL */ - }; - }; - - cci1_active: cci1_active { - /* cci1 active state */ - mux { - /* CLK, DATA */ - pins = "gpio31", "gpio32"; - function = "cci_i2c"; - }; - - config { - pins = "gpio31", "gpio32"; - drive-strength = <2>; /* 2 MA */ - bias-disable; /* No PULL */ - }; - }; - - cci1_suspend: cci1_suspend { - /* cci1 suspended state */ - mux { - /* CLK, DATA */ - pins = "gpio31", "gpio32"; - function = "cci_i2c"; - }; - - config { - pins = "gpio31", "gpio32"; - drive-strength = <2>; /* 2 MA */ - bias-disable; /* No PULL */ - }; - }; - }; - - /*sensors */ - cam_sensor_mclk0_default: cam_sensor_mclk0_default { - /* MCLK0 */ - mux { - /* CLK, DATA */ - pins = "gpio26"; - function = "cam_mclk"; - }; - - config { - pins = "gpio26"; - bias-disable; /* No PULL */ - drive-strength = <2>; /* 2 MA */ - }; - }; - - cam_sensor_mclk0_sleep: cam_sensor_mclk0_sleep { - /* MCLK0 */ - mux { - /* CLK, DATA */ - pins = "gpio26"; - function = "cam_mclk"; - }; - - config { - pins = "gpio26"; - bias-pull-down; /* PULL DOWN */ - drive-strength = <2>; /* 2 MA */ - }; - }; - - cam_sensor_rear_default: cam_sensor_rear_default { - /* RESET, STANDBY */ - mux { - pins = "gpio33", "gpio39"; - function = "gpio"; - }; - - config { - pins = "gpio33", "gpio39"; - bias-disable; /* No PULL */ - drive-strength = <2>; /* 2 MA */ - }; - }; - - cam_sensor_rear_sleep: cam_sensor_rear_sleep { - /* RESET, STANDBY */ - mux { - pins = "gpio33", "gpio39"; - function = "gpio"; - }; - - config { - pins = "gpio33", "gpio39"; - bias-disable; /* No PULL */ - drive-strength = <2>; /* 2 MA */ - }; - }; - - cam_sensor_ir_cut_default: cam_sensor_ir_cut_default { - /* RESET, STANDBY */ - mux { - pins = "gpio38", "gpio39"; - function = "gpio"; - }; - - config { - pins = "gpio38","gpio39"; - bias-pull-up; /* No PULL */ - drive-strength = <2>; /* 2 MA */ - }; - }; - - cam_sensor_ir_cut_sleep: cam_sensor_ir_cut_sleep { - /* RESET, STANDBY */ - mux { - pins = "gpio38","gpio39"; - function = "gpio"; - }; - - config { - pins = "gpio38","gpio39"; - bias-disable; /* No PULL */ - drive-strength = <2>; /* 2 MA */ - }; - }; - - cam_sensor_rear_default1: cam_sensor_rear_default1 { - /* RESET*/ - mux { - pins = "gpio40"; - function = "gpio"; - }; - - config { - pins = "gpio40"; - bias-disable; /* No PULL */ - drive-strength = <2>; /* 2 MA */ - }; - }; - - cam_sensor_rear_sleep1: cam_sensor_rear_sleep1 { - /* RESET*/ - mux { - pins = "gpio40"; - function = "gpio"; - }; - - config { - pins = "gpio40"; - bias-disable; /* No PULL */ - drive-strength = <2>; /* 2 MA */ - }; - }; - - cam_sensor_rear_vana: cam_sensor_rear_vdig { - /* VDIG */ - mux { - pins = "gpio62"; - function = "gpio"; - }; - - config { - pins = "gpio62"; - bias-disable; /* No PULL */ - drive-strength = <2>; /* 2 MA */ - }; - }; - - cam_sensor_rear_vana_sleep: cam_sensor_rear_vdig_sleep { - /* VDIG */ - mux { - pins = "gpio62"; - function = "gpio"; - }; - - config { - pins = "gpio62"; - bias-disable; /* No PULL */ - drive-strength = <2>; /* 2 MA */ - }; - }; - - cam_sensor_mclk1_default: cam_sensor_mclk1_default { - /* MCLK1 */ - mux { - /* CLK, DATA */ - pins = "gpio27"; - function = "cam_mclk"; - }; - - config { - pins = "gpio27"; - bias-disable; /* No PULL */ - drive-strength = <2>; /* 2 MA */ - }; - }; - - cam_sensor_mclk1_sleep: cam_sensor_mclk1_sleep { - /* MCLK1 */ - mux { - /* CLK, DATA */ - pins = "gpio27"; - function = "cam_mclk"; - }; - - config { - pins = "gpio27"; - bias-pull-down; /* PULL DOWN */ - drive-strength = <2>; /* 2 MA */ - }; - }; - - cam_sensor_front_default: cam_sensor_front_default { - /* RESET, STANDBY */ - mux { - pins = "gpio41","gpio132"; - function = "gpio"; - }; - - config { - pins = "gpio41","gpio132"; - bias-disable; /* No PULL */ - drive-strength = <2>; /* 2 MA */ - }; - }; - - cam_sensor_front_sleep: cam_sensor_front_sleep { - /* RESET, STANDBY */ - mux { - pins = "gpio41","gpio132"; - function = "gpio"; - }; - - config { - pins = "gpio41","gpio132"; - bias-disable; /* No PULL */ - drive-strength = <2>; /* 2 MA */ - }; - }; - - cam_sensor_mclk2_default: cam_sensor_mclk2_default { - /* MCLK2 */ - mux { - /* CLK, DATA */ - pins = "gpio28"; - function = "cam_mclk"; - }; - - config { - pins = "gpio28"; - bias-disable; /* No PULL */ - drive-strength = <2>; /* 2 MA */ - }; - }; - - cam_sensor_mclk2_sleep: cam_sensor_mclk2_sleep { - /* MCLK2 */ - mux { - /* CLK, DATA */ - pins = "gpio28"; - function = "cam_mclk"; - }; - - config { - pins = "gpio28"; - bias-pull-down; /* PULL DOWN */ - drive-strength = <2>; /* 2 MA */ - }; - }; - - cam_sensor_front1_default: cam_sensor_front1_default { - /* RESET, STANDBY */ - mux { - pins = "gpio129"; - function = "gpio"; - }; - - config { - pins = "gpio129"; - bias-disable; /* No PULL */ - drive-strength = <2>; /* 2 MA */ - }; - }; - - cam_sensor_front1_sleep: cam_sensor_front1_sleep { - /* RESET, STANDBY */ - mux { - pins = "gpio129"; - function = "gpio"; - }; - - config { - pins = "gpio129"; - bias-disable; /* No PULL */ - drive-strength = <2>; /* 2 MA */ - }; - }; - - pmx_adv7533_int: pmx_adv7533_int { - adv7533_int_active: adv7533_int_active { - mux { - pins = "gpio90"; - function = "gpio"; - }; - - config { - pins = "gpio90"; - drive-strength = <16>; - bias-disable; - }; - }; - - adv7533_int_suspend: adv7533_int_suspend { - mux { - pins = "gpio90"; - function = "gpio"; - }; - - config { - pins = "gpio90"; - drive-strength = <16>; - bias-disable; - }; - }; - - }; - - pmx_mdss: pmx_mdss { - mdss_dsi_active: mdss_dsi_active { - mux { - pins = "gpio61", "gpio59"; - function = "gpio"; - }; - - config { - pins = "gpio61", "gpio59"; - drive-strength = <8>; /* 8 mA */ - bias-disable = <0>; /* no pull */ - output-high; - }; - }; - - mdss_dsi_suspend: mdss_dsi_suspend { - mux { - pins = "gpio61", "gpio59"; - function = "gpio"; - }; - - config { - pins = "gpio61", "gpio59"; - drive-strength = <2>; /* 2 mA */ - bias-pull-down; /* pull down */ - }; - }; - }; - - pmx_mdss_te { - mdss_te_active: mdss_te_active { - mux { - pins = "gpio24"; - function = "mdp_vsync"; - }; - config { - pins = "gpio24"; - drive-strength = <2>; /* 8 mA */ - bias-pull-down; /* pull down*/ - }; - }; - - mdss_te_suspend: mdss_te_suspend { - mux { - pins = "gpio24"; - function = "mdp_vsync"; - }; - config { - pins = "gpio24"; - drive-strength = <2>; /* 2 mA */ - bias-pull-down; /* pull down */ - }; - }; - }; - - hsuart_active: default { - mux { - pins = "gpio12", "gpio13", "gpio14", "gpio15"; - function = "blsp_uart4"; - }; - - config { - pins = "gpio12", "gpio13", "gpio14", "gpio15"; - drive-strength = <16>; - bias-disable; - }; - }; - - hsuart_sleep: sleep { - mux { - pins = "gpio12", "gpio13", "gpio14", "gpio15"; - function = "gpio"; - }; - - config { - pins = "gpio12", "gpio13", "gpio14", "gpio15"; - drive-strength = <2>; - bias-disable; - }; - }; - - blsp2_uart0_active: blsp2_uart0_active { - mux { - pins = "gpio16", "gpio17", "gpio18", "gpio19"; - function = "blsp_uart5"; - }; - - config { - pins = "gpio16", "gpio17", "gpio18", "gpio19"; - drive-strength = <16>; - bias-disable; - }; - }; - - blsp2_uart0_sleep: blsp2_uart0_sleep { - mux { - pins = "gpio16", "gpio17", "gpio18", "gpio19"; - function = "gpio"; - }; - - config { - pins = "gpio16", "gpio17", "gpio18", "gpio19"; - drive-strength = <2>; - bias-disable; - }; - }; - - /* SDC pin type */ - sdc1_clk_on: sdc1_clk_on { - config { - pins = "sdc1_clk"; - bias-disable; /* NO pull */ - drive-strength = <16>; /* 16 MA */ - }; - }; - - sdc1_clk_off: sdc1_clk_off { - config { - pins = "sdc1_clk"; - bias-disable; /* NO pull */ - drive-strength = <2>; /* 2 MA */ - }; - }; - - sdc1_cmd_on: sdc1_cmd_on { - config { - pins = "sdc1_cmd"; - bias-pull-up; /* pull up */ - drive-strength = <10>; /* 10 MA */ - }; - }; - - sdc1_cmd_off: sdc1_cmd_off { - config { - pins = "sdc1_cmd"; - num-grp-pins = <1>; - bias-pull-up; /* pull up */ - drive-strength = <2>; /* 2 MA */ - }; - }; - - sdc1_data_on: sdc1_data_on { - config { - pins = "sdc1_data"; - bias-pull-up; /* pull up */ - drive-strength = <10>; /* 10 MA */ - }; - }; - - sdc1_data_off: sdc1_data_off { - config { - pins = "sdc1_data"; - bias-pull-up; /* pull up */ - drive-strength = <2>; /* 2 MA */ - }; - }; - - sdc1_rclk_on: sdc1_rclk_on { - config { - pins = "sdc1_rclk"; - bias-pull-down; /* pull down */ - }; - }; - - sdc1_rclk_off: sdc1_rclk_off { - config { - pins = "sdc1_rclk"; - bias-pull-down; /* pull down */ - }; - }; - - sdc2_clk_on: sdc2_clk_on { - config { - pins = "sdc2_clk"; - drive-strength = <16>; /* 16 MA */ - bias-disable; /* NO pull */ - }; - }; - - sdc2_clk_off: sdc2_clk_off { - config { - pins = "sdc2_clk"; - bias-disable; /* NO pull */ - drive-strength = <2>; /* 2 MA */ - }; - }; - - sdc2_cmd_on: sdc2_cmd_on { - config { - pins = "sdc2_cmd"; - bias-pull-up; /* pull up */ - drive-strength = <10>; /* 10 MA */ - }; - }; - - sdc2_cmd_off: sdc2_cmd_off { - config { - pins = "sdc2_cmd"; - bias-pull-up; /* pull up */ - drive-strength = <2>; /* 2 MA */ - }; - }; - - sdc2_data_on: sdc2_data_on { - config { - pins = "sdc2_data"; - bias-pull-up; /* pull up */ - drive-strength = <10>; /* 10 MA */ - }; - }; - - sdc2_data_off: sdc2_data_off { - config { - pins = "sdc2_data"; - bias-pull-up; /* pull up */ - drive-strength = <2>; /* 2 MA */ - }; - }; - - sdc2_cd_on: cd_on { - mux { - pins = "gpio133"; - function = "gpio"; - }; - - config { - pins = "gpio133"; - drive-strength = <2>; - bias-pull-up; - }; - }; - - sdc2_cd_off: cd_off { - mux { - pins = "gpio133"; - function = "gpio"; - }; - - config { - pins = "gpio133"; - drive-strength = <2>; - bias-disable; - }; - }; - - i2c_2 { - i2c_2_active: i2c_2_active { - /* active state */ - mux { - pins = "gpio6", "gpio7"; - function = "blsp_i2c2"; - }; - - config { - pins = "gpio6", "gpio7"; - drive-strength = <2>; - bias-disable; - }; - }; - - i2c_2_sleep: i2c_2_sleep { - /* suspended state */ - mux { - pins = "gpio6", "gpio7"; - function = "gpio"; - }; - - config { - pins = "gpio6", "gpio7"; - drive-strength = <2>; - bias-disable; - }; - }; - }; - - i2c_3 { - i2c_3_active: i2c_3_active { - /* active state */ - mux { - pins = "gpio10", "gpio11"; - function = "blsp_i2c3"; - }; - - config { - pins = "gpio10", "gpio11"; - drive-strength = <2>; - bias-disable; - }; - }; - - i2c_3_sleep: i2c_3_sleep { - /* suspended state */ - mux { - pins = "gpio10", "gpio11"; - function = "gpio"; - }; - - config { - pins = "gpio10", "gpio11"; - drive-strength = <2>; - bias-disable; - }; - }; - }; - - i2c_5 { - i2c_5_active: i2c_5_active { - /* active state */ - mux { - pins = "gpio18", "gpio19"; - function = "blsp_i2c5"; - }; - - config { - pins = "gpio18", "gpio19"; - drive-strength = <2>; - bias-disable; - }; - }; - - i2c_5_sleep: i2c_5_sleep { - /* suspended state */ - mux { - pins = "gpio18", "gpio19"; - function = "gpio"; - }; - - config { - pins = "gpio18", "gpio19"; - drive-strength = <2>; - bias-disable; - }; - }; - }; - - /*fp gpio of gooid & fpc */ - goodix_spi_active: goodix_spi_active{ - mux { - pins = "gpio16", "gpio17", "gpio18", "gpio19"; - function = "blsp_spi5"; - }; - config { - pins = "gpio16", "gpio17", "gpio18", "gpio19"; - drive-strength = <2>; - bias-disable = <0>; - }; - }; - goodix_reset_reset: goodix_reset_reset{ - mux { - pins = "gpio140"; - function = "gpio"; - }; - config { - pins = "gpio140"; - drive-strength = <2>; - bias-disable = <0>; - output-low; - }; - }; - goodix_reset_active: goodix_reset_active{ - mux { - pins = "gpio140"; - function = "gpio"; - }; - config { - pins = "gpio140"; - drive-strength = <2>; - bias-disable = <0>; - output-high; - }; - }; - goodix_irq_active: goodix_irq_active { - mux { - pins = "gpio48"; - function = "gpio"; - }; - config { - pins = "gpio48"; - drive-strength = <2>; - bias-disable = <0>; - input-enable; - }; - }; - - /* fingerprint pin function */ - fpc_spi_active: fpc_spi_active { - mux { - pins = "gpio16", "gpio17", "gpio18", "gpio19"; - function = "blsp_spi7"; - }; - - config { - pins = "gpio16", "gpio17", "gpio18", "gpio19"; - drive-strength = <2>; - bias-disable; - }; - }; - fpc_reset_reset: fpc_reset_reset { - mux { - pins = "gpio140"; - function = "gpio"; - }; - config { - pins = "gpio140"; - drive-strength = <2>; - bias-disable; - output-low; - }; - }; - fpc_reset_active: fpc_reset_active { - mux { - pins = "gpio140"; - function = "gpio"; - }; - config { - pins = "gpio140"; - drive-strength = <2>; - bias-disable; - output-high; - }; - }; - fpc_irq_active: fpc_irq_active { - mux { - pins = "gpio48"; - function = "gpio"; - }; - config { - pins = "gpio48"; - drive-strength = <2>; - bias-disable; - input-enable; - }; - }; - - smartpa_irq_active: smartpa_irq_active { - mux { - pins = "gpio87"; - function = "gpio"; - }; - config { - pins = "gpio87"; - drive-strength = <2>; - bias-pull-down; - input-enable; - }; - }; - - pmx_rd_nfc_int { - /*qcom,pins = <&gp 17>;*/ - pins = "gpio17"; - qcom,pin-func = <0>; - qcom,num-grp-pins = <1>; - label = "pmx_nfc_int"; - - nfc_int_active: active { - drive-strength = <6>; - bias-pull-up; - }; - - nfc_int_suspend: suspend { - drive-strength = <6>; - bias-pull-up; - }; - }; - - pmx_nfc_reset { - /*qcom,pins = <&gp 16>;*/ - pins = "gpio16"; - qcom,pin-func = <0>; - qcom,num-grp-pins = <1>; - label = "pmx_nfc_disable"; - - nfc_disable_active: active { - drive-strength = <6>; - bias-pull-up; - }; - - nfc_disable_suspend: suspend { - drive-strength = <6>; - bias-disable; - }; - }; - - wcnss_pmux_5wire { - /* Active configuration of bus pins */ - wcnss_default: wcnss_default { - wcss_wlan2 { - pins = "gpio76"; - function = "wcss_wlan2"; - }; - wcss_wlan1 { - pins = "gpio77"; - function = "wcss_wlan1"; - }; - wcss_wlan0 { - pins = "gpio78"; - function = "wcss_wlan0"; - }; - wcss_wlan { - pins = "gpio79", "gpio80"; - function = "wcss_wlan"; - }; - - config { - pins = "gpio76", "gpio77", - "gpio78", "gpio79", - "gpio80"; - drive-strength = <6>; /* 6 MA */ - bias-pull-up; /* PULL UP */ - }; - }; - - wcnss_sleep: wcnss_sleep { - wcss_wlan2 { - pins = "gpio76"; - function = "wcss_wlan2"; - }; - wcss_wlan1 { - pins = "gpio77"; - function = "wcss_wlan1"; - }; - wcss_wlan0 { - pins = "gpio78"; - function = "wcss_wlan0"; - }; - wcss_wlan { - pins = "gpio79", "gpio80"; - function = "wcss_wlan"; - }; - - config { - pins = "gpio76", "gpio77", - "gpio78", "gpio79", - "gpio80"; - drive-strength = <2>; /* 2 MA */ - bias-pull-down; /* PULL Down */ - }; - }; - }; - - wcnss_pmux_gpio: wcnss_pmux_gpio { - wcnss_gpio_default: wcnss_gpio_default { - /* Active configuration of bus pins */ - mux { - /* Uses general purpose pins */ - pins = "gpio76", "gpio77", - "gpio78", "gpio79", - "gpio80"; - function = "gpio"; - }; - - config { - pins = "gpio76", "gpio77", - "gpio78", "gpio79", - "gpio80"; - drive-strength = <6>; /* 6 MA */ - bias-pull-up; /* PULL UP */ - }; - }; - }; - - wcd9xxx_intr { - wcd_intr_default: wcd_intr_default{ - mux { - pins = "gpio73"; - function = "gpio"; - }; - - config { - pins = "gpio73"; - drive-strength = <2>; /* 2 mA */ - bias-pull-down; /* pull down */ - input-enable; - }; - }; - }; - - cdc_reset_ctrl { - cdc_reset_sleep: cdc_reset_sleep { - mux { - pins = "gpio67"; - function = "gpio"; - }; - config { - pins = "gpio67"; - drive-strength = <16>; - bias-disable; - output-low; - }; - }; - cdc_reset_active:cdc_reset_active { - mux { - pins = "gpio67"; - function = "gpio"; - }; - config { - pins = "gpio67"; - drive-strength = <16>; - bias-pull-down; - output-high; - }; - }; - }; - - cdc_mclk2_pin { - cdc_mclk2_sleep: cdc_mclk2_sleep { - mux { - pins = "gpio66"; - function = "pri_mi2s"; - }; - config { - pins = "gpio66"; - drive-strength = <2>; /* 2 mA */ - bias-pull-down; /* PULL DOWN */ - }; - }; - cdc_mclk2_active: cdc_mclk2_active { - mux { - pins = "gpio66"; - function = "pri_mi2s"; - }; - config { - pins = "gpio66"; - drive-strength = <8>; /* 8 mA */ - bias-disable; /* NO PULL */ - }; - }; - }; - - cdc-pdm-2-lines { - cdc_pdm_lines_2_act: pdm_lines_2_on { - mux { - pins = "gpio70", "gpio71", "gpio72"; - function = "cdc_pdm0"; - }; - - config { - pins = "gpio70", "gpio71", "gpio72"; - drive-strength = <8>; - }; - }; - - cdc_pdm_lines_2_sus: pdm_lines_2_off { - mux { - pins = "gpio70", "gpio71", "gpio72"; - function = "cdc_pdm0"; - }; - - config { - pins = "gpio70", "gpio71", "gpio72"; - drive-strength = <2>; - bias-disable; - }; - }; - }; - - cdc-pdm-lines { - cdc_pdm_lines_act: pdm_lines_on { - mux { - pins = "gpio69", "gpio73", "gpio74"; - function = "cdc_pdm0"; - }; - - config { - pins = "gpio69", "gpio73", "gpio74"; - drive-strength = <8>; - }; - }; - cdc_pdm_lines_sus: pdm_lines_off { - mux { - pins = "gpio69", "gpio73", "gpio74"; - function = "cdc_pdm0"; - }; - - config { - pins = "gpio69", "gpio73", "gpio74"; - drive-strength = <2>; - bias-disable; - }; - }; - }; - - cdc-pdm-comp-lines { - cdc_pdm_comp_lines_act: pdm_comp_lines_on { - mux { - pins = "gpio67", "gpio68"; - function = "cdc_pdm0"; - }; - - config { - pins = "gpio67", "gpio68"; - drive-strength = <8>; - }; - }; - - cdc_pdm_comp_lines_sus: pdm_comp_lines_off { - mux { - pins = "gpio67", "gpio68"; - function = "cdc_pdm0"; - }; - - config { - pins = "gpio67", "gpio68"; - drive-strength = <2>; - bias-disable; - }; - }; - }; - - cross-conn-det { - cross_conn_det_act: lines_on { - mux { - pins = "gpio63"; - function = "gpio"; - }; - - config { - pins = "gpio63"; - drive-strength = <8>; - output-low; - bias-pull-down; - }; - }; - - cross_conn_det_sus: lines_off { - mux { - pins = "gpio63"; - function = "gpio"; - }; - - config { - pins = "gpio63"; - drive-strength = <2>; - bias-pull-down; - }; - }; - }; - - /* WSA VI sense */ - wsa-vi { - wsa_vi_on: wsa_vi_on { - mux { - pins = "gpio94", "gpio95"; - function = "wsa_io"; - }; - - config { - pins = "gpio94", "gpio95"; - drive-strength = <8>; /* 8 MA */ - bias-disable; /* NO pull */ - }; - }; - - wsa_vi_off: wsa_vi_off { - mux { - pins = "gpio94", "gpio95"; - function = "wsa_io"; - }; - - config { - pins = "gpio94", "gpio95"; - drive-strength = <2>; /* 2 MA */ - bias-pull-down; - }; - }; - }; - - /* WSA Reset */ - wsa_reset { - wsa_reset_on: wsa_reset_on { - mux { - pins = "gpio96"; - function = "gpio"; - }; - - config { - pins = "gpio96"; - drive-strength = <2>; /* 2 MA */ - output-high; - }; - }; - - wsa_reset_off: wsa_reset_off { - mux { - pins = "gpio96"; - function = "gpio"; - }; - - config { - pins = "gpio96"; - drive-strength = <2>; /* 2 MA */ - output-low; - }; - }; - }; - - /* WSA CLK */ - wsa_clk { - wsa_clk_on: wsa_clk_on { - mux { - pins = "gpio25"; - function = "pri_mi2s_mclk_a"; - }; - - config { - pins = "gpio25"; - drive-strength = <8>; /* 8 MA */ - output-high; - }; - }; - - wsa_clk_off: wsa_clk_off { - mux { - pins = "gpio25"; - function = "pri_mi2s_mclk_a"; - }; - - config { - pins = "gpio25"; - drive-strength = <2>; /* 2 MA */ - output-low; - bias-pull-down; - }; - }; - }; - - pri-tlmm-lines { - pri_tlmm_lines_act: pri_tlmm_lines_act { - mux { - pins = "gpio88", "gpio91", "gpio93"; - function = "pri_mi2s"; - }; - - config { - pins = "gpio88", "gpio91", "gpio93"; - drive-strength = <8>; - }; - }; - - pri_tlmm_lines_sus: pri_tlmm_lines_sus { - mux { - pins = "gpio88", "gpio91", "gpio93"; - function = "pri_mi2s"; - }; - - config { - pins = "gpio88", "gpio91", "gpio93"; - drive-strength = <2>; - bias-pull-down; - }; - }; - }; - - pri-tlmm-ws-lines { - pri_tlmm_ws_act: pri_tlmm_ws_act { - mux { - pins = "gpio92"; - function = "pri_mi2s_ws"; - }; - - config { - pins = "gpio92"; - drive-strength = <8>; - }; - }; - - pri_tlmm_ws_sus: pri_tlmm_ws_sus { - mux { - pins = "gpio92"; - function = "pri_mi2s_ws"; - }; - - config { - pins = "gpio92"; - drive-strength = <2>; - bias-pull-down; - }; - }; - }; - - spi6 { - spi6_default: spi6_default { - /* active state */ - mux { - /* MOSI, MISO, CLK */ - pins = "gpio20", "gpio21", "gpio23"; - function = "blsp_spi6"; - }; - - config { - pins = "gpio20", "gpio21", "gpio23"; - drive-strength = <12>; /* 12 MA */ - bias-disable = <0>; /* No PULL */ - }; - }; - - spi6_sleep: spi6_sleep { - /* suspended state */ - mux { - /* MOSI, MISO, CLK */ - pins = "gpio20", "gpio21", "gpio23"; - function = "gpio"; - }; - - config { - pins = "gpio20", "gpio21", "gpio23"; - drive-strength = <2>; /* 2 MA */ - bias-pull-down; /* PULL Down */ - }; - }; - - spi6_cs0_active: cs0_active { - /* CS */ - mux { - pins = "gpio22"; - function = "blsp_spi6"; - }; - - config { - pins = "gpio22"; - drive-strength = <2>; - bias-disable = <0>; - }; - }; - - spi6_cs0_sleep: cs0_sleep { - /* CS */ - mux { - pins = "gpio22"; - function = "gpio"; - }; - - config { - pins = "gpio22"; - drive-strength = <2>; - bias-disable = <0>; - }; - }; - }; - - spi3 { - spi3_default: spi3_default { - /* active state */ - mux { - /* MOSI, MISO, CLK */ - pins = "gpio8", "gpio9", "gpio11"; - function = "blsp_spi3"; - }; - - config { - pins = "gpio8", "gpio9", "gpio11"; - drive-strength = <12>; /* 12 MA */ - bias-disable = <0>; /* No PULL */ - }; - }; - - spi3_sleep: spi3_sleep { - /* suspended state */ - mux { - /* MOSI, MISO, CLK */ - pins = "gpio8", "gpio9", "gpio11"; - function = "gpio"; - }; - - config { - pins = "gpio8", "gpio9", "gpio11"; - drive-strength = <2>; /* 2 MA */ - bias-pull-down; /* PULL Down */ - }; - }; - - spi3_cs0_active: cs0_active { - /* CS */ - mux { - pins = "gpio10"; - function = "blsp_spi3"; - }; - - config { - pins = "gpio10"; - drive-strength = <2>; - bias-disable = <0>; - }; - }; - - spi3_cs0_sleep: cs0_sleep { - /* CS */ - mux { - pins = "gpio10"; - function = "gpio"; - }; - - config { - pins = "gpio10"; - drive-strength = <2>; - bias-disable = <0>; - }; - }; - }; - - /* add pingrp for touchscreen */ - pmx_ts_int_active { - ts_int_active: ts_int_active { - mux { - pins = "gpio65"; - function = "gpio"; - }; - - config { - pins = "gpio65"; - drive-strength = <8>; - bias-pull-up; - }; - }; - }; - - pmx_ts_int_suspend { - ts_int_suspend: ts_int_suspend { - mux { - pins = "gpio65"; - function = "gpio"; - }; - - config { - pins = "gpio65"; - drive-strength = <2>; - bias-pull-down; - }; - }; - synaptic_int_suspend: synaptic_int_suspend { - mux { - pins = "gpio65"; - function = "gpio"; - }; - - config { - pins = "gpio65"; - drive-strength = <2>; - bias-pull-up; - }; - }; - }; - - /* add pingrp for goodix gt917d touchscreen */ - ts_int_default: ts_int_defalut { - mux { - pins = "gpio65"; - function = "gpio"; - }; - config { - pins = "gpio65"; - drive-strength = <16>; - /*bias-pull-up;*/ - input-enable; - bias-disable; - }; - }; - - ts_int_output_high: ts_int_output_high { - mux { - pins = "gpio65"; - function = "gpio"; - }; - config { - pins = "gpio65"; - output-high; - }; - }; - - ts_int_output_low: ts_int_output_low { - mux { - pins = "gpio65"; - function = "gpio"; - }; - config { - pins = "gpio65"; - output-low; - }; - }; - - ts_int_input: ts_int_input { - mux { - pins = "gpio65"; - function = "gpio"; - }; - config { - pins = "gpio65"; - input-enable; - bias-disable; - }; - }; - - pmx_ts_reset_active { - ts_reset_active: ts_reset_active { - mux { - pins = "gpio64"; - function = "gpio"; - }; - - config { - pins = "gpio64"; - drive-strength = <8>; - bias-pull-up; - }; - }; - }; - - pmx_ts_reset_suspend { - ts_reset_suspend: ts_reset_suspend { - mux { - pins = "gpio64"; - function = "gpio"; - }; - - config { - pins = "gpio64"; - drive-strength = <2>; - bias-pull-down; - }; - }; - synaptic_reset_suspend: synaptic_reset_suspend { - mux { - pins = "gpio64"; - function = "gpio"; - }; - - config { - pins = "gpio64"; - drive-strength = <2>; - bias-pull-up; - }; - }; - }; - - pmx_ts_release { - ts_release: ts_release { - mux { - pins = "gpio65", "gpio64"; - function = "gpio"; - }; - - config { - pins = "gpio65", "gpio64"; - drive-strength = <2>; - bias-pull-down; - }; - }; - }; - - tlmm_gpio_key { - gpio_key_active: gpio_key_active { - mux { - pins = "gpio85"; - function = "gpio"; - }; - - config { - pins = "gpio85"; - drive-strength = <2>; - bias-pull-up; - }; - }; - - gpio_key_suspend: gpio_key_suspend { - mux { - pins = "gpio85"; - function = "gpio"; - }; - - config { - pins = "gpio85"; - drive-strength = <2>; - bias-pull-up; - }; - }; - }; - pmx_qdsd_clk { - qdsd_clk_sdcard: clk_sdcard { - config { - pins = "qdsd_clk"; - bias-disable;/* NO pull */ - drive-strength = <16>; /* 16 MA */ - }; - }; - qdsd_clk_trace: clk_trace { - config { - pins = "qdsd_clk"; - bias-pull-down; /* pull down */ - drive-strength = <2>; /* 2 MA */ - }; - }; - qdsd_clk_swdtrc: clk_swdtrc { - config { - pins = "qdsd_clk"; - bias-pull-down; /* pull down */ - drive-strength = <2>; /* 2 MA */ - }; - }; - qdsd_clk_spmi: clk_spmi { - config { - pins = "qdsd_clk"; - bias-pull-down; /* pull down */ - drive-strength = <2>; /* 2 MA */ - }; - }; - }; - - pmx_qdsd_cmd { - qdsd_cmd_sdcard: cmd_sdcard { - config { - pins = "qdsd_cmd"; - bias-pull-down; /* pull down */ - drive-strength = <8>; /* 8 MA */ - }; - }; - qdsd_cmd_trace: cmd_trace { - config { - pins = "qdsd_cmd"; - bias-pull-down; /* pull down */ - drive-strength = <2>; /* 2 MA */ - }; - }; - qdsd_cmd_swduart: cmd_uart { - config { - pins = "qdsd_cmd"; - bias-pull-up; /* pull up */ - drive-strength = <2>; /* 2 MA */ - }; - }; - qdsd_cmd_swdtrc: cmd_swdtrc { - config { - pins = "qdsd_cmd"; - bias-pull-up; /* pull up */ - drive-strength = <2>; /* 2 MA */ - }; - }; - qdsd_cmd_jtag: cmd_jtag { - config { - pins = "qdsd_cmd"; - bias-disable; /* NO pull */ - drive-strength = <8>; /* 8 MA */ - }; - }; - qdsd_cmd_spmi: cmd_spmi { - config { - pins = "qdsd_cmd"; - bias-pull-down; /* pull down */ - drive-strength = <10>; /* 10 MA */ - }; - }; - }; - - pmx_qdsd_data0 { - qdsd_data0_sdcard: data0_sdcard { - config { - pins = "qdsd_data0"; - bias-pull-down; /* pull down */ - drive-strength = <8>; /* 8 MA */ - }; - }; - qdsd_data0_trace: data0_trace { - config { - pins = "qdsd_data0"; - bias-pull-down; /* pull down */ - drive-strength = <8>; /* 8 MA */ - }; - }; - qdsd_data0_swduart: data0_uart { - config { - pins = "qdsd_data0"; - bias-pull-down; /* pull down */ - drive-strength = <2>; /* 2 MA */ - }; - }; - qdsd_data0_swdtrc: data0_swdtrc { - config { - pins = "qdsd_data0"; - bias-pull-down; /* pull down */ - drive-strength = <2>; /* 2 MA */ - }; - }; - qdsd_data0_jtag: data0_jtag { - config { - pins = "qdsd_data0"; - bias-pull-up; /* pull up */ - drive-strength = <2>; /* 2 MA */ - }; - }; - qdsd_data0_spmi: data0_spmi { - config { - pins = "qdsd_data0"; - bias-pull-down; /* pull down */ - drive-strength = <2>; /* 2 MA */ - }; - }; - }; - - pmx_qdsd_data1 { - qdsd_data1_sdcard: data1_sdcard { - config { - pins = "qdsd_data1"; - bias-pull-down; /* pull down */ - drive-strength = <8>; /* 8 MA */ - }; - }; - qdsd_data1_trace: data1_trace { - config { - pins = "qdsd_data1"; - bias-pull-down; /* pull down */ - drive-strength = <8>; /* 8 MA */ - }; - }; - qdsd_data1_swduart: data1_uart { - config { - pins = "qdsd_data1"; - bias-pull-down; /* pull down */ - drive-strength = <2>; /* 2 MA */ - }; - }; - qdsd_data1_swdtrc: data1_swdtrc { - config { - pins = "qdsd_data1"; - bias-pull-down; /* pull down */ - drive-strength = <2>; /* 2 MA */ - }; - }; - qdsd_data1_jtag: data1_jtag { - config { - pins = "qdsd_data1"; - bias-pull-down; /* pull down */ - drive-strength = <2>; /* 2 MA */ - }; - }; - }; - - pmx_qdsd_data2 { - qdsd_data2_sdcard: data2_sdcard { - config { - pins = "qdsd_data2"; - bias-pull-down; /* pull down */ - drive-strength = <8>; /* 8 MA */ - }; - }; - qdsd_data2_trace: data2_trace { - config { - pins = "qdsd_data2"; - bias-pull-down; /* pull down */ - drive-strength = <8>; /* 8 MA */ - }; - }; - qdsd_data2_swduart: data2_uart { - config { - pins = "qdsd_data2"; - bias-pull-down; /* pull down */ - drive-strength = <2>; /* 2 MA */ - }; - }; - qdsd_data2_swdtrc: data2_swdtrc { - config { - pins = "qdsd_data2"; - bias-pull-down; /* pull down */ - drive-strength = <2>; /* 2 MA */ - }; - }; - qdsd_data2_jtag: data2_jtag { - config { - pins = "qdsd_data2"; - bias-pull-up; /* pull up */ - drive-strength = <8>; /* 8 MA */ - }; - }; - }; - - pmx_qdsd_data3 { - qdsd_data3_sdcard: data3_sdcard { - config { - pins = "qdsd_data3"; - bias-pull-down; /* pull down */ - drive-strength = <8>; /* 8 MA */ - }; - }; - qdsd_data3_trace: data3_trace { - config { - pins = "qdsd_data3"; - bias-pull-down; /* pull down */ - drive-strength = <8>; /* 8 MA */ - }; - }; - qdsd_data3_swduart: data3_uart { - config { - pins = "qdsd_data3"; - bias-pull-up; /* pull up */ - drive-strength = <2>; /* 2 MA */ - }; - }; - qdsd_data3_swdtrc: data3_swdtrc { - config { - pins = "qdsd_data3"; - bias-pull-up; /* pull up */ - drive-strength = <2>; /* 2 MA */ - }; - }; - qdsd_data3_jtag: data3_jtag { - config { - pins = "qdsd_data3"; - bias-pull-up; /* pull up */ - drive-strength = <2>; /* 2 MA */ - }; - }; - qdsd_data3_spmi: data3_spmi { - config { - pins = "qdsd_data3"; - bias-pull-down; /* pull down */ - drive-strength = <8>; /* 8 MA */ - }; - }; - }; - - typec_ssmux_config: typec_ssmux_config { - mux { - pins = "gpio139"; - function = "gpio"; - }; - - config { - pins = "gpio139"; - drive-strength = <2>; - bias-disable; - }; - }; - - ssusb_mode_sel: ssusb_mode_sel { - mux { - pins = "gpio12"; - function = "gpio"; - }; - - config { - pins = "gpio12"; - drive-strength = <2>; - bias-disable; - input-enable; - }; - }; - }; -}; diff --git a/arch/arm/boot/dts/qcom/msm8953-pinctrl.dtsi b/arch/arm/boot/dts/qcom/msm8953-pinctrl.dtsi index e858624fbd5e..4f4324d74607 100644 --- a/arch/arm/boot/dts/qcom/msm8953-pinctrl.dtsi +++ b/arch/arm/boot/dts/qcom/msm8953-pinctrl.dtsi @@ -1,6 +1,5 @@ /* * Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. - * Copyright (C) 2018 XiaoMi, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -146,12 +145,12 @@ cam_sensor_rear_default: cam_sensor_rear_default { /* RESET, STANDBY */ mux { - pins = "gpio33", "gpio39"; + pins = "gpio40", "gpio39"; function = "gpio"; }; config { - pins = "gpio33", "gpio39"; + pins = "gpio40", "gpio39"; bias-disable; /* No PULL */ drive-strength = <2>; /* 2 MA */ }; @@ -160,12 +159,12 @@ cam_sensor_rear_sleep: cam_sensor_rear_sleep { /* RESET, STANDBY */ mux { - pins = "gpio33", "gpio39"; + pins = "gpio40", "gpio39"; function = "gpio"; }; config { - pins = "gpio33", "gpio39"; + pins = "gpio40", "gpio39"; bias-disable; /* No PULL */ drive-strength = <2>; /* 2 MA */ }; @@ -230,12 +229,12 @@ cam_sensor_rear_vana: cam_sensor_rear_vdig { /* VDIG */ mux { - pins = "gpio62"; + pins = "gpio134"; function = "gpio"; }; config { - pins = "gpio62"; + pins = "gpio134"; bias-disable; /* No PULL */ drive-strength = <2>; /* 2 MA */ }; @@ -244,12 +243,40 @@ cam_sensor_rear_vana_sleep: cam_sensor_rear_vdig_sleep { /* VDIG */ mux { - pins = "gpio62"; + pins = "gpio134"; function = "gpio"; }; config { - pins = "gpio62"; + pins = "gpio134"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_rear_vana1: cam_sensor_rear_vdig1 { + /* VDIG */ + mux { + pins = "gpio46"; + function = "gpio"; + }; + + config { + pins = "gpio46"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_rear_vana_sleep1: cam_sensor_rear_vdig_sleep1 { + /* VDIG */ + mux { + pins = "gpio46"; + function = "gpio"; + }; + + config { + pins = "gpio46"; bias-disable; /* No PULL */ drive-strength = <2>; /* 2 MA */ }; @@ -288,12 +315,12 @@ cam_sensor_front_default: cam_sensor_front_default { /* RESET, STANDBY */ mux { - pins = "gpio41","gpio132"; + pins = "gpio131","gpio132"; function = "gpio"; }; config { - pins = "gpio41","gpio132"; + pins = "gpio131","gpio132"; bias-disable; /* No PULL */ drive-strength = <2>; /* 2 MA */ }; @@ -302,12 +329,12 @@ cam_sensor_front_sleep: cam_sensor_front_sleep { /* RESET, STANDBY */ mux { - pins = "gpio41","gpio132"; + pins = "gpio131","gpio132"; function = "gpio"; }; config { - pins = "gpio41","gpio132"; + pins = "gpio131","gpio132"; bias-disable; /* No PULL */ drive-strength = <2>; /* 2 MA */ }; @@ -346,12 +373,12 @@ cam_sensor_front1_default: cam_sensor_front1_default { /* RESET, STANDBY */ mux { - pins = "gpio129"; + pins = "gpio129", "gpio130"; function = "gpio"; }; config { - pins = "gpio129"; + pins = "gpio129", "gpio130"; bias-disable; /* No PULL */ drive-strength = <2>; /* 2 MA */ }; @@ -360,12 +387,12 @@ cam_sensor_front1_sleep: cam_sensor_front1_sleep { /* RESET, STANDBY */ mux { - pins = "gpio129"; + pins = "gpio129", "gpio130"; function = "gpio"; }; config { - pins = "gpio129"; + pins = "gpio129", "gpio130"; bias-disable; /* No PULL */ drive-strength = <2>; /* 2 MA */ }; @@ -750,105 +777,6 @@ }; }; - /*fp gpio of gooid & fpc */ - goodix_spi_active: goodix_spi_active{ - mux { - pins = "gpio16", "gpio17", "gpio18", "gpio19"; - function = "blsp_spi5"; - }; - config { - pins = "gpio16", "gpio17", "gpio18", "gpio19"; - drive-strength = <2>; - bias-disable = <0>; - }; - }; - goodix_reset_reset: goodix_reset_reset{ - mux { - pins = "gpio140"; - function = "gpio"; - }; - config { - pins = "gpio140"; - drive-strength = <2>; - bias-disable = <0>; - output-low; - }; - }; - goodix_reset_active: goodix_reset_active{ - mux { - pins = "gpio140"; - function = "gpio"; - }; - config { - pins = "gpio140"; - drive-strength = <2>; - bias-disable = <0>; - output-high; - }; - }; - goodix_irq_active: goodix_irq_active { - mux { - pins = "gpio48"; - function = "gpio"; - }; - config { - pins = "gpio48"; - drive-strength = <2>; - bias-disable = <0>; - input-enable; - }; - }; - - /* fingerprint pin function */ - fpc_spi_active: fpc_spi_active { - mux { - pins = "gpio16", "gpio17", "gpio18", "gpio19"; - function = "blsp_spi7"; - }; - - config { - pins = "gpio16", "gpio17", "gpio18", "gpio19"; - drive-strength = <2>; - bias-disable; - }; - }; - fpc_reset_reset: fpc_reset_reset { - mux { - pins = "gpio140"; - function = "gpio"; - }; - config { - pins = "gpio140"; - drive-strength = <2>; - bias-disable; - output-low; - }; - }; - fpc_reset_active: fpc_reset_active { - mux { - pins = "gpio140"; - function = "gpio"; - }; - config { - pins = "gpio140"; - drive-strength = <2>; - bias-disable; - output-high; - }; - }; - fpc_irq_active: fpc_irq_active { - mux { - pins = "gpio48"; - function = "gpio"; - }; - config { - pins = "gpio48"; - drive-strength = <2>; - bias-disable; - input-enable; - }; - }; - pmx_rd_nfc_int { /*qcom,pins = <&gp 17>;*/ pins = "gpio17"; @@ -1231,24 +1159,24 @@ pri-tlmm-lines { pri_tlmm_lines_act: pri_tlmm_lines_act { mux { - pins = "gpio88", "gpio91", "gpio93"; + pins = "gpio91", "gpio93"; function = "pri_mi2s"; }; config { - pins = "gpio88", "gpio91", "gpio93"; + pins = "gpio91", "gpio93"; drive-strength = <8>; }; }; pri_tlmm_lines_sus: pri_tlmm_lines_sus { mux { - pins = "gpio88", "gpio91", "gpio93"; + pins = "gpio91", "gpio93"; function = "pri_mi2s"; }; config { - pins = "gpio88", "gpio91", "gpio93"; + pins = "gpio91", "gpio93"; drive-strength = <2>; bias-pull-down; }; @@ -1282,66 +1210,6 @@ }; }; - spi6 { - spi6_default: spi6_default { - /* active state */ - mux { - /* MOSI, MISO, CLK */ - pins = "gpio20", "gpio21", "gpio23"; - function = "blsp_spi6"; - }; - - config { - pins = "gpio20", "gpio21", "gpio23"; - drive-strength = <12>; /* 12 MA */ - bias-disable = <0>; /* No PULL */ - }; - }; - - spi6_sleep: spi6_sleep { - /* suspended state */ - mux { - /* MOSI, MISO, CLK */ - pins = "gpio20", "gpio21", "gpio23"; - function = "gpio"; - }; - - config { - pins = "gpio20", "gpio21", "gpio23"; - drive-strength = <2>; /* 2 MA */ - bias-pull-down; /* PULL Down */ - }; - }; - - spi6_cs0_active: cs0_active { - /* CS */ - mux { - pins = "gpio22"; - function = "blsp_spi6"; - }; - - config { - pins = "gpio22"; - drive-strength = <2>; - bias-disable = <0>; - }; - }; - - spi6_cs0_sleep: cs0_sleep { - /* CS */ - mux { - pins = "gpio22"; - function = "gpio"; - }; - - config { - pins = "gpio22"; - drive-strength = <2>; - bias-disable = <0>; - }; - }; - }; - spi3 { spi3_default: spi3_default { /* active state */ @@ -1433,55 +1301,6 @@ }; }; - /* add pingrp for goodix gt917d touchscreen */ - ts_int_default: ts_int_defalut { - mux { - pins = "gpio65"; - function = "gpio"; - }; - config { - pins = "gpio65"; - drive-strength = <16>; - /*bias-pull-up;*/ - input-enable; - bias-disable; - }; - }; - - ts_int_output_high: ts_int_output_high { - mux { - pins = "gpio65"; - function = "gpio"; - }; - config { - pins = "gpio65"; - output-high; - }; - }; - - ts_int_output_low: ts_int_output_low { - mux { - pins = "gpio65"; - function = "gpio"; - }; - config { - pins = "gpio65"; - output-low; - }; - }; - - ts_int_input: ts_int_input { - mux { - pins = "gpio65"; - function = "gpio"; - }; - config { - pins = "gpio65"; - input-enable; - bias-disable; - }; - }; - pmx_ts_reset_active { ts_reset_active: ts_reset_active { mux { @@ -1530,12 +1349,12 @@ tlmm_gpio_key { gpio_key_active: gpio_key_active { mux { - pins = "gpio85"; + pins = "gpio85", "gpio86", "gpio87"; function = "gpio"; }; config { - pins = "gpio85"; + pins = "gpio85", "gpio86", "gpio87"; drive-strength = <2>; bias-pull-up; }; @@ -1543,12 +1362,12 @@ gpio_key_suspend: gpio_key_suspend { mux { - pins = "gpio85"; + pins = "gpio85", "gpio86", "gpio87"; function = "gpio"; }; config { - pins = "gpio85"; + pins = "gpio85", "gpio86", "gpio87"; drive-strength = <2>; bias-pull-up; }; diff --git a/arch/arm/boot/dts/qcom/msm8953-pm.dtsi b/arch/arm/boot/dts/qcom/msm8953-pm.dtsi index 4dbc6f9c4d5a..d30fe282fb35 100644 --- a/arch/arm/boot/dts/qcom/msm8953-pm.dtsi +++ b/arch/arm/boot/dts/qcom/msm8953-pm.dtsi @@ -1,5 +1,4 @@ /* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved. - * Copyright (C) 2018 XiaoMi, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -403,7 +402,6 @@ <0xff 264>, /* arm-smmu context fault */ <0xff 269>, /* rpm_wdog_expired_irq */ <0xff 270>, /* blsp1_bam_irq[0] */ - <0xff 271>, /* blsp1_bam_irq[0] */ <0xff 273>, /* smmu_bus_intr[18] */ <0xff 274>, /* smmu_bus_intr[19] */ <0xff 275>, /* rpm_ipc(30) */ @@ -477,7 +475,6 @@ <72 139>, <73 140>, <74 141>, - <0xff 24>, <0xff 88>; }; diff --git a/arch/arm/boot/dts/qcom/msm8953-qrd-e7.dtsi b/arch/arm/boot/dts/qcom/msm8953-qrd-e7.dtsi deleted file mode 100644 index 377e6deb9a18..000000000000 --- a/arch/arm/boot/dts/qcom/msm8953-qrd-e7.dtsi +++ /dev/null @@ -1,610 +0,0 @@ -/* - * Copyright (c) 2015-2016, The Linux Foundation. All rights reserved. - * Copyright (C) 2018 XiaoMi, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include "msm8953-pinctrl-e7.dtsi" -#include "msm8953-camera-sensor-qrd-e7.dtsi" - -&soc { - gpio_keys { - compatible = "gpio-keys"; - input-name = "gpio-keys"; - pinctrl-names = "tlmm_gpio_key_active","tlmm_gpio_key_suspend"; - pinctrl-0 = <&gpio_key_active>; - pinctrl-1 = <&gpio_key_suspend>; - - vol_up { - label = "volume_up"; - gpios = <&tlmm 85 0x1>; - linux,input-type = <1>; - linux,code = <115>; - debounce-interval = <15>; - }; - }; - - goodix_fp { - compatible = "goodix,fingerprint"; - spi-max-frequency = <1000000>; - input-device-name = "gf3208"; - interrupt-parent = <&tlmm>; - interrupts = <9 0x0>; - - goodix,gpio_reset = <&tlmm 140 0>; - goodix,gpio_irq = <&tlmm 48 0>; - - clock-names = "iface_clk", "core_clk"; - clocks = <&clock_gcc clk_gcc_blsp1_ahb_clk>, - <&clock_gcc clk_gcc_blsp1_qup1_spi_apps_clk>; - - pinctrl-names = "goodixfp_spi_active", - "goodixfp_reset_reset", - "goodixfp_reset_active", - "goodixfp_irq_active"; - - pinctrl-0 = <&goodix_spi_active>; - pinctrl-1 = <&goodix_reset_reset>; - pinctrl-2 = <&goodix_reset_active>; - pinctrl-3 = <&goodix_irq_active>; - }; - - fpc1020 { - compatible = "fpc,fpc1020"; - spi-max-frequency = <1000000>; - input-device-name = "fpc1020"; - interrupt-parent = <&tlmm>; - interrupts = <9 0x0>; - fpc,gpio_rst = <&tlmm 140 0>; - fpc,gpio_irq = <&tlmm 48 0>; - - clock-names = "iface_clk", "core_clk"; - clocks = <&clock_gcc clk_gcc_blsp1_ahb_clk>, - <&clock_gcc clk_gcc_blsp1_qup1_spi_apps_clk>; - - pinctrl-names = "fpc1020_spi_active", - "fpc1020_reset_reset", - "fpc1020_reset_active", - "fpc1020_irq_active"; - - pinctrl-0 = <&fpc_spi_active>; - pinctrl-1 = <&fpc_reset_reset>; - pinctrl-2 = <&fpc_reset_active>; - pinctrl-3 = <&fpc_irq_active>; - }; - - i2c@78b7000 { /* BLSP1 QUP3 */ - status = "okay"; - vituralsar@33{ - compatible = "virtualsar,sar"; - reg = <0x33>; - interrupt-parent = <&tlmm>; - interrupts = <130 0x02>; - vituralsar,irq-gpio = <&tlmm 130 0x2008>; - }; - synaptics_dsx@20 { - compatible = "synaptics,dsx-i2c"; - reg = <0x20>; - interrupt-parent = <&tlmm>; - interrupts = <65 0x2>; - vdd-supply = <&pm8953_l10>; - avdd-supply = <&pm8953_l6>; - pinctrl-names = "pmx_ts_active", "pmx_ts_suspend"; - pinctrl-0 = <&ts_int_active &ts_reset_active>; - pinctrl-1 = <&synaptic_int_suspend &synaptic_reset_suspend>; - synaptics,pwr-reg-name = "avdd"; - synaptics,bus-reg-name = "vdd"; - synaptics,ub-i2c-addr = <0x2c>; - synaptics,irq-gpio = <&tlmm 65 0x2008>; /* IRQF_ONESHOT | IRQF_TRIGGER_LOW */ - synaptics,rst-gpio = <&tlmm 64 0x0>; - synaptics,irq-on-state = <0>; - synaptics,power-delay-ms = <200>; - synaptics,reset-delay-ms = <200>; - synaptics,reset-on-state = <0>; - synaptics,reset-active-ms = <20>; - /* uncomment and update line below as appropriate if there are 0D buttons */ - /* synaptics,cap-button-codes = <102 158>; */ - synaptics,cap-button-codes = <139 172 158>; - /* uncomment and update lines below as appropriate if there are virtual buttons */ - /* synaptics,vir-button-codes = <102 100 900 100 60 158 300 900 100 60>; */ - /* synaptics,max-y-for-2d = <800>; */ - }; - /* Novatek device tree node */ - novatek@62 { - compatible = "novatek,NVT-ts"; - reg = <0x62>; - status = "ok"; - - vdd-supply = <&pm8953_l10>; - avdd-supply = <&pm8953_l6>; - nvt,pwr-reg-name = "avdd"; - nvt,bus-reg-name = "vdd"; - - novatek,reset-gpio = <&tlmm 64 0x0>; - novatek,irq-gpio = <&tlmm 65 0x2001>; - - /* MP */ - novatek,mp-support-dt; - - novatek-mp-criteria-5902@0 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "novatek-mp-criteria-5902"; - - /* MP Config*/ - IC_X_CFG_SIZE = <18>; - IC_Y_CFG_SIZE = <32>; - IC_KEY_CFG_SIZE = <4>; - X_Channel = <18>; - Y_Channel = <32>; - AIN_X = <17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0>; - AIN_Y = <31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 - 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0>; - AIN_KEY = <0 1 2 0xFF>; - - /* MP Criteria */ - PS_Config_Lmt_Short_Rawdata_P = <13500>; - PS_Config_Lmt_Short_Rawdata_N = <11500>; - PS_Config_Lmt_Key_Short_Rawdata_P = <20000>; - PS_Config_Lmt_Key_Short_Rawdata_N = <11550>; - PS_Config_Lmt_Short_Diff_P = <6300>; - PS_Config_Lmt_Short_Diff_N = <0>; - PS_Config_Lmt_Key_Short_Diff_P = <6300>; - PS_Config_Lmt_Key_Short_Diff_N = <0>; - PS_Config_Lmt_Short_Base_P = <2000>; - PS_Config_Lmt_Short_Base_N = <(-2000)>; - PS_Config_Lmt_Key_Short_Base_P = <2000>; - PS_Config_Lmt_Key_Short_Base_N = <(-2000)>; - - PS_Config_Lmt_Open_Rawdata_P = < - 10288 10571 10538 10516 10489 10469 10460 10489 10509 10474 10495 10470 10454 10454 10458 10461 10475 10402 - 10203 10356 10326 10308 10287 10276 10272 10295 10305 10273 10287 10268 10256 10250 10251 10249 10260 10258 - 10262 10393 10367 10350 10333 10337 10322 10344 10348 10307 10320 10298 10289 10277 10279 10275 10283 10281 - 10178 10320 10290 10273 10261 10258 10253 10275 10276 10252 10264 10245 10234 10230 10219 10215 10226 10208 - 10199 10348 10307 10291 10285 10278 10277 10299 10299 10279 10290 10270 10260 10248 10245 10242 10263 10234 - 10137 10276 10233 10217 10215 10216 10210 10233 10231 10199 10208 10189 10178 10165 10164 10160 10182 10153 - 10151 10284 10241 10226 10228 10225 10224 10247 10246 10235 10245 10225 10215 10214 10202 10196 10218 10190 - 10067 10186 10153 10139 10143 10140 10140 10164 10162 10140 10149 10127 10118 10109 10106 10100 10114 10093 - 10095 10205 10188 10167 10171 10167 10168 10191 10189 10152 10162 10139 10130 10120 10119 10126 10124 10106 - 9997 10101 10083 10065 10068 10065 10068 10092 10090 10072 10080 10057 10048 10049 10038 10045 10043 10026 - 10000 10100 10082 10068 10068 10068 10072 10097 10094 10069 10076 10053 10044 10037 10035 10041 10041 10021 - 9917 10011 9988 9983 9993 9983 9987 10012 10009 9977 9984 9959 9951 9942 9943 9948 9949 9930 - 9910 9999 9969 9983 9977 9974 9980 10005 10001 9986 9994 9969 9960 9965 9961 9949 9962 9938 - 9811 9892 9867 9884 9870 9871 9878 9903 9899 9881 9888 9862 9853 9850 9861 9844 9861 9832 - 9823 9900 9880 9898 9896 9884 9893 9917 9911 9876 9881 9856 9847 9843 9857 9839 9862 9826 - 9708 9779 9763 9780 9769 9769 9777 9800 9794 9784 9790 9764 9755 9765 9768 9752 9777 9735 - 9690 9758 9747 9750 9750 9752 9760 9784 9780 9758 9763 9739 9732 9734 9732 9728 9759 9711 - 9597 9661 9652 9658 9666 9668 9662 9685 9681 9652 9657 9632 9640 9629 9631 9631 9665 9610 - 9572 9636 9628 9634 9632 9632 9640 9661 9656 9641 9646 9623 9620 9631 9623 9624 9659 9598 - 9458 9521 9513 9518 9514 9519 9537 9547 9542 9529 9533 9522 9510 9511 9512 9518 9554 9485 - 9449 9511 9504 9509 9517 9512 9529 9538 9533 9494 9498 9485 9477 9474 9478 9489 9523 9448 - 9316 9380 9371 9376 9376 9381 9399 9406 9401 9394 9398 9389 9380 9387 9380 9396 9430 9347 - 9282 9348 9339 9343 9341 9350 9359 9374 9368 9349 9353 9335 9336 9338 9338 9357 9391 9301 - 9179 9245 9237 9242 9252 9249 9255 9285 9265 9236 9250 9218 9225 9226 9229 9248 9283 9186 - 9131 9198 9190 9196 9198 9205 9210 9239 9219 9208 9224 9192 9199 9201 9207 9228 9261 9158 - 9015 9084 9077 9082 9082 9093 9098 9126 9105 9094 9110 9078 9086 9088 9099 9120 9152 9042 - 8984 9054 9046 9052 9063 9062 9067 9088 9072 9046 9060 9032 9041 9043 9057 9078 9111 8989 - 8806 8877 8871 8877 8878 8882 8889 8903 8902 8903 8892 8872 8881 8883 8903 8923 8955 8828 - 8763 8836 8830 8836 8835 8838 8845 8859 8861 8858 8837 8818 8826 8832 8853 8874 8906 8769 - 8673 8746 8741 8746 8751 8743 8749 8764 8765 8751 8726 8705 8711 8724 8747 8767 8797 8650 - 8633 8707 8701 8706 8696 8697 8706 8719 8716 8725 8697 8677 8694 8703 8726 8747 8779 8621 - 10520 10245 10233 10231 10209 10213 10224 10243 10220 10229 10211 10185 10199 10226 10252 10278 10309 9059 - 13000 13000 13000>; - - PS_Config_Lmt_Open_Rawdata_N = < - 8578 8744 8725 8712 8696 8684 8679 8696 8708 8687 8699 8685 8675 8675 8678 8679 8688 8645 - 8528 8617 8600 8590 8577 8571 8568 8582 8588 8569 8577 8566 8559 8556 8556 8555 8561 8560 - 8562 8640 8624 8614 8604 8607 8598 8611 8613 8589 8597 8584 8578 8571 8572 8570 8575 8574 - 8513 8597 8579 8569 8562 8560 8557 8570 8571 8556 8564 8553 8546 8544 8537 8535 8541 8531 - 8525 8613 8589 8579 8576 8572 8571 8584 8584 8572 8579 8567 8561 8554 8553 8551 8563 8546 - 8489 8571 8546 8536 8535 8536 8532 8546 8544 8525 8531 8519 8513 8506 8505 8502 8515 8499 - 8497 8576 8550 8541 8543 8541 8540 8554 8553 8547 8553 8541 8535 8534 8527 8524 8537 8520 - 8448 8518 8499 8490 8493 8491 8491 8505 8504 8491 8496 8483 8478 8472 8471 8467 8476 8463 - 8464 8529 8519 8507 8509 8507 8507 8521 8520 8498 8504 8491 8485 8479 8478 8483 8482 8471 - 8407 8468 8458 8447 8449 8447 8448 8463 8461 8451 8456 8442 8437 8438 8431 8435 8434 8424 - 8409 8467 8457 8449 8448 8449 8451 8466 8464 8449 8454 8440 8435 8430 8429 8433 8433 8421 - 8360 8415 8402 8399 8405 8399 8401 8416 8414 8395 8399 8384 8380 8375 8375 8378 8379 8368 - 8356 8408 8390 8398 8395 8393 8397 8411 8409 8401 8405 8390 8385 8388 8386 8379 8386 8372 - 8297 8345 8330 8340 8332 8333 8337 8352 8349 8339 8343 8328 8322 8321 8327 8317 8327 8310 - 8304 8350 8338 8349 8347 8340 8346 8360 8357 8336 8339 8324 8319 8316 8325 8314 8328 8306 - 8237 8279 8269 8279 8273 8273 8277 8291 8288 8282 8285 8270 8265 8270 8272 8263 8278 8253 - 8227 8266 8260 8262 8262 8263 8268 8282 8280 8266 8270 8255 8251 8252 8251 8249 8267 8239 - 8172 8209 8204 8208 8212 8214 8210 8224 8221 8204 8207 8193 8197 8191 8192 8192 8212 8180 - 8157 8195 8190 8193 8192 8193 8197 8210 8207 8198 8201 8187 8186 8192 8187 8188 8208 8172 - 8090 8127 8123 8126 8123 8126 8137 8143 8140 8132 8134 8128 8121 8121 8122 8126 8147 8106 - 8085 8122 8117 8120 8125 8122 8132 8137 8135 8111 8114 8106 8101 8100 8102 8109 8129 8085 - 8007 8044 8039 8042 8042 8045 8056 8060 8057 8053 8055 8050 8044 8048 8044 8054 8074 8025 - 7987 8025 8020 8023 8022 8027 8032 8041 8038 8027 8028 8018 8019 8020 8020 8031 8051 7998 - 7926 7966 7961 7964 7970 7968 7971 7989 7977 7960 7968 7950 7954 7954 7956 7967 7988 7931 - 7898 7938 7933 7936 7937 7942 7945 7962 7950 7944 7953 7934 7938 7939 7943 7955 7975 7914 - 7830 7871 7867 7870 7869 7876 7879 7895 7883 7877 7886 7867 7872 7873 7880 7892 7911 7846 - 7812 7853 7849 7852 7858 7858 7861 7873 7864 7848 7857 7840 7846 7847 7855 7867 7886 7815 - 7708 7749 7746 7749 7750 7752 7756 7765 7764 7765 7758 7746 7751 7752 7764 7776 7795 7720 - 7682 7725 7722 7725 7724 7726 7730 7738 7740 7738 7726 7714 7719 7723 7735 7747 7766 7685 - 7629 7672 7669 7672 7675 7670 7674 7683 7683 7675 7660 7648 7652 7659 7673 7684 7702 7616 - 7606 7649 7646 7648 7643 7643 7649 7656 7655 7660 7643 7632 7642 7647 7660 7673 7692 7599 - 8714 8553 8545 8545 8531 8534 8540 8551 8538 8543 8533 8518 8525 8542 8556 8572 8590 7856 - 6500 6500 6500>; - - PS_Config_Lmt_FW_Rawdata_P = < - 1126 1131 1127 1122 1126 1127 1128 1123 1125 1130 1119 1128 1127 1117 1119 1130 1120 1127 - 1125 1129 1126 1118 1133 1125 1125 1123 1127 1122 1126 1127 1124 1126 1122 1119 1123 1124 - 1123 1123 1125 1125 1124 1123 1123 1122 1126 1128 1120 1123 1120 1125 1120 1123 1122 1121 - 1123 1121 1128 1123 1122 1128 1123 1124 1123 1121 1125 1122 1120 1124 1121 1124 1127 1124 - 1130 1126 1129 1127 1124 1122 1124 1128 1121 1126 1120 1129 1118 1119 1120 1137 1121 1122 - 1126 1124 1131 1117 1129 1122 1127 1120 1119 1125 1120 1123 1122 1121 1118 1126 1125 1127 - 1125 1122 1131 1125 1123 1126 1124 1118 1118 1126 1122 1124 1124 1129 1121 1124 1123 1120 - 1128 1128 1122 1129 1121 1128 1129 1119 1120 1118 1118 1123 1125 1122 1126 1121 1129 1126 - 1125 1126 1123 1118 1123 1117 1119 1118 1125 1122 1125 1127 1122 1126 1120 1123 1123 1123 - 1126 1129 1124 1128 1119 1127 1119 1126 1118 1125 1123 1121 1121 1122 1121 1127 1122 1130 - 1126 1123 1125 1127 1121 1121 1124 1128 1120 1119 1124 1118 1126 1121 1123 1123 1126 1119 - 1130 1129 1124 1132 1123 1123 1121 1127 1118 1125 1126 1122 1131 1120 1127 1127 1121 1128 - 1125 1128 1130 1128 1124 1129 1122 1123 1125 1124 1128 1122 1123 1120 1124 1123 1123 1122 - 1124 1129 1125 1129 1129 1127 1123 1123 1129 1124 1123 1121 1125 1121 1126 1123 1124 1125 - 1127 1128 1126 1122 1129 1123 1128 1130 1130 1123 1132 1125 1130 1128 1130 1119 1128 1123 - 1127 1127 1128 1127 1126 1126 1126 1128 1129 1125 1129 1128 1129 1126 1130 1122 1125 1120 - 1125 1126 1126 1129 1129 1127 1126 1126 1127 1131 1127 1132 1126 1125 1121 1131 1122 1121 - 1127 1129 1131 1121 1124 1130 1123 1131 1135 1122 1126 1133 1135 1133 1129 1130 1125 1124 - 1118 1122 1131 1120 1126 1125 1133 1134 1136 1133 1130 1128 1127 1128 1128 1132 1127 1126 - 1127 1126 1128 1132 1125 1129 1126 1128 1124 1127 1128 1131 1126 1129 1122 1128 1128 1126 - 1120 1125 1123 1126 1125 1124 1128 1128 1133 1129 1127 1127 1124 1129 1118 1128 1128 1121 - 1124 1126 1125 1127 1124 1128 1130 1125 1130 1127 1125 1127 1126 1123 1128 1123 1128 1130 - 1130 1125 1124 1122 1122 1126 1127 1129 1123 1127 1126 1132 1123 1126 1122 1128 1122 1120 - 1120 1124 1125 1125 1126 1127 1117 1127 1126 1126 1123 1127 1124 1125 1127 1123 1119 1119 - 1125 1132 1127 1135 1124 1128 1125 1116 1131 1126 1128 1122 1129 1121 1127 1127 1121 1125 - 1131 1128 1125 1127 1123 1128 1124 1118 1126 1126 1124 1128 1128 1129 1120 1124 1123 1126 - 1127 1122 1126 1123 1129 1123 1127 1129 1123 1122 1125 1119 1124 1128 1116 1128 1121 1121 - 1132 1127 1123 1126 1125 1129 1119 1120 1119 1125 1120 1128 1126 1125 1125 1129 1124 1126 - 1129 1125 1129 1132 1125 1126 1123 1122 1123 1127 1122 1126 1125 1130 1120 1130 1118 1128 - 1126 1133 1126 1130 1125 1128 1123 1123 1125 1128 1129 1122 1130 1128 1123 1125 1121 1123 - 1122 1124 1125 1126 1128 1126 1126 1126 1126 1124 1121 1124 1124 1124 1124 1121 1124 1120 - 1126 1119 1125 1128 1123 1128 1124 1128 1125 1128 1117 1125 1129 1127 1121 1126 1125 1126 - 2000 2000 2000>; - - PS_Config_Lmt_FW_Rawdata_N = < - 676 678 676 673 676 676 677 674 675 678 671 677 676 670 671 678 672 676 - 675 677 676 671 680 675 675 674 676 673 675 676 674 676 673 672 674 675 - 674 674 675 675 675 674 674 673 675 677 672 674 672 675 672 674 673 673 - 674 673 677 674 673 677 674 675 674 672 675 673 672 674 673 675 676 674 - 678 676 677 676 675 673 674 677 673 676 672 678 671 671 672 682 673 673 - 676 674 679 670 678 673 676 672 671 675 672 674 673 673 671 676 675 676 - 675 673 679 675 674 675 674 671 671 676 673 674 674 677 672 675 674 672 - 677 677 673 677 673 677 677 671 672 671 671 674 675 673 676 673 677 676 - 675 676 674 671 674 670 671 671 675 673 675 676 673 675 672 674 674 674 - 676 677 675 677 672 676 672 676 671 675 674 673 672 673 673 676 673 678 - 675 674 675 676 673 673 674 677 672 671 675 671 675 672 674 674 675 672 - 678 677 674 679 674 674 673 676 671 675 676 673 678 672 676 676 672 677 - 675 677 678 677 674 677 673 674 675 675 677 673 674 672 675 674 674 673 - 675 678 675 677 677 676 674 674 677 674 674 672 675 673 676 674 675 675 - 676 677 675 673 678 674 677 678 678 674 679 675 678 677 678 672 677 674 - 676 676 677 676 676 676 675 677 678 675 677 677 677 675 678 673 675 672 - 675 675 675 677 677 676 675 676 676 679 676 679 676 675 673 678 673 673 - 676 678 679 673 674 678 674 679 681 673 676 680 681 680 678 678 675 675 - 671 673 679 672 675 675 680 681 682 680 678 677 676 677 677 679 676 675 - 676 676 677 679 675 677 675 677 674 676 677 679 676 677 673 677 677 676 - 672 675 674 676 675 675 677 677 680 677 676 676 674 677 671 677 677 673 - 674 676 675 676 674 677 678 675 678 676 675 676 676 674 677 674 677 678 - 678 675 675 673 673 676 676 677 674 676 676 679 674 676 673 677 673 672 - 672 674 675 675 675 676 670 676 675 675 674 676 674 675 676 674 671 672 - 675 679 676 681 674 677 675 670 679 675 677 673 677 673 676 676 672 675 - 678 677 675 676 674 677 674 671 676 675 674 677 677 677 672 674 674 676 - 676 673 676 674 678 674 676 678 674 673 675 672 674 677 669 677 673 673 - 679 676 674 676 675 677 672 672 671 675 672 677 676 675 675 677 674 675 - 677 675 678 679 675 676 674 673 674 676 673 676 675 678 672 678 671 677 - 675 680 676 678 675 677 674 674 675 677 678 673 678 677 674 675 672 674 - 673 674 675 676 677 676 675 675 676 674 673 674 675 675 674 672 674 672 - 675 671 675 677 674 677 674 677 675 677 670 675 678 676 673 676 675 676 - 400 400 400>; - - PS_Config_Lmt_FW_CC_P = <112>; - PS_Config_Lmt_FW_CC_N = <72>; - PS_Config_Lmt_Key_FW_CC_P = <38>; - PS_Config_Lmt_Key_FW_CC_N = <9>; - - PS_Config_Lmt_FW_CC_I_P = <25>; - PS_Config_Lmt_FW_CC_I_N = <0>; - PS_Config_Lmt_FW_CC_Q_P = <25>; - PS_Config_Lmt_FW_CC_Q_N = <0>; - PS_Config_Lmt_Key_FW_CC_I_P = <25>; - PS_Config_Lmt_Key_FW_CC_I_N = <0>; - PS_Config_Lmt_Key_FW_CC_Q_P = <25>; - PS_Config_Lmt_Key_FW_CC_Q_N = <0>; - - PS_Config_Lmt_FW_Diff_P = <35>; - PS_Config_Lmt_FW_Diff_N = <(-35)>; - PS_Config_Lmt_Key_FW_Diff_P = <35>; - PS_Config_Lmt_Key_FW_Diff_N = <(-35)>; - - PS_Config_Diff_Test_Frame = <50>; - }; - }; - synaptics_dsx@70 { - compatible = "synaptics_lansi,dsx-i2c"; - reg = <0x70>; - interrupt-parent = <&tlmm>; - interrupts = <65 0x2>; - vdd-supply = <&pm8953_l10>; - avdd-supply = <&pm8953_l6>; - pinctrl-names = "pmx_ts_active", "pmx_ts_suspend"; - pinctrl-0 = <&ts_int_active &ts_reset_active>; - pinctrl-1 = <&synaptic_int_suspend &synaptic_reset_suspend>; - synaptics,pwr-reg-name = "avdd"; - synaptics,bus-reg-name = "vdd"; - synaptics,ub-i2c-addr = <0x2c>; - synaptics,irq-gpio = <&tlmm 65 0x2008>; /* IRQF_ONESHOT | IRQF_TRIGGER_LOW */ - synaptics,rst-gpio = <&tlmm 64 0x0>; - synaptics,irq-on-state = <0>; - synaptics,power-delay-ms = <200>; - synaptics,reset-delay-ms = <200>; - synaptics,reset-on-state = <0>; - synaptics,reset-active-ms = <20>; - /* uncomment and update line below as appropriate if there are 0D buttons */ - /* synaptics,cap-button-codes = <102 158>; */ - synaptics,cap-button-codes = <139 172 158>; - /* uncomment and update lines below as appropriate if there are virtual buttons */ - /* synaptics,vir-button-codes = <102 100 900 100 60 158 300 900 100 60>; */ - /* synaptics,max-y-for-2d = <800>; */ - }; - }; - - i2c@78b6000 { /* BLSP1 QUP3 */ - aw2013@45 { - compatible = "awinic,aw2013_led"; - reg = <0x45>; - vdd-supply = <&pm8953_l10>; - vcc-supply = <&pm8953_l5>; - - aw2013,red { - aw2013,name = "red"; - aw2013,id = <0>; - aw2013,max-brightness = <150>; - aw2013,max-current = <1>; - aw2013,rise-time-ms = <3>; - aw2013,hold-time-ms = <1>; - aw2013,fall-time-ms = <3>; - aw2013,off-time-ms = <3>; - }; - - }; - - aw2023@46 { - compatible = "awinic,aw2023_led"; - reg = <0x46>; - vcc-supply = <&pm8953_l5>; - vdd-supply = <&pm8953_l10>; - - aw2023,red { - aw2023,name = "red"; - aw2023,id = <0>; - aw2023,imax = <2>; - aw2023,led-current = <3>; - aw2023,max-brightness = <255>; - aw2023,rise-time-ms = <6>; - aw2023,hold-time-ms = <0>; - aw2023,fall-time-ms = <6>; - aw2023,off-time-ms = <4>; - }; - }; - }; - - vdd_vreg: vdd_vreg { - compatible = "regulator-fixed"; - status = "ok"; - regulator-name = "vdd_vreg"; - }; -}; - -&wled { - qcom,cons-sync-write-delay-us = <1000>; -}; - -&spi_6 { - status = "ok"; - peel_ir@0 { - compatible = "peel_ir"; - reg = <0x0>; - spi-max-frequency = <19200000>; - vdd-supply = <&pm8953_l8>; //vdd - peel_ir,reg-id = "vdd"; - peel_ir,lr-gpio = <73>; - peel_ir,lr-gpio-valid = <0>; - peel_ir,spi-bpw = <32>; - peel_ir,spi-clk-speed = <960000>; - peel_ir,spi-mode = <0>; - peel_ir,peel-field = <2345>; - status = "ok"; - }; -}; - -&spmi_bus { - qcom,pm8953@0 { - qcom,leds@a100 { - status = "okay"; - compatible = "qcom,leds-qpnp"; - reg = <0xa100 0x100>; - label = "mpp"; - qcom,led_mpp_2 { - label = "mpp"; - linux,name = "button-backlight"; - linux,default-trigger = "none"; - qcom,default-state = "off"; - qcom,max-current = <10>; - qcom,current-setting = <5>; - qcom,id = <6>; - qcom,mode = "manual"; - qcom,source-sel = <1>; - qcom,mode-ctrl = <0x61>; - }; - }; - }; -}; - -/ { - qrd_batterydata: qcom,battery-data { - qcom,batt-id-range-pct = <5>; - #include "Vince-sunwoda-40Kohm-4000mah.dtsi" - #include "Vince-desay-24Kohm-4000mAh.dtsi" - #include "Vince-coslight-50Kohm-4000mah.dtsi" - }; -}; - -/* -&pm8953_typec { - ss-mux-supply = <&pm8953_l6>; - qcom,ssmux-gpio = <&tlmm 139 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&typec_ssmux_config>; -}; -*/ - -&pmi8950_charger { - qcom,battery-data = <&qrd_batterydata>; - qcom,float-voltage-mv = <4400>; -// qcom,external-typec; -// qcom,typec-psy-name = "typec"; - qcom,thermal-mitigation = <3000 2500 2500 2500 1000 1000 0>; - status = "okay"; -}; - -&pmi8950_fg { - qcom,battery-data = <&qrd_batterydata>; - qcom,thermal-coefficients = [c8 86 c1 50 d3 37]; - qcom,cold-bat-decidegc = <0>; - qcom,cool-bat-decidegc = <150>; - qcom,warm-bat-decidegc = <450>; - qcom,hot-bat-decidegc = <550>; - qcom,bad-battery-detection-enable; - qcom,hold-soc-while-full; -}; - -&blsp1_uart0 { - status = "ok"; - pinctrl-names = "default"; - pinctrl-0 = <&uart_console_active>; -}; - -&sdhc_1 { - /* device core power supply */ - vdd-supply = <&pm8953_l8>; - qcom,vdd-voltage-level = <2900000 2900000>; - qcom,vdd-current-level = <200 570000>; - - /* device communication power supply */ - vdd-io-supply = <&pm8953_l5>; - qcom,vdd-io-always-on; - qcom,vdd-io-lpm-sup; - qcom,vdd-io-voltage-level = <1800000 1800000>; - qcom,vdd-io-current-level = <200 325000>; - - pinctrl-names = "active", "sleep"; - pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>; - pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>; - - qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 192000000 - 384000000>; - qcom,nonremovable; - qcom,bus-speed-mode = "HS400_1p8v", "HS200_1p8v", "DDR_1p8v"; - - status = "ok"; -}; - -&sdhc_2 { - /* device core power supply */ - vdd-supply = <&pm8953_l11>; - qcom,vdd-voltage-level = <2950000 2950000>; - qcom,vdd-current-level = <15000 800000>; - - /* device communication power supply */ - vdd-io-supply = <&pm8953_l12>; - qcom,vdd-io-voltage-level = <1800000 2950000>; - qcom,vdd-io-current-level = <200 22000>; - - pinctrl-names = "active", "sleep"; - pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>; - pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>; - - #address-cells = <0>; - interrupt-parent = <&sdhc_2>; - interrupts = <0 1 2>; - #interrupt-cells = <1>; - interrupt-map-mask = <0xffffffff>; - interrupt-map = <0 &intc 0 125 0 - 1 &intc 0 221 0 - 2 &tlmm 133 0>; - interrupt-names = "hc_irq", "pwr_irq", "status_irq"; - cd-gpios = <&tlmm 133 0x0>; - - qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 - 200000000>; - qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104"; - - status = "ok"; -}; - -&i2c_5 { /* BLSP2 QUP1 (NFC) */ - nq@28 { - compatible = "qcom,nq-nci"; - reg = <0x28>; - qcom,nq-irq = <&tlmm 17 0x00>; - qcom,nq-ven = <&tlmm 16 0x00>; - qcom,nq-firm = <&tlmm 62 0x00>; - qcom,nq-clkreq = <&pm8953_gpios 2 0x00>; - interrupt-parent = <&tlmm>; - qcom,clk-src = "BBCLK2"; - interrupts = <17 0>; - interrupt-names = "nfc_irq"; - pinctrl-names = "nfc_active", "nfc_suspend"; - pinctrl-0 = <&nfc_int_active &nfc_disable_active>; - pinctrl-1 = <&nfc_int_suspend &nfc_disable_suspend>; - clocks = <&clock_gcc clk_bb_clk2_pin>; - clock-names = "ref_clk"; - }; -}; - -&pm8953_gpios { - /* GPIO 2 (NFC_CLK_REQ) */ - gpio@c100 { - qcom,mode = <0>; - qcom,output-type = <0>; - qcom,pull = <0>; - qcom,vin-sel = <2>; - qcom,out-strength = <3>; - qcom,src-sel = <0>; - qcom,master-en = <1>; - status = "okay"; - }; -}; - -&i2c_3 { - status = "ok"; -}; - - -&led_flash0{ - qcom,flash-source = <&pmi8950_flash0 &pmi8950_flash1>; - qcom,torch-source = <&pmi8950_torch0 &pmi8950_torch1>; -}; - -&pm8953_vadc { - /delete-node/ chan@11; -}; - -&sdc2_cmd_on { - config { - drive-strength=<12>; - }; -}; - -&sdc2_data_on { - config { - drive-strength=<12>; - }; -}; diff --git a/arch/arm/boot/dts/qcom/msm8953-qrd-sku3-daisy.dts b/arch/arm/boot/dts/qcom/msm8953-qrd-sku3-daisy.dts deleted file mode 100644 index b013ead83a6c..000000000000 --- a/arch/arm/boot/dts/qcom/msm8953-qrd-sku3-daisy.dts +++ /dev/null @@ -1,70 +0,0 @@ -/* - * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved. - * Copyright (C) 2018 XiaoMi, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/dts-v1/; - -#include "msm8953-daisy.dtsi" -#include "msm-pmi8950.dtsi" - -/ { - model = "Qualcomm Technologies, Inc. MSM8953 + PMI8950 daisy QRD SKU3"; - compatible = "qcom,msm8953-qrd-sku3", - "qcom,msm8953-qrd", "qcom,msm8953", "qcom,qrd"; - qcom,board-id= <0x1000b 0x09>; -}; - -&soc { - led_flash0: qcom,camera-flash { - cell-index = <0>; - compatible = "qcom,camera-flash"; - qcom,flash-type = <1>; - qcom,flash-source = <&pmi8950_flash0 &pmi8950_flash1>; - qcom,torch-source = <&pmi8950_torch0 &pmi8950_torch1>; - qcom,switch-source = <&pmi8950_switch>; - }; -}; - -#include "msm8953-qrd-sku3.dtsi" - -&usb3 { - vbus_dwc3-supply = <&smbcharger_charger_otg>; -}; - -&mdss_dsi1 { - lab-supply = <&lab_regulator>; - ibb-supply = <&ibb_regulator>; -}; - -&dsi_panel_pwr_supply { - qcom,panel-supply-entry@2 { - reg = <2>; - qcom,supply-name = "lab"; - qcom,supply-min-voltage = <4600000>; - qcom,supply-max-voltage = <6000000>; - qcom,supply-enable-load = <100000>; - qcom,supply-disable-load = <100>; - qcom,supply-post-on-sleep = <10>; - qcom,supply-post-off-sleep = <2>; - }; - - qcom,panel-supply-entry@3 { - reg = <3>; - qcom,supply-name = "ibb"; - qcom,supply-min-voltage = <4600000>; - qcom,supply-max-voltage = <6000000>; - qcom,supply-enable-load = <100000>; - qcom,supply-disable-load = <100>; - /*qcom,supply-post-on-sleep = <10>;*/ - }; -}; diff --git a/arch/arm/boot/dts/qcom/msm8953-qrd-sku3-e7.dts b/arch/arm/boot/dts/qcom/msm8953-qrd-sku3-e7.dts deleted file mode 100644 index fdae7a27f1e6..000000000000 --- a/arch/arm/boot/dts/qcom/msm8953-qrd-sku3-e7.dts +++ /dev/null @@ -1,76 +0,0 @@ -/* - * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved. - * Copyright (C) 2018 XiaoMi, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/dts-v1/; - -#include "msm8953-e7.dtsi" -#include "msm-pmi8950-e7.dtsi" - -/ { - model = "Qualcomm Technologies, Inc. E7 QRD SKU3"; - compatible = "qcom,msm8953-qrd-sku3", - "qcom,msm8953-qrd", "qcom,msm8953", "qcom,qrd"; - qcom,board-id= <0x1000b 0x08>; -}; - -&soc { - led_flash0: qcom,camera-flash { - cell-index = <0>; - compatible = "qcom,camera-flash"; - qcom,flash-type = <1>; - qcom,flash-source = <&pmi8950_flash0 &pmi8950_flash1>; - qcom,torch-source = <&pmi8950_torch0 &pmi8950_torch1>; - qcom,switch-source = <&pmi8950_switch>; - }; -}; - -#include "msm8953-qrd-sku3-e7.dtsi" - -&usb3 { - vbus_dwc3-supply = <&smbcharger_charger_otg>; -}; - -&mdss_dsi1 { - lab-supply = <&lab_regulator>; - ibb-supply = <&ibb_regulator>; -}; - -&wled { - qcom,fs-curr-ua = <20000>; - qcom,led-strings-list = [00 01]; - qcom,ovp-mv = <29500>; -}; - -&dsi_panel_pwr_supply { - qcom,panel-supply-entry@2 { - reg = <2>; - qcom,supply-name = "lab"; - qcom,supply-min-voltage = <4600000>; - qcom,supply-max-voltage = <6000000>; - qcom,supply-enable-load = <100000>; - qcom,supply-disable-load = <100>; - qcom,supply-post-on-sleep = <10>; - qcom,supply-post-off-sleep = <2>; - }; - - qcom,panel-supply-entry@3 { - reg = <3>; - qcom,supply-name = "ibb"; - qcom,supply-min-voltage = <4600000>; - qcom,supply-max-voltage = <6000000>; - qcom,supply-enable-load = <100000>; - qcom,supply-disable-load = <100>; - /*qcom,supply-post-on-sleep = <10>;*/ - }; -}; diff --git a/arch/arm/boot/dts/qcom/msm8953-qrd-sku3-e7.dtsi b/arch/arm/boot/dts/qcom/msm8953-qrd-sku3-e7.dtsi deleted file mode 100644 index b76d32fb6521..000000000000 --- a/arch/arm/boot/dts/qcom/msm8953-qrd-sku3-e7.dtsi +++ /dev/null @@ -1,203 +0,0 @@ -/* - * Copyright (c) 2015-2016, The Linux Foundation. All rights reserved. - * Copyright (C) 2018 XiaoMi, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include "msm8953-qrd-e7.dtsi" - -&spmi_bus { - qcom,pmi8950@3 { - labibb: qpnp-labibb-regulator { - ibb_regulator: qcom,ibb@dc00 { - /delete-property/ - qcom,qpnp-ibb-use-default-voltage; - qcom,qpnp-ibb-init-lcd-voltage = <5700000>; - }; - - lab_regulator: qcom,lab@de00 { - /delete-property/ - qcom,qpnp-ibb-use-default-voltage; - qcom,qpnp-ibb-init-lcd-voltage = <5700000>; - }; - }; - }; -}; - -#include "msm8953-mdss-panels.dtsi" - -&tlmm { - pmx_mdss { - mdss_dsi_active: mdss_dsi_active { - mux { - pins = "gpio61"; - }; - config { - pins = "gpio61"; - }; - }; - mdss_dsi_suspend: mdss_dsi_suspend { - mux { - pins = "gpio61"; - }; - config { - pins = "gpio61"; - }; - }; - }; -}; - -&dsi_r69006_1080p_cmd { - qcom,esd-check-enabled; -}; - -&mdss_mdp { - qcom,mdss-pref-prim-intf = "dsi"; -}; - -&mdss_dsi { - hw-config = "single_dsi"; -}; - -&mdss_dsi0 { - lab-supply = <&lab_regulator>; - ibb-supply = <&ibb_regulator>; - /delete-property/ vdd-supply; - - //qcom,dsi-pref-prim-pan = <&dsi_r69006_1080p_cmd>; - qcom,dsi-pref-prim-pan = <&dsi_td4310_fhdplus_e7_vid>; - pinctrl-names = "mdss_default", "mdss_sleep"; - pinctrl-0 = <&mdss_dsi_active &mdss_te_active>; - pinctrl-1 = <&mdss_dsi_suspend &mdss_te_suspend>; - qcom,platform-te-gpio = <&tlmm 24 0>; - qcom,platform-reset-gpio = <&tlmm 61 0>; -}; - -&mdss_dsi1 { - status = "disabled"; -}; - -&labibb { - status = "ok"; - qpnp,qpnp-labibb-mode = "lcd"; -}; - -&dsi_otm1911_fhd_vid { - qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; - //qcom,esd-check-enabled; - -}; - -&dsi_ili7807_fhdplus_vid { - qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; - //qcom,esd-check-enabled; - -}; - -/*add begin for E7 display*/ -&dsi_td4310_fhdplus_e7_vid { - qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; -}; - -&dsi_td4310_fhdplus_e7_g55_vid { - qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; -}; - - -&dsi_td4310_ebbg_fhdplus_e7_vid { - qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; -}; - -&dsi_nt36672_tianma_fhdplus_e7_vid { - qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; -}; - -&dsi_nt36672_csot_fhdplus_e7_vid { - qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; -}; -/*add end for E7 display*/ - -&dsi_otm1911_fhdplus_vid { - qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; - //qcom,esd-check-enabled; - -}; - -&dsi_r69006_1080p_cmd { - qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; -}; - -&dsi_r69006_1080p_video { - qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; -}; - -&int_codec { - status = "ok"; -}; - -&pm8953_diangu_dig { - status = "ok"; -}; - -&pm8953_diangu_analog { - status = "ok"; -}; - -&ext_codec { - status = "disabled"; - qcom,model = "msm8953-sku3-tasha-snd-card"; - - qcom,audio-routing = - "AIF4 VI", "MCLK", - "RX_BIAS", "MCLK", - "DMIC0", "MIC BIAS1", - "MIC BIAS1", "Digital Mic0", - "AMIC2", "MIC BIAS2", - "MIC BIAS2", "Headset Mic", - "DMIC2", "MIC BIAS3", - "MIC BIAS3", "Digital Mic2", - "MIC BIAS1", "MICBIAS_REGULATOR", - "MIC BIAS2", "MICBIAS_REGULATOR", - "MIC BIAS3", "MICBIAS_REGULATOR", - "SpkrLeft IN", "SPK1 OUT"; - - qcom,cdc-us-euro-gpios; - - qcom,msm-mbhc-hphl-swh = <1>; - - qcom,wsa-max-devs = <1>; - qcom,wsa-devs = <&wsa881x_211>, <&wsa881x_213>; - qcom,wsa-aux-dev-prefix = "SpkrLeft", "SpkrLeft"; -}; - -&slim_msm { - status = "disabled"; -}; - -&dai_slim { - status = "disabled"; -}; - -&wcd9xxx_intc { - status = "disabled"; -}; - -&clock_audio { - status = "disabled"; -}; - -&wcd9335 { - status = "disabled"; -}; - -&wcd_rst_gpio { - status = "disabled"; -}; diff --git a/arch/arm/boot/dts/qcom/msm8953-qrd-sku3.dts b/arch/arm/boot/dts/qcom/msm8953-qrd-sku3.dts index b3b9851f9df7..b6acd5abbae7 100644 --- a/arch/arm/boot/dts/qcom/msm8953-qrd-sku3.dts +++ b/arch/arm/boot/dts/qcom/msm8953-qrd-sku3.dts @@ -1,6 +1,5 @@ /* * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved. - * Copyright (C) 2018 XiaoMi, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -21,7 +20,7 @@ model = "Qualcomm Technologies, Inc. MSM8953 + PMI8950 QRD SKU3"; compatible = "qcom,msm8953-qrd-sku3", "qcom,msm8953-qrd", "qcom,msm8953", "qcom,qrd"; - qcom,board-id= <0x1000b 0>; + qcom,board-id= <0x2000b 0>; }; &soc { @@ -54,8 +53,6 @@ qcom,supply-max-voltage = <6000000>; qcom,supply-enable-load = <100000>; qcom,supply-disable-load = <100>; - qcom,supply-post-on-sleep = <10>; - qcom,supply-post-off-sleep = <2>; }; qcom,panel-supply-entry@3 { @@ -65,6 +62,6 @@ qcom,supply-max-voltage = <6000000>; qcom,supply-enable-load = <100000>; qcom,supply-disable-load = <100>; - /*qcom,supply-post-on-sleep = <10>;*/ + qcom,supply-post-on-sleep = <10>; }; }; diff --git a/arch/arm/boot/dts/qcom/msm8953-qrd-sku3.dtsi b/arch/arm/boot/dts/qcom/msm8953-qrd-sku3.dtsi index 61780c7e5bc2..871e7f286703 100644 --- a/arch/arm/boot/dts/qcom/msm8953-qrd-sku3.dtsi +++ b/arch/arm/boot/dts/qcom/msm8953-qrd-sku3.dtsi @@ -1,6 +1,5 @@ /* * Copyright (c) 2015-2016, The Linux Foundation. All rights reserved. - * Copyright (C) 2018 XiaoMi, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -72,8 +71,7 @@ ibb-supply = <&ibb_regulator>; /delete-property/ vdd-supply; - //qcom,dsi-pref-prim-pan = <&dsi_r69006_1080p_cmd>; - qcom,dsi-pref-prim-pan = <&dsi_otm1911_fhd_vid>; + qcom,dsi-pref-prim-pan = <&dsi_r69006_1080p_cmd>; pinctrl-names = "mdss_default", "mdss_sleep"; pinctrl-0 = <&mdss_dsi_active &mdss_te_active>; pinctrl-1 = <&mdss_dsi_suspend &mdss_te_suspend>; @@ -90,30 +88,6 @@ qpnp,qpnp-labibb-mode = "lcd"; }; - -&dsi_otm1911_fhd_vid { - qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; - //qcom,esd-check-enabled; - -}; - -&dsi_ili7807_fhdplus_vid { - qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; - //qcom,esd-check-enabled; - -}; - -&dsi_otm1911_fhdplus_vid { - qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; - //qcom,esd-check-enabled; - -}; - -&dsi_hx8399c_fhdplus_vid { - qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; - //qcom,esd-check-enabled; -}; - &dsi_r69006_1080p_cmd { qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; }; @@ -123,19 +97,19 @@ }; &int_codec { - status = "ok"; + status = "disabled"; }; &pm8953_diangu_dig { - status = "ok"; + status = "disabled"; }; &pm8953_diangu_analog { - status = "ok"; + status = "disabled"; }; &ext_codec { - status = "disabled"; + status = "ok"; qcom,model = "msm8953-sku3-tasha-snd-card"; qcom,audio-routing = @@ -162,25 +136,25 @@ }; &slim_msm { - status = "disabled"; + status = "ok"; }; &dai_slim { - status = "disabled"; + status = "ok"; }; &wcd9xxx_intc { - status = "disabled"; + status = "ok"; }; &clock_audio { - status = "disabled"; + status = "ok"; }; &wcd9335 { - status = "disabled"; + status = "ok"; }; &wcd_rst_gpio { - status = "disabled"; + status = "ok"; }; diff --git a/arch/arm/boot/dts/qcom/msm8953-qrd.dtsi b/arch/arm/boot/dts/qcom/msm8953-qrd.dtsi index 52ee1f090621..c081a1c30822 100644 --- a/arch/arm/boot/dts/qcom/msm8953-qrd.dtsi +++ b/arch/arm/boot/dts/qcom/msm8953-qrd.dtsi @@ -1,6 +1,5 @@ /* * Copyright (c) 2015-2016, The Linux Foundation. All rights reserved. - * Copyright (C) 2018 XiaoMi, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -32,55 +31,6 @@ }; }; - goodix_fp { - compatible = "goodix,fingerprint"; - spi-max-frequency = <1000000>; - input-device-name = "gf3208"; - interrupt-parent = <&tlmm>; - interrupts = <9 0x0>; - - fp-gpio-reset = <&tlmm 140 0>; - fp-gpio-irq = <&tlmm 48 0>; - - clock-names = "iface_clk", "core_clk"; - clocks = <&clock_gcc clk_gcc_blsp1_ahb_clk>, - <&clock_gcc clk_gcc_blsp1_qup1_spi_apps_clk>; - - pinctrl-names = "goodixfp_spi_active", - "goodixfp_reset_reset", - "goodixfp_reset_active", - "goodixfp_irq_active"; - - pinctrl-0 = <&goodix_spi_active>; - pinctrl-1 = <&goodix_reset_reset>; - pinctrl-2 = <&goodix_reset_active>; - pinctrl-3 = <&goodix_irq_active>; - }; - - fpc1020 { - compatible = "fpc,fpc1020"; - spi-max-frequency = <1000000>; - input-device-name = "fpc1020"; - interrupt-parent = <&tlmm>; - interrupts = <9 0x0>; - fpc,gpio_rst = <&tlmm 140 0>; - fpc,gpio_irq = <&tlmm 48 0>; - - clock-names = "iface_clk", "core_clk"; - clocks = <&clock_gcc clk_gcc_blsp1_ahb_clk>, - <&clock_gcc clk_gcc_blsp1_qup1_spi_apps_clk>; - - pinctrl-names = "fpc1020_spi_active", - "fpc1020_reset_reset", - "fpc1020_reset_active", - "fpc1020_irq_active"; - - pinctrl-0 = <&fpc_spi_active>; - pinctrl-1 = <&fpc_reset_reset>; - pinctrl-2 = <&fpc_reset_active>; - pinctrl-3 = <&fpc_irq_active>; - }; - i2c@78b7000 { /* BLSP1 QUP3 */ status = "okay"; synaptics@4b { @@ -108,131 +58,6 @@ clocks = <&clock_gcc clk_gcc_blsp1_ahb_clk>, <&clock_gcc clk_gcc_blsp1_qup3_i2c_apps_clk>; }; - gt9xx@5d { - compatible = "goodix,gt9xx"; - reg = <0x5d>; - status = "okay"; - interrupt-parent = <&tlmm>; - interrupts = <65 0x2>; - pinctrl-names = "default", "int-output-low","int-output-high", "int-input"; - pinctrl-0 = <&ts_int_default>; - pinctrl-1 = <&ts_int_output_low>; - pinctrl-2 = <&ts_int_output_high>; - pinctrl-3 = <&ts_int_input>; - - reset-gpios = <&tlmm 64 0x0>; - irq-gpios = <&tlmm 65 0x2008>; - irq-flags = <1>; - - vdd_ana-supply = <&pm8953_l10>; - vcc_i2c-supply = <&pm8953_l6>; - - touchscreen-max-id = <11>; - touchscreen-size-x = <1080>; - touchscreen-size-y = <2280>; - touchscreen-max-w = <512>; - touchscreen-max-p = <512>; - - goodix,slide-wakeup = <1>; - goodix,type-a-report = <0>; - goodix,driver-send-cfg = <1>; - goodix,resume-in-workqueue = <0>; - goodix,int-sync = <1>; - goodix,swap-x2y = <0>; - goodix,esd-protect = <1>; - goodix,auto-update-cfg = <1>; - goodix,auto-update = <1>; - goodix,power-off-sleep = <0>; - goodix,pen-suppress-finger = <0>; - goodix,charger-cmd = <1>; - goodix,cfg-group0 = [55 38 04 E8 08 0A 7C 10 21 2A 32 0D 5A 32 1E 55 00 00 60 22 22 22 04 30 00 00 2E 87 27 EE 46 48 F1 08 F1 08 00 C2 33 91 0A 00 00 00 00 A3 50 0C 0F 5A 02 2D 50 84 E0 A7 19 28 23 04 B2 2F 00 9F 35 00 95 3C 00 8C 42 00 84 4A 00 82 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 00 04 60 28 00 00 00 00 00 01 46 00 00 00 00 32 16 17 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 18 19 1A 1B 00 01 02 03 04 05 06 07 08 09 FF FF 08 06 05 04 0A 0C 0E 1E 1F 20 22 24 29 2A FF FF FF 00 00 00 00 00 00 00 00 00 2D 28 37 0A 1E 32 F0 00 00 44 66 32 0A 4A 84 5B 00 00 00 00 00 00 2A 5A 00 00 00 00 00 32 0C 28 00 55 00 1E 88 20 8C 47 33 36 0A 6F 66 1C 00 14 14 0C 02 44 44 58 9A 4C 83 85 BC 01]; - }; - focaltech@38 { - compatible = "focaltech,5446"; - reg = <0x38>; - interrupt-parent = <&tlmm>; - interrupts = <65 0x2>; - vdd-supply = <&pm8953_l10>; - vcc_i2c-supply = <&pm8953_l6>; - /* pins used by touchscreen */ - pinctrl-names = "pmx_ts_active","pmx_ts_suspend", - "pmx_ts_release"; - pinctrl-0 = <&ts_int_active &ts_reset_active>; - pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>; - pinctrl-2 = <&ts_release>; - focaltech,name = "ft5435"; - focaltech,family-id = <0x54>; - focaltech,reset-gpio = <&tlmm 64 0x0>; - focaltech,irq-gpio = <&tlmm 65 0x2002>; - focaltech,display-coords = <0 0 1080 2280>; - focaltech,panel-coords = <0 0 1080 2280>; - focaltech,no-force-update; - focaltech,i2c-pull-up; - focaltech,group-id = <1>; - focaltech,hard-reset-delay-ms = <200>; - focaltech,soft-reset-delay-ms = <200>; - focaltech,num-max-touches = <10>; - focaltech,fw-delay-aa-ms = <2>; - focaltech,fw-delay-55-ms = <2>; - focaltech,fw-upgrade-id1 = <0x54>; - focaltech,fw-upgrade-id2 = <0x2c>; - focaltech,fw-delay-readid-ms = <10>; - focaltech,fw-delay-era-flsh-ms = <2000>; - focaltech,fw-auto-cal; - focaltech,fw-vkey-support; - focaltech,resume-in-workqueue; - focaltech,num-virtual-key = <3>; - focal,virtual_key_1 = <172 500 2040>;/*home*/ - focal,virtual_key_2 = <139 200 2040>;/*menu*/ - focal,virtual_key_3 = <158 800 2040>;/*back*/ - }; - vituralsar@33{ - compatible = "virtualsar,sar"; - reg = <0x33>; - interrupt-parent = <&tlmm>; - interrupts = <130 0x02>; - vituralsar,irq-gpio = <&tlmm 130 0x2008>; - }; - }; - - i2c@78b6000 { /* BLSP1 QUP3 */ - aw2013@45 { - compatible = "awinic,aw2013_led"; - reg = <0x45>; - vdd-supply = <&pm8953_l10>; - vcc-supply = <&pm8953_l5>; - - aw2013,red { - aw2013,name = "red"; - aw2013,id = <0>; - aw2013,max-brightness = <150>; - aw2013,max-current = <1>; - aw2013,rise-time-ms = <3>; - aw2013,hold-time-ms = <1>; - aw2013,fall-time-ms = <3>; - aw2013,off-time-ms = <3>; - }; - - }; - - aw2023@46 { - compatible = "awinic,aw2023_led"; - reg = <0x46>; - vcc-supply = <&pm8953_l5>; - vdd-supply = <&pm8953_l10>; - - aw2023,red { - aw2023,name = "red"; - aw2023,id = <0>; - aw2023,imax = <2>; - aw2023,led-current = <15>; - aw2023,max-brightness = <150>; - aw2023,rise-time-ms = <6>; - aw2023,hold-time-ms = <0>; - aw2023,fall-time-ms = <6>; - aw2023,off-time-ms = <4>; - }; - }; }; vdd_vreg: vdd_vreg { @@ -246,42 +71,21 @@ qcom,cons-sync-write-delay-us = <1000>; }; -&spi_6 { - status = "ok"; - peel_ir@0 { - compatible = "peel_ir"; - reg = <0x0>; - spi-max-frequency = <19200000>; - vdd-supply = <&pm8953_l8>; //vdd - peel_ir,reg-id = "vdd"; - peel_ir,lr-gpio = <73>; - peel_ir,lr-gpio-valid = <0>; - peel_ir,spi-bpw = <32>; - peel_ir,spi-clk-speed = <960000>; - peel_ir,spi-mode = <0>; - peel_ir,peel-field = <2345>; - status = "ok"; - }; -}; - &spmi_bus { - qcom,pm8953@0 { + qcom,pmi8950@2 { qcom,leds@a100 { status = "okay"; - compatible = "qcom,leds-qpnp"; - reg = <0xa100 0x100>; - label = "mpp"; qcom,led_mpp_2 { label = "mpp"; - linux,name = "button-backlight"; + linux,name = "green"; linux,default-trigger = "none"; qcom,default-state = "off"; - qcom,max-current = <10>; + qcom,max-current = <40>; qcom,current-setting = <5>; qcom,id = <6>; qcom,mode = "manual"; qcom,source-sel = <1>; - qcom,mode-ctrl = <0x61>; + qcom,mode-ctrl = <0x60>; }; }; }; @@ -289,39 +93,35 @@ / { qrd_batterydata: qcom,battery-data { - qcom,batt-id-range-pct = <10>; - #include "Sakura-FMT-4v4-4000mah-41kohm.dtsi" - #include "Sakura-GY-4000mah-51kohm.dtsi" - #include "Sakura-XWD-4000mah-78kohm.dtsi" - #include "Sakura-Default-4000mah-41kohm.dtsi" + qcom,batt-id-range-pct = <15>; + #include "batterydata-qrd-sku1-4v4-2800mah.dtsi" }; }; -/* &pm8953_typec { ss-mux-supply = <&pm8953_l6>; qcom,ssmux-gpio = <&tlmm 139 GPIO_ACTIVE_LOW>; pinctrl-names = "default"; pinctrl-0 = <&typec_ssmux_config>; }; -*/ &pmi8950_charger { qcom,battery-data = <&qrd_batterydata>; qcom,float-voltage-mv = <4400>; -// qcom,external-typec; -// qcom,typec-psy-name = "typec"; - qcom,thermal-mitigation = <3000 2500 2000 2000 1000 1000 0>; + qcom,chg-led-sw-controls; + qcom,chg-led-support; + qcom,external-typec; + qcom,typec-psy-name = "typec"; + qcom,thermal-mitigation = <3000 2500 2000 1500 1000 500 0>; status = "okay"; }; &pmi8950_fg { qcom,battery-data = <&qrd_batterydata>; - qcom,thermal-coefficients = [c8 86 c1 50 d3 37]; - qcom,cold-bat-decidegc = <0>; - qcom,cool-bat-decidegc = <150>; - qcom,warm-bat-decidegc = <450>; - qcom,hot-bat-decidegc = <600>; + qcom,cold-bat-decidegc = <(-100)>; + qcom,cool-bat-decidegc = <0>; + qcom,warm-bat-decidegc = <550>; + qcom,hot-bat-decidegc = <550>; qcom,bad-battery-detection-enable; qcom,hold-soc-while-full; }; @@ -381,7 +181,7 @@ 1 &intc 0 221 0 2 &tlmm 133 0>; interrupt-names = "hc_irq", "pwr_irq", "status_irq"; - cd-gpios = <&tlmm 133 0x0>; + cd-gpios = <&tlmm 133 0x1>; qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 200000000>; diff --git a/arch/arm/boot/dts/qcom/msm8953-regulator.dtsi b/arch/arm/boot/dts/qcom/msm8953-regulator.dtsi index 25f60163b9d0..d10d42bc5f43 100644 --- a/arch/arm/boot/dts/qcom/msm8953-regulator.dtsi +++ b/arch/arm/boot/dts/qcom/msm8953-regulator.dtsi @@ -1,6 +1,5 @@ /* * Copyright (c) 2015-2016, The Linux Foundation. All rights reserved. - * Copyright (C) 2018 XiaoMi, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -139,9 +138,9 @@ rpm-regulator-ldoa2 { status = "okay"; pm8953_l2: regulator-l2 { - regulator-min-microvolt = <1200000>; + regulator-min-microvolt = <975000>; regulator-max-microvolt = <1225000>; - qcom,init-voltage = <1200000>; + qcom,init-voltage = <975000>; status = "okay"; }; }; @@ -268,9 +267,9 @@ rpm-regulator-ldoa17 { status = "okay"; pm8953_l17: regulator-l17 { - regulator-min-microvolt = <2750000>; + regulator-min-microvolt = <2850000>; regulator-max-microvolt = <2850000>; - qcom,init-voltage = <2750000>; + qcom,init-voltage = <2850000>; status = "okay"; }; }; @@ -279,7 +278,7 @@ status = "okay"; pm8953_l19: regulator-l19 { regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1380000>; + regulator-max-microvolt = <1350000>; qcom,init-voltage = <1200000>; status = "okay"; }; @@ -289,7 +288,7 @@ status = "okay"; pm8953_l22: regulator-l22 { regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; + regulator-max-microvolt = <2850000>; qcom,init-voltage = <2800000>; status = "okay"; }; @@ -298,9 +297,9 @@ rpm-regulator-ldoa23 { status = "okay"; pm8953_l23: regulator-l23 { - regulator-min-microvolt = <1200000>; + regulator-min-microvolt = <975000>; regulator-max-microvolt = <1225000>; - qcom,init-voltage = <1200000>; + qcom,init-voltage = <975000>; status = "okay"; }; }; diff --git a/arch/arm/boot/dts/qcom/msm8953.dtsi b/arch/arm/boot/dts/qcom/msm8953.dtsi index dddcec411bc3..0bbaec9ddcfe 100644 --- a/arch/arm/boot/dts/qcom/msm8953.dtsi +++ b/arch/arm/boot/dts/qcom/msm8953.dtsi @@ -1,6 +1,5 @@ /* * Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. - * Copyright (C) 2018 XiaoMi, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -61,7 +60,7 @@ other_ext_mem: other_ext_region@0 { compatible = "removed-dma-pool"; no-map; - reg = <0x0 0x84A00000 0x0 0x1E00000>; + reg = <0x0 0x85b00000 0x0 0xd00000>; }; modem_mem: modem_region@0 { @@ -73,13 +72,13 @@ adsp_fw_mem: adsp_fw_region@0 { compatible = "removed-dma-pool"; no-map; - reg = <0x0 0x8d600000 0x0 0x1200000>; + reg = <0x0 0x8d600000 0x0 0x1100000>; }; wcnss_fw_mem: wcnss_fw_region@0 { compatible = "removed-dma-pool"; no-map; - reg = <0x0 0x8e800000 0x0 0x700000>; + reg = <0x0 0x8e700000 0x0 0x700000>; }; venus_mem: venus_region@0 { @@ -127,11 +126,6 @@ alignment = <0 0x400000>; size = <0 0x800000>; }; - pstore_reserve_mem: pstore_reserve_mem_region@0 { - compatible = "removed-dma-pool"; - no-map; - reg = <0x0 0x9ff00000 0x0 0x00100000>; - }; }; aliases { @@ -153,7 +147,6 @@ i2c3 = &i2c_3; i2c5 = &i2c_5; spi3 = &spi_3; - spi6 = &spi_6; }; soc: soc { }; @@ -749,31 +742,6 @@ qcom,master-id = <86>; }; - spi_6: spi@7af6000 { /* BLSP2 QUP2 */ - compatible = "qcom,spi-qup-v2"; - #address-cells = <1>; - #size-cells = <0>; - reg-names = "spi_physical", "spi_bam_physical"; - reg = <0x7af6000 0x600>, - <0x7ac4000 0x1f000>; - interrupt-names = "spi_irq", "spi_bam_irq"; - interrupts = <0 300 0>, <0 239 0>; - spi-max-frequency = <50000000>; - pinctrl-names = "spi_default", "spi_sleep"; - pinctrl-0 = <&spi6_default &spi6_cs0_active>; - pinctrl-1 = <&spi6_sleep &spi6_cs0_sleep>; - clocks = <&clock_gcc clk_gcc_blsp2_ahb_clk>, - <&clock_gcc clk_gcc_blsp2_qup2_spi_apps_clk>; - clock-names = "iface_clk", "core_clk"; - qcom,infinite-mode = <0>; - qcom,use-bam; - qcom,use-pinctrl; - qcom,ver-reg-exists; - qcom,bam-consumer-pipe-index = <6>; - qcom,bam-producer-pipe-index = <7>; - qcom,master-id = <84>; - }; - i2c_2: i2c@78b6000 { /* BLSP1 QUP2 */ compatible = "qcom,i2c-msm-v2"; #address-cells = <1>; @@ -1309,12 +1277,6 @@ reg-names = "fuse-base"; }; - sn_fuse: snfuse@0xa4128 { - compatible = "qcom,sn-fuse"; - reg = <0xa4128 0x4>; - reg-names = "sn-base"; - }; - jtag_mm0: jtagmm@619c000 { compatible = "qcom,jtagv8-mm"; reg = <0x619c000 0x1000>, @@ -1587,7 +1549,7 @@ qcom,iris-vdddig-supply = <&pm8953_l5>; qcom,iris-vddxo-voltage-level = <1800000 0 1800000>; - qcom,iris-vddrfa-voltage-level = <1380000 0 1380000>; + qcom,iris-vddrfa-voltage-level = <1300000 0 1300000>; qcom,iris-vddpa-voltage-level = <3300000 0 3300000>; qcom,iris-vdddig-voltage-level = <1800000 0 1800000>; @@ -1709,9 +1671,9 @@ qcom,ce-opp-freq = <100000000>; }; - qcom_seecom: qseecom@84A00000 { + qcom_seecom: qseecom@85b00000 { compatible = "qcom,qseecom"; - reg = <0x84A00000 0x1900000>; + reg = <0x85b00000 0x800000>; reg-names = "secapp-region"; qcom,hlos-num-ce-hw-instances = <1>; qcom,hlos-ce-hw-instance = <0>; @@ -2128,7 +2090,6 @@ qcom,msm-bus,name = "usb3"; qcom,msm-bus,num-cases = <3>; qcom,msm-bus,num-paths = <1>; - qcom,detect-dpdm-floating; qcom,msm-bus,vectors-KBps = <61 512 0 0>, <61 512 240000 800000>, @@ -2243,9 +2204,9 @@ qcom,vdd-voltage-level = <0 925000 925000>; qcom,qusb-phy-init-seq = <0xF8 0x80 - 0x93 0x84 + 0xB3 0x84 0x83 0x88 - 0xC7 0x8C + 0xC0 0x8C 0x14 0x9C 0x30 0x08 0x79 0x0C diff --git a/arch/arm/boot/dts/qcom/msm8996.dtsi b/arch/arm/boot/dts/qcom/msm8996.dtsi index b3e4dad716b8..5cad16762a75 100644 --- a/arch/arm/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm/boot/dts/qcom/msm8996.dtsi @@ -21,7 +21,7 @@ interrupt-parent = <&intc>; chosen { - bootargs = "app_setting.use_32bit_app_setting=1 kpti=1"; + bootargs = "sched_enable_hmp=1 sched_enable_power_aware=1 app_setting.use_32bit_app_setting=1 kpti=1"; }; aliases { @@ -62,7 +62,6 @@ qcom,limits-info = <&mitigation_profile0>; enable-method = "psci"; qcom,ea = <&ea0>; - sched-energy-costs = <&CPU_COST_0 &CLUSTER_COST_0>; next-level-cache = <&L2_0>; L2_0: l2-cache { compatible = "arm,arch-cache"; @@ -85,7 +84,6 @@ qcom,limits-info = <&mitigation_profile1>; enable-method = "psci"; qcom,ea = <&ea1>; - sched-energy-costs = <&CPU_COST_0 &CLUSTER_COST_0>; next-level-cache = <&L2_0>; L1_D_1: l1-dcache { compatible = "arm,arch-cache"; @@ -103,7 +101,6 @@ qcom,limits-info = <&mitigation_profile2>; enable-method = "psci"; qcom,ea = <&ea2>; - sched-energy-costs = <&CPU_COST_1 &CLUSTER_COST_1>; next-level-cache = <&L2_1>; L2_1: l2-cache { compatible = "arm,arch-cache"; @@ -126,7 +123,6 @@ enable-method = "psci"; qcom,limits-info = <&mitigation_profile3>; qcom,ea = <&ea3>; - sched-energy-costs = <&CPU_COST_1 &CLUSTER_COST_1>; next-level-cache = <&L2_1>; L1_D_101: l1-dcache { compatible = "arm,arch-cache"; @@ -158,121 +154,7 @@ }; }; }; - energy-costs { - CPU_COST_0: core-cost0 { - busy-cost-data = < - 149 90 - 207 122 - 233 140 - 263 166 - 298 196 - 342 231 - 406 306 - 459 367 - 494 423 - 529 480 - 570 536 - 589 566 - 630 642 - 666 711 - 707 800 - 763 925 - >; - idle-cost-data = < - 2 2 0 - >; - }; - CPU_COST_1: core-cost1 { - busy-cost-data = < - 149 93 - 197 117 - 233 140 - 263 166 - 298 196 - 342 231 - 368 281 - 415 322 - 449 356 - 494 423 - 529 480 - 570 536 - 596 582 - 630 642 - 666 711 - 707 800 - 746 887 - 779 972 - 814 1046 - 850 1141 - 868 1209 - 917 1331 - 959 1451 - 988 1560 - 1024 1715 - >; - idle-cost-data = < - 2 2 0 - >; - }; - CLUSTER_COST_0: cluster-cost0 { - busy-cost-data = < - 149 4 - 207 4 - 233 4 - 263 4 - 298 4 - 342 6 - 406 9 - 459 16 - 494 20 - 529 22 - 570 27 - 589 30 - 630 37 - 666 46 - 707 50 - 763 52 - >; - idle-cost-data = < - 0 - 0 - >; - }; - CLUSTER_COST_1: cluster-cost1 { - busy-cost-data = < - 149 4 - 197 4 - 233 4 - 263 4 - 298 4 - 342 6 - 368 9 - 415 14 - 449 16 - 494 20 - 529 22 - 570 27 - 596 31 - 630 37 - 666 46 - 707 50 - 746 51 - 779 57 - 814 66 - 850 72 - 868 75 - 917 83 - 959 91 - 988 94 - 1024 96 - >; - idle-cost-data = < - 0 - 0 - >; - }; - }; - }; + }; soc: soc { }; diff --git a/arch/arm/boot/dts/qcom/msm8996pro.dtsi b/arch/arm/boot/dts/qcom/msm8996pro.dtsi index fddc0a7848a9..ef42824b119b 100644 --- a/arch/arm/boot/dts/qcom/msm8996pro.dtsi +++ b/arch/arm/boot/dts/qcom/msm8996pro.dtsi @@ -24,129 +24,6 @@ chosen { bootargs = "sched_enable_hmp=1 sched_enable_power_aware=1 app_setting.use_32bit_app_setting_pro=1 kpti=1"; }; - - cpus { - energy-costs { - CPU_COST_0: core-cost0 { - busy-cost-data = < - 149 90 - 188 111 - 225 133 - 257 160 - 281 182 - 315 210 - 368 251 - 406 306 - 428 332 - 469 379 - 502 438 - 538 494 - 581 550 - 611 613 - 648 670 - 684 752 - 729 848 - 763 925 - 941 1661 - >; - idle-cost-data = < - 2 2 0 - >; - }; - CPU_COST_1: core-cost1 { - busy-cost-data = < - 149 93 - 188 111 - 225 133 - 257 160 - 281 182 - 315 210 - 348 252 - 374 290 - 428 332 - 469 379 - 502 438 - 538 494 - 581 550 - 611 613 - 648 670 - 684 752 - 729 848 - 763 925 - 795 1018 - 832 1073 - 868 1209 - 905 1298 - 952 1428 - 979 1521 - 1024 1715 - >; - idle-cost-data = < - 2 2 0 - >; - }; - CLUSTER_COST_0: cluster-cost0 { - busy-cost-data = < - 149 4 - 188 4 - 225 4 - 257 4 - 281 4 - 315 4 - 368 8 - 406 9 - 428 15 - 469 16 - 502 21 - 538 22 - 581 29 - 611 32 - 648 42 - 684 49 - 729 50 - 763 52 - 941 67 - >; - idle-cost-data = < - 0 - 0 - >; - }; - CLUSTER_COST_1: cluster-cost1 { - busy-cost-data = < - 149 4 - 188 4 - 225 4 - 257 4 - 281 4 - 315 4 - 348 7 - 374 10 - 428 15 - 469 16 - 502 21 - 538 22 - 581 29 - 611 32 - 648 42 - 684 49 - 729 50 - 763 52 - 795 62 - 832 69 - 868 75 - 905 81 - 952 90 - 979 93 - 1024 96 - >; - idle-cost-data = < - 0 - 0 - >; - }; - }; - }; }; &apc_apm {