From 1dffebdd698d9254d4a203992694af6238c0ce2c Mon Sep 17 00:00:00 2001 From: Thomas Roell Date: Sun, 3 Feb 2019 20:29:31 -0700 Subject: [PATCH] Rework the sequence of GPIO registers in stm32l0_gpio_pin_configure to avoid suprious edges --- system/STM32L0xx/Lib/libstm32l052xx.a | Bin 1954822 -> 1954966 bytes system/STM32L0xx/Lib/libstm32l072xx.a | Bin 1995762 -> 1995906 bytes system/STM32L0xx/Lib/libstm32l082xx.a | Bin 2012690 -> 2012834 bytes system/STM32L0xx/Source/stm32l0_gpio.c | 63 +++++++++++++++---------- 4 files changed, 39 insertions(+), 24 deletions(-) diff --git a/system/STM32L0xx/Lib/libstm32l052xx.a b/system/STM32L0xx/Lib/libstm32l052xx.a index 67b942879f72cf5d8fdb89f7f2a93e6e02b05d00..201c36f56f2aeaa5c0889b3f00989721f5ad4134 100644 GIT binary patch delta 6903 zcmb`M4Rln+6~|}Z+uekaWH$@hw+Xvs^GOIv2+4xM^0BhET8JSKg^&hZ!-pXRh#DZ& zQyvO}m9G#8qnId4q<|U>QC}@3MXD7kYOqIZDaJ^ut@fxWRP z`QLkI=FaSUv-2M7_O95mZ$(3rT3C?Zo^l~d|Cy6%S6JK=s+qgE``cy3`^>!w>{n3q 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zjRBj9JBV0zp&cu5 zClITNHAF0q@oQi)aXIl3B38@j-#~05zDUH18U6bW_GSmja7c)ey;6KwGNYfvS2Yr= zV`N_<*1)J!h*<05*Gvu(t60>diCFrgE+b;;i+T=m0r3w8$1<#iF<>q6SzYvH~>lF>)R5*@!P8;I+PEkvx?(f*3@fG50#6!f7 ziCFgI0^P(bL=OL?MY~3H5>tp7$Pfs~Cc_YY?gFiXr^$yIp1Z5~kiz{uSOvm${0<2x zCGTt4agq38q1K7-$MEH?-n~dmUoREDM)mY@lv?qfmJYADhU1&Dq59zh$3YwRIOPENR |= (RCC_IOPENR_IOPAEN << group); RCC->IOPENR; - /* First switch the pin back to analog mode */ - GPIO->MODER |= (0x00000003 << (index << 1)); - - /* Set OPTYPER */ - GPIO->OTYPER = (GPIO->OTYPER & ~(0x00000001 << index)) | (((mode & STM32L0_GPIO_OTYPE_MASK) >> STM32L0_GPIO_OTYPE_SHIFT) << index); - - /* Set OPSPEEDR */ - GPIO->OSPEEDR = (GPIO->OSPEEDR & ~(0x00000003 << (index << 1))) | (((mode & STM32L0_GPIO_OSPEED_MASK) >> STM32L0_GPIO_OSPEED_SHIFT) << (index << 1)); - - /* Set PUPD */ - GPIO->PUPDR = (GPIO->PUPDR & ~(0x00000003 << (index << 1))) | (((mode & STM32L0_GPIO_PUPD_MASK) >> STM32L0_GPIO_PUPD_SHIFT) << (index << 1)); - - /* Set AFRL/AFRH */ - GPIO->AFR[index >> 3] = (GPIO->AFR[index >> 3] & ~(0x0000000f << ((index & 7) << 2))) | (afsel << ((index & 7) << 2)); - - GPIO->MODER = (GPIO->MODER & ~(0x00000003 << (index << 1))) | (((mode & STM32L0_GPIO_MODE_MASK) >> STM32L0_GPIO_MODE_SHIFT) << (index << 1)); - - // if ((((mode & STM32L0_GPIO_MODE_MASK) >> STM32L0_GPIO_MODE_SHIFT) == STM32L0_GPIO_MODE_INPUT) || (((mode & STM32L0_GPIO_MODE_MASK) >> STM32L0_GPIO_MODE_SHIFT) == STM32L0_GPIO_MODE_OUTPUT)) - if (((mode & STM32L0_GPIO_MODE_MASK) >> STM32L0_GPIO_MODE_SHIFT) != STM32L0_GPIO_MODE_ANALOG) - { - stm32l0_gpio_device.enables[port] |= (1 << index); - } - else + /* If the mode is ANALOG, set MODER first */ + if (((mode & STM32L0_GPIO_MODE_MASK) >> STM32L0_GPIO_MODE_SHIFT) == STM32L0_GPIO_MODE_ANALOG) { + GPIO->MODER |= (0x00000003 << (index << 1)); + stm32l0_gpio_device.enables[port] &= ~(1 << index); if (!stm32l0_gpio_device.enables[port]) @@ -134,6 +115,40 @@ void stm32l0_gpio_pin_configure(unsigned int pin, unsigned int mode) RCC->IOPENR &= ~(RCC_IOPENR_IOPAEN << group); } } + else + { + /* Set AFRL/AFRH */ + GPIO->AFR[index >> 3] = (GPIO->AFR[index >> 3] & ~(0x0000000f << ((index & 7) << 2))) | (afsel << ((index & 7) << 2)); + + /* Set OPSPEEDR */ + GPIO->OSPEEDR = (GPIO->OSPEEDR & ~(0x00000003 << (index << 1))) | (((mode & STM32L0_GPIO_OSPEED_MASK) >> STM32L0_GPIO_OSPEED_SHIFT) << (index << 1)); + + /* Set OPTYPER */ + GPIO->OTYPER = (GPIO->OTYPER & ~(0x00000001 << index)) | (((mode & STM32L0_GPIO_OTYPE_MASK) >> STM32L0_GPIO_OTYPE_SHIFT) << index); + + /* If the mode is OUTPUT, or OUTPUT OPENDRAIN with a ODR of 0. then first switch MODER and then PUPDR + * to avoid spurious edges. N.b. ALTERNATE is assumed to be INPUT before the peripheral drives it. + */ + if (((mode & STM32L0_GPIO_MODE_MASK) == STM32L0_GPIO_MODE_OUTPUT) && + (((mode & STM32L0_GPIO_OTYPE_MASK) != STM32L0_GPIO_OTYPE_OPENDRAIN) || !(GPIO->ODR & (0x00000001 << index)))) + { + /* Set MODE */ + GPIO->MODER = (GPIO->MODER & ~(0x00000003 << (index << 1))) | (((mode & STM32L0_GPIO_MODE_MASK) >> STM32L0_GPIO_MODE_SHIFT) << (index << 1)); + + /* Set PUPD */ + GPIO->PUPDR = (GPIO->PUPDR & ~(0x00000003 << (index << 1))) | (((mode & STM32L0_GPIO_PUPD_MASK) >> STM32L0_GPIO_PUPD_SHIFT) << (index << 1)); + } + else + { + /* Set PUPD */ + GPIO->PUPDR = (GPIO->PUPDR & ~(0x00000003 << (index << 1))) | (((mode & STM32L0_GPIO_PUPD_MASK) >> STM32L0_GPIO_PUPD_SHIFT) << (index << 1)); + + /* Set MODE */ + GPIO->MODER = (GPIO->MODER & ~(0x00000003 << (index << 1))) | (((mode & STM32L0_GPIO_MODE_MASK) >> STM32L0_GPIO_MODE_SHIFT) << (index << 1)); + } + + stm32l0_gpio_device.enables[port] |= (1 << index); + } stm32l0_gpio_device.mode[port] &= ~(0x00000003 << (index << 1)); stm32l0_gpio_device.pupd[port] &= ~(0x00000003 << (index << 1));