-
Notifications
You must be signed in to change notification settings - Fork 8
/
EpiphanyFrameLowering.h
106 lines (84 loc) · 4.1 KB
/
EpiphanyFrameLowering.h
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
//==- EpiphanyFrameLowering.h - Define frame lowering for Epiphany -*- C++ -*--=//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This class implements the Epiphany-specific parts of the TargetFrameLowering
// class.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EPIPHANY_FRAMEINFO_H
#define LLVM_EPIPHANY_FRAMEINFO_H
#include "EpiphanySubtarget.h"
#include "llvm/Target/TargetFrameLowering.h"
namespace llvm {
class EpiphanySubtarget;
class EpiphanyFrameLowering : public TargetFrameLowering {
private:
// In order to unify the spilling and restoring of callee-saved registers into
// emitFrameMemOps, we need to be able to specify which instructions to use
// for the relevant memory operations on each register class. An array of the
// following struct is populated and passed in to achieve this.
struct LoadStoreMethod {
const TargetRegisterClass *RegClass; // E.g. GPR64RegClass
// The preferred instruction.
unsigned PairOpcode; // E.g. LSPair64_STR
// Sometimes only a single register can be handled at once.
unsigned SingleOpcode; // E.g. LS64_STR
};
protected:
const EpiphanySubtarget &STI;
public:
explicit EpiphanyFrameLowering(const EpiphanySubtarget &sti)
: TargetFrameLowering(TargetFrameLowering::StackGrowsDown, 8, 0, 4),
STI(sti) {
}
/// emitProlog/emitEpilog - These methods insert prolog and epilog code into
/// the function.
virtual void emitPrologue(MachineFunction &MF) const;
virtual void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
/// Decides how much stack adjustment to perform in each phase of the prologue
/// and epilogue.
void splitSPAdjustments(uint64_t Total, uint64_t &Initial,
uint64_t &Residual) const;
int64_t resolveFrameIndexReference(MachineFunction &MF, int FrameIndex,
unsigned &FrameReg, int SPAdj,
bool IsCalleeSaveOp) const;
virtual void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
RegScavenger *RS) const;
virtual bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
const std::vector<CalleeSavedInfo> &CSI,
const TargetRegisterInfo *TRI) const;
virtual bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
const std::vector<CalleeSavedInfo> &CSI,
const TargetRegisterInfo *TRI) const;
void eliminateCallFramePseudoInstr(MachineFunction &MF,
MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI) const;
/// If the register is X30 (i.e. LR) and the return address is used in the
/// function then the callee-save store doesn't actually kill the register,
/// otherwise it does.
bool determinePrologueDeath(MachineBasicBlock &MBB, unsigned Reg) const;
/// This function emits the loads or stores required during prologue and
/// epilogue as efficiently as possible.
///
/// The operations involved in setting up and tearing down the frame are
/// similar enough to warrant a shared function, particularly as discrepancies
/// between the two would be disastrous.
void emitFrameMemOps(bool isStore, MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
const std::vector<CalleeSavedInfo> &CSI,
const TargetRegisterInfo *TRI) const;
virtual bool hasFP(const MachineFunction &MF) const;
virtual bool useFPForAddressing(const MachineFunction &MF) const;
/// On AA
virtual bool hasReservedCallFrame(const MachineFunction &MF) const;
};
} // End llvm namespace
#endif