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Use the RoCM/HIP device to accelerate certain DPLASMA kernels #57
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As discussed on 03/31/23 we need to rebase and check the result. This will be tested next week on Frontier, we need it to be ready. |
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Signed-off-by: Aurelien Bouteiller <[email protected]>
Signed-off-by: Aurelien Bouteiller <[email protected]>
Signed-off-by: Aurelien Bouteiller <[email protected]>
Signed-off-by: Aurelien Bouteiller <[email protected]>
Signed-off-by: Aurelien Bouteiller <[email protected]> Conflicts: src/CMakeLists.txt
Signed-off-by: Aurelien Bouteiller <[email protected]>
Signed-off-by: Aurelien Bouteiller <[email protected]>
Signed-off-by: Aurelien Bouteiller <[email protected]>
Signed-off-by: Aurelien Bouteiller <[email protected]>
Signed-off-by: Aurelien Bouteiller <[email protected]>
Signed-off-by: Aurelien Bouteiller <[email protected]>
Signed-off-by: Aurelien Bouteiller <[email protected]>
Signed-off-by: Aurelien Bouteiller <[email protected]>
Signed-off-by: Aurelien Bouteiller <[email protected]>
Signed-off-by: Aurelien Bouteiller <[email protected]>
Signed-off-by: Aurelien Bouteiller <[email protected]>
Signed-off-by: Aurelien Bouteiller <[email protected]>
Signed-off-by: Aurelien Bouteiller <[email protected]>
Signed-off-by: Aurelien Bouteiller <[email protected]>
Use proper error checks instead of asserts
Signed-off-by: Aurelien Bouteiller <[email protected]>
Signed-off-by: Aurelien Bouteiller <[email protected]>
Signed-off-by: Aurelien Bouteiller <[email protected]>
Signed-off-by: Aurelien Bouteiller <[email protected]>
Signed-off-by: Aurelien Bouteiller <[email protected]>
This is in ready to merge state beside the 'squash to less commits'. |
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Why only certain kernels are HIP-enabled instead of having all CUDA-enabled kernel also be HIP-enabled ?
use cublasv2 by default (req. for cusolver anyway) except if cublas(v1) is included before the dplasmajdf/aux.h include This reverts the logic for cublas.h determination, and is a first steps toward deprecating cublas(v1) usage entirely
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This PR adds RoCM enabled kernels to the GEMM, PORTF and memory-aware GEMM operations.