From 412e99424f4d660f25b26e323132b28343809834 Mon Sep 17 00:00:00 2001 From: Isaac Marovitz Date: Thu, 4 Jan 2024 16:58:21 -0500 Subject: [PATCH] ei di Fix --- src/cpu.rs | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/src/cpu.rs b/src/cpu.rs index f5ed26d..447304a 100644 --- a/src/cpu.rs +++ b/src/cpu.rs @@ -9,7 +9,8 @@ pub struct CPU { pub mem: MMU, halted: bool, // Enabled Interrupts - ime: bool + ime: bool, + ime_ask: bool } impl CPU { @@ -18,7 +19,8 @@ impl CPU { reg: Registers::new(mode, booting), mem: MMU::new(mode, mbc_mode, print_serial, rom), halted: false, - ime: false + ime: false, + ime_ask: false } } @@ -30,6 +32,11 @@ impl CPU { } else if self.halted { 1 } else { + if self.ime_ask && !self.ime { + self.ime = true; + self.ime_ask = false; + } + self.op_call() } }; @@ -377,7 +384,7 @@ impl CPU { self.reg.set_af(v); 3 }, 0xF2 => { let a = 0xFF00 | u16::from(self.reg.c); self.reg.a = self.mem.read(a); 2 }, - 0xF3 => { self.ime = false; 1 }, + 0xF3 => { self.ime = false; self.ime_ask = false; 1 }, 0xF5 => { self.push(self.reg.get_af()); 4 }, 0xF6 => { let b = self.read_byte(); self.alu_or(b); 2 }, @@ -387,7 +394,7 @@ impl CPU { 0xF9 => { self.reg.sp = self.reg.get_hl(); 2 }, 0xFA => { let a = self.read_word(); self.reg.a = self.mem.read(a); 4 }, - 0xFB => { self.ime = true; 1 }, + 0xFB => { self.ime_ask = true; 1 }, 0xFE => { let b = self.read_byte(); self.alu_cp(b); 2 }, 0xFF => { self.rst(0x38) },