Achieved simulation of PipelineC with CXXRTL

[suarezvictor]

/*
PipelineC simulation with CXXRTL & Yosys
(C) 2021 Victor Suarez Rovere [email protected]
License: GPL 2
For installing tools, see https://tomverbeure.github.io/2020/11/04/VHDL_Verilog_Cosimulation_with_CXXRTL.html

STEP 1: Generate VHDL files with PipelineC

$ ./src/pipelinec ./examples/blink.c --sim_comb --edaplay

blink.c:

#include "uintN_t.h" // uintN_t types for any N
uint25_t counter;
// LED on off state
uint1_t led;
#pragma MAIN_MHZ blink 33.33
uint1_t blink()
{
if(counter==(3-1)) //3 iterations
{
// Toggle led
led = !led;
// Reset counter
counter = 0;
}
else
{
counter += 1;
}
return led;
}

STEP 2: Generate simulation .cpp from VHDL files

$ cd ./pipelinec_output_edaplay.c_17248/all_vhdl_files #adjust number after .c_
$ ghdl -i cat ../vhdl_files.txt
$ ghdl -m top
$ yosys -m ghdl

ghdl top; write_cxxrtl top.cpp
exit

STEP 3: Compile & run

$ clang++ -g -O3 -std=c++14 -I yosys-config --datdir/include main.cpp -o top
$ ./top
cycle 0 - led: 0, counter: 1
cycle 1 - led: 0, counter: 2
cycle 2 - led: 1, counter: 0
cycle 3 - led: 1, counter: 1
cycle 4 - led: 1, counter: 2
cycle 5 - led: 0, counter: 0
cycle 6 - led: 0, counter: 1
cycle 7 - led: 0, counter: 2
cycle 8 - led: 1, counter: 0
cycle 9 - led: 1, counter: 1

*/

#include
#include "top.cpp"

#define p_clk p_clk__33p33
#define p_led p_blink__return__output
#define p_counter p_blink__0clk__a5a1_2e_counter__mux__blink__c__l17__c3__fca1_2e_return__output //name was guessed

using namespace std;

int main()
{
cxxrtl_design::p_top top;
top.step();

for(int cycle=0; cycle<10; ++cycle)
{
   top.debug_eval(); //if not called, some values are optimized (thus not calculated)

   top.p_clk.set<bool>(false); top.step();
   top.p_clk.set<bool>(true); top.step();

   bool cur_led        = top.p_led.get<bool>();
   uint32_t counter    = top.p_counter.get<uint32_t>();
   cout << "cycle " << cycle << " - led: " << cur_led << ", counter: " << counter << endl;
}
return 0;

}

[suarezvictor]

Same with plain file (avoid formatting errors)
main.cpp.txt

[JulianKemmerer]

@suarezvictor re getting some code that will have a more constant+predictable name, later tonight I can type up more but the info from https://github.com/JulianKemmerer/PipelineC/wiki/Modules,-Hierarchy,-Composability about top level IO might + global wires might be enough for you to get going if you are waiting

[JulianKemmerer]

Sadly probably not tonight but hopefully over the weekend I want to recreate your cxxrtl sim setup (tool build+install and all)
Excited to get into structuring code for VGA
I have a VGA PMOD for my Arty board I want to try this on eventually too 🤙

[suarezvictor]

Good! I Think you could reproduce my example, but I'm running into issues with GHDL. For example, float global variables cannot be initialized to negative values, and "to_slv" function to convert floats to integer isn't found (nor seems correctly included in the generated files) For large projects it seems CXXRTL generation from yosys hangs, but I'll keep trying. I may need additional help to have a bare bones project running, hopefully with an open source simulator so we can add peripherals like a VGA.

…

On Sat, Sep 18, 2021 at 1:21 AM Julian Kemmerer ***@***.***> wrote: Sadly probably not tonight but hopefully over the week I want to recreate your cxxrtl sim setup (tool build+install and all) Excited to get into structuring code for VGA I have a VGA PMOD for my Arty board I want to try this on eventually too 🤙 — You are receiving this because you were mentioned. Reply to this email directly, view it on GitHub <#12 (comment)>, or unsubscribe <https://github.com/notifications/unsubscribe-auth/ACBHVWPGKOCKX5JAG32C7RLUCQHSXANCNFSM5EGCGPGA> . Triage notifications on the go with GitHub Mobile for iOS <https://apps.apple.com/app/apple-store/id1477376905?ct=notification-email&mt=8&pt=524675> or Android <https://play.google.com/store/apps/details?id=com.github.android&referrer=utm_campaign%3Dnotification-email%26utm_medium%3Demail%26utm_source%3Dgithub>.

[JulianKemmerer]

Oh interesting so 'float global variables cannot be initialized to negative values' is a GHDL issue?

Missing float functions + not generated includes in code makes sense, is familiar
its not always clear if/how tools support float libraries (ieee_proposed or regular, etc ). I will try to check up on float stuff and see whats up (ex. for Vivado I needed to pull the float VHDL package from the Vivado install directory for a while - still need to do that for fixed pkg ex. vivado/scripts/rt/data/fixed_pkg_2008.vhd)

'I may need additional help'
I am more than happy to help - keep messaging however is convenient for you

[JulianKemmerer]

Fixed the PipelineC issue where negative float init wasnt working
c1d91a3

Seeing what I can do about generating includes of float modules correctly +? getting GHDL to support

[JulianKemmerer]

Now including the standard float pkg by default
94a775f

This example now works on edaplayground for Aldec sim - getting into what GHDL wants

#include "uintN_t.h"
float my_float_global = -1.23;
#pragma MAIN_MHZ my_test_bench 100.0
uint1_t my_test_bench()
{
  float my_float_local = -3.45;
  printf("Global value is %f\n", my_float_global);
  printf("Local value is %f\n", my_float_local);
  return 1;
}

[JulianKemmerer]

Stuck on GHDLs float pkg error now
"float_pkg" not found in library "ieee" ...

[JulianKemmerer]

Seems like GHDL supports the ieee float pkg
https://github.com/ghdl/ghdl/blob/c33f41e4612347d1fcbb9a37bc82249d7b8366eb/libraries/ieee2008/float_pkg.vhdl

https://github.com/ghdl/ghdl/blob/c33f41e4612347d1fcbb9a37bc82249d7b8366eb/testsuite/synth/issue1460/division_float.vhdl

Maybe its an edaplayground problem? @suarezvictor do you see that "float_pkg" not found in library "ieee" error from GHDL running locally?

[JulianKemmerer]

I was able to recreate your cxxrtl sim.
ghdl needs --std=08 args now since including float_pkg.
And those files need to be manually included paths like /usr/local/lib/ghdl/src/ieee2008/float_pkg.vhdl

I plan to resolve this issue
#4
by setting up for someone who followed the same instructions we did - trying to detect things in path, etc. See if I can get as far as adding a --cxxrtl flag to PipelineC that runs the simulation for you too ;)

[JulianKemmerer]

@suarezvictor you might be interested in this work in progress
#15

[suarezvictor]

Great advances! And glad to know muy proposals makes sense form you. I'll tests it all and provide feedback El dom., 19 sep. 2021 12:47, Julian Kemmerer ***@***.***> escribió:

…

@suarezvictor <https://github.com/suarezvictor> you might be interested in this work in progress #15 <#15> — You are receiving this because you were mentioned. Reply to this email directly, view it on GitHub <#12 (comment)>, or unsubscribe <https://github.com/notifications/unsubscribe-auth/ACBHVWKF52QX7WALSPDAMT3UCYAZFANCNFSM5EGCGPGA> . Triage notifications on the go with GitHub Mobile for iOS <https://apps.apple.com/app/apple-store/id1477376905?ct=notification-email&mt=8&pt=524675> or Android <https://play.google.com/store/apps/details?id=com.github.android&referrer=utm_campaign%3Dnotification-email%26utm_medium%3Demail%26utm_source%3Dgithub>.

[JulianKemmerer]

@suarezvictor some vga related progress
#15 (comment)