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Perf - sscofpmf extension support #161

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ZLangJIT opened this issue Oct 29, 2024 · 0 comments
Open

Perf - sscofpmf extension support #161

ZLangJIT opened this issue Oct 29, 2024 · 0 comments

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@ZLangJIT
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[    9.508180] goldfish_rtc 101000.rtc: setting system clock to 2024-10-29T23:26:39 UTC (1730244399)
[    9.639579] riscv-pmu-sbi: SBI PMU extension is available
[    9.644546] riscv-pmu-sbi: 16 firmware and 2 hardware counters
[    9.645553] riscv-pmu-sbi: Perf sampling/filtering is not supported as sscof extension is not available

more info can be found here

https://lore.kernel.org/lkml/[email protected]/T/

in particular

... The SBI PMU extension allows
the kernel to program the counters for different events and start/stop counters

while the sscofpmf extension allows the counter overflow interrupt and privilege
mode filtering.

An hardware platform can leverage SBI PMU extension without
the sscofpmf extension if it supports mcounteren at least.

Perf stat will work
but record won't work as sscofpmf & mcountinhibit is required to support that.
A platform can support both features event counting and sampling using perf
tool only if sscofpmf is supported. 

additionally

The sscofpmf extension allows counter overflow and filtering for
programmable counters. Enable the perf driver to handle the overflow
interrupt. The overflow interrupt is a hart local interrupt.
Thus, per cpu overflow interrupts are setup as a child under the root
INTC irq domain.

also seems a semi-important comment

+		if (riscv_pmu_event_set_period(event)) {
+			/*
+			 * Unlike other ISAs, RISC-V don't have to disable interrupts
+			 * to avoid throttling here. As per the specification, the
+			 * interrupt remains disabled until the OF bit is set.
+			 * Interrupts are enabled again only during the start.
+			 * TODO: We will need to stop the guest counters once
+			 * virtualization support is added.
+			 */
+			perf_event_overflow(event, &data, regs);
+		}

tho i am not exactly sure what this extension allows perf to do in addition to what it can already do with the PMU extention

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