From a8523f30eae6695e65bb021cfcdc77a844317f7a Mon Sep 17 00:00:00 2001 From: Eren Terzioglu Date: Tue, 9 Jul 2024 10:07:44 +0200 Subject: [PATCH] esp32[c3]: Merge simple boot and mcu boot files into single file --- .../scripts/esp32c3_mcuboot_sections.ld | 339 ------------------ ...e_boot_sections.ld => esp32c3_sections.ld} | 52 ++- .../esp32c3/esp32c3-generic/scripts/Make.defs | 4 +- 3 files changed, 52 insertions(+), 343 deletions(-) delete mode 100644 boards/risc-v/esp32c3/common/scripts/esp32c3_mcuboot_sections.ld rename boards/risc-v/esp32c3/common/scripts/{esp32c3_simple_boot_sections.ld => esp32c3_sections.ld} (91%) diff --git a/boards/risc-v/esp32c3/common/scripts/esp32c3_mcuboot_sections.ld b/boards/risc-v/esp32c3/common/scripts/esp32c3_mcuboot_sections.ld deleted file mode 100644 index 7549e40fa254c..0000000000000 --- a/boards/risc-v/esp32c3/common/scripts/esp32c3_mcuboot_sections.ld +++ /dev/null @@ -1,339 +0,0 @@ -/**************************************************************************** - * boards/risc-v/esp32c3/common/scripts/esp32c3_mcuboot_sections.ld - * - * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with - * this work for additional information regarding copyright ownership. The - * ASF licenses this file to you under the Apache License, Version 2.0 (the - * "License"); you may not use this file except in compliance with the - * License. You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the - * License for the specific language governing permissions and limitations - * under the License. - * - ****************************************************************************/ - -/* Default entry point: */ - -ENTRY(__start); - -SECTIONS -{ - .metadata : - { - /* Magic for load header */ - - LONG(0xace637d3) - - /* Application entry point address */ - - KEEP(*(.entry_addr)) - - /* IRAM metadata: - * - Destination address (VMA) for IRAM region - * - Flash offset (LMA) for start of IRAM region - * - Size of IRAM region - */ - - LONG(ADDR(.iram0.text)) - LONG(LOADADDR(.iram0.text)) - LONG(SIZEOF(.iram0.text)) - - /* DRAM metadata: - * - Destination address (VMA) for DRAM region - * - Flash offset (LMA) for start of DRAM region - * - Size of DRAM region - */ - - LONG(ADDR(.dram0.data)) - LONG(LOADADDR(.dram0.data)) - LONG(SIZEOF(.dram0.data)) - } >metadata - - _image_drom_vma = ADDR(.flash.rodata); - _image_drom_lma = LOADADDR(.flash.rodata); - _image_drom_size = LOADADDR(.flash.rodata) + SIZEOF(.flash.rodata) - _image_drom_lma; - - .flash.appdesc : ALIGN(0x10) - { - _rodata_reserved_start = ABSOLUTE(.); /* This is a symbol marking the flash.rodata start, this can be used for mmu driver to maintain virtual address */ - _rodata_start = ABSOLUTE(.); - - /* Create an empty gap within this section. Thanks to this, the end of this - * section will match .flash.rodata's begin address. Thus, both sections - * will be merged when creating the final bin image. */ - . = ALIGN(ALIGNOF(.flash.rodata)); - } >default_rodata_seg - - .flash.rodata : - { - _srodata = ABSOLUTE(.); - *(EXCLUDE_FILE (*libarch.a:esp_spiflash.* esp_head.* esp_start.*) .rodata) - *(EXCLUDE_FILE (*libarch.a:esp_spiflash.* esp_head.* esp_start.*) .rodata.*) - - *(.srodata.*) - - *(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */ - *(.gnu.linkonce.r.*) - *(.rodata1) - __XT_EXCEPTION_TABLE_ = ABSOLUTE(.); - *(.xt_except_table) - *(.gcc_except_table .gcc_except_table.*) - *(.gnu.linkonce.e.*) - *(.gnu.version_r) - . = (. + 3) & ~ 3; - __eh_frame = ABSOLUTE(.); - KEEP(*(.eh_frame)) - . = (. + 7) & ~ 3; - - /* C++ constructor and destructor tables, properly ordered: */ - - _sinit = ABSOLUTE(.); - KEEP (*crtbegin.o(.ctors)) - KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) - KEEP (*(SORT(.ctors.*))) - KEEP (*(.ctors)) - _einit = ABSOLUTE(.); - KEEP (*crtbegin.o(.dtors)) - KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) - KEEP (*(SORT(.dtors.*))) - KEEP (*(.dtors)) - - /* C++ exception handlers table: */ - - __XT_EXCEPTION_DESCS_ = ABSOLUTE(.); - *(.xt_except_desc) - *(.gnu.linkonce.h.*) - __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); - *(.xt_except_desc_end) - *(.dynamic) - *(.gnu.version_d) - . = ALIGN(4); /* This table MUST be 4-byte aligned */ - _erodata = ABSOLUTE(.); - - /* Literals are also RO data. */ - - _lit4_start = ABSOLUTE(.); - *(*.lit4) - *(.lit4.*) - *(.gnu.linkonce.lit4.*) - _lit4_end = ABSOLUTE(.); - . = ALIGN(4); - } >drom0_0_seg AT>ROM - - .flash.rodata_noload (NOLOAD) : - { - /* - This is a symbol marking the flash.rodata end, this can be used for mmu driver to maintain virtual address - We don't need to include the noload rodata in this section - */ - _rodata_reserved_end = ABSOLUTE(.); - . = ALIGN (4); - } > default_rodata_seg AT > ROM - - .iram0.text : - { - _iram_start = ABSOLUTE(.); - - /* Vectors go to start of IRAM */ - - KEEP(*(.exception_vectors.text)); - . = ALIGN(4); - - *(.iram1) - *(.iram1.*) - *libarch.a:*cache_hal.*(.text .text.* .literal .literal.*) - *libarch.a:*mpu_hal.*(.text .text.* .literal .literal.*) - *libarch.a:*mmu_hal.*(.text .text.* .literal .literal.*) - *libarch.a:esp_spiflash.*(.literal .text .literal.* .text.*) - esp_head.*(.literal .text .literal.* .text.*) - esp_start.*(.literal .text .literal.* .text.*) - *(.wifi0iram .wifi0iram.*) - *(.wifirxiram .wifirxiram.*) - *(.wifislpiram .wifislpiram.*) - *(.wifislprxiram .wifislprxiram.*) - } >iram0_0_seg AT>ROM - - .dram0.dummy (NOLOAD): - { - /* This section is required to skip .iram0.text area because iram0_0_seg - * and dram0_0_seg reflect the same address space on different buses. - */ - - . = ORIGIN(dram0_0_seg) + _iram_end - _iram_start; - } >dram0_0_seg - - .noinit (NOLOAD): - { - /* This section contains data that is not initialized during load, - * or during the application's initialization sequence. - */ - - . = ALIGN(8); - *(.noinit) - *(.noinit.*) - . = ALIGN(8); - } >dram0_0_seg - - .dram0.data : - { - /* .data initialized on power-up in ROMed configurations. */ - - _sdata = ABSOLUTE(.); - KEEP (*(.data)) - KEEP (*(.data.*)) - KEEP (*(.gnu.linkonce.d.*)) - KEEP (*(.data1)) - __global_pointer$ = . + 0x800; - KEEP (*(.sdata)) - KEEP (*(.sdata.*)) - KEEP (*(.gnu.linkonce.s.*)) - KEEP (*(.sdata2)) - KEEP (*(.sdata2.*)) - KEEP (*(.gnu.linkonce.s2.*)) - KEEP (*(.jcr)) - *(.dram1 .dram1.*) - *libarch.a:*cache_hal.*(.rodata .rodata.*) - *libarch.a:*mpu_hal.*(.rodata .rodata.*) - *libarch.a:*mmu_hal.*(.rodata .rodata.*) - *libarch.a:esp_spiflash.*(.rodata .rodata.*) - esp_head.*(.rodata .rodata.*) - esp_start.*(.rodata .rodata.*) - _edata = ABSOLUTE(.); - } >dram0_0_seg AT>ROM - - /* Shared RAM */ - - .dram0.bss (NOLOAD) : - { - /* .bss initialized on power-up */ - - . = ALIGN (8); - _sbss = ABSOLUTE(.); - *(.dynsbss) - *(.sbss) - *(.sbss.*) - *(.gnu.linkonce.sb.*) - *(.scommon) - *(.sbss2) - *(.sbss2.*) - *(.gnu.linkonce.sb2.*) - *(.dynbss) - KEEP (*(.bss)) - *(.bss.*) - *(.share.mem) - *(.gnu.linkonce.b.*) - *(COMMON) - . = ALIGN(32); - _ebss = ABSOLUTE(.); - } >dram0_0_seg - - /* Marks the end of IRAM code segment */ - - .iram0.text_end (NOLOAD) : - { - . = ALIGN (16); - } >iram0_0_seg - - .iram0.data : - { - . = ALIGN(16); - *(.iram.data) - *(.iram.data*) - } >iram0_0_seg AT>ROM - - .iram0.bss (NOLOAD) : - { - . = ALIGN(16); - *(.iram.bss) - *(.iram.bss*) - - . = ALIGN(16); - _iram_end = ABSOLUTE(.); - } >iram0_0_seg - - _image_irom_vma = ADDR(.flash.text); - _image_irom_lma = LOADADDR(.flash.text); - _image_irom_size = LOADADDR(.flash.text) + SIZEOF(.flash.text) - _image_irom_lma; - - /* The alignment of the ".flash.text" output section is forced to - * 0x0000FFFF (64KB) to ensure that it will be allocated at the beginning - * of the next available Flash block. - * This is required to meet the following constraint from the external - * flash MMU: - * VMA % 64KB == LMA % 64KB - * i.e. the lower 16 bits of both the virtual address (address seen by the - * CPU) and the load address (physical address of the external flash) must - * be equal. - */ - - .flash_text_dummy (NOLOAD) : ALIGN(0x0000FFFF) - { - /* This section is required to skip .flash.rodata area because irom0_0_seg - * and drom0_0_seg reflect the same address space on different buses. - */ - - . = SIZEOF(.flash.rodata); - } >irom0_0_seg - - .flash.text : ALIGN(0x0000FFFF) - { - _stext = .; - _instruction_reserved_start = ABSOLUTE(.); /* This is a symbol marking the flash.text start, this can be used for mmu driver to maintain virtual address */ - _text_start = ABSOLUTE(.); - - *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) - *(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */ - *(.fini.literal) - *(.fini) - *(.gnu.version) - . = ALIGN(4); - - _text_end = ABSOLUTE(.); - _instruction_reserved_end = ABSOLUTE(.); /* This is a symbol marking the flash.text end, this can be used for mmu driver to maintain virtual address */ - _etext = .; - } >irom0_0_seg AT>ROM - - .rtc.text : - { - . = ALIGN(4); - *(.rtc.literal .rtc.text) - } >rtc_iram_seg AT>ROM - - /* RTC BSS section. */ - - .rtc.bss (NOLOAD) : - { - *(.rtc.bss) - } >rtc_iram_seg - - .rtc.data : - { - *(.rtc.data) - *(.rtc.rodata) - } >rtc_iram_seg AT>ROM - - /* This section holds RTC data that should have fixed addresses. - * The data are not initialized at power-up and are retained during deep sleep. - */ - .rtc_reserved (NOLOAD): - { - . = ALIGN(4); - _rtc_reserved_start = ABSOLUTE(.); - - /* New data can only be added here to ensure existing data are not moved. - Because data have adhered to the end of the segment and code is relied on it. - >> put new data here << */ - - *(.rtc_timer_data_in_rtc_mem .rtc_timer_data_in_rtc_mem.*) - KEEP(*(.bootloader_data_rtc_mem .bootloader_data_rtc_mem.*)) - _rtc_reserved_end = ABSOLUTE(.); - } > rtc_reserved_seg - - _rtc_reserved_length = _rtc_reserved_end - _rtc_reserved_start; -} diff --git a/boards/risc-v/esp32c3/common/scripts/esp32c3_simple_boot_sections.ld b/boards/risc-v/esp32c3/common/scripts/esp32c3_sections.ld similarity index 91% rename from boards/risc-v/esp32c3/common/scripts/esp32c3_simple_boot_sections.ld rename to boards/risc-v/esp32c3/common/scripts/esp32c3_sections.ld index e45c748124415..6ac3ed1509ce1 100644 --- a/boards/risc-v/esp32c3/common/scripts/esp32c3_simple_boot_sections.ld +++ b/boards/risc-v/esp32c3/common/scripts/esp32c3_sections.ld @@ -1,5 +1,5 @@ /**************************************************************************** - * boards/risc-v/espressif/common/scripts/esp32c3_simple_boot_sections.ld + * boards/risc-v/espressif/common/scripts/esp32c3_sections.ld * * Licensed to the Apache Software Foundation (ASF) under one or more * contributor license agreements. See the NOTICE file distributed with @@ -18,12 +18,47 @@ * ****************************************************************************/ +#include "common.ld" + /* Default entry point: */ ENTRY(__start); SECTIONS { +#ifdef CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT + .metadata : + { + /* Magic for load header */ + + LONG(0xace637d3) + + /* Application entry point address */ + + KEEP(*(.entry_addr)) + + /* IRAM metadata: + * - Destination address (VMA) for IRAM region + * - Flash offset (LMA) for start of IRAM region + * - Size of IRAM region + */ + + LONG(ADDR(.iram0.text)) + LONG(LOADADDR(.iram0.text)) + LONG(SIZEOF(.iram0.text)) + + /* DRAM metadata: + * - Destination address (VMA) for DRAM region + * - Flash offset (LMA) for start of DRAM region + * - Size of DRAM region + */ + + LONG(ADDR(.dram0.data)) + LONG(LOADADDR(.dram0.data)) + LONG(SIZEOF(.dram0.data)) + } >metadata +#endif + .iram0.text : { _iram_start = ABSOLUTE(.); @@ -35,6 +70,7 @@ SECTIONS *(.iram1) *(.iram1.*) +#ifdef CONFIG_ESPRESSIF_SIMPLE_BOOT *libsched.a:irq_dispatch.*(.text .text.* .literal .literal.*) *libarch.a:*brownout.*(.text .text.* .literal .literal.*) @@ -91,6 +127,12 @@ SECTIONS *libarch.a:*log.*(.text .text.* .literal .literal.*) *libarch.a:*log_noos.*(.text .text.* .literal .literal.*) *libarch.a:esp_spiflash.*(.literal .text .literal.* .text.*) +#else + *libarch.a:*cache_hal.*(.text .text.* .literal .literal.*) + *libarch.a:*mpu_hal.*(.text .text.* .literal .literal.*) + *libarch.a:*mmu_hal.*(.text .text.* .literal .literal.*) + *libarch.a:esp_spiflash.*(.literal .text .literal.* .text.*) +#endif esp_head.*(.literal .text .literal.* .text.*) esp_start.*(.literal .text .literal.* .text.*) @@ -141,6 +183,7 @@ SECTIONS *(.jcr) *(.dram1) *(.dram1.*) +#ifdef CONFIG_ESPRESSIF_SIMPLE_BOOT *libsched.a:irq_dispatch.*(.rodata .rodata.*) *libarch.a:*brownout.*(.rodata .rodata.*) @@ -197,7 +240,12 @@ SECTIONS *libarch.a:*log.*(.rodata .rodata.*) *libarch.a:*log_noos.*(.rodata .rodata.*) *libarch.a:esp_spiflash.*(.rodata .rodata.*) - +#else + *libarch.a:*cache_hal.*(.rodata .rodata.*) + *libarch.a:*mpu_hal.*(.rodata .rodata.*) + *libarch.a:*mmu_hal.*(.rodata .rodata.*) + *libarch.a:esp_spiflash.*(.rodata .rodata.*) +#endif esp_head.*(.rodata .rodata.*) esp_start.*(.rodata .rodata.*) diff --git a/boards/risc-v/esp32c3/esp32c3-generic/scripts/Make.defs b/boards/risc-v/esp32c3/esp32c3-generic/scripts/Make.defs index 28f81bf61a177..e652ad3bf0550 100644 --- a/boards/risc-v/esp32c3/esp32c3-generic/scripts/Make.defs +++ b/boards/risc-v/esp32c3/esp32c3-generic/scripts/Make.defs @@ -34,9 +34,9 @@ ARCHSCRIPT += $(BOARD_COMMON_DIR)/scripts/$(CHIP_SERIES)_aliases.ld ARCHSCRIPT += $(call FINDSCRIPT,$(CHIP_SERIES)_flat_memory.ld) ifeq ($(CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT),y) - ARCHSCRIPT += $(call FINDSCRIPT,$(CHIP_SERIES)_mcuboot_sections.ld) + ARCHSCRIPT += $(call FINDSCRIPT,$(CHIP_SERIES)_sections.ld) else ifeq ($(CONFIG_ESPRESSIF_SIMPLE_BOOT),y) - ARCHSCRIPT += $(call FINDSCRIPT,$(CHIP_SERIES)_simple_boot_sections.ld) + ARCHSCRIPT += $(call FINDSCRIPT,$(CHIP_SERIES)_sections.ld) else ARCHSCRIPT += $(call FINDSCRIPT,$(CHIP_SERIES)_legacy_sections.ld) endif