cpu.tex

\chapter{Introducing the 45GS02 CPU}
\label{cha:introducing-the-45gs02-cpu}

This chapter is in progress.

\begin{itemize}
\item How does a CPU work
\item Features of the 45GS02
\end{itemize}

\section{Using the Monitor}

\begin{itemize}
    \item what is a machine language monitor
\item MONITOR command
\item inspecting registers
\item inspecting memory
\item disassembling code
\item assembling code
\item executing a subroutine
\item breaking and continuing
\end{itemize}

\section{CPU Instructions}

\begin{itemize}
    \item Instructions
\item Addressing modes
\end{itemize}

\begin{itemize}
    \item Registers and status flags
\item Reading and writing memory
\item Performing calculations
\item Branching and subroutines
\item MAP and EOM
\end{itemize}

\section{CPU Registers}

\begin{itemize}
    \item Accumulator
\item X, Y, Z
\item Program counter
\item Stack pointer
\item Base page (B)
\item Status flags; the status register
\item MAP
\end{itemize}

\section{The Base Page}

\begin{itemize}
    \item Purpose: fast temporary memory; pointers
\item Zero page
\item The B register
\item Base page addressing modes
\item Other base page operations
\item KERNAL considerations
\end{itemize}

\section{Indirect Addressing}


\section{The 32-bit Virtual Register}


\section{The Stack}

\begin{itemize}
    \item Pushing and pulling values
\item Subroutine calls
\item 8-bit vs. 16-bit stack pointer
\item Stack relative addressing mode
\end{itemize}

\section{Interrupts}

\begin{itemize}
    \item Types of interrupts
\item Interrupt vectors
\item Interrupt handler interface
\item An example without the KERNAL
\item Extending the KERNAL IRQ
\item Note about the MAP register
\end{itemize}

\section{Encoding instructions}

\begin{itemize}
    \item Opcodes and operands
\item 32-bit indirect addressing mode
\item 32-bit virtual register instructions
\end{itemize}

\section{The 6502 Lineage}

\begin{itemize}
    \item 6502 / 6510
\item 65C02
\item 65CE02 ("4502") / 4510
\item 45GS02
\end{itemize}