diff --git a/.gitignore b/.gitignore index 8914a59..989dbd5 100644 --- a/.gitignore +++ b/.gitignore @@ -10,6 +10,9 @@ NUCLEOF103RB/ .settings .idea +FW/NUCLEO-F103RB.xml +FW/BLUEPILL.xml + # Docs Docs/ diff --git a/.travis.yml b/.travis.yml index fd71376..72677c7 100644 --- a/.travis.yml +++ b/.travis.yml @@ -3,8 +3,10 @@ matrix: include: - language: python python: + - "3.4" - "3.5" - "3.6" + - "3.7" install: - "pip install flake8" diff --git a/FW/Inc/app_defaults.h b/FW/Inc/app_defaults.h index a0adbc1..c7df3e0 100644 --- a/FW/Inc/app_defaults.h +++ b/FW/Inc/app_defaults.h @@ -10,7 +10,7 @@ #define FW_REV_MAJOR (1) #define FW_REV_MINOR (0) -#define FW_REV_PATCH (10) +#define FW_REV_PATCH (11) #define DEFAULT_UART_BAUDRATE 115200 #define DEFAULT_UART_PARITY BPT_PARITY_NONE diff --git a/FW/MMM/PHiLIP_access.c b/FW/MMM/PHiLIP_access.c index 0041951..d248e13 100644 --- a/FW/MMM/PHiLIP_access.c +++ b/FW/MMM/PHiLIP_access.c @@ -4,8 +4,8 @@ * @{ * @file PHiLIP_access.c * @author Kevin Weiss - * @version 0.0.2 - * @date 2019-04-21 + * @version 0.0.3 + * @date 2019-04-23 * @} * @details Generated from the memory map manager version 0.0.9 ****************************************************************************** diff --git a/FW/MMM/PHiLIP_config.json b/FW/MMM/PHiLIP_config.json index 8760461..cb1c463 100644 --- a/FW/MMM/PHiLIP_config.json +++ b/FW/MMM/PHiLIP_config.json @@ -2079,7 +2079,7 @@ "access": 1, "bit_offset": 1, "bits": 2, - "description": "direction of io in/out0/out1/int", + "description": "0:high impedance input - 1:push pull output - 2:open drain output - 3:interrupts and saves event", "name": [ "gpio", "0", @@ -2502,7 +2502,7 @@ "metadata": { "app_name": "PHiLIP", "author": "Kevin Weiss", - "version": "0.0.2" + "version": "0.0.3" }, "typedefs": [ { diff --git a/FW/MMM/PHiLIP_defaults.c b/FW/MMM/PHiLIP_defaults.c index 660fe23..1cda15d 100644 --- a/FW/MMM/PHiLIP_defaults.c +++ b/FW/MMM/PHiLIP_defaults.c @@ -4,8 +4,8 @@ * @{ * @file PHiLIP_defaults.c * @author Kevin Weiss - * @version 0.0.2 - * @date 2019-04-21 + * @version 0.0.3 + * @date 2019-04-23 * @} * @details Generated from the memory map manager version 0.0.9 ****************************************************************************** diff --git a/FW/MMM/PHiLIP_defaults.h b/FW/MMM/PHiLIP_defaults.h index 86c2cf8..883eb2a 100644 --- a/FW/MMM/PHiLIP_defaults.h +++ b/FW/MMM/PHiLIP_defaults.h @@ -4,8 +4,8 @@ * @{ * @file PHiLIP_defaults.h * @author Kevin Weiss - * @version 0.0.2 - * @date 2019-04-21 + * @version 0.0.3 + * @date 2019-04-23 * @details Generated from the memory map manager version 0.0.9 ****************************************************************************** */ diff --git a/FW/MMM/PHiLIP_map.c b/FW/MMM/PHiLIP_map.c index 67e6784..11fe3b8 100644 --- a/FW/MMM/PHiLIP_map.c +++ b/FW/MMM/PHiLIP_map.c @@ -4,8 +4,8 @@ * @{ * @file PHiLIP_map.c * @author Kevin Weiss - * @version 0.0.2 - * @date 2019-04-21 + * @version 0.0.3 + * @date 2019-04-23 * @} * @details Generated from the memory map manager version 0.0.9 ****************************************************************************** diff --git a/FW/MMM/PHiLIP_map.h b/FW/MMM/PHiLIP_map.h index c22cff5..12bff08 100644 --- a/FW/MMM/PHiLIP_map.h +++ b/FW/MMM/PHiLIP_map.h @@ -4,8 +4,8 @@ * @{ * @file PHiLIP_map.h * @author Kevin Weiss - * @version 0.0.2 - * @date 2019-04-21 + * @version 0.0.3 + * @date 2019-04-23 * @details Generated from the memory map manager version 0.0.9 ****************************************************************************** */ @@ -16,7 +16,7 @@ /* Defines -----------------------------------------------------------------*/ #define IF_VERSION_MAJOR 0 /**< Major version of interface */ #define IF_VERSION_MINOR 0 /**< Minor version of interface */ -#define IF_VERSION_PATCH 2 /**< Patch version of interface */ +#define IF_VERSION_PATCH 3 /**< Patch version of interface */ /* Global variables --------------------------------------------------------*/ extern const char* const PHILIP_TYPE_NAME[]; /** < type_name enum */ diff --git a/FW/MMM/PHiLIP_typedef.h b/FW/MMM/PHiLIP_typedef.h index cddac09..7dca3ec 100644 --- a/FW/MMM/PHiLIP_typedef.h +++ b/FW/MMM/PHiLIP_typedef.h @@ -4,8 +4,8 @@ * @{ * @file PHiLIP_typedef.h * @author Kevin Weiss - * @version 0.0.2 - * @date 2019-04-21 + * @version 0.0.3 + * @date 2019-04-23 * @details Generated from the memory map manager version 0.0.9 ****************************************************************************** */ diff --git a/FW/PHiLIP.doxyfile b/FW/PHiLIP.doxyfile index 81de6c2..6c2e99d 100644 --- a/FW/PHiLIP.doxyfile +++ b/FW/PHiLIP.doxyfile @@ -928,7 +928,7 @@ EXAMPLE_RECURSIVE = NO # that contain images that are to be included in the documentation (see the # \image command). -IMAGE_PATH = +IMAGE_PATH = ../RESOURCES # The INPUT_FILTER tag can be used to specify a program that doxygen should # invoke to filter for each input file. Doxygen will invoke the filter program @@ -1480,7 +1480,7 @@ DISABLE_INDEX = NO # The default value is: NO. # This tag requires that the tag GENERATE_HTML is set to YES. -GENERATE_TREEVIEW = NO +GENERATE_TREEVIEW = YES # The ENUM_VALUES_PER_LINE tag can be used to set the number of enum values that # doxygen will group on one line in the generated HTML documentation. diff --git a/FW/Src/main.c b/FW/Src/main.c index 82e4844..1769fca 100644 --- a/FW/Src/main.c +++ b/FW/Src/main.c @@ -33,6 +33,30 @@ ****************************************************************************** */ +/** @mainpage + * + * @section Description + * PHiLIP is qualified open-source firmware for nucleo-f103rb or bluepill + * boards used for testing peripherals of other embedded devices. PHiLIP is + * a low-cost solution to allow detailed, corner case peripheral testing for + * both developers and CI systems. PHiLIP is aimed at getting salient + * information that would be gathered from an oscilloscope or logic analyzer + * as well as injecting specific peripheral behaviors. PHiLIP is designed for + * testing peripheral APIs for embedded operating systems and hardware + * abstraction layers but was built with an architecture that allows for easy + * extensions to other applications such as product qualification or + * simulation. PHiLIP can be used with a raw serial connection but also comes + * with a python interface that simplifies writing test scripts as well as a + * shell for developers to run manual tests. + * + * @section Architecture + * PHiLIP firmware is designed to easily add peripheral functionality. It + * separates out the peripherals from the communication and application logic + * and the memory map. + * + * \image html PHiLIP_firmware_arch.png + */ + /* Includes ------------------------------------------------------------------*/ #include #include diff --git a/IF/philip_pal/philip_pal/mem_map/PHiLIP_map_t_0_0_3.csv b/IF/philip_pal/philip_pal/mem_map/PHiLIP_map_t_0_0_3.csv new file mode 100644 index 0000000..05f9425 --- /dev/null +++ b/IF/philip_pal/philip_pal/mem_map/PHiLIP_map_t_0_0_3.csv @@ -0,0 +1,170 @@ +name,offset,total_size,type_size,type,description,access,array_size,bit_offset,bits,default,flag,invalid,max,min +user_reg,0,256,1,uint8_t,Writable registers for user testing - Starts at 0 and increases 1 each register by default,3,256,,,,,,, +sys.sn,256,12,1,uint8_t,Unique ID of the device,0,12,,,,DEVICE_SPECIFIC,,, +sys.fw_rev,268,4,1,uint8_t,Firmware revision,0,4,,,,,0,, +sys.if_rev,272,4,1,uint8_t,Interface revision - This corelates to the version of the memory map,0,4,,,,,,, +sys.tick,276,,8,uint64_t,Tick in ms - Updates with the sys tick register every few ms,0,,,,,VOLATILE,,, +sys.build_time.second,284,,1,uint8_t,The build time seconds,0,,,,,DEVICE_SPECIFIC,,, +sys.build_time.minute,285,,1,uint8_t,The build time minutes,0,,,,,DEVICE_SPECIFIC,,, +sys.build_time.hour,286,,1,uint8_t,The build time hours,0,,,,,DEVICE_SPECIFIC,,, +sys.build_time.day_of_month,287,,1,uint8_t,The build time day of month,0,,,,,DEVICE_SPECIFIC,,, +sys.build_time.day_of_week,288,,1,uint8_t,Not used,0,,,,,DEVICE_SPECIFIC,,, +sys.build_time.month,289,,1,uint8_t,The build time month,0,,,,,DEVICE_SPECIFIC,,, +sys.build_time.year,290,,1,uint8_t,The build time year (20XX),0,,,,,DEVICE_SPECIFIC,,, +sys.build_time.res,291,1,1,uint8_t,Reserved bytes,0,1,,,,,,, +sys.device_num,292,,4,uint32_t,The philip device designator - A constant number to identify philip firmware,0,,,,17061,,,, +sys.sys_clk,296,,4,uint32_t,The frequency of the system clock in Hz,0,,,,,,,, +sys.status,300,,1,sys_status_t,Status of system,0,,,,,DEVICE_SPECIFIC,,, +sys.status.update,300,,1,,1:register configuration requires exceution for changes - 0:nothing to update,0,,0,1,,,,, +sys.status.board,300,,1,,1:board is a bluepill - 0:board is a nucleo-f103rb,0,,1,1,,DEVICE_SPECIFIC,,, +sys.mode,301,,1,sys_mode_t,Control register for device,1,,,,,,,, +sys.mode.init,301,,1,,0:periph will initialize on execute - 1:periph initialized,1,,0,1,,,,, +sys.mode.dut_rst,301,,1,,1:put DUT in reset mode - 0:run DUT,1,,1,1,,,,, +sys.res,302,18,1,uint8_t,Reserved bytes,0,18,,,,,,, +i2c.mode,320,,1,i2c_mode_t,Specific modes for I2C,1,,,,,,,, +i2c.mode.init,320,,1,,0:periph will initialize on execute - 1:periph initialized,1,,0,1,,,,, +i2c.mode.disable,320,,1,,0:periph is enabled - 1:periph is disabled,1,,1,1,,,,, +i2c.mode.addr_10_bit,320,,1,,0:i2c address is 7 bit mode - 1:10 i2c address is 10 bit mode,1,,2,1,,,,, +i2c.mode.general_call,320,,1,,0:disable general call - 1:enable general call,1,,3,1,,,,, +i2c.mode.no_clk_stretch,320,,1,,0:slave can clock stretch - 1:disables clock stretch,1,,4,1,,,,, +i2c.mode.reg_16_bit,320,,1,,0:8 bit register access - 1:16 bit register access mode,1,,5,1,,,,, +i2c.mode.reg_16_big_endian,320,,1,,0:little endian if 16 bit register access - 1:big endian if 16 bit register access,1,,6,1,,,,, +i2c.mode.nack_data,320,,1,,0:all data will ACK - 1:all data will NACK,1,,7,1,,,,, +i2c.status,321,,1,i2c_status_t,Specific modes for I2C,0,,,,,,,, +i2c.status.ovr,321,,1,,Overrun/Underrun: Request for new byte when not ready,0,,0,1,,,,, +i2c.status.af,321,,1,,Acknowledge failure,0,,1,1,,,,, +i2c.status.berr,321,,1,,Bus error: Non-valid position during a byte transfer,0,,2,1,,,,, +i2c.status.gencall,321,,1,,General call address received,0,,3,1,,,,, +i2c.status.busy,321,,1,,i2c bus is BUSY,0,,4,1,,,,, +i2c.status.rsr,321,,1,,Repeated start detected,0,,5,1,,,,, +i2c.clk_stretch_delay,322,,2,uint16_t,Clock stretch the first byte in us,1,,,,,,,, +i2c.slave_addr_1,324,,2,uint16_t,Primary slave address,1,,,,85,,125,124,8 +i2c.slave_addr_2,326,,2,uint16_t,Secondary slave address,1,,,,66,,126,124,8 +i2c.state,328,,2,uint16_t,Current state of i2c frame - 0:initialized - 1:reading data - 2-write address recieved - 3-1st reg byte recieved - 4-writing data - 5-NACK - 6-stopped,0,,,,,,,, +i2c.reg_index,330,,2,uint16_t,current index of i2c pointer,0,,,,,,,, +i2c.start_reg_index,332,,2,uint16_t,start index of i2c pointer,0,,,,,,,, +i2c.r_count,334,,1,uint8_t,Last read frame byte count - only in reg if_type 0,1,,,,,,,, +i2c.w_count,335,,1,uint8_t,Last write frame byte count - only in reg if_type 0,1,,,,,,,, +i2c.r_ticks,336,,4,uint32_t,Ticks for read byte,0,,,,,,,, +i2c.w_ticks,340,,4,uint32_t,Ticks for write byte,0,,,,,,,, +i2c.s_ticks,344,,4,uint32_t,Ticks for start and address,0,,,,,,,, +i2c.f_r_ticks,348,,4,uint32_t,Ticks for full read frame after the address is acked,0,,,,,,,, +i2c.f_w_ticks,352,,4,uint32_t,Ticks for full write frame,0,,,,,,,, +i2c.res,356,28,1,uint8_t,Reserved bytes,0,28,,,,,,, +spi.mode,384,,1,spi_mode_t,Specific spi modes,1,,,,,,,, +spi.mode.init,384,,1,,0:periph will initialize on execute - 1:periph initialized,1,,0,1,,,,, +spi.mode.disable,384,,1,,0:periph is enabled - 1:periph is disabled,1,,1,1,,,,, +spi.mode.cpha,384,,1,,0:CK to 0 when idle - 1:CK to 1 when idle,1,,2,1,,,,, +spi.mode.cpol,384,,1,,0:the first clock transition is the first data capture edge - 1:the second clock transition is the first data capture edge,1,,3,1,,,,, +spi.mode.if_type,384,,1,,Sets spi modes since slave cannot responds immediately - 0:access registers with spi - 1:preloads reg address to 0 for high speed tests - 2:echos SPI bytes - 3:always output user reg 0 (use for timing),1,,4,2,,,,, +spi.mode.reg_16_bit,384,,1,,0:8 bit register access - 1:16 bit register access mode,1,,6,1,,,,, +spi.mode.reg_16_big_endian,384,,1,,0:little endian for 16 bit mode - 1:big endian for 16 bit mode,1,,7,1,,,,, +spi.status,385,,1,spi_status_t,Spi status register,0,,,,,,,, +spi.status.bsy,385,,1,,Busy flag,0,,0,1,,,,, +spi.status.ovr,385,,1,,Overrun flag,0,,1,1,,,,, +spi.status.modf,385,,1,,Mode fault,0,,2,1,,,,, +spi.status.udr,385,,1,,Underrun flag,0,,3,1,,,,, +spi.status.clk,385,,1,,0:sclk line low - 1:sclk line high,0,,4,1,,,,, +spi.status.start_clk,385,,1,,SCLK reading at start of frame - 0:sclk line low - 1:sclk line high,0,,5,1,,,,, +spi.status.end_clk,385,,1,,SCLK reading at end of frame - 0:sclk line low - 1:sclk line high,0,,6,1,,,,, +spi.status.index_err,385,,1,,Register index error,0,,7,1,,,,, +spi.state,386,,2,uint16_t,Current state of the spi bus - 0:initialized - 1:NSS pin just lowered - 2:writing to reg - 3:reading reg - 4:transfering data - 5:NSS up and finished,0,,,,,,,, +spi.reg_index,388,,2,uint16_t,Current index of reg pointer,0,,,,,,,, +spi.start_reg_index,390,,2,uint16_t,Start index of reg pointer,0,,,,,,,, +spi.r_count,392,,1,uint8_t,Last read frame byte count,0,,,,,,,, +spi.w_count,393,,1,uint8_t,Last write frame byte count,0,,,,,,,, +spi.transfer_count,394,,1,uint8_t,The amount of bytes in the last transfer ,0,,,,,,,, +spi.frame_ticks,395,,4,uint32_t,Ticks per frame,0,,,,,,,, +spi.byte_ticks,399,,4,uint32_t,Ticks per byte,0,,,,,,,, +spi.prev_ticks,403,,4,uint32_t,Holder for previous byte ticks,0,,,,,,,, +spi.res,407,9,1,uint8_t,Reserved bytes,0,9,,,,,,, +uart.mode,416,,2,uart_mode_t,UART mode settings,1,,,,,,,, +uart.mode.init,416,,2,,0:periph will initialize on execute - 1:periph initialized,1,,0,1,,,,, +uart.mode.disable,416,,2,,0:periph is enabled - 1:periph is disabled,1,,1,1,,,,, +uart.mode.if_type,416,,2,,0:echos - 1:echos and adds one - 2:reads application registers - 3:constantly transmits,1,,2,2,,,,, +uart.mode.stop_bits,416,,2,,0:1 stop bit - 1:2 stop bits,1,,4,1,,,,, +uart.mode.parity,416,,2,,0:no parity - 1:even parity - 2:odd parity,1,,5,2,,,,, +uart.mode.rts,416,,2,,RTS pin state,1,,7,1,,,,, +uart.mode.data_bits,416,,2,,0:8 data bits - 1:7 data bits,1,,8,1,,,,, +uart.baud,418,,4,uint32_t,Baudrate,1,,,,,,,, +uart.mask_msb,422,,1,uint8_t,Masks the data coming in if 7 bit mode,0,,,,,,,, +uart.rx_count,423,,2,uint16_t,Number of received bytes,0,,,,,,,, +uart.tx_count,425,,2,uint16_t,Number of transmitted bytes,0,,,,,,,, +uart.status,427,,1,uart_status_t,UART status register,0,,,,,,,, +uart.status.cts,427,,1,,CTS pin state,0,,0,1,,,,, +uart.status.pe,427,,1,,Parity error,0,,1,1,,,,, +uart.status.fe,427,,1,,Framing error,0,,2,1,,,,, +uart.status.nf,427,,1,,Noise detected flag,0,,3,1,,,,, +uart.status.ore,427,,1,,Overrun error,0,,4,1,,,,, +uart.res,428,4,1,uint8_t,Reserved bytes,0,4,,,,,,, +rtc.mode,432,,1,basic_mode_t,basic mode for rtc settings,1,,,,,,,, +rtc.mode.init,432,,1,,0:periph will initialize on execute - 1:periph initialized,1,,0,1,,,,, +rtc.mode.disable,432,,1,,0:periph is enabled - 1:periph is disabled,1,,1,1,,,,, +rtc.second,433,,1,uint8_t,Seconds of rtc,0,,,,,VOLATILE,,59,0 +rtc.minute,434,,1,uint8_t,Minutes to set of rtc,0,,,,,VOLATILE,,59,0 +rtc.hour,435,,1,uint8_t,Hours to set of rtc,0,,,,,VOLATILE,,23,0 +rtc.day,436,,2,uint16_t,Days to set of rtc,0,,,,,VOLATILE,,, +rtc.set_second,438,,1,uint8_t,Seconds to set of rtc,1,,,,,,,59,0 +rtc.set_minute,439,,1,uint8_t,Minutes to set of rtc,1,,,,,,,59,0 +rtc.set_hour,440,,1,uint8_t,Hours to set of rtc,1,,,,,,,23,0 +rtc.set_day,441,,2,uint16_t,Days to set of rtc,1,,,,,,,, +rtc.res,443,5,1,uint8_t,Reserved bytes,0,5,,,,,,, +adc.mode,448,,1,adc_mode_t,Mode settings for the ADC,1,,,,,,,, +adc.mode.init,448,,1,,0:periph will initialize on execute - 1:periph initialized,1,,0,1,,,,, +adc.mode.enable,448,,1,,0:periph is disabled - 1:periph is enabled,1,,1,1,,,,, +adc.mode.fast_sample,448,,1,,0:slow sample rate - 1:fastest sample rate,1,,2,1,,,,, +adc.num_of_samples,449,,4,uint32_t,Number of sample in the sum,1,,,,1024,,,1048575,0 +adc.counter,453,,1,uint8_t,Sum counter increases when available,0,,,,,,,, +adc.index,454,,4,uint32_t,Sample index increases when new sample read,0,,,,,,,, +adc.sample,458,,2,uint16_t,Current 12 bit sample value,0,,,,,,,, +adc.sum,460,,4,uint32_t,Sum of the last num_of_samples,0,,,,,,,, +adc.current_sum,464,,4,uint32_t,Current collection of the sums,0,,,,,,,, +adc.res,468,12,1,uint8_t,Reserved bytes,0,12,,,,,,, +pwm.mode,480,,1,basic_mode_t,basic mode for pwm settings,1,,,,,,,, +pwm.mode.init,480,,1,,0:periph will initialize on execute - 1:periph initialized,1,,0,1,,,,, +pwm.mode.disable,480,,1,,0:periph is enabled - 1:periph is disabled,1,,1,1,,,,, +pwm.status,481,,1,uint8_t,Unimplemented status for padding,0,,,,,,,, +pwm.duty_cycle,482,,2,uint16_t,The calculated duty cycle in percent/100,0,,,,,,,, +pwm.period,484,,4,uint32_t,The calculated period in us,0,,,,,,,, +pwm.h_ticks,488,,4,uint32_t,Settable high time in sys clock ticks,1,,,,10000,,,, +pwm.l_ticks,492,,4,uint32_t,Settable low time in sys clock ticks,1,,,,10000,,,, +pwm.res,496,16,1,uint8_t,Reserved bytes,0,16,,,,,,, +dac.mode,512,,1,basic_mode_t,,1,,,,,,,, +dac.mode.init,512,,1,,0:periph will initialize on execute - 1:periph initialized,1,,0,1,,,,, +dac.mode.disable,512,,1,,0:periph is enabled - 1:periph is disabled,1,,1,1,,,,, +dac.status,513,,1,uint8_t,Unimplemented status for padding,0,,,,,,,, +dac.level,514,,2,uint16_t,The percent/100 of output level,1,,,,5000,,,, +dac.res,516,12,1,uint8_t,Reserved bytes,0,12,,,,,,, +gpio[0].mode,528,,2,gpio_mode_t,The selected GPIO mode,1,,,,,,,, +gpio[0].mode.init,528,,2,,0:periph will initialize on execute - 1:periph initialized,1,,0,1,,,,, +gpio[0].mode.io_type,528,,2,,0:high impedance input - 1:push pull output - 2:open drain output - 3:interrupts and saves event,1,,1,2,,,,, +gpio[0].mode.level,528,,2,,If output sets gpio level - 0:low - 1:high,1,,3,1,,,,, +gpio[0].mode.pull,528,,2,,pull of the resistor - 0:none - 1:pullup - 2:pulldown,1,,4,2,,,,, +gpio[0].mode.tick_div,528,,2,,for trace tick divisor - max should be 16 for interface,1,,6,5,,,,, +gpio[0].status,530,,1,gpio_status_t,The status of the GPIO,0,,,,,VOLATILE,,, +gpio[0].status.level,530,,1,,The io level of the pin 0=low 1=high,0,,0,1,,VOLATILE,,, +gpio[0].res,531,1,1,uint8_t,Reserved bytes,0,1,,,,,,, +gpio[1].mode,532,,2,gpio_mode_t,The selected GPIO mode,1,,,,,,,, +gpio[1].mode.init,532,,2,,0:periph will initialize on execute - 1:periph initialized,1,,0,1,,,,, +gpio[1].mode.io_type,532,,2,,0:high impedance input - 1:push pull output - 2:open drain output - 3:interrupts and saves event,1,,1,2,,,,, +gpio[1].mode.level,532,,2,,If output sets gpio level - 0:low - 1:high,1,,3,1,,,,, +gpio[1].mode.pull,532,,2,,pull of the resistor - 0:none - 1:pullup - 2:pulldown,1,,4,2,,,,, +gpio[1].mode.tick_div,532,,2,,for trace tick divisor - max should be 16 for interface,1,,6,5,,,,, +gpio[1].status,534,,1,gpio_status_t,The status of the GPIO,0,,,,,VOLATILE,,, +gpio[1].status.level,534,,1,,The io level of the pin - 0:low - 1:high,0,,0,1,,VOLATILE,,, +gpio[1].res,535,1,1,uint8_t,Reserved bytes,0,1,,,,,,, +gpio[2].mode,536,,2,gpio_mode_t,,1,,,,,,,, +gpio[2].mode.init,536,,2,,0:periph will initialize on execute - 1:periph initialized,1,,0,1,,,,, +gpio[2].mode.io_type,536,,2,,0:high impedance input - 1:push pull output - 2:open drain output - 3:interrupts and saves event,1,,1,2,,,,, +gpio[2].mode.level,536,,2,,If output sets gpio level - 0:low - 1:high,1,,3,1,,,,, +gpio[2].mode.pull,536,,2,,pull of the resistor - 0:none - 1:pullup - 2:pulldown,1,,4,2,,,,, +gpio[2].mode.tick_div,536,,2,,for trace tick divisor - max should be 16 for interface,1,,6,5,,,,, +gpio[2].status,538,,1,gpio_status_t,The status of the GPIO,0,,,,,VOLATILE,,, +gpio[2].status.level,538,,1,,The io level of the pin - 0:low - 1:high,0,,0,1,,VOLATILE,,, +gpio[2].res,539,1,1,uint8_t,Reserved bytes,0,1,,,,,,, +trace.index,540,,4,uint32_t,Index of the current trace,0,,,,,,,, +trace.tick_div,544,32,1,uint8_t,The tick divisor of the event - max should be 16 for interface,0,32,,,,,,, +trace.source,576,32,1,uint8_t,The event source of the event - 0:no source selected - 1:DEBUG0 pin - 2:DEBUG1 pin - 3:DEBUG2 pin,0,32,,,,,,, +trace.value,608,64,2,uint16_t,The value of the event - 0:falling edge interrupt - 1:rising edge interrupt,0,32,,,,,,, +trace.tick,672,128,4,uint32_t,The tick when the event occured,0,32,,,,,,, +res,800,224,1,uint8_t,Reserved bytes,0,224,,,,,,, \ No newline at end of file diff --git a/IF/philip_pal/setup.py b/IF/philip_pal/setup.py index 3e2f6a8..3183493 100644 --- a/IF/philip_pal/setup.py +++ b/IF/philip_pal/setup.py @@ -15,7 +15,7 @@ setup( name="philip_pal", - version="0.0.1", + version="0.0.2", author="Kevin Weiss", author_email="weiss.kevin604@gmail.com", license="MIT", diff --git a/QUALIFICATION/FW/PHiLIP-BLUEPILL-CURRENT.bin b/QUALIFICATION/FW/PHiLIP-BLUEPILL-CURRENT.bin new file mode 100755 index 0000000..2f73a49 Binary files /dev/null and b/QUALIFICATION/FW/PHiLIP-BLUEPILL-CURRENT.bin differ diff --git a/QUALIFICATION/FW/PHiLIP-BLUEPILL-REV10010.bin b/QUALIFICATION/FW/PHiLIP-BLUEPILL-REV10010.bin new file mode 100755 index 0000000..2f73a49 Binary files /dev/null and b/QUALIFICATION/FW/PHiLIP-BLUEPILL-REV10010.bin differ diff --git a/QUALIFICATION/FW/PHiLIP-NUCLEO-F103RB-CURRENT.bin b/QUALIFICATION/FW/PHiLIP-NUCLEO-F103RB-CURRENT.bin new file mode 100755 index 0000000..fb6b708 Binary files /dev/null and b/QUALIFICATION/FW/PHiLIP-NUCLEO-F103RB-CURRENT.bin differ diff --git a/QUALIFICATION/FW/PHiLIP-NUCLEO-F103RB-REV10010.bin b/QUALIFICATION/FW/PHiLIP-NUCLEO-F103RB-REV10010.bin new file mode 100755 index 0000000..fb6b708 Binary files /dev/null and b/QUALIFICATION/FW/PHiLIP-NUCLEO-F103RB-REV10010.bin differ diff --git a/QUALIFICATION/FW/PHiLIP-NUCLEO-F103RB-REV10010.elf b/QUALIFICATION/FW/PHiLIP-NUCLEO-F103RB-REV10010.elf new file mode 100755 index 0000000..2ecefba Binary files /dev/null and b/QUALIFICATION/FW/PHiLIP-NUCLEO-F103RB-REV10010.elf differ diff --git a/QUALIFICATION/FW/PHiLIP_BLUEPILL-REV10010.elf b/QUALIFICATION/FW/PHiLIP_BLUEPILL-REV10010.elf new file mode 100755 index 0000000..94a8b60 Binary files /dev/null and b/QUALIFICATION/FW/PHiLIP_BLUEPILL-REV10010.elf differ diff --git a/README.md b/README.md index b72c3a7..d722529 100644 --- a/README.md +++ b/README.md @@ -1,39 +1,414 @@ -# Testing -This is intended to provide tools for embedded testing. +PHiLIP (Primitive Hardware In the Loop Integration Product) +=========================================================== +[![Build Status](https://travis-ci.org/riot-appstore/PHiLIP.svg?branch=master)](https://travis-ci.org/riot-appstore/PHiLIP) -# Setting up the PHiLIP (Primitive Hardware In the Loop Integration Product) +## Contents + +- [ Description ](#desc) + +- [ Setup of PHiLIP Environment ](#setup) + +- [ Getting Started as a Developer ](#gs_dev) + +- [ Getting Started with CI Scripts ](#gs_ci) + +- [ PHiLIP Architecture ](#arch) + +- [Qualification of PHiLIP](#qual) + +- [PHiLIP Memory Map](#map) + +- [PHiLIP Serial Protocol](#proto) + +- [PHiLIP Python Interface](#inter) + +- [PHiLIP-b Pinout](#pinb) + +- [PHiLIP-n Pinout](#pinn) +- [PHiLIP Firmware Documentation](https://mrkevinweiss.github.io/philip/doxygen/index.html) -## Tools -- SWD flasher -- Soldering iron and solder + +## [Description](#c_desc) -## Materials -- [bluepill](https://hackaday.com/2017/03/30/the-2-32-bit-arduino-with-debugging/) or [nucelo-f103rb](https://www.digikey.com/products/en?keywords=nucleo-f103rb) +PHiLIP is qualified open-source firmware for nucleo-f103rb or bluepill boards used for testing peripherals of other embedded devices. +PHiLIP is a low-cost solution to allow detailed, corner case peripheral testing for both developers and CI systems. +PHiLIP is aimed at getting salient information that would be gathered from an oscilloscope or logic analyzer as well as injecting specific peripheral behaviors. +PHiLIP is designed for testing peripheral APIs for embedded operating systems and hardware abstraction layers but was built with an architecture that allows for _easy_ extensions to other applications such as product qualification or simulation. +PHiLIP can be used with a raw serial connection but also comes with a python interface that simplifies writing test scripts as well as a shell for developers to run manual tests. -## Flashing bluepill -1. Solder pins on the bluepill and secure the USB connector of not already done. -2. Download [firmware](QUALIFICATION/FW/) from the QUALIFICATION/FW folder. -3. Flash using an [SWD or JTAG interface](https://satoshinm.github.io/blog/171212_stm32_blue_pill_arm_development_board_first_look_bare_metal_programming.html). (I usually like using the Nucleo debugger/flasher since it is cheap, has USB to Serial and support drag and drop binary). -4. If custom implementation is desired open source firmware is available in the [PHiLIP](FW/) folder. + +## [Setup of PHiLIP Environment](#c_setup) +The setup will explain how to flash PHiLIP and install the python interface. +To setup the PHiLIP environment some hardware will be required, either a nucleo-f103rb or a bluepill with a usb to uart converter. -## Flashing nucleo-f103rb -1. Download PHiLIP-nucleo103rb* [firmware](QUALIFIED_FW) from the QUALIFIED_FW folder. -2. Drag and drop the .bin file to flash +#### 1. Connect PHiLIP pins +For the nucleo-f103rb only the usb connection is required. +The bluepill will require a uart connection to `A9 - IF_TX` to the uart RX pin and the `A10 - IF_RX` to the uart TX pin. +See the [PHiLIP-b pinout](RESOURCES/PHiLIP-BLUEPILL-PINOUT.png) for more information. +The uart is needed for the basic interface but can also be used for ROM UART flashing. +To flash the bluepill with SWD, connect the swd pins and reset `R - NRST` pin. + +#### 2. Flash PHiLIP to the device +The qualified firmware for PHiLIP is stored in the [PHiLIP repo](QUALIFICATION/FW). +The correct firmware is needed for the given board, either the [PHiLIP_BLUEPILL](QUALIFICATION/FW/PHiLIP-BLUEPILL-CURRENT.bin) or the [PHiLIP_NUCLEO-F103RB](QUALIFICATION/FW/PHiLIP-NUCLEO-F103RB-CURRENT.bin). +Previous versions can also be browsed or installed but the _CURRENT_ version is recommended. +To flash the firmware on the nucleo-f103rb, drag and drop the .bin file to the nucleo device. +There are many ways to flash the bluepill, either by connecting a swd connector or with the [ROM UART bootloader](https://medium.com/@paramaggarwal/programming-an-stm32f103-board-using-usb-port-blue-pill-953cec0dbc86). + + +_HINT: If flashing a nucleo-f103rb use the following command_ + +`wget -P /media/${USER}/NODE_F103RB/ https://github.com/riot-appstore/PHiLIP/raw/master/QUALIFICATION/FW/PHiLIP-NUCLEO-F103RB-CURRENT.bin +` + +#### 3. Install the Python Interface (philip_pal) +The philip_pal is only python3 so use the following command to install: + +`sudo pip3 install philip_pal` + + +## [Getting Started as a Developer](#c_gs_dev) +_First follow the [setup](#setup)_ + +To use PHiLIP as a developer, an interface shell `philip_shell` is provided with the [philip_pal package](IF/philip_pal). +The philip_shell has a connect wizard, command history, and auto-completion. +If in doubt, try pressing tab a few times. + +The following is an example of PHiLIP running and evaluating a toggling pin. +This should provide a way to get started using PHiLIP. +Run the philip shell with `philip_shell` _(use the -h to view additional args)_ + +1. Check available commands. +``` +PHiLIP: help +Documented commands (type help ): +======================================== +data_filter exit info_record_type read_reg show_pinout +dut_reset get_version philip_reset read_struct write_and_execute +execute_changes help print_map read_trace write_reg +``` + +2. Check the description of the memory map. +This should help explain what each register is responsible for. +``` +info_record_type description +``` + +3. Check the pinout of the philip. +``` +show_pinout +``` + +4. Connect the `DUT_RST` to the `DEBUG0` pin. +5. Check what the `gpio[0].mode.io_type` register does. +``` +print_map gpio[0].mode.io_type +``` +6. Enable the `DEBUG0` or gpio0 pin to interrupt mode so traces can be collected. +``` +write_and_execute gpio[0].mode.io_type 3 +``` +7. Use the `DUT_RST` pin to toggle events on the `DEBUG0` pin. +``` +dut_reset +``` + +8. Verify the events are logged in a human-readable way. +``` +read_trace +``` + +9. Read the basic tick registers of the trace. +``` +read_reg trace.tick +``` + +10. Only read the first two elements of the array. +``` +read_reg trace.tick 0 2 +``` + +11. Now read the whole trace structure. +``` +read_struct trace +``` + +12. Toggle the data filter off to see very verbose details of the tick traces +``` +data_filter +read_struct trace +``` + +13. Now reset philip back to the default state. +``` +data_filter on +philip_reset +``` + + +## [Getting Started with CI Scripts](#c_gs_ci) +_First follow the [setup](#setup)_ + +To use the python interface in a CI, a Phil class is provided. +Create a python script for the CI to run and import Phil to use. +Refer to the [philip_if.py](/IF/philip_pal/philip_pal/philip_if.py) for more information. + +Example of python test script tests the trace function, connect the `DUT_RST` to the `DEBUG0` pin. + +```python +from philip_pal import Phil + +phil = Phil() +print("interface version: {}".format(phil.if_version)) + +# Reset philip to a clean state +assert phil.reset_mcu()['result'] == phil.RESULT_SUCCESS + +# Setup DEBUG0 pin to log trace events with interrupt +for result in phil.write_and_execute('gpio[0].mode.io_type', 3): + # Check each result for success + assert result['result'] == phil.RESULT_SUCCESS + +# Toggle the DUT_RST pin for the default period +phil.dut_reset() + +# Toggle the DUT_RST pin for 1 second +phil.dut_reset(1.0) + +trace = phil.read_trace() + +# Assert the second toggle was in fact about 1 second +elapse_time = trace[3]['time'] - trace[2]['time'] +assert elapse_time > 0.9 and elapse_time < 1.1 + +print("Trace Results") +print(trace) +``` + +## [PHiLIP Architecture](#c_arch) +#### PHiLIP Infrastructure +PHiLIP uses a combination of tools in order to work. +The [memory_map_manager](https://github.com/riot-appstore/memory_map_manager) or MMM help maintain and coordinate the memory map used for the firmware, documentation, and interface. +The [philip_pal](IF/philip_pal) wraps around the basic serial protocol so functionality can be implemented and handled with a higher level language and in a non-constrained environment. +The initial version used [STM32Cube](https://www.st.com/en/development-tools/stm32cubemx.html), however, the generator is being deprecated in this project due to lack of portability. + + + + drawing + + +#### PHiLIP Firmware Design +PHiLIP firmware is designed to easily add peripheral functionality. +It separates out the peripherals from the communication and application logic and the memory map. + + + drawing + + + +## [Qualification of PHiLIP](#c_qual) +The qualification must be done to make PHiLIP a valid reference. +When changes are made PHiLIP should undergo the [qualification procedure](QUALIFICATION/TESTS). This ensures things like i2c will reply with the proper response or fail when it should fail. +The qualification is also a way to track the comparabilities of PHiLIP. +The qualification usually involves both automated tests and verification with qualified instruments such as oscilloscopes. + +The released firmware is available in the [QUALIFIED FIRMWARE](QUALIFICATION/FW) section. + + +## [PHiLIP Memory Map](#c_map) +The memory map is a way to access a large amount of information in a compact way. +With the [memory_map_manager](https://github.com/riot-appstore/memory_map_manager), firmware, documentation, and interfaces are all coordinated with a single config file. +This makes changes easy to manage, for example, if a field for reporting if an i2c fails to ACK on data is needed, that field can be added to the config file. +After updating the map it can be accessed from the interface to the firmware. +The current versioned memory maps is available [here](IF/philip_pal/philip_pal/mem_map). + +_Example of memory map_ + +| name | description | +|---------------------------------|---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| user_reg | Writable registers for user testing - Starts at 0 and increases by 1 each register by default | +| sys.sn | Unique ID of the device | +| sys.fw_rev | Firmware revision | +| sys.if_rev | Interface revision - This corelates to the version of the memory map | +| sys.tick | Tick in ms - Updates with the sys tick register every few ms | +| sys.build_time.second | The build time seconds | +| sys.build_time.minute | The build time minutes | +| sys.build_time.hour | The build time hours | +| sys.build_time.day_of_month | The build time day of month | +| sys.build_time.day_of_week | Not used | +| sys.build_time.month | The build time month | +| sys.build_time.year | The build time year (20XX) | +| sys.build_time.res | Reserved bytes | +| sys.device_num | The philip device designator - A constant number to identify philip firmware | +| sys.sys_clk | The frequency of the system clock in Hz | +| sys.status.update | 1:register configuration requires exceution for changes - 0:nothing to update | +| sys.status.board | 1:board is a bluepill - 0:board is a nucleo-f103rb | +| sys.mode.init | 0:periph will initialize on execute - 1:periph initialized | +| sys.mode.dut_rst | 1:put DUT in reset mode - 0:run DUT | +| i2c.mode.init | 0:periph will initialize on execute - 1:periph initialized | +| i2c.mode.disable | 0:periph is enabled - 1:periph is disabled | +| i2c.mode.addr_10_bit | 0:i2c address is 7 bit mode - 1:10 i2c address is 10 bit mode | +| i2c.mode.general_call | 0:disable general call - 1:enable general call | +| i2c.mode.no_clk_stretch | 0:slave can clock stretch - 1:disables clock stretch | +| i2c.mode.reg_16_bit | 0:8 bit register access - 1:16 bit register access mode | +| i2c.mode.reg_16_big_endian | 0:little endian if 16 bit register access - 1:big endian if 16 bit register access | +| i2c.mode.nack_data | 0:all data will ACK - 1:all data will NACK | +| i2c.status.ovr | Overrun/Underrun: Request for new byte when not ready | +| i2c.status.af | Acknowledge failure | +| i2c.status.berr | Bus error: Non-valid position during a byte transfer | +| i2c.status.gencall | General call address received | +| i2c.status.busy | i2c bus is BUSY | +| i2c.status.rsr | Repeated start detected | +| i2c.clk_stretch_delay | Clock stretch the first byte in us | +| i2c.slave_addr_1 | Primary slave address | +| i2c.slave_addr_2 | Secondary slave address | +| i2c.state | Current state of i2c frame - 0:initialized - 1:reading data - 2-write address recieved - 3-1st reg byte recieved - 4-writing data - 5-NACK - 6-stopped | +| i2c.reg_index | current index of i2c pointer | +| i2c.start_reg_index | start index of i2c pointer | +| i2c.r_count | Last read frame byte count - only in reg if_type 0 | +| i2c.w_count | Last write frame byte count - only in reg if_type 0 | +| i2c.r_ticks | Ticks for read byte | +| i2c.w_ticks | Ticks for write byte | +| i2c.s_ticks | Ticks for start and address | +| i2c.f_r_ticks | Ticks for full read frame after the address is acked | +| i2c.f_w_ticks | Ticks for full write frame | +| spi.mode.init | 0:periph will initialize on execute - 1:periph initialized | +| spi.mode.disable | 0:periph is enabled - 1:periph is disabled | +| spi.mode.cpha | 0:CK to 0 when idle - 1:CK to 1 when idle | +| spi.mode.cpol | 0:the first clock transition is the first data capture edge - 1:the second clock transition is the first data capture edge | +| spi.mode.if_type | Sets spi modes since slave cannot responds immediately - 0:access registers with spi - 1:preloads reg address to 0 for high speed tests - 2:echos SPI bytes - 3:always output user reg 0 (use for timing) | +| spi.mode.reg_16_bit | 0:8 bit register access - 1:16 bit register access mode | +| spi.mode.reg_16_big_endian | 0:little endian for 16 bit mode - 1:big endian for 16 bit mode | +| spi.status.bsy | Busy flag | +| spi.status.ovr | Overrun flag | +| spi.status.modf | Mode fault | +| spi.status.udr | Underrun flag | +| spi.status.clk | 0:sclk line low - 1:sclk line high | +| spi.status.start_clk | SCLK reading at start of frame - 0:sclk line low - 1:sclk line high | +| spi.status.end_clk | SCLK reading at end of frame - 0:sclk line low - 1:sclk line high | +| spi.status.index_err | Register index error | +| spi.state | Current state of the spi bus - 0:initialized - 1:NSS pin just lowered - 2:writing to reg - 3:reading reg - 4:transfering data - 5:NSS up and finished | +| spi.reg_index | Current index of reg pointer | +| spi.start_reg_index | Start index of reg pointer | +| spi.r_count | Last read frame byte count | +| spi.w_count | Last write frame byte count | +| spi.transfer_count | The amount of bytes in the last transfer | +| spi.frame_ticks | Ticks per frame | +| spi.byte_ticks | Ticks per byte | +| spi.prev_ticks | Holder for previous byte ticks | +| uart.mode.init | 0:periph will initialize on execute - 1:periph initialized | +| uart.mode.disable | 0:periph is enabled - 1:periph is disabled | +| uart.mode.if_type | 0:echos - 1:echos and adds one - 2:reads application registers - 3:constantly transmits | +| uart.mode.stop_bits | 0:1 stop bit - 1:2 stop bits | +| uart.mode.parity | 0:no parity - 1:even parity - 2:odd parity | +| uart.mode.rts | RTS pin state | +| uart.mode.data_bits | 0:8 data bits - 1:7 data bits | +| uart.baud | Baudrate | +| uart.mask_msb | Masks the data coming in if 7 bit mode | +| uart.rx_count | Number of received bytes | +| uart.tx_count | Number of transmitted bytes | +| uart.status.cts | CTS pin state | +| uart.status.pe | Parity error | +| uart.status.fe | Framing error | +| uart.status.nf | Noise detected flag | +| uart.status.ore | Overrun error | +| rtc.mode.init | 0:periph will initialize on execute - 1:periph initialized | +| rtc.mode.disable | 0:periph is enabled - 1:periph is disabled | +| rtc.second | Seconds of rtc | +| rtc.minute | Minutes to set of rtc | +| rtc.hour | Hours to set of rtc | +| rtc.day | Days to set of rtc | +| rtc.set_second | Seconds to set of rtc | +| rtc.set_minute | Minutes to set of rtc | +| rtc.set_hour | Hours to set of rtc | +| rtc.set_day | Days to set of rtc | +| adc.mode.init | 0:periph will initialize on execute - 1:periph initialized | +| adc.mode.enable | 0:periph is disabled - 1:periph is enabled | +| adc.mode.fast_sample | 0:slow sample rate - 1:fastest sample rate | +| adc.num_of_samples | Number of sample in the sum | +| adc.counter | Sum counter increases when available | +| adc.index | Sample index increases when new sample read | +| adc.sample | Current 12 bit sample value | +| adc.sum | Sum of the last num_of_samples | +| adc.current_sum | Current collection of the sums | +| pwm.mode.init | 0:periph will initialize on execute - 1:periph initialized | +| pwm.mode.disable | 0:periph is enabled - 1:periph is disabled | +| pwm.duty_cycle | The calculated duty cycle in percent/100 | +| pwm.period | The calculated period in us | +| pwm.h_ticks | Settable high time in sys clock ticks | +| pwm.l_ticks | Settable low time in sys clock ticks | +| dac.mode.init | 0:periph will initialize on execute - 1:periph initialized | +| dac.mode.disable | 0:periph is enabled - 1:periph is disabled | +| dac.status | Unimplemented status for padding | +| dac.level | The percent/100 of output level | +| gpio[0].mode.init | 0:periph will initialize on execute - 1:periph initialized | +| gpio[0].mode.io_type | 0:high impedance input - 1:push pull output - 2:open drain output - 3:interrupts and saves event | +| gpio[0].mode.level | If output sets gpio level - 0:low - 1:high | +| gpio[0].mode.pull | pull of the resistor - 0:none - 1:pullup - 2:pulldown | +| gpio[0].mode.tick_div | for trace tick divisor - max should be 16 for interface | +| gpio[0].status.level | The io level of the pin 0=low 1=high | +| gpio[1].mode.init | 0:periph will initialize on execute - 1:periph initialized | +| gpio[1].mode.io_type | 0:high impedance input - 1:push pull output - 2:open drain output - 3:interrupts and saves event | +| gpio[1].mode.level | If output sets gpio level - 0:low - 1:high | +| gpio[1].mode.pull | pull of the resistor - 0:none - 1:pullup - 2:pulldown | +| gpio[1].mode.tick_div | for trace tick divisor - max should be 16 for interface | +| gpio[1].status.level | The io level of the pin - 0:low - 1:high | +| gpio[2].mode.init | 0:periph will initialize on execute - 1:periph initialized | +| gpio[2].mode.io_type | 0:high impedance input - 1:push pull output - 2:open drain output - 3:interrupts and saves event | +| gpio[2].mode.level | If output sets gpio level - 0:low - 1:high | +| gpio[2].mode.pull | pull of the resistor - 0:none - 1:pullup - 2:pulldown | +| gpio[2].mode.tick_div | for trace tick divisor - max should be 16 for interface | +| gpio[2].status | The status of the GPIO | +| gpio[2].status.level | The io level of the pin - 0:low - 1:high | +| trace.index | Index of the current trace | +| trace.tick_div | The tick divisor of the event - max should be 16 for interface | +| trace.source | The event source of the event - 0:no source selected - 1:DEBUG0 pin - 2:DEBUG1 pin - 3:DEBUG2 pin | +| trace.value | The value of the event - 0:falling edge interrupt - 1:rising edge interrupt | +| trace.tick | The tick when the event occured | + + + +## [PHiLIP Serial Protocol](#c_proto) +The communication medium for PHiLIP is a serial connection.It provides basic instructions that allows for extensibility from other interfaces or basic communication. +Replies are given in standard json format with a `"result"` that corresponds to a `errno` code and `"data"` if data is present. +For example reading bytes from a register would respond with `{"data":[0,1,2,3,4,5,6,7,8,9], "result":0}` + +Name | Command | Description | Example | Example Description +---------------|--------------------------------|------------------------------------------------------|---------------------|------------------------------------------------------------------------------ +READ_REG_CMD | `rr ` | Read application registers | `rr 0 10` | Reads 10 bytes starting at register 0 +WRITE_REG_CMD | `wr [data0 ... datan]` | Write application registers | `wr 10 99 88 77` | Writes 99, 88 and 77 starting at register 10 +EXECUTE_CMD | `ex` | Execute and commit changes in the registers | | +RESET_CMD | `mcu_rst` | Provide a software reset to PHiLIP | | +VERSION_CMD | `-v` | Prints the version of the interface | | +HELP_CMD | `help` | Prints a help menu | | +MEMORY_MAP_CMD | `mm ` | Gives properties of the memory map for a given index | `mm 0` | Gives the properties of the first entry of the memory map +MM_SIZE_CMD | `mm_size` | Gives the amount of records in the memory map | | +READ_KEY_CMD | `r [array_index]` | Reads values given a record name | `r user_reg 2` | Reads the 3rd value of the user_reg +WRITE_KEY_CMD | `w ` | Writes a value to a record name | `w i2c.mode.init 0` | Writes 0 to the i2c mode bit causing it to reinitialize the next `ex` command + + + + +## [PHiLIP Python Interface](#c_inter) +PHiLIP has a python interface called [philip_pal](IF/philip_pal) which is available with `pip3 install philip_pal`. +It provides a philip_shell which developers can use for manual tests and interacting with PHiLIP. +For automated scripts, a Phil() class is provided. + +For the API check the docstring of [philip_shell.py](IF/philip_pal/philip_pal/philip_shell.py) or [philip_if.py](IF/philip_pal/philip_pal/philip_if.py) + + +## [PHiLIP-b Pinout](#c_pinb) +Pinout for the PHiLIP on the [bluepill](https://hackaday.com/2017/03/30/the-2-32-bit-arduino-with-debugging/) -# bluepill Pinout - drawing + drawing -# nucleo-f103rb Pinout + +## [PHiLIP-n Pinout](#c_pinn) +Pinout for the PHiLIP on the [nucleo-f103rb](https://www.digikey.com/products/en?keywords=nucleo-f103rb) + - drawing + drawing - -# PHiLIP Misc Info -- I2C slave address is 85 or 0x55 -- Total registers are 256 -- Upper registers can be read or written (152+) -- sys register is locked -- For changing configuration the registers can be set then the ex command must be used to execute changes diff --git a/RESOURCES/PHiLIP.png b/RESOURCES/PHiLIP.png new file mode 100644 index 0000000..140061b Binary files /dev/null and b/RESOURCES/PHiLIP.png differ diff --git a/RESOURCES/PHiLIP_firmware_arch.png b/RESOURCES/PHiLIP_firmware_arch.png new file mode 100644 index 0000000..7878e9f Binary files /dev/null and b/RESOURCES/PHiLIP_firmware_arch.png differ diff --git a/RESOURCES/PHiLIP_infrastructure.png b/RESOURCES/PHiLIP_infrastructure.png new file mode 100644 index 0000000..dc944e4 Binary files /dev/null and b/RESOURCES/PHiLIP_infrastructure.png differ