From ef9d0706860d20d659fde9a945a50fb3aea8ca1a Mon Sep 17 00:00:00 2001 From: Andy Kiss Date: Wed, 4 Dec 2019 15:06:14 -0500 Subject: [PATCH] Reassigned XFM stages to PVs used on SRX control system Setup zebra to send pulses for xs4 on TTL4 --- startup/07-tempstages.py | 3 ++- startup/91-flyscans.py | 4 ++-- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/startup/07-tempstages.py b/startup/07-tempstages.py index 89f05e07..64442804 100644 --- a/startup/07-tempstages.py +++ b/startup/07-tempstages.py @@ -10,4 +10,5 @@ class XFMstage(Device): z = Cpt(EpicsMotor, 'Z}Mtr') -stage = XFMstage('XF:05IDD-ES:1{Stg:XFM1-Ax:', name='stage') +# stage = XFMstage('XF:05IDD-ES:1{Stg:XFM1-Ax:', name='stage') +stage = XFMstage('XF:05IDD-ES:1{Mscp:1-Ax:', name='stage') diff --git a/startup/91-flyscans.py b/startup/91-flyscans.py index f0c7e645..57f6a78e 100644 --- a/startup/91-flyscans.py +++ b/startup/91-flyscans.py @@ -132,9 +132,9 @@ def __init__(self, encoder, dets, sclr1, fast_axis, *, reg=db.reg, **kwargs): # this is for the merlin self.stage_sigs[self._encoder.output2.ttl.addr] = 53 # this is for the dexela - self.stage_sigs[self._encoder.output4.ttl.addr] = 55 + # self.stage_sigs[self._encoder.output4.ttl.addr] = 55 # this is for the xs2 - # self.stage_sigs[self._encoder.output4.ttl.addr] = 31 + self.stage_sigs[self._encoder.output4.ttl.addr] = 31 self.stage_sigs[self._encoder.pc.enc_pos1_sync] = 1 self.stage_sigs[self._encoder.pc.enc_pos2_sync] = 1