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| 1 | +// SPDX-FileCopyrightText: Copyright (c) 2025, NVIDIA CORPORATION & AFFILIATES. All rights reserved. |
| 2 | +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
| 3 | + |
| 4 | +#pragma once |
| 5 | + |
| 6 | +#include <cub/config.cuh> |
| 7 | + |
| 8 | +#include <cuda_runtime_api.h> |
| 9 | +#include <device_side_benchmark.cuh> |
| 10 | +#include <nvbench_helper.cuh> |
| 11 | + |
| 12 | +struct benchmark_op_t |
| 13 | +{ |
| 14 | + template <typename T> |
| 15 | + __device__ __forceinline__ T operator()(T thread_data) const |
| 16 | + { |
| 17 | + using WarpReduce = cub::WarpReduce<T>; |
| 18 | + using TempStorage = typename WarpReduce::TempStorage; |
| 19 | + __shared__ TempStorage temp_storage[32]; |
| 20 | + auto warp_id = threadIdx.x / 32; |
| 21 | + return WarpReduce{temp_storage[warp_id]}.Reduce(thread_data, op_t{}); |
| 22 | + } |
| 23 | +}; |
| 24 | + |
| 25 | +template <typename T> |
| 26 | +void warp_reduce(nvbench::state& state, nvbench::type_list<T>) |
| 27 | +{ |
| 28 | + constexpr int block_size = 256; |
| 29 | + constexpr int unroll_factor = 128; // compromise between compile time and noise |
| 30 | + const auto& kernel = benchmark_kernel<block_size, unroll_factor, benchmark_op_t, T>; |
| 31 | + const int num_SMs = state.get_device().value().get_number_of_sms(); |
| 32 | + const int device = state.get_device().value().get_id(); |
| 33 | + int max_blocks_per_SM = 0; |
| 34 | + NVBENCH_CUDA_CALL_NOEXCEPT(cudaOccupancyMaxActiveBlocksPerMultiprocessor(&max_blocks_per_SM, kernel, block_size, 0)); |
| 35 | + const int grid_size = max_blocks_per_SM * num_SMs; |
| 36 | + state.exec(nvbench::exec_tag::gpu | nvbench::exec_tag::no_batch, [&](nvbench::launch&) { |
| 37 | + kernel<<<grid_size, block_size>>>(benchmark_op_t{}); |
| 38 | + }); |
| 39 | +} |
| 40 | + |
| 41 | +NVBENCH_BENCH_TYPES(warp_reduce, NVBENCH_TYPE_AXES(value_types)).set_name("warp_reduce").set_type_axes_names({"T{ct}"}); |
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