You signed in with another tab or window. Reload to refresh your session.You signed out in another tab or window. Reload to refresh your session.You switched accounts on another tab or window. Reload to refresh your session.Dismiss alert
Copy file name to clipboardExpand all lines: src/design_notebooks/2025fall/hd2609.md
+10Lines changed: 10 additions & 0 deletions
Display the source diff
Display the rich diff
Original file line number
Diff line number
Diff line change
@@ -36,3 +36,13 @@ Summary: I do not have much progess this week due to busy assignments and projec
36
36
* Finished lab 3 and almost half of lab 4 this week. There are 0.5 more labs to be done.
37
37
38
38
Summary: This week is less stressful than last week. I met with team and confirmed that we need to finish all labs this week. I will finish all 4 labs this week and then find meeting time with team for next step.
39
+
40
+
## Week of October 5th
41
+
42
+
### Project Work
43
+
44
+
* Did more Verilog practice questions on the HDLBits. I finished until "Replication" problem.
45
+
* Finished lab 4.
46
+
47
+
Summary: Now all labs are finished. For next week, I will find meeting time with team for next step.
0 commit comments