-
Notifications
You must be signed in to change notification settings - Fork 0
/
Copy pathnewpic_8b_simple.asm
1411 lines (1239 loc) · 44 KB
/
newpic_8b_simple.asm
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
title "Voltage-Controlled VCADSR"
;============================================================================
; ELECTRIC DRUID VOLTAGE CONTROLLED ADSR VERSION 8
;============================================================================
; Legal stuff
; Copyright 2018 Tom Wiltshire for Electric Druid. Some rights reserved.
; This code is shared under a Creative Commons
; Attribution-NonCommercial-ShareAlike 4.0 International Licence
; For full details see www.electricdruid.net/legalstuff
; or get in touch at www.electricdruid.net/contact.
;============================================================================
; This program provides a versatile envelope generator on a single chip.
; It is designed as a modern version of the CEM3312 or SSM2056 ICs.
; Analogue output is provided by the 10 bit DAC, via the op-amp buffer.
; Envelope level control is using the DAC's Ref+ input, so no resolution is
; lost at low output amplitude.
;
; Hardware Notes:
; PIC16F1764 running at 32 MHz using the internal clock
; 1 +5V
; 2 RA5 : Punch On/Off 0=APDSR, 1=ADSR (fixed 5msec hold stage)
; 3 RA4 : 0-5V Mode CV
; 4 RA3/~MCLR/Vpp : Envelope Type (0=Lin/1=Exp)
; 5 RC5 : Gate Input
; 6 RC4 : Trigger Input
; 7 RC3 : 0-5V Time CV
; 8 RC2/OPA1 OUT : Envelope Output
; 9 RC1/AN5 : 0-5V Release CV
; 10 RC0/AN4 : 0-5V Sustain CV
; 11 RA2/AN2 : 0-5V Decay CV
; 12 RA1/DAC1REF+ : 0-5V Level CV
; 13 RA0/AN0 : 0-5V Attack CV
; 14 Gnd
;
; This version started as ENVGEN7B.ASM, the ultimate version of my 16F684
; envelope code, developed between 29th Aug 2006 and 14th May 2008
;
; 28th Jan 2018: ENVGEN8.ASM
; Combined the features of LOOPENV1B and ENVGEN7B into one chip.
; Reconfigured things to take advantage of the 10-bit DAC and it's Vref+ input
; for level control without loss of resolution.
;
; 4 Feb 2018 - finishing off
; Adding fixed-length Punch stage and selector input. Testing Time CV.
; Tidying up code.
;
; Begin changes by O.Z. Hall
; 26 Apr 2018 - morph this code to work with the Z209 hardware
LIST R=DEC
INCLUDE <p16f1764.inc>
Errorlevel -302
; 16F1764/5 Configuration
__CONFIG _CONFIG1, _FOSC_INTOSC & _WDTE_OFF & _PWRTE_ON & _MCLRE_OFF & _CP_OFF & _BOREN_OFF & _CLKOUTEN_OFF & _IESO_OFF & _FCMEN_OFF
__CONFIG _CONFIG2, _WRT_OFF & _PLLEN_ON & _STVREN_ON & _BORV_LO & _LPBOR_OFF & _LVP_OFF
; Assembler has a problem with these: PPS1WAY_OFF & ZCD_OFF
; Weird, since they're in the include file
;------------------------------
; Variables
;------------------------------
CBLOCK 0x020
; The working storage for the interpolation subroutine
INPUT_X_HI ; Two inputs, X and Y
INPUT_X_LO
INPUT_Y_HI
INPUT_Y_LO
CURVE_OUT_HI ; The final, interpolated, curve output
CURVE_OUT_LO
; Working storage for the 10x10-bit multiply subroutine
MULT_IN_HI
MULT_IN_LO ; CURVE_OUT is the other input
MULT_OUT_HI
MULT_OUT_LO
; The current stage
STAGE ; 0=Wait, 1=Attack, 2=Punch, 3=Decay, 4=Sustain, 5=Release, 0=Wait
; The current control voltage(CV) values (8 bit)
ATTACK_CV ; These first four aren't actually used any more
DECAY_CV ; Instead we find a PHASE INC value and use that
SUSTAIN_CV
RELEASE_CV
TIME_CV ; TIME is used directly
MODE_CV ; Used to set the LFO_MODE and LOOPING flags
; The debounce counters for GATE and TRIGGER
DEBOUNCE_HI
DEBOUNCE_LO
STATES ; The output state from the debounce
CHANGES ; The bits that have altered
; The 24 bit phase accumulator
PHASE_HI
PHASE_MID
PHASE_LO
; The 20 bit frequency increments
; These are stored separately for Attack, Decay, & Release
; Note that these increments have been adjusted to reflect
; changes due to TIME_CV, whereas the raw CVs haven't
ATTACK_INC_LO
ATTACK_INC_MID
ATTACK_INC_HI
PUNCH_INC_LO ; Punch stage is not variable
PUNCH_INC_MID
PUNCH_INC_HI
DECAY_INC_LO
DECAY_INC_MID
DECAY_INC_HI
RELEASE_INC_LO
RELEASE_INC_MID
RELEASE_INC_HI
ENDC
; 0x70-0x7F Common RAM - Special variables available in all banks
CBLOCK 0x070
TEMP ; Useful working storage
FLAGS ; See Defines below
; The current A/D channel and value
ADC_CHANNEL
ADC_VALUE
; The current output level when an Attack or Release starts
START_HI
START_LO
; The 10 bit output level
OUTPUT_HI
OUTPUT_LO
ENDC
;-------------------------------------
; DEFINE STATEMENTS
;-------------------------------------
; Useful bit definitions for clarity
#define ZERO STATUS,Z ; Zero Flag
#define CARRY STATUS,C ; Carry Flag
#define BORROW STATUS,C ; Borrow is the same as Carry
; Options selection definitions
#define USE_ADSR PORTA, 5 ; Add Punch stage? (0=APSDR, 1=Standard ADSR)
#define USE_EXPO PORTA, 3 ; Linear or exponential envelope? (1=Expo)
; Flag bit definitions
#define LFO_MODE FLAGS, 0 ; LFO mode (makes env loop endslessly)
#define LOOPING FLAGS, 1 ; Looping (Makes env loop whilst GATE high)
; Input definitions
#define TRIG_CHANGED CHANGES, 4 ; RC4 = TRIGGER input
#define TRIGGER STATES, 4
#define GATE_CHANGED CHANGES, 5 ; RC5 = GATE input
#define GATE STATES, 5
; Note I use the debounced variables, not the input directly
; Output DAC assignments, mostly for readability (Bank 11)
#define ENV_OUT_LO DAC1REFL
#define ENV_OUT_HI DAC1REFH
;----------------------------------------------------------------------
; Begin Executable Code Segment
;----------------------------------------------------------------------
org 0x000 ; Processor reset vector
nop ; For ICD use
goto Main ; Go to the main program
;------------------------------------------------------------------------------
; Timer 2 Interrupt Service Routine
; This is the sample rate timebase of 31.25KHz, and all necessary calculation
; for the next sample is carried out here.
;------------------------------------------------------------------------------
org 0x004 ; Interrupt vector location
InterruptEnter:
; Sample rate timebase at 31.25KHz
movlb D'0' ; Bank 0
btfss PIR1, TMR2IF ; Check if TMR2 interrupt
goto InterruptExit
bcf PIR1, TMR2IF ; Clear TMR2 interrupt flag
; If we're in LFO mode, we can ignore the GATE and TRIGGER inputs
btfsc LFO_MODE
goto GenerateEnvelope
;---------------------------------------------------------
; Test and debounce the digital inputs
;---------------------------------------------------------
; Do Scott Dattalo's vertical counter debounce (www.dattalo.com)
; This could debounce eight inputs, but I'm using only two:
; RC4 Trigger and RC5 Gate
; First, increment the debounce counters
movfw DEBOUNCE_LO
xorwf DEBOUNCE_HI, f ; HI+ = HI XOR LO
comf DEBOUNCE_LO, f ; LO+ = ~LO
; See if any changes occured
movfw PORTC ; Get current data from GATE & TRIG inputs
xorwf STATES, w ; Find the changes
; Reset counters where no change occured
andwf DEBOUNCE_LO, f
andwf DEBOUNCE_HI, f
; If there is a pending change and the count has rolled over,
; then the key has been debounced
xorlw D'255' ; Invert the changes
iorwf DEBOUNCE_HI, w ; If count is 0, both
iorwf DEBOUNCE_LO, w ; HI and LO are 0
; Any bit in W that is clear at this point means that the
; input has changed and the count rolled over.
xorlw D'255'
; Now a 1 in W represents a 'switch just changed'
movwf CHANGES ; Store the changes
; Update the changes to the keyboard state
xorwf STATES, f
; Test the GATE and TRIGGER Pins for changes
;--------------------------------------------
; The logic here is straight-forward. If the Trigger goes high, the envelope
; starts an attack. If the Gate goes low, it starts a release.
TestTrigger:
; Has TRIGGER changed?
btfss TRIG_CHANGED
goto TestGate
; TRIGGER has changed, but has it gone high?
btfss TRIGGER
goto TestGate ; No, so skip
StartEnvelope:
; If TRIGGER has gone high, change to ATTACK stage
; Zero the accumulator
clrf PHASE_HI
clrf PHASE_MID
clrf PHASE_LO
; What's the current output level?
movf OUTPUT_HI, w
movwf START_HI
movf OUTPUT_LO, w
movwf START_LO
; Move to ATTACK stage
movlw D'1'
movwf STAGE
goto GenerateEnvelope
TestGate:
; Has GATE changed?
btfss GATE_CHANGED
goto GenerateEnvelope
; GATE has changed, but has it gone low?
btfsc GATE
goto GenerateEnvelope ; No, so skip
EndEnvelope:
; If GATE has gone low, change to RELEASE stage
; Zero the accumulator
clrf PHASE_HI
clrf PHASE_MID
clrf PHASE_LO
; What's the current output level?
movf OUTPUT_HI, w
movwf START_HI
movf OUTPUT_LO, w
movwf START_LO
; Move to RELEASE stage
movlw D'5'
movwf STAGE
GenerateEnvelope:
; Do we need to increment the phase accumulator?
; If so, what FSR offset should we use?
movf STAGE, w ; Get current stage
brw
goto Wait ; No PHASE_INC required for WAIT
goto GetAttackOffset
goto GetPunchOffset
goto GetDecayOffset
goto Sustain ; No PHASE_INC required for SUSTAIN
goto GetReleaseOffset
; There are shorter ways to do this, but this way has the advantage that I
; can easily short-circuit the Wait and Sustain stages.
GetAttackOffset:
movlw #ATTACK_INC_LO
goto IncrementPhase
GetPunchOffset:
movlw #PUNCH_INC_LO
goto IncrementPhase
GetDecayOffset:
movlw #DECAY_INC_LO
goto IncrementPhase
GetReleaseOffset:
movlw #RELEASE_INC_LO
; Increment the phase accumulator PHASE (24+20 bit addition)
IncrementPhase:
movwf FSR1L ; Store offset
clrf FSR1H ; Set up for Indirect Addressing
; Which set of increments are we using?
moviw FSR1++ ; Add FREQ_INC to PHASE
addwf PHASE_LO, f
moviw FSR1++
addwfc PHASE_MID, f
moviw FSR1++
addwfc PHASE_HI, f
btfss CARRY ; Has it overflowed?
goto SelectStage ; No, so continue directly
; Accumulator has overflowed, so move to the next stage
NextStage:
; First zero the accumulator..
clrf PHASE_HI
clrf PHASE_MID
clrf PHASE_LO
; ..then increment the STAGE
incf STAGE, f
TestPunch:
; Do we use the Punch stage?
btfss USE_ADSR ; Standard ADSR, so skip Punch
goto TestLooping
SkipPunch:
; Are we on the Punch stage?
movf STAGE, w ; We're about to examine what STAGE we're on
xorlw D'2'
btfss ZERO ; Is STAGE==2 yet? (PUNCH)
goto TestLooping
incf STAGE, f ; Move directly to Decay
goto SelectStage
TestLooping:
; Are we looping? (Could be either Env Looping or LFO mode)
movf STAGE, w ; We're about to examine what STAGE we're on
btfss LOOPING
goto NormalEnvelope
LoopingEnvelopeOrLFOMode:
; If we're looping, two things are different:
; 1. If STAGE==4, SUSTAIN, we jump straight to STAGE=5, RELEASE
; 2. If STAGE==6, then we jump back to STAGE=1, ATTACK
xorlw D'4'
btfss ZERO ; Is STAGE==4 yet? (SUSTAIN)
goto TestLoopingEnd
SkipSustain: ; Yes, so move directly to RELEASE
incf STAGE, f
movf OUTPUT_HI, w ; What's the current output level?
movwf START_HI
movf OUTPUT_LO, w
movwf START_LO
goto SelectStage
TestLoopingEnd:
xorlw D'2' ; Equivalent to "XORLW 4" then "XORLW 6"
btfss ZERO ; Is STAGE==6 yet? (Envelope finished release)
goto SelectStage ; STAGE !=6, so skip the rest
; Envelope has finished release, and we're either in LFO mode,
; or Gated Looping
; We need to determine which, and either go back to the Attack, or finish.
btfsc GATE ; If the Gate is high, it doesn't matter which..
goto LoopToAttack ; ..since we go back to the Attack in either case
; GATE is Low, so which should it be?
btfsc LFO_MODE ; Are we in LFO mode?
goto LoopToAttack ; If it's LFO Mode we go back to Attack
; Gated Looping mode, Release has finished
clrf STAGE ; Reset STAGE to zero, WAIT
goto SelectStage
LoopToAttack: ; Yes, so reset it to ATTACK
movlw D'1'
movwf STAGE
movf OUTPUT_HI, w ; What's the current output level?
movwf START_HI
movf OUTPUT_LO, w
movwf START_LO
goto SelectStage
NormalEnvelope:
xorlw D'6'
btfsc ZERO ; Is STAGE==6 yet?
clrf STAGE ; Yes, so reset it to zero, WAIT
; We need to produce different output values depending on which stage we're at
SelectStage:
movf STAGE, w ; Get current stage
brw
SelectStageBranch:
goto Wait ; (Only gets called from here after 'NextStage')
goto Attack
goto Punch
goto Decay
goto Sustain ; (Only gets called from here after 'NextStage')
goto Release
Wait:
; Do nothing. GATE is low, and release stage has finished
clrf OUTPUT_HI ; Ensure we output zero when waiting
clrf OUTPUT_LO
goto DACOutput
Attack:
; Attack needs scaling by 1-START level,
; then needs START level adding to it
comf START_HI, w
movwf MULT_IN_HI
comf START_LO, w
movwf MULT_IN_LO
; Set up CURVE_OUT with the linear value (in case)
movf PHASE_HI, w
movwf CURVE_OUT_HI
movf PHASE_MID, w
movwf CURVE_OUT_LO
; Do we use the linear value directly, or do an expo lookup?
btfss USE_EXPO
goto AttackScaling
ExponentialAttack:
; Set up the exponential lookup index
clrf FSR1H
lslf PHASE_HI, w ; Shift it up for 16-bit table
movwf FSR1L
rlf FSR1H, f
; Add the table base address
movlw LOW AttackCurve ; Get the table base address
addwf FSR1L, f ; Add it to the index
movlw HIGH AttackCurve
addwfc FSR1H, f
; Get the required value for an exponential Attack curve
call LookupAndInterp ; Returns values in CURVE_OUT
AttackScaling:
call Multiply10x10 ; Do the scaling
; Add START level
movf START_LO, w
addwf MULT_OUT_LO, w
movwf OUTPUT_LO
movf START_HI, w
addwfc MULT_OUT_HI, w
movwf OUTPUT_HI
goto DACOutput
Punch:
; This is a short fixed Hold stage
movlw D'255'
movwf OUTPUT_HI ; Ensure we output high
movwf OUTPUT_LO
goto DACOutput
Decay:
; Decay needs scaling by 1-SUSTAIN and then inverting
comf SUSTAIN_CV, w
movwf MULT_IN_HI
movwf MULT_IN_LO
; Set up CURVE_OUT with the linear value (in case)
movf PHASE_HI, w
movwf CURVE_OUT_HI
movf PHASE_MID, w
movwf CURVE_OUT_LO
; Do we use the linear value directly, or do an expo lookup?
btfss USE_EXPO
goto DecayScaling
ExponentialDecay:
; Set up the exponential lookup index
clrf FSR1H
lslf PHASE_HI, w ; Shift it up for 16-bit table
movwf FSR1L
rlf FSR1H, f
; Add the table base address
movlw LOW DecayCurve ; Get the table base address
addwf FSR1L, f ; Add it to the index
movlw HIGH DecayCurve
addwfc FSR1H, f
; Get the required value for an exponential Decay curve
call LookupAndInterp ; Returns values in CURVE_OUT
DecayScaling:
call Multiply10x10 ; Do the scaling
; Invert the result
comf MULT_OUT_HI, w
movwf OUTPUT_HI
comf MULT_OUT_LO, w
movwf OUTPUT_LO
goto DACOutput
Sustain:
; Do nothing. Gate is high, and decay stage has finished
movf SUSTAIN_CV, w ; Ensure that we output the sustain level
movwf OUTPUT_HI
movwf OUTPUT_LO
goto DACOutput
Release:
; Release needs scaling by START level, then
; 1-START level adding, then inverting
movf START_HI, w
movwf MULT_IN_HI
movf START_LO, w
movwf MULT_IN_LO
; Set up CURVE_OUT with the linear value (in case)
movf PHASE_HI, w
movwf CURVE_OUT_HI
movf PHASE_MID, w
movwf CURVE_OUT_LO
; Do we use the linear value directly, or do an expo lookup?
btfss USE_EXPO
goto ReleaseScaling
ExponentialRelease:
; Set up the exponential lookup index
clrf FSR1H
lslf PHASE_HI, w ; Shift it up for 16-bit table
movwf FSR1L
rlf FSR1H, f
; Add the table base address
movlw LOW DecayCurve ; Get the table base address
addwf FSR1L, f ; Add it to the index
movlw HIGH DecayCurve
addwfc FSR1H, f
; Get the required value for an exponential Decay curve
call LookupAndInterp
ReleaseScaling:
call Multiply10x10 ; Do the scaling
; Add 1-START level
comf START_LO, w
addwf MULT_OUT_LO, w
movwf OUTPUT_LO
comf START_HI, w
addwfc MULT_OUT_HI, w
movwf OUTPUT_HI
; Invert the result
comf OUTPUT_HI,f
comf OUTPUT_LO,f
; Set DAC Output
;---------------------------------------
DACOutput:
; Load 10-bit DAC
movlb D'11' ; All DACs are in Bank 11
movf OUTPUT_LO, w ; Move output data to DAC1
movwf DAC1REFL
movf OUTPUT_HI, w
movwf DAC1REFH
movlw B'00000001'
movwf DACLD ; Load DAC1 alone
;----------------------------------------
InterruptExit:
retfie
;------------------------------------------------------
; 10 bit x 10 bit Multiply Subroutine
; This is used by the Attack, Decay and Release stages to
; scale their output.
; The value in CURVE_OUT is multipled by MULT_IN.
; Both are 10-bit, left-aligned.
; 16 bit Output is in MULT_OUT_HI/LO
;------------------------------------------------------
Multiply10x10:
; Clear the output
clrf MULT_OUT_HI
clrf MULT_OUT_LO
MultBit0:
clrc ; Only important if we skip
btfss MULT_IN_LO, 6 ; Do the test
goto MultBit1 ; Skip if bit not set
movf CURVE_OUT_LO, w ; Add to output if bit set
addwf MULT_OUT_LO, f
movf CURVE_OUT_HI, w
addwfc MULT_OUT_HI, f
MultBit1:
rrf MULT_OUT_HI, f ; Shift down
rrf MULT_OUT_LO, f
clrc ; Only important if we skip
btfss MULT_IN_LO, 7 ; Do test
goto MultBit2 ; Skip if bit not set
movf CURVE_OUT_LO, w ; Add to output if bit set
addwf MULT_OUT_LO, f
movf CURVE_OUT_HI, w
addwfc MULT_OUT_HI, f
MultBit2:
rrf MULT_OUT_HI, f ; etc..
rrf MULT_OUT_LO, f
clrc
btfss MULT_IN_HI, 0
goto MultBit3
movf CURVE_OUT_LO, w
addwf MULT_OUT_LO, f
movf CURVE_OUT_HI, w
addwfc MULT_OUT_HI, f
MultBit3:
rrf MULT_OUT_HI, f
rrf MULT_OUT_LO, f
clrc
btfss MULT_IN_HI, 1
goto MultBit4
movf CURVE_OUT_LO, w
addwf MULT_OUT_LO, f
movf CURVE_OUT_HI, w
addwfc MULT_OUT_HI, f
MultBit4:
rrf MULT_OUT_HI, f
rrf MULT_OUT_LO, f
clrc
btfss MULT_IN_HI, 2
goto MultBit5
movf CURVE_OUT_LO, w
addwf MULT_OUT_LO, f
movf CURVE_OUT_HI, w
addwfc MULT_OUT_HI, f
MultBit5:
rrf MULT_OUT_HI, f
rrf MULT_OUT_LO, f
clrc
btfss MULT_IN_HI, 3
goto MultBit6
movf CURVE_OUT_LO, w
addwf MULT_OUT_LO, f
movf CURVE_OUT_HI, w
addwfc MULT_OUT_HI, f
MultBit6:
rrf MULT_OUT_HI, f
rrf MULT_OUT_LO, f
clrc
btfss MULT_IN_HI, 4
goto MultBit7
movf CURVE_OUT_LO, w
addwf MULT_OUT_LO, f
movf CURVE_OUT_HI, w
addwfc MULT_OUT_HI, f
MultBit7:
rrf MULT_OUT_HI, f
rrf MULT_OUT_LO, f
clrc
btfss MULT_IN_HI, 5
goto MultBit8
movf CURVE_OUT_LO, w
addwf MULT_OUT_LO, f
movf CURVE_OUT_HI, w
addwfc MULT_OUT_HI, f
MultBit8:
rrf MULT_OUT_HI, f
rrf MULT_OUT_LO, f
clrc
btfss MULT_IN_HI, 6
goto MultBit9
movf CURVE_OUT_LO, w
addwf MULT_OUT_LO, f
movf CURVE_OUT_HI, w
addwfc MULT_OUT_HI, f
MultBit9:
rrf MULT_OUT_HI, f
rrf MULT_OUT_LO, f
clrc
btfss MULT_IN_HI, 7
goto MultEnd
movf CURVE_OUT_LO, w
addwf MULT_OUT_LO, f
movf CURVE_OUT_HI, w
addwfc MULT_OUT_HI, f
MultEnd:
; Do the last down shift and we're done!
rrf MULT_OUT_HI, f
rrf MULT_OUT_LO, f
; Note:
; The original 8x8 routine was 66 instructions.
; This is 82, so it's only 16 instructions worse. Actual runtime
; is variable depending on how many bits of MULT_IN are set, but average
; time will be 62-odd instructions. Not half bad!
return
;------------------------------------------------------
; Linear Interpolation Subroutine
; This is used by the Attack, Decay, and Release stages.
; The routine expects to be given an FSR pointer from where it can read
; two 16-bit values to interpolate between: INPUT_X and INPUT_Y
; It also assumes that PHASE_MID is to be used as interpolation index.
; The interpolation result goes into CURVE_OUT.
; Since I only want a 10-bit result, we stop the calculation quite early,
; only doing a 3-bit interp (one extra bit for good measure).
;------------------------------------------------------
LookupAndInterp:
; Get the two samples
moviw FSR1++
movwf INPUT_X_LO ; Fetch Input X
movwf CURVE_OUT_LO ; We start with Input X
moviw FSR1++
movwf INPUT_X_HI
movwf CURVE_OUT_HI ; and here too
moviw FSR1++
movwf INPUT_Y_LO ; Fetch Input Y
moviw FSR1++
movwf INPUT_Y_HI
; Do the Interpolation between the two samples
; Interp bit 0
movf INPUT_X_LO, w ; Assume Input X
btfsc PHASE_MID, 5
movf INPUT_Y_LO, w ; Use Input Y if set
addwf CURVE_OUT_LO, f ; Add selected byte to output
movf INPUT_X_HI, w ; Do same again for high byte
btfsc PHASE_MID, 5
movf INPUT_Y_HI, w
addwfc CURVE_OUT_HI, f
rrf CURVE_OUT_HI, f ; Shift down
rrf CURVE_OUT_LO, f
; Interp bit 1
movf INPUT_X_LO, w ; Assume Input X
btfsc PHASE_MID, 6
movf INPUT_Y_LO, w ; Use Input Y if set
addwf CURVE_OUT_LO, f ; Add selected byte to output
movf INPUT_X_HI, w ; Do same again for high byte
btfsc PHASE_MID, 6
movf INPUT_Y_HI, w
addwfc CURVE_OUT_HI, f
rrf CURVE_OUT_HI, f ; Shift down
rrf CURVE_OUT_LO, f
; Interp bit 2
movf INPUT_X_LO, w ; Assume Input X
btfsc PHASE_MID, 7
movf INPUT_Y_LO, w ; Use Input Y if set
addwf CURVE_OUT_LO, f ; Add selected byte to output
movf INPUT_X_HI, w ; Do same again for high byte
btfsc PHASE_MID, 7
movf INPUT_Y_HI, w
addwfc CURVE_OUT_HI, f
rrf CURVE_OUT_HI, f ; Shift down
rrf CURVE_OUT_LO, f
return
;----------------------------------------
; Analogue to Digital conversion subroutine
; This is used by the main code loop
;----------------------------------------
DoADConversion:
movlb D'1' ; Bank 1
movwf ADCON0
; Short delay whilst the channel settles
movlw D'50'
movwf TEMP
decfsz TEMP, f
bra $-1
; Start the conversion
bsf ADCON0, GO_NOT_DONE
; Wait for it to finish
btfsc ADCON0, GO_NOT_DONE ; Is it done?
bra $-1
; Read the ADC Value and store it
movf ADRESH, w
movwf ADC_VALUE
movlb D'0' ; Bank 0
return
;----------------------------------------
; The main program
; This reads the A/D channels and provides
; values for the DDS
;----------------------------------------
Main:
movlb D'1' ; Bank 1
; Set up the clock for 32MHz internal
movlw B'11110000' ; 8MHz internal, x4 PLL
movwf OSCCON
; Set up the IO Ports
movlw b'111111' ; All inputs RA0:RA5
movwf TRISA
movlw b'111011' ; RC2 Output, all others inputs
movwf TRISC
; Set up the interrupts
bsf INTCON, GIE ; Enable interrupts
bsf INTCON, PEIE ; Enable peripheral interrupts
; bsf INTCON, IOCIE ; Enable interrupt-on-change
bsf PIE1, TMR2IE ; Enable the output sample rate interrupt
; Set up Timer2 as sample rate timebase
movlb D'0' ; Bank 0
movlw B'00000001'
movwf T2CLKCON ; Fosc/4 = 8MHz clock for timer
movlw B'00110000' ; Prescale /8 = 1MHz, Postscale /1, Tmr Off
movwf T2CON
movlw 0x1F ; Set up Timer2 period register (/32)
movwf T2PR ; Interrupts at 1MHz/32 = 31.25KHz
; Set up Analog-to-digital convertor and ADC inputs
movlb D'3' ; Bank 3
movlw B'00010111' ; 4 Analog inputs on RA0-RA2, RA4
movwf ANSELA
movlw B'00001011' ; 3 Analog inputs on RC0, RC1, RC3
movwf ANSELC
movlb D'1' ; Bank 1
movlw B'00000001' ; AN0, ADC on
movwf ADCON0
movlw B'01100000' ; Left-justified, Fosc/64, Vss to Vdd range.
movwf ADCON1
; Set up DAC1 (10-bit) for Envelope Output
movlb D'11' ; All DACs are in Bank 11
movlw B'11000100' ; Enabled, L-justified, No output, Vref+, Vss
; movlw B'11000000' ; Enabled, L-justified, No output, Vdd, Vss
movwf DAC1CON0 ; (Note that we use Vref+ as Level CV)
clrf DAC1REFH ; Zero the value
clrf DAC1REFL
; Set up op-amp to buffer DAC output
movlb D'10' ; Bank 10
movlw B'00000000' ; -in = default (we set unity gain in a mo)
movwf OPA1NCHS
movlw B'00000010' ; +in = DAC1
movwf OPA1PCHS
movlw B'10010000' ; Enabled, Unity Gain, no override
movwf OPA1CON
movlw B'00000000' ; Override selection (default)
movwf OPA1ORS
; Set up weak pull-ups on USE_ADSR and USE_EXPO inputs
movlb D'1' ; Bank 1
movlw B'01111111'
movwf OPTION_REG ; Weak pull-ups enabled
movlb D'4' ; Bank 4
movlw B'000000' ; No Pull-ups on Port C
movwf WPUC
movlw B'101000' ; Pull-ups on RA3 and RA5
movwf WPUA
; Set up initial values of the variables
;-----------------------------------------
movlb D'0' ; Bank 0
; Set up both indirection pointers for Bank0
clrf FSR0H
clrf FSR1H
; Set up initial values of the variables
clrf ATTACK_CV ; Default to minimum time of 1mS
clrf DECAY_CV
clrf SUSTAIN_CV
clrf RELEASE_CV
clrf TIME_CV ; Default to no time modulation
clrf MODE_CV ; Default to standard ADSR, no looping
clrf STAGE
; Clear the Phase Accumulator
clrf PHASE_LO
clrf PHASE_MID
clrf PHASE_HI
; Clear the increments too
clrf ATTACK_INC_LO
clrf ATTACK_INC_MID
clrf ATTACK_INC_HI
clrf DECAY_INC_LO
clrf DECAY_INC_MID
clrf DECAY_INC_HI
clrf RELEASE_INC_LO
clrf RELEASE_INC_MID
clrf RELEASE_INC_HI
; Set up the Punch increment (fixed stage length of about 5msecs)
movlw D'160'
movwf PUNCH_INC_LO
movwf PUNCH_INC_MID
movlw D'1'
movwf PUNCH_INC_HI
; Clear the output buffers
clrf OUTPUT_HI
clrf OUTPUT_LO
; Set upo the ADC channel scan
movlw D'7'
movwf ADC_CHANNEL ; Start with ATTACK_CV
; The first Attack starts at zero
clrf START_HI
clrf START_LO
; Set up the GATE & TRIGGER debounce
clrf DEBOUNCE_HI
clrf DEBOUNCE_LO
clrf STATES
clrf CHANGES
; Ok, that's all the setup done, let's get going
; Start outputting signals
movlb D'0' ; Bank 0
bsf T2CON, TMR2ON ; Turn timer 2 on
MainLoop:
; Change to next A/D channel
incf ADC_CHANNEL, f
; We need to do different things depending on which value we're reading:
SelectADCChannel:
movf ADC_CHANNEL, w ; Get current channel
andlw D'7' ; Only want 3 LSBs
brw ; Computed branch
goto AttackCV
goto DecayCV
goto SustainCV
goto ReleaseCV
goto TimeCV
goto ModeCV
ScannedAllChannels:
; Reset ADC channel
movlw D'7'
movwf ADC_CHANNEL
goto MainLoop
; Update the Attack CV
AttackCV:
movlw b'00000001' ; AN0, ADC On
call DoADConversion
movwf ATTACK_CV
; Subtract the TIME_CV (Increasing TIME_CV shortens the Env)
movfw TIME_CV
subwf ATTACK_CV, w
btfss BORROW
movlw D'0' ; If value is <0, use minimum
; Get the new phase increment for the ATTACK stage
movwf FSR0L ; Store index
movlw HIGH ControlLookupHi; Get table page
movwf FSR0H
movf INDF0, w ; Get high byte
movwf ATTACK_INC_HI ; Store it
incf FSR0H, f ; Move to mid table
movf INDF0, w ; etc..
movwf ATTACK_INC_MID
incf FSR0H, f ; Move to lo table
movf INDF0, w
movwf ATTACK_INC_LO
goto MainLoop
; Update the Decay CV
DecayCV:
movlw b'00001001' ; AN2, ADC On
call DoADConversion
movwf DECAY_CV
; Subtract the TIME_CV (Increasing TIME_CV shortens the Env)
movfw TIME_CV
subwf DECAY_CV, w
btfss BORROW
movlw D'0' ; If value is <0, use minimum
; Get the new phase increment for the DECAY stage
movwf FSR0L ; Store index
movlw HIGH ControlLookupHi; Get table page
movwf FSR0H
movf INDF0, w ; Get high byte
movwf DECAY_INC_HI ; Store it
incf FSR0H, f ; Move to mid table
movf INDF0, w ; etc..
movwf DECAY_INC_MID
incf FSR0H, f ; Move to lo table