From f4baa0f2e1b315a0d8d6d9f01ff0ef130f654940 Mon Sep 17 00:00:00 2001 From: Marian Buschsieweke Date: Sun, 14 Apr 2024 16:15:44 +0200 Subject: [PATCH] cpu/msp430/periph_uart: Fix uart_write() for USCI peripheral In TX-only mode the UART was previously release before all bits of the last byte were shifted out. This adds a busy loop waiting while the peripheral is still busy, fixing the issue. Co-authored-by: benpicco --- cpu/msp430/periph/uart_usci.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/cpu/msp430/periph/uart_usci.c b/cpu/msp430/periph/uart_usci.c index 5e7f25f0cccd..7a9c243d6f9e 100644 --- a/cpu/msp430/periph/uart_usci.c +++ b/cpu/msp430/periph/uart_usci.c @@ -1,5 +1,6 @@ /* * Copyright (C) 2015 Freie Universität Berlin + * 2024 Marian Buschsieweke * * This file is subject to the terms and conditions of the GNU Lesser * General Public License v2.1. See the file LICENSE in the top level @@ -15,6 +16,7 @@ * @brief Low-level UART driver implementation * * @author Hauke Petersen + * @author Marian Buschsieweke * * @} */ @@ -130,6 +132,11 @@ void uart_write(uart_t uart, const uint8_t *data, size_t len) usci->dev->TXBUF = *data++; } + while (usci->dev->STAT & UCBUSY) { + /* busy wait for completion, e.g. to avoid losing chars/bits + * before releasing the USCI in TX only mode. */ + } + if (tx_only) { msp430_usci_release(usci); }