From f7028f6c3ec435321af9e90daf2d8de8138b7239 Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Sat, 21 Sep 2024 11:08:32 -0400 Subject: [PATCH 01/98] Added new variable "adcPeriph" to adc class, so you can now choose the adc to use. Made it an enum, so depending on if you are using f4xx or f3xx you can have different options. --- include/core/io/ADC.hpp | 4 +++- include/core/io/platform/f4xx/ADCf4xx.hpp | 8 +++++++- src/core/io/ADC.cpp | 3 ++- 3 files changed, 12 insertions(+), 3 deletions(-) diff --git a/include/core/io/ADC.hpp b/include/core/io/ADC.hpp index 19223308..7302942f 100644 --- a/include/core/io/ADC.hpp +++ b/include/core/io/ADC.hpp @@ -9,6 +9,7 @@ namespace core::io { // The different pins are hardware specific. Forware declarationsto allow // at compilation time the decision of which pins should be used. enum class Pin; +enum class ADCPeriph; class ADC { @@ -18,7 +19,7 @@ class ADC { * * @param[in] pin The pin to setup for ADC */ - ADC(Pin pin); + ADC(Pin pin, ADCPeriph adcPeriph); /** * Reads the current voltage in volts on the ADC @@ -46,6 +47,7 @@ class ADC { protected: /// The pin the ADC is attached to Pin pin; + ADCPeriph adcPeriph; }; } // namespace core::io diff --git a/include/core/io/platform/f4xx/ADCf4xx.hpp b/include/core/io/platform/f4xx/ADCf4xx.hpp index f62a8a0a..e5066405 100644 --- a/include/core/io/platform/f4xx/ADCf4xx.hpp +++ b/include/core/io/platform/f4xx/ADCf4xx.hpp @@ -8,6 +8,12 @@ namespace core::io { +enum class ADCPeriph { +ONE, +TWO, +THREE +}; + class ADCf4xx : public ADC { public: /** @@ -15,7 +21,7 @@ class ADCf4xx : public ADC { * * @param[in] pin The pin to setup for ADC */ - ADCf4xx(Pin pin); + ADCf4xx(Pin pin, ADCPeriph adcPeriph); float read(); diff --git a/src/core/io/ADC.cpp b/src/core/io/ADC.cpp index b23dae1a..96a985be 100644 --- a/src/core/io/ADC.cpp +++ b/src/core/io/ADC.cpp @@ -2,8 +2,9 @@ namespace core::io { -ADC::ADC(Pin pin) { +ADC::ADC(Pin pin, ADCPeriph adcPeriph) { this->pin = pin; + this->adcPeriph = adcPeriph; } } // namespace core::io From ff87ea239b170b71413406ffe1e51d849e214eb8 Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Mon, 23 Sep 2024 22:35:08 -0400 Subject: [PATCH 02/98] Added new method along with define statements to create a single uint32_t that contains the channel as well as the ADC peripherals it supports (1, 2, and/or 3). Added hard fault if the channel does not support the peripheral --- include/core/io/platform/f4xx/ADCf4xx.hpp | 10 ++- src/core/io/platform/f4xx/ADCf4xx.cpp | 91 ++++++++++++++++++----- 2 files changed, 80 insertions(+), 21 deletions(-) diff --git a/include/core/io/platform/f4xx/ADCf4xx.hpp b/include/core/io/platform/f4xx/ADCf4xx.hpp index e5066405..169d5716 100644 --- a/include/core/io/platform/f4xx/ADCf4xx.hpp +++ b/include/core/io/platform/f4xx/ADCf4xx.hpp @@ -37,7 +37,7 @@ class ADCf4xx : public ADC { // Max value for a 12 bit ADC reading (2^12 - 1) static constexpr uint32_t MAX_RAW = 4095; /// This is static since the STM32F3xx only had a single ADC which - /// supports multiple channels, so I made this one only use a single ADC. + /// supports multiple channels, so I made this one only use a single ADC. todo: look into this being static /// The F446re has 3 12 bit ADC's. Currently not able to use the other 2. /// The ADC will be initialized once then each channel will be added on. static ADC_HandleTypeDef halADC; @@ -48,6 +48,14 @@ class ADCf4xx : public ADC { static uint16_t buffer[MAX_CHANNELS]; static DMA_HandleTypeDef halDMA; + /** + * Checks if the channel that is being initialized supports the ADC peripheral that it is being initialized on. + * @param periph the ADC peripheral being used + * @param channel the channel trying to be initialized + * @return + */ + static bool checkSupport(ADCPeriph periph, uint32_t channel); + /** * Initialize the HAL ADC handler. This should only have to be run once */ diff --git a/src/core/io/platform/f4xx/ADCf4xx.cpp b/src/core/io/platform/f4xx/ADCf4xx.cpp index 3ec066ed..571d5ee5 100644 --- a/src/core/io/platform/f4xx/ADCf4xx.cpp +++ b/src/core/io/platform/f4xx/ADCf4xx.cpp @@ -20,6 +20,12 @@ #include namespace core::io { +#define ADC1SHIFT 5 +#define ADC2SHIFT 6 +#define ADC3SHIFT 7 + +// Combines the channel memory value with the ADC peripherals it supports into one uint32_t +#define CHANNEL_SET(adc1, adc2, adc3, ch) (ch | (adc1 << ADC1SHIFT) | (adc2 << ADC2SHIFT) | (adc3 << ADC3SHIFT)) // Init static member variables ADC_HandleTypeDef ADCf4xx::halADC = {0}; @@ -27,7 +33,7 @@ Pin ADCf4xx::channels[MAX_CHANNELS]; uint16_t ADCf4xx::buffer[MAX_CHANNELS]; DMA_HandleTypeDef ADCf4xx::halDMA = {0}; -ADCf4xx::ADCf4xx(Pin pin) : ADC(pin) { +ADCf4xx::ADCf4xx(Pin pin, ADCPeriph adcPeriph = ADCPeriph::ONE) : ADC(pin, adcPeriph) { // Flag representing if the ADC has been configured yet static bool halADCisInit = false; @@ -84,7 +90,18 @@ void ADCf4xx::initADC(uint8_t num_channels) { /** Configure the global features of the ADC (Clock, Resolution, Data * Alignment and number of conversion) */ - halADC.Instance = ADC1; + // Set instance to the ADC peripheral being using + switch (adcPeriph) { + case ADCPeriph::ONE: + halADC.Instance = ADC1; + break; + case ADCPeriph::TWO: + halADC.Instance = ADC2; + break; + case ADCPeriph::THREE: + halADC.Instance = ADC3; + break; + } halADC.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2; halADC.Init.Resolution = ADC_RESOLUTION_12B; halADC.Init.ScanConvMode = ENABLE; @@ -97,12 +114,22 @@ void ADCf4xx::initADC(uint8_t num_channels) { halADC.Init.DMAContinuousRequests = ENABLE; halADC.Init.EOCSelection = ADC_EOC_SEQ_CONV; - __HAL_RCC_ADC1_CLK_ENABLE(); + switch (adcPeriph) { + case ADCPeriph::ONE: + __HAL_RCC_ADC1_CLK_ENABLE(); // todo check if this can go in the switch above. I dont see why not + break; + case ADCPeriph::TWO: + __HAL_RCC_ADC2_CLK_ENABLE(); + break; + case ADCPeriph::THREE: + __HAL_RCC_ADC3_CLK_ENABLE(); + break; + } HAL_ADC_Init(&halADC); } void ADCf4xx::initDMA() { - halDMA.Instance = DMA2_Stream0; + halDMA.Instance = DMA2_Stream0; // todo: check this halDMA.Init.Direction = DMA_PERIPH_TO_MEMORY; halDMA.Init.PeriphInc = DMA_PINC_DISABLE; halDMA.Init.MemInc = DMA_MINC_ENABLE; @@ -120,64 +147,76 @@ void ADCf4xx::addChannel(uint8_t rank) { GPIO_InitTypeDef gpioInit; Pin myPins[] = {pin}; uint8_t numOfPins = 1; + uint32_t channel; GPIOf4xx::gpioStateInit(&gpioInit, myPins, numOfPins, GPIO_MODE_ANALOG, GPIO_NOPULL, GPIO_SPEED_FREQ_HIGH); ADC_ChannelConfTypeDef adcChannel; + // Combines the ADC channel with the ADC peripherals it supports, to avoid having multi-layered switch statements switch (pin) { case Pin::PA_0: - adcChannel.Channel = ADC_CHANNEL_0; + channel = CHANNEL_SET(1, 1, 1, ADC_CHANNEL_0); break; case Pin::PA_1: - adcChannel.Channel = ADC_CHANNEL_1; + channel = CHANNEL_SET(1, 1, 1, ADC_CHANNEL_1); break; case Pin::PA_2: - adcChannel.Channel = ADC_CHANNEL_2; + channel = CHANNEL_SET(1, 1, 1, ADC_CHANNEL_2); break; case Pin::PA_3: - adcChannel.Channel = ADC_CHANNEL_3; + channel = CHANNEL_SET(1, 1, 1, ADC_CHANNEL_3); break; case Pin::PA_4: - adcChannel.Channel = ADC_CHANNEL_4; + channel = CHANNEL_SET(1, 1, 0, ADC_CHANNEL_4); break; case Pin::PA_5: - adcChannel.Channel = ADC_CHANNEL_5; + channel = CHANNEL_SET(1, 1, 0, ADC_CHANNEL_5); break; case Pin::PA_6: - adcChannel.Channel = ADC_CHANNEL_6; + channel = CHANNEL_SET(1, 1, 0, ADC_CHANNEL_6); break; case Pin::PA_7: - adcChannel.Channel = ADC_CHANNEL_7; + channel = CHANNEL_SET(1, 1, 0, ADC_CHANNEL_7); break; case Pin::PB_0: - adcChannel.Channel = ADC_CHANNEL_8; + channel = CHANNEL_SET(1, 1, 0, ADC_CHANNEL_8); break; case Pin::PB_1: - adcChannel.Channel = ADC_CHANNEL_9; + channel = CHANNEL_SET(1, 1, 0, ADC_CHANNEL_9); break; case Pin::PC_0: - adcChannel.Channel = ADC_CHANNEL_10; + channel = CHANNEL_SET(1, 1, 1, ADC_CHANNEL_10); break; case Pin::PC_1: - adcChannel.Channel = ADC_CHANNEL_11; + channel = CHANNEL_SET(1, 1, 1, ADC_CHANNEL_11); break; case Pin::PC_2: - adcChannel.Channel = ADC_CHANNEL_12; + channel = CHANNEL_SET(1, 1, 1, ADC_CHANNEL_12); break; case Pin::PC_3: - adcChannel.Channel = ADC_CHANNEL_13; + channel = CHANNEL_SET(1, 1, 1, ADC_CHANNEL_13); break; case Pin::PC_4: - adcChannel.Channel = ADC_CHANNEL_14; + channel = CHANNEL_SET(1, 1, 0, ADC_CHANNEL_14); break; case Pin::PC_5: - adcChannel.Channel = ADC_CHANNEL_15; + channel = CHANNEL_SET(1, 1, 0, ADC_CHANNEL_15); break; default: + channel = 0; break; // Should never get here } + // This checks if the pin being used supports the ADC being used + if (checkSupport(adcPeriph, channel)) { + // Masks channel back to proper value (Zero's out ADC information bits) + adcChannel.Channel = channel & 0x1F; + } else { + // Causes HARD FAULT if pin does not support the ADC peripheral being used + adcChannel.Channel = *((uint32_t *)0U); + } + // Subtract 1 because rank starts at 1 channels[rank - 1] = pin; @@ -189,4 +228,16 @@ void ADCf4xx::addChannel(uint8_t rank) { HAL_ADC_ConfigChannel(&halADC, &adcChannel); } +bool ADCf4xx::checkSupport(ADCPeriph periph, uint32_t channel) { + // Checks if the channel contains the bit signifying the proper ADC peripheral support + switch (periph) { + case ADCPeriph::ONE: + return channel & (1 < ADC1SHIFT); + case ADCPeriph::TWO: + return channel & (1 < ADC2SHIFT); + case ADCPeriph::THREE: + return channel & (1 < ADC3SHIFT); + } +} + } // namespace core::io From 0cd6678bc409abe78cc11561053c1d796c28b838 Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Sat, 28 Sep 2024 12:46:35 -0400 Subject: [PATCH 03/98] Updated ADC f4 to support multiple ADC's simultaneously (In theory) --- include/core/io/ADC.hpp | 1 + include/core/io/platform/f4xx/ADCf4xx.hpp | 24 ++-- src/core/io/platform/f4xx/ADCf4xx.cpp | 157 ++++++++++++++-------- 3 files changed, 115 insertions(+), 67 deletions(-) diff --git a/include/core/io/ADC.hpp b/include/core/io/ADC.hpp index 7302942f..2303ce43 100644 --- a/include/core/io/ADC.hpp +++ b/include/core/io/ADC.hpp @@ -47,6 +47,7 @@ class ADC { protected: /// The pin the ADC is attached to Pin pin; + /// The ADC being used ADCPeriph adcPeriph; }; diff --git a/include/core/io/platform/f4xx/ADCf4xx.hpp b/include/core/io/platform/f4xx/ADCf4xx.hpp index 169d5716..f88da926 100644 --- a/include/core/io/platform/f4xx/ADCf4xx.hpp +++ b/include/core/io/platform/f4xx/ADCf4xx.hpp @@ -31,31 +31,37 @@ class ADCf4xx : public ADC { private: // Max number of channels supported by the ADC - static constexpr uint8_t MAX_CHANNELS = 15; + static constexpr uint8_t MAX_CHANNELS = 16; + // Number of supported ADC Peripherals + static constexpr uint8_t NUM_ADCS = 3; // Positive reference voltage of the ADC. Needs to be updated based on the hardware configuration static constexpr float VREF_POS = 3.3; // Max value for a 12 bit ADC reading (2^12 - 1) static constexpr uint32_t MAX_RAW = 4095; /// This is static since the STM32F3xx only had a single ADC which - /// supports multiple channels, so I made this one only use a single ADC. todo: look into this being static + /// supports multiple channels, so I made this one only use a single ADC. /// The F446re has 3 12 bit ADC's. Currently not able to use the other 2. /// The ADC will be initialized once then each channel will be added on. - static ADC_HandleTypeDef halADC; + static ADC_HandleTypeDef halADC[NUM_ADCS]; /// Static list of all channels supported by the ADC - static Pin channels[MAX_CHANNELS]; - /// Buffer for DMA where each spot represents the value read in from a - /// channel - static uint16_t buffer[MAX_CHANNELS]; - static DMA_HandleTypeDef halDMA; + static Pin channels[NUM_ADCS][MAX_CHANNELS]; + /// Buffer for DMA where each spot represents the value read in from a channel + static uint16_t buffer[NUM_ADCS][MAX_CHANNELS]; + static DMA_HandleTypeDef halDMA[NUM_ADCS]; /** * Checks if the channel that is being initialized supports the ADC peripheral that it is being initialized on. * @param periph the ADC peripheral being used * @param channel the channel trying to be initialized - * @return + * @return true if channel is supported by ADCPeriph */ static bool checkSupport(ADCPeriph periph, uint32_t channel); + /** + * Returns the ADC number that is in use. Depends on the ADCPeriph enum to check + * @return + */ + uint8_t getADCNum(); /** * Initialize the HAL ADC handler. This should only have to be run once */ diff --git a/src/core/io/platform/f4xx/ADCf4xx.cpp b/src/core/io/platform/f4xx/ADCf4xx.cpp index 571d5ee5..8e8fd216 100644 --- a/src/core/io/platform/f4xx/ADCf4xx.cpp +++ b/src/core/io/platform/f4xx/ADCf4xx.cpp @@ -20,6 +20,10 @@ #include namespace core::io { +#define ADC1_SLOT 0 +#define ADC2_SLOT 1 +#define ADC3_SLOT 2 + #define ADC1SHIFT 5 #define ADC2SHIFT 6 #define ADC3SHIFT 7 @@ -28,43 +32,46 @@ namespace core::io { #define CHANNEL_SET(adc1, adc2, adc3, ch) (ch | (adc1 << ADC1SHIFT) | (adc2 << ADC2SHIFT) | (adc3 << ADC3SHIFT)) // Init static member variables -ADC_HandleTypeDef ADCf4xx::halADC = {0}; -Pin ADCf4xx::channels[MAX_CHANNELS]; -uint16_t ADCf4xx::buffer[MAX_CHANNELS]; -DMA_HandleTypeDef ADCf4xx::halDMA = {0}; +ADC_HandleTypeDef ADCf4xx::halADC[] = {{0},{0},{0}}; +Pin ADCf4xx::channels[NUM_ADCS][MAX_CHANNELS]; +uint16_t ADCf4xx::buffer[NUM_ADCS][MAX_CHANNELS]; +DMA_HandleTypeDef ADCf4xx::halDMA[] = {{0},{0},{0}}; ADCf4xx::ADCf4xx(Pin pin, ADCPeriph adcPeriph = ADCPeriph::ONE) : ADC(pin, adcPeriph) { // Flag representing if the ADC has been configured yet - static bool halADCisInit = false; + static bool halADCisInit[] = {false, false, false}; // "Rank" represents the order in which the channels are added // Also represents the total number of added channels - static uint8_t rank = 1; + static uint8_t rank[] = {1, 1, 1}; + uint8_t adcNum = getADCNum(); // Maximum number of ADC channels have already been added - if (rank == MAX_CHANNELS) { + if (rank[adcNum] == MAX_CHANNELS) { return; } - // Initialization of the HAL ADC should only take place once since there is - // only one ADC device which has multiple channels supported. - if (halADCisInit) { - HAL_ADC_Stop_DMA(&halADC); - HAL_DMA_DeInit(&halDMA); + // Value of currently used ADC (For array access) + + // Initialization of each HAL ADC should only take place once since + // each individual ADC has multiple channels supported + if (halADCisInit[adcNum]) { + HAL_ADC_Stop_DMA(&halADC[adcNum]); + HAL_DMA_DeInit(&halDMA[adcNum]); } else { __HAL_RCC_DMA2_CLK_ENABLE(); - halADCisInit = true; + halADCisInit[adcNum] = true; } - addChannel(rank); + addChannel(rank[adcNum]); - initADC(rank); + initADC(rank[adcNum]); initDMA(); - HAL_ADC_Start_DMA(&halADC, reinterpret_cast(&buffer[0]), rank); + HAL_ADC_Start_DMA(&halADC[adcNum], reinterpret_cast(&buffer[adcNum][0]), rank[adcNum]); // todo: check - rank++; + rank[adcNum]++; } float ADCf4xx::read() { @@ -76,9 +83,10 @@ uint32_t ADCf4xx::readRaw() { // Search through list of channels to determine which DMA buffer index to // use uint8_t channelNum = 0; - while (channels[channelNum] != pin) + uint8_t adcNum = getADCNum(); + while (channels[adcNum][channelNum] != pin) channelNum++; - return buffer[channelNum]; + return buffer[adcNum][channelNum]; } float ADCf4xx::readPercentage() { @@ -90,57 +98,77 @@ void ADCf4xx::initADC(uint8_t num_channels) { /** Configure the global features of the ADC (Clock, Resolution, Data * Alignment and number of conversion) */ + uint8_t adcNum = getADCNum(); + ADC_HandleTypeDef* adc = &halADC[adcNum]; // Set instance to the ADC peripheral being using - switch (adcPeriph) { - case ADCPeriph::ONE: - halADC.Instance = ADC1; + switch (adcNum) { + case ADC1_SLOT: + halADC[adcNum].Instance = ADC1; break; - case ADCPeriph::TWO: - halADC.Instance = ADC2; + case ADC2_SLOT: + halADC[adcNum].Instance = ADC2; break; - case ADCPeriph::THREE: - halADC.Instance = ADC3; + case ADC3_SLOT: + halADC[adcNum].Instance = ADC3; break; + default: + return; // Should never get here } - halADC.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2; - halADC.Init.Resolution = ADC_RESOLUTION_12B; - halADC.Init.ScanConvMode = ENABLE; - halADC.Init.ContinuousConvMode = ENABLE; - halADC.Init.DiscontinuousConvMode = DISABLE; - halADC.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; - halADC.Init.ExternalTrigConv = ADC_SOFTWARE_START; - halADC.Init.DataAlign = ADC_DATAALIGN_RIGHT; - halADC.Init.NbrOfConversion = num_channels; - halADC.Init.DMAContinuousRequests = ENABLE; - halADC.Init.EOCSelection = ADC_EOC_SEQ_CONV; + adc->Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2; + adc->Init.Resolution = ADC_RESOLUTION_12B; + adc->Init.ScanConvMode = ENABLE; + adc->Init.ContinuousConvMode = ENABLE; + adc->Init.DiscontinuousConvMode = DISABLE; + adc->Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + adc->Init.ExternalTrigConv = ADC_SOFTWARE_START; + adc->Init.DataAlign = ADC_DATAALIGN_RIGHT; + adc->Init.NbrOfConversion = num_channels; + adc->Init.DMAContinuousRequests = ENABLE; + adc->Init.EOCSelection = ADC_EOC_SEQ_CONV; - switch (adcPeriph) { - case ADCPeriph::ONE: + switch (adcNum) { + case ADC1_SLOT: __HAL_RCC_ADC1_CLK_ENABLE(); // todo check if this can go in the switch above. I dont see why not break; - case ADCPeriph::TWO: + case ADC2_SLOT: __HAL_RCC_ADC2_CLK_ENABLE(); break; - case ADCPeriph::THREE: + case ADC3_SLOT: __HAL_RCC_ADC3_CLK_ENABLE(); break; + default: + return; // Should never get here } - HAL_ADC_Init(&halADC); + HAL_ADC_Init(&halADC[adcNum]); } void ADCf4xx::initDMA() { - halDMA.Instance = DMA2_Stream0; // todo: check this - halDMA.Init.Direction = DMA_PERIPH_TO_MEMORY; - halDMA.Init.PeriphInc = DMA_PINC_DISABLE; - halDMA.Init.MemInc = DMA_MINC_ENABLE; - halDMA.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD; - halDMA.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD; - halDMA.Init.Mode = DMA_CIRCULAR; - halDMA.Init.Priority = DMA_PRIORITY_VERY_HIGH; - halDMA.Init.FIFOMode = DMA_FIFOMODE_DISABLE; - - HAL_DMA_Init(&halDMA); - __HAL_LINKDMA(&halADC, DMA_Handle, halDMA); + uint8_t adcNum = getADCNum(); + DMA_HandleTypeDef* dma = &halDMA[adcNum]; + switch (adcNum) { + case ADC1_SLOT: + dma->Instance = DMA2_Stream0; + break; + case ADC2_SLOT: + dma->Instance = DMA2_Stream1; + break; + case ADC3_SLOT: + dma->Instance = DMA2_Stream2; + break; + default: + return; // Should never get here + } + dma->Init.Direction = DMA_PERIPH_TO_MEMORY; + dma->Init.PeriphInc = DMA_PINC_DISABLE; + dma->Init.MemInc = DMA_MINC_ENABLE; + dma->Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD; + dma->Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD; + dma->Init.Mode = DMA_CIRCULAR; + dma->Init.Priority = DMA_PRIORITY_VERY_HIGH; + dma->Init.FIFOMode = DMA_FIFOMODE_DISABLE; + + HAL_DMA_Init(dma); + __HAL_LINKDMA(&halADC[adcNum], DMA_Handle, *dma); } void ADCf4xx::addChannel(uint8_t rank) { @@ -148,8 +176,10 @@ void ADCf4xx::addChannel(uint8_t rank) { Pin myPins[] = {pin}; uint8_t numOfPins = 1; uint32_t channel; + uint8_t adcNum = getADCNum(); - GPIOf4xx::gpioStateInit(&gpioInit, myPins, numOfPins, GPIO_MODE_ANALOG, GPIO_NOPULL, GPIO_SPEED_FREQ_HIGH); + GPIOf4xx::gpioStateInit(&gpioInit, myPins, numOfPins, + GPIO_MODE_ANALOG, GPIO_NOPULL, GPIO_SPEED_FREQ_HIGH); ADC_ChannelConfTypeDef adcChannel; @@ -218,17 +248,17 @@ void ADCf4xx::addChannel(uint8_t rank) { } // Subtract 1 because rank starts at 1 - channels[rank - 1] = pin; + channels[adcNum][rank - 1] = pin; adcChannel.Rank = rank; adcChannel.SamplingTime = ADC_SAMPLETIME_480CYCLES; adcChannel.Offset = 0; adcChannel.Offset = 0x000; - HAL_ADC_ConfigChannel(&halADC, &adcChannel); + HAL_ADC_ConfigChannel(&halADC[adcNum], &adcChannel); } -bool ADCf4xx::checkSupport(ADCPeriph periph, uint32_t channel) { +inline bool ADCf4xx::checkSupport(ADCPeriph periph, uint32_t channel) { // Checks if the channel contains the bit signifying the proper ADC peripheral support switch (periph) { case ADCPeriph::ONE: @@ -240,4 +270,15 @@ bool ADCf4xx::checkSupport(ADCPeriph periph, uint32_t channel) { } } +uint8_t ADCf4xx::getADCNum() { + switch (adcPeriph) { + case ADCPeriph::ONE: + return ADC1_SLOT; + case ADCPeriph::TWO: + return ADC2_SLOT; + case ADCPeriph::THREE: + return ADC3_SLOT; + } +} + } // namespace core::io From 206a26764ea79121d81be3419014de5fbffe241b Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Sat, 28 Sep 2024 12:50:53 -0400 Subject: [PATCH 04/98] Fixed where default value was assigned --- include/core/io/platform/f4xx/ADCf4xx.hpp | 2 +- include/core/manager.hpp | 4 ++-- src/core/io/platform/f4xx/ADCf4xx.cpp | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/include/core/io/platform/f4xx/ADCf4xx.hpp b/include/core/io/platform/f4xx/ADCf4xx.hpp index f88da926..e3cdfa5a 100644 --- a/include/core/io/platform/f4xx/ADCf4xx.hpp +++ b/include/core/io/platform/f4xx/ADCf4xx.hpp @@ -21,7 +21,7 @@ class ADCf4xx : public ADC { * * @param[in] pin The pin to setup for ADC */ - ADCf4xx(Pin pin, ADCPeriph adcPeriph); + ADCf4xx(Pin pin, ADCPeriph adcPeriph = ADCPeriph::ONE); float read(); diff --git a/include/core/manager.hpp b/include/core/manager.hpp index a195e1ec..a93a12d8 100644 --- a/include/core/manager.hpp +++ b/include/core/manager.hpp @@ -145,10 +145,10 @@ namespace core::io { * @param[in] pin The pin to use with the ADC */ #ifdef ADC_SUPPORTED -template +template ADC& getADC() { #ifdef STM32F4xx - static ADCf4xx adc(pin); + static ADCf4xx adc(pin, adcPeriph); return adc; #endif #ifdef STM32F3xx diff --git a/src/core/io/platform/f4xx/ADCf4xx.cpp b/src/core/io/platform/f4xx/ADCf4xx.cpp index 8e8fd216..f996bb76 100644 --- a/src/core/io/platform/f4xx/ADCf4xx.cpp +++ b/src/core/io/platform/f4xx/ADCf4xx.cpp @@ -37,7 +37,7 @@ Pin ADCf4xx::channels[NUM_ADCS][MAX_CHANNELS]; uint16_t ADCf4xx::buffer[NUM_ADCS][MAX_CHANNELS]; DMA_HandleTypeDef ADCf4xx::halDMA[] = {{0},{0},{0}}; -ADCf4xx::ADCf4xx(Pin pin, ADCPeriph adcPeriph = ADCPeriph::ONE) : ADC(pin, adcPeriph) { +ADCf4xx::ADCf4xx(Pin pin, ADCPeriph adcPeriph) : ADC(pin, adcPeriph) { // Flag representing if the ADC has been configured yet static bool halADCisInit[] = {false, false, false}; From ee190f8f5d37980c9c6d4eb274db621575defe11 Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Sat, 28 Sep 2024 12:54:12 -0400 Subject: [PATCH 05/98] fixed misplaced comments --- src/core/io/platform/f4xx/ADCf4xx.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/core/io/platform/f4xx/ADCf4xx.cpp b/src/core/io/platform/f4xx/ADCf4xx.cpp index f996bb76..7ca90815 100644 --- a/src/core/io/platform/f4xx/ADCf4xx.cpp +++ b/src/core/io/platform/f4xx/ADCf4xx.cpp @@ -44,6 +44,8 @@ ADCf4xx::ADCf4xx(Pin pin, ADCPeriph adcPeriph) : ADC(pin, adcPeriph) { // "Rank" represents the order in which the channels are added // Also represents the total number of added channels static uint8_t rank[] = {1, 1, 1}; + + // Value of currently used ADC (For array access) uint8_t adcNum = getADCNum(); // Maximum number of ADC channels have already been added @@ -51,7 +53,6 @@ ADCf4xx::ADCf4xx(Pin pin, ADCPeriph adcPeriph) : ADC(pin, adcPeriph) { return; } - // Value of currently used ADC (For array access) // Initialization of each HAL ADC should only take place once since // each individual ADC has multiple channels supported From 7cbba522cece16e65792de7a87c5f6af4482f4d8 Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Sat, 28 Sep 2024 13:02:35 -0400 Subject: [PATCH 06/98] Altered adc f3 JUST enough so it will compile. Will come back to it. --- include/core/io/platform/f3xx/ADCf3xx.hpp | 4 ++++ src/core/io/platform/f3xx/ADCf3xx.cpp | 2 +- 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/include/core/io/platform/f3xx/ADCf3xx.hpp b/include/core/io/platform/f3xx/ADCf3xx.hpp index 33a332ef..6627e300 100644 --- a/include/core/io/platform/f3xx/ADCf3xx.hpp +++ b/include/core/io/platform/f3xx/ADCf3xx.hpp @@ -8,6 +8,10 @@ namespace core::io { +enum class ADCPeriph { + ONE +}; + class ADCf3xx : public ADC { public: /** diff --git a/src/core/io/platform/f3xx/ADCf3xx.cpp b/src/core/io/platform/f3xx/ADCf3xx.cpp index e59a0d11..22f90cb6 100644 --- a/src/core/io/platform/f3xx/ADCf3xx.cpp +++ b/src/core/io/platform/f3xx/ADCf3xx.cpp @@ -29,7 +29,7 @@ Pin ADCf3xx::channels[MAX_CHANNELS]; uint16_t ADCf3xx::buffer[MAX_CHANNELS]; DMA_HandleTypeDef ADCf3xx::halDMA = {0}; -ADCf3xx::ADCf3xx(Pin pin) : ADC(pin) { +ADCf3xx::ADCf3xx(Pin pin, ADCPeriph adcPeriph) : ADC(pin, adcPeriph) { // Flag representing if the ADC has been configured yet static bool halADCisInit = false; // "Rank" represents the order in which the channels are added From 05e67ae8d6a919769a6f73f0dd72ac6e93d69e6e Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Sat, 28 Sep 2024 13:03:55 -0400 Subject: [PATCH 07/98] Altered adc f3 JUST enough so it will compile. Will come back to it. --- include/core/io/platform/f3xx/ADCf3xx.hpp | 2 +- include/core/manager.hpp | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/core/io/platform/f3xx/ADCf3xx.hpp b/include/core/io/platform/f3xx/ADCf3xx.hpp index 6627e300..c1f4bfe4 100644 --- a/include/core/io/platform/f3xx/ADCf3xx.hpp +++ b/include/core/io/platform/f3xx/ADCf3xx.hpp @@ -19,7 +19,7 @@ class ADCf3xx : public ADC { * * @param[in] pin The pin to setup for ADC */ - ADCf3xx(Pin pin); + ADCf3xx(Pin pin, ADCPeriph adcPeriph); float read(); diff --git a/include/core/manager.hpp b/include/core/manager.hpp index a93a12d8..64027050 100644 --- a/include/core/manager.hpp +++ b/include/core/manager.hpp @@ -152,7 +152,7 @@ ADC& getADC() { return adc; #endif #ifdef STM32F3xx - static ADCf3xx adc(pin); + static ADCf3xx adc(pin, adcPeriph); return adc; #endif } From 9f9fb811232c5ee3bb1e0cdcec68f29728c72512 Mon Sep 17 00:00:00 2001 From: GitHub Build Date: Sat, 28 Sep 2024 17:05:33 +0000 Subject: [PATCH 08/98] Applied Formatting Changes During GitHub Build --- include/core/io/platform/f4xx/ADCf4xx.hpp | 6 +- src/core/io/ADC.cpp | 2 +- src/core/io/platform/f4xx/ADCf4xx.cpp | 96 +++++++++++------------ 3 files changed, 51 insertions(+), 53 deletions(-) diff --git a/include/core/io/platform/f4xx/ADCf4xx.hpp b/include/core/io/platform/f4xx/ADCf4xx.hpp index e3cdfa5a..a00cbf6b 100644 --- a/include/core/io/platform/f4xx/ADCf4xx.hpp +++ b/include/core/io/platform/f4xx/ADCf4xx.hpp @@ -9,9 +9,9 @@ namespace core::io { enum class ADCPeriph { -ONE, -TWO, -THREE + ONE, + TWO, + THREE }; class ADCf4xx : public ADC { diff --git a/src/core/io/ADC.cpp b/src/core/io/ADC.cpp index 96a985be..d189cbda 100644 --- a/src/core/io/ADC.cpp +++ b/src/core/io/ADC.cpp @@ -3,7 +3,7 @@ namespace core::io { ADC::ADC(Pin pin, ADCPeriph adcPeriph) { - this->pin = pin; + this->pin = pin; this->adcPeriph = adcPeriph; } diff --git a/src/core/io/platform/f4xx/ADCf4xx.cpp b/src/core/io/platform/f4xx/ADCf4xx.cpp index 7ca90815..0206ddf9 100644 --- a/src/core/io/platform/f4xx/ADCf4xx.cpp +++ b/src/core/io/platform/f4xx/ADCf4xx.cpp @@ -32,10 +32,10 @@ namespace core::io { #define CHANNEL_SET(adc1, adc2, adc3, ch) (ch | (adc1 << ADC1SHIFT) | (adc2 << ADC2SHIFT) | (adc3 << ADC3SHIFT)) // Init static member variables -ADC_HandleTypeDef ADCf4xx::halADC[] = {{0},{0},{0}}; +ADC_HandleTypeDef ADCf4xx::halADC[] = {{0}, {0}, {0}}; Pin ADCf4xx::channels[NUM_ADCS][MAX_CHANNELS]; uint16_t ADCf4xx::buffer[NUM_ADCS][MAX_CHANNELS]; -DMA_HandleTypeDef ADCf4xx::halDMA[] = {{0},{0},{0}}; +DMA_HandleTypeDef ADCf4xx::halDMA[] = {{0}, {0}, {0}}; ADCf4xx::ADCf4xx(Pin pin, ADCPeriph adcPeriph) : ADC(pin, adcPeriph) { // Flag representing if the ADC has been configured yet @@ -53,7 +53,6 @@ ADCf4xx::ADCf4xx(Pin pin, ADCPeriph adcPeriph) : ADC(pin, adcPeriph) { return; } - // Initialization of each HAL ADC should only take place once since // each individual ADC has multiple channels supported if (halADCisInit[adcNum]) { @@ -84,7 +83,7 @@ uint32_t ADCf4xx::readRaw() { // Search through list of channels to determine which DMA buffer index to // use uint8_t channelNum = 0; - uint8_t adcNum = getADCNum(); + uint8_t adcNum = getADCNum(); while (channels[adcNum][channelNum] != pin) channelNum++; return buffer[adcNum][channelNum]; @@ -99,21 +98,21 @@ void ADCf4xx::initADC(uint8_t num_channels) { /** Configure the global features of the ADC (Clock, Resolution, Data * Alignment and number of conversion) */ - uint8_t adcNum = getADCNum(); - ADC_HandleTypeDef* adc = &halADC[adcNum]; + uint8_t adcNum = getADCNum(); + ADC_HandleTypeDef* adc = &halADC[adcNum]; // Set instance to the ADC peripheral being using switch (adcNum) { - case ADC1_SLOT: - halADC[adcNum].Instance = ADC1; - break; - case ADC2_SLOT: - halADC[adcNum].Instance = ADC2; - break; - case ADC3_SLOT: - halADC[adcNum].Instance = ADC3; - break; - default: - return; // Should never get here + case ADC1_SLOT: + halADC[adcNum].Instance = ADC1; + break; + case ADC2_SLOT: + halADC[adcNum].Instance = ADC2; + break; + case ADC3_SLOT: + halADC[adcNum].Instance = ADC3; + break; + default: + return; // Should never get here } adc->Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2; adc->Init.Resolution = ADC_RESOLUTION_12B; @@ -128,36 +127,36 @@ void ADCf4xx::initADC(uint8_t num_channels) { adc->Init.EOCSelection = ADC_EOC_SEQ_CONV; switch (adcNum) { - case ADC1_SLOT: - __HAL_RCC_ADC1_CLK_ENABLE(); // todo check if this can go in the switch above. I dont see why not - break; - case ADC2_SLOT: - __HAL_RCC_ADC2_CLK_ENABLE(); - break; - case ADC3_SLOT: - __HAL_RCC_ADC3_CLK_ENABLE(); - break; - default: - return; // Should never get here + case ADC1_SLOT: + __HAL_RCC_ADC1_CLK_ENABLE(); // todo check if this can go in the switch above. I dont see why not + break; + case ADC2_SLOT: + __HAL_RCC_ADC2_CLK_ENABLE(); + break; + case ADC3_SLOT: + __HAL_RCC_ADC3_CLK_ENABLE(); + break; + default: + return; // Should never get here } HAL_ADC_Init(&halADC[adcNum]); } void ADCf4xx::initDMA() { - uint8_t adcNum = getADCNum(); + uint8_t adcNum = getADCNum(); DMA_HandleTypeDef* dma = &halDMA[adcNum]; switch (adcNum) { - case ADC1_SLOT: - dma->Instance = DMA2_Stream0; - break; - case ADC2_SLOT: - dma->Instance = DMA2_Stream1; - break; - case ADC3_SLOT: - dma->Instance = DMA2_Stream2; - break; - default: - return; // Should never get here + case ADC1_SLOT: + dma->Instance = DMA2_Stream0; + break; + case ADC2_SLOT: + dma->Instance = DMA2_Stream1; + break; + case ADC3_SLOT: + dma->Instance = DMA2_Stream2; + break; + default: + return; // Should never get here } dma->Init.Direction = DMA_PERIPH_TO_MEMORY; dma->Init.PeriphInc = DMA_PINC_DISABLE; @@ -179,8 +178,7 @@ void ADCf4xx::addChannel(uint8_t rank) { uint32_t channel; uint8_t adcNum = getADCNum(); - GPIOf4xx::gpioStateInit(&gpioInit, myPins, numOfPins, - GPIO_MODE_ANALOG, GPIO_NOPULL, GPIO_SPEED_FREQ_HIGH); + GPIOf4xx::gpioStateInit(&gpioInit, myPins, numOfPins, GPIO_MODE_ANALOG, GPIO_NOPULL, GPIO_SPEED_FREQ_HIGH); ADC_ChannelConfTypeDef adcChannel; @@ -245,7 +243,7 @@ void ADCf4xx::addChannel(uint8_t rank) { adcChannel.Channel = channel & 0x1F; } else { // Causes HARD FAULT if pin does not support the ADC peripheral being used - adcChannel.Channel = *((uint32_t *)0U); + adcChannel.Channel = *((uint32_t*) 0U); } // Subtract 1 because rank starts at 1 @@ -262,12 +260,12 @@ void ADCf4xx::addChannel(uint8_t rank) { inline bool ADCf4xx::checkSupport(ADCPeriph periph, uint32_t channel) { // Checks if the channel contains the bit signifying the proper ADC peripheral support switch (periph) { - case ADCPeriph::ONE: - return channel & (1 < ADC1SHIFT); - case ADCPeriph::TWO: - return channel & (1 < ADC2SHIFT); - case ADCPeriph::THREE: - return channel & (1 < ADC3SHIFT); + case ADCPeriph::ONE: + return channel & (1 < ADC1SHIFT); + case ADCPeriph::TWO: + return channel & (1 < ADC2SHIFT); + case ADCPeriph::THREE: + return channel & (1 < ADC3SHIFT); } } From 65e996860757c4155578565ce50200c5d3bf2fc9 Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Sat, 28 Sep 2024 14:44:38 -0400 Subject: [PATCH 09/98] Single ADC works for all 3. Multi not so much --- samples/adc/single_adc.cpp | 2 +- src/core/io/platform/f4xx/ADCf4xx.cpp | 16 +++++++++------- 2 files changed, 10 insertions(+), 8 deletions(-) diff --git a/samples/adc/single_adc.cpp b/samples/adc/single_adc.cpp index 72ad3304..879583a5 100644 --- a/samples/adc/single_adc.cpp +++ b/samples/adc/single_adc.cpp @@ -21,7 +21,7 @@ int main() { time::wait(500); - io::ADC& adc0 = io::getADC(); + io::ADC& adc0 = io::getADC(); while (1) { uart.printf("--------------------\r\n"); diff --git a/src/core/io/platform/f4xx/ADCf4xx.cpp b/src/core/io/platform/f4xx/ADCf4xx.cpp index 7ca90815..d620691e 100644 --- a/src/core/io/platform/f4xx/ADCf4xx.cpp +++ b/src/core/io/platform/f4xx/ADCf4xx.cpp @@ -81,8 +81,7 @@ float ADCf4xx::read() { } uint32_t ADCf4xx::readRaw() { - // Search through list of channels to determine which DMA buffer index to - // use + // Search through list of channels to determine which DMA buffer index to use uint8_t channelNum = 0; uint8_t adcNum = getADCNum(); while (channels[adcNum][channelNum] != pin) @@ -149,12 +148,15 @@ void ADCf4xx::initDMA() { switch (adcNum) { case ADC1_SLOT: dma->Instance = DMA2_Stream0; + dma->Init.Channel = DMA_CHANNEL_0; break; case ADC2_SLOT: - dma->Instance = DMA2_Stream1; + dma->Instance = DMA2_Stream2; + dma->Init.Channel = DMA_CHANNEL_1; break; case ADC3_SLOT: - dma->Instance = DMA2_Stream2; + dma->Instance = DMA2_Stream1; + dma->Init.Channel = DMA_CHANNEL_2; break; default: return; // Should never get here @@ -263,11 +265,11 @@ inline bool ADCf4xx::checkSupport(ADCPeriph periph, uint32_t channel) { // Checks if the channel contains the bit signifying the proper ADC peripheral support switch (periph) { case ADCPeriph::ONE: - return channel & (1 < ADC1SHIFT); + return channel & (1 << ADC1SHIFT); case ADCPeriph::TWO: - return channel & (1 < ADC2SHIFT); + return channel & (1 << ADC2SHIFT); case ADCPeriph::THREE: - return channel & (1 < ADC3SHIFT); + return channel & (1 << ADC3SHIFT); } } From e574c37d4f09f00bb65a4a7912f49ca114f149c9 Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Wed, 2 Oct 2024 22:59:06 -0400 Subject: [PATCH 10/98] Made it initializer list --- src/core/io/ADC.cpp | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/src/core/io/ADC.cpp b/src/core/io/ADC.cpp index d189cbda..ce2d0185 100644 --- a/src/core/io/ADC.cpp +++ b/src/core/io/ADC.cpp @@ -2,9 +2,6 @@ namespace core::io { -ADC::ADC(Pin pin, ADCPeriph adcPeriph) { - this->pin = pin; - this->adcPeriph = adcPeriph; -} +ADC::ADC(Pin pin, ADCPeriph adcPeriph) : pin(pin), adcPeriph(adcPeriph) { } } // namespace core::io From e4971e3050b7a4a8a12cf3c4ffbfb51533caaec3 Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Wed, 2 Oct 2024 23:02:01 -0400 Subject: [PATCH 11/98] Created struct to store each adc state information --- include/core/io/platform/f4xx/ADCf4xx.hpp | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/include/core/io/platform/f4xx/ADCf4xx.hpp b/include/core/io/platform/f4xx/ADCf4xx.hpp index a00cbf6b..7e030bbb 100644 --- a/include/core/io/platform/f4xx/ADCf4xx.hpp +++ b/include/core/io/platform/f4xx/ADCf4xx.hpp @@ -49,6 +49,17 @@ class ADCf4xx : public ADC { static uint16_t buffer[NUM_ADCS][MAX_CHANNELS]; static DMA_HandleTypeDef halDMA[NUM_ADCS]; + typedef struct ADC_State { + ADC_HandleTypeDef halADC; + uint8_t rank = 1; + bool isADCInit; + Pin channels[MAX_CHANNELS]; + uint16_t buffer[MAX_CHANNELS]; + DMA_HandleTypeDef halDMA; + } ADC_State_t; + + static ADC_State_t adcArray[NUM_ADCS]; + /** * Checks if the channel that is being initialized supports the ADC peripheral that it is being initialized on. * @param periph the ADC peripheral being used From 2771124161ebb839f0febf57d9b245c2961738b9 Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Wed, 2 Oct 2024 23:05:55 -0400 Subject: [PATCH 12/98] swapped over to using the struct. Still has old code, just commented out --- src/core/io/platform/f4xx/ADCf4xx.cpp | 83 +++++++++++++-------------- 1 file changed, 39 insertions(+), 44 deletions(-) diff --git a/src/core/io/platform/f4xx/ADCf4xx.cpp b/src/core/io/platform/f4xx/ADCf4xx.cpp index 24c44089..cd6cae82 100644 --- a/src/core/io/platform/f4xx/ADCf4xx.cpp +++ b/src/core/io/platform/f4xx/ADCf4xx.cpp @@ -32,46 +32,49 @@ namespace core::io { #define CHANNEL_SET(adc1, adc2, adc3, ch) (ch | (adc1 << ADC1SHIFT) | (adc2 << ADC2SHIFT) | (adc3 << ADC3SHIFT)) // Init static member variables -ADC_HandleTypeDef ADCf4xx::halADC[] = {{0}, {0}, {0}}; -Pin ADCf4xx::channels[NUM_ADCS][MAX_CHANNELS]; -uint16_t ADCf4xx::buffer[NUM_ADCS][MAX_CHANNELS]; -DMA_HandleTypeDef ADCf4xx::halDMA[] = {{0}, {0}, {0}}; +//ADC_HandleTypeDef ADCf4xx::halADC[] = {{0}, {0}, {0}}; +//Pin ADCf4xx::channels[NUM_ADCS][MAX_CHANNELS]; +//uint16_t ADCf4xx::buffer[NUM_ADCS][MAX_CHANNELS]; +//DMA_HandleTypeDef ADCf4xx::halDMA[] = {{0}, {0}, {0}}; + + +ADCf4xx::ADC_State_t ADCf4xx::adcArray[] = {{},{},{}}; ADCf4xx::ADCf4xx(Pin pin, ADCPeriph adcPeriph) : ADC(pin, adcPeriph) { // Flag representing if the ADC has been configured yet - static bool halADCisInit[] = {false, false, false}; +// static bool halADCisInit[] = {false, false, false}; // "Rank" represents the order in which the channels are added // Also represents the total number of added channels - static uint8_t rank[] = {1, 1, 1}; - - // Value of currently used ADC (For array access) - uint8_t adcNum = getADCNum(); +// static uint8_t rank[] = {1, 1, 1}; + ADCf4xx::ADC_State_t adc = adcArray[getADCNum()]; // Maximum number of ADC channels have already been added - if (rank[adcNum] == MAX_CHANNELS) { + if (adc.rank == MAX_CHANNELS) { // old 'rank[adcNum] == MAX_CHANNELS' return; } // Initialization of each HAL ADC should only take place once since // each individual ADC has multiple channels supported - if (halADCisInit[adcNum]) { - HAL_ADC_Stop_DMA(&halADC[adcNum]); - HAL_DMA_DeInit(&halDMA[adcNum]); + if (adc.isADCInit) { // old 'isADCInit[adcNum]' + HAL_ADC_Stop_DMA(&adc.halADC); // old '&halADC[adcNum]' + HAL_DMA_DeInit(&adc.halDMA); // old '&halDMA[adcNum]' } else { __HAL_RCC_DMA2_CLK_ENABLE(); - halADCisInit[adcNum] = true; + adc.isADCInit = true; // old 'isADCInit[adcNum]' } - addChannel(rank[adcNum]); + addChannel(adc.rank); // old 'rank[adcNum]' - initADC(rank[adcNum]); + initADC(adc.rank); // old 'rank[adcNum]' initDMA(); - HAL_ADC_Start_DMA(&halADC[adcNum], reinterpret_cast(&buffer[adcNum][0]), rank[adcNum]); // todo: check +// HAL_ADC_Start_DMA(&halADC[adcNum], reinterpret_cast(&buffer[adcNum][0]), rank[adcNum]); + HAL_ADC_Start_DMA(&adc.halADC, reinterpret_cast(&adc.buffer[0]), adc.rank); - rank[adcNum]++; + // rank[adcNum]++; + adc.rank++; } float ADCf4xx::read() { @@ -83,10 +86,10 @@ uint32_t ADCf4xx::readRaw() { // Search through list of channels to determine which DMA buffer index to // use uint8_t channelNum = 0; - uint8_t adcNum = getADCNum(); - while (channels[adcNum][channelNum] != pin) + ADCf4xx::ADC_State_t adcState = adcArray[getADCNum()]; + while (adcState.channels[channelNum] != pin) channelNum++; - return buffer[adcNum][channelNum]; + return adcState.buffer[channelNum]; } float ADCf4xx::readPercentage() { @@ -98,22 +101,9 @@ void ADCf4xx::initADC(uint8_t num_channels) { /** Configure the global features of the ADC (Clock, Resolution, Data * Alignment and number of conversion) */ - uint8_t adcNum = getADCNum(); - ADC_HandleTypeDef* adc = &halADC[adcNum]; + ADCf4xx::ADC_State_t adcState = adcArray[getADCNum()]; + ADC_HandleTypeDef* adc = &adcState.halADC; // Set instance to the ADC peripheral being using - switch (adcNum) { - case ADC1_SLOT: - halADC[adcNum].Instance = ADC1; - break; - case ADC2_SLOT: - halADC[adcNum].Instance = ADC2; - break; - case ADC3_SLOT: - halADC[adcNum].Instance = ADC3; - break; - default: - return; // Should never get here - } adc->Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2; adc->Init.Resolution = ADC_RESOLUTION_12B; adc->Init.ScanConvMode = ENABLE; @@ -126,25 +116,29 @@ void ADCf4xx::initADC(uint8_t num_channels) { adc->Init.DMAContinuousRequests = ENABLE; adc->Init.EOCSelection = ADC_EOC_SEQ_CONV; - switch (adcNum) { + switch (getADCNum()) { case ADC1_SLOT: - __HAL_RCC_ADC1_CLK_ENABLE(); // todo check if this can go in the switch above. I dont see why not + adc->Instance = ADC1; + __HAL_RCC_ADC1_CLK_ENABLE(); break; case ADC2_SLOT: + adc->Instance = ADC2; __HAL_RCC_ADC2_CLK_ENABLE(); break; case ADC3_SLOT: + adc->Instance = ADC3; __HAL_RCC_ADC3_CLK_ENABLE(); break; default: return; // Should never get here } - HAL_ADC_Init(&halADC[adcNum]); + HAL_ADC_Init(adc); } void ADCf4xx::initDMA() { - uint8_t adcNum = getADCNum(); - DMA_HandleTypeDef* dma = &halDMA[adcNum]; + uint8_t adcNum = getADCNum(); + ADCf4xx::ADC_State_t adcState = adcArray[adcNum]; + DMA_HandleTypeDef * dma = &adcState.halDMA; switch (adcNum) { case ADC1_SLOT: dma->Instance = DMA2_Stream0; @@ -171,7 +165,7 @@ void ADCf4xx::initDMA() { dma->Init.FIFOMode = DMA_FIFOMODE_DISABLE; HAL_DMA_Init(dma); - __HAL_LINKDMA(&halADC[adcNum], DMA_Handle, *dma); + __HAL_LINKDMA(&adcState.halADC, DMA_Handle, *dma); } void ADCf4xx::addChannel(uint8_t rank) { @@ -180,6 +174,7 @@ void ADCf4xx::addChannel(uint8_t rank) { uint8_t numOfPins = 1; uint32_t channel; uint8_t adcNum = getADCNum(); + ADCf4xx::ADC_State_t adcState = adcArray[adcNum]; GPIOf4xx::gpioStateInit(&gpioInit, myPins, numOfPins, GPIO_MODE_ANALOG, GPIO_NOPULL, GPIO_SPEED_FREQ_HIGH); @@ -245,7 +240,7 @@ void ADCf4xx::addChannel(uint8_t rank) { // Masks channel back to proper value (Zero's out ADC information bits) adcChannel.Channel = channel & 0x1F; } else { - // Causes HARD FAULT if pin does not support the ADC peripheral being used + // Causes HARD FAULT if pin does not support the ADC peripheral being used. THIS IS INTENTIONAL! adcChannel.Channel = *((uint32_t*) 0U); } @@ -257,7 +252,7 @@ void ADCf4xx::addChannel(uint8_t rank) { adcChannel.Offset = 0; adcChannel.Offset = 0x000; - HAL_ADC_ConfigChannel(&halADC[adcNum], &adcChannel); + HAL_ADC_ConfigChannel(&adcState.halADC, &adcChannel); } inline bool ADCf4xx::checkSupport(ADCPeriph periph, uint32_t channel) { From 72a569deb31d529c877effb8084cf8b51c04b1dd Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Sat, 5 Oct 2024 12:27:26 -0400 Subject: [PATCH 13/98] added dummy pin so that the pin array isnt initialized to all PA_0. --- include/core/io/pin.hpp | 1 + 1 file changed, 1 insertion(+) diff --git a/include/core/io/pin.hpp b/include/core/io/pin.hpp index 251e0472..62914798 100644 --- a/include/core/io/pin.hpp +++ b/include/core/io/pin.hpp @@ -14,6 +14,7 @@ namespace core::io { * these values. */ enum class Pin { + DUMMY = -1, // THIS INTENTIONALLY DOES NOT POINT TO A PIN PA_0 = 0x00, PA_1 = 0x01, PA_2 = 0x02, From 80fd5206d2cfb04f2487d8468a84428101ec5239 Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Sat, 5 Oct 2024 12:27:57 -0400 Subject: [PATCH 14/98] Testing alterations to multiadc sample. will be reverted when im done --- samples/adc/multi_adc.cpp | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/samples/adc/multi_adc.cpp b/samples/adc/multi_adc.cpp index 70dffcee..3adeac0b 100644 --- a/samples/adc/multi_adc.cpp +++ b/samples/adc/multi_adc.cpp @@ -21,8 +21,10 @@ int main() { time::wait(500); - io::ADC& adc0 = io::getADC(); - io::ADC& adc1 = io::getADC(); + io::ADC& adc0 = io::getADC(); + uart.printf("ONE WORKING\r\n"); +// io::ADC& adc1 = io::getADC(); + uart.printf("TWO WORKING\r\n"); while (1) { uart.printf("--------------------\r\n"); @@ -30,9 +32,9 @@ int main() { uart.printf("ADC0: %d%%\r\n", static_cast(adc0.readPercentage() * 100)); uart.printf("ADC0 raw: %d\r\n\r\n", adc0.readRaw()); - uart.printf("ADC1 : %d mV\r\n", static_cast(adc1.read() * 1000)); - uart.printf("ADC1: %d%%\r\n", static_cast(adc1.readPercentage() * 100)); - uart.printf("ADC1 raw: %d\r\n", adc1.readRaw()); +// uart.printf("ADC1 : %d mV\r\n", static_cast(adc1.read() * 1000)); +// uart.printf("ADC1: %d%%\r\n", static_cast(adc1.readPercentage() * 100)); +// uart.printf("ADC1 raw: %d\r\n", adc1.readRaw()); uart.printf("--------------------\r\n\r\n"); time::wait(500); } From ebcb3cec5f081b8058854ab898b57694ab40cc5c Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Sat, 5 Oct 2024 12:28:31 -0400 Subject: [PATCH 15/98] added default values to the typedef struct. also am testing using 1 rank var and 1 buffer --- include/core/io/platform/f4xx/ADCf4xx.hpp | 23 +++++++++++++---------- 1 file changed, 13 insertions(+), 10 deletions(-) diff --git a/include/core/io/platform/f4xx/ADCf4xx.hpp b/include/core/io/platform/f4xx/ADCf4xx.hpp index 7e030bbb..ee602cdd 100644 --- a/include/core/io/platform/f4xx/ADCf4xx.hpp +++ b/include/core/io/platform/f4xx/ADCf4xx.hpp @@ -42,20 +42,23 @@ class ADCf4xx : public ADC { /// supports multiple channels, so I made this one only use a single ADC. /// The F446re has 3 12 bit ADC's. Currently not able to use the other 2. /// The ADC will be initialized once then each channel will be added on. - static ADC_HandleTypeDef halADC[NUM_ADCS]; +// static ADC_HandleTypeDef halADC[NUM_ADCS]; /// Static list of all channels supported by the ADC - static Pin channels[NUM_ADCS][MAX_CHANNELS]; +// static Pin channels[NUM_ADCS][MAX_CHANNELS]; /// Buffer for DMA where each spot represents the value read in from a channel - static uint16_t buffer[NUM_ADCS][MAX_CHANNELS]; - static DMA_HandleTypeDef halDMA[NUM_ADCS]; - + static uint16_t buffer[MAX_CHANNELS]; +// static DMA_HandleTypeDef halDMA[NUM_ADCS]; + static uint8_t rank; typedef struct ADC_State { - ADC_HandleTypeDef halADC; + ADC_HandleTypeDef halADC = {0}; uint8_t rank = 1; - bool isADCInit; - Pin channels[MAX_CHANNELS]; - uint16_t buffer[MAX_CHANNELS]; - DMA_HandleTypeDef halDMA; + bool isADCInit = false; + Pin channels[MAX_CHANNELS] = {Pin::DUMMY, Pin::DUMMY, Pin::DUMMY, Pin::DUMMY, + Pin::DUMMY, Pin::DUMMY, Pin::DUMMY, Pin::DUMMY, + Pin::DUMMY, Pin::DUMMY, Pin::DUMMY, Pin::DUMMY, + Pin::DUMMY, Pin::DUMMY, Pin::DUMMY, Pin::DUMMY}; +// uint16_t buffer[MAX_CHANNELS] = {0}; + DMA_HandleTypeDef halDMA = {0}; } ADC_State_t; static ADC_State_t adcArray[NUM_ADCS]; From 97d8d79e1abbe5a36be882c8b546d99090274b9e Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Sat, 5 Oct 2024 12:28:44 -0400 Subject: [PATCH 16/98] Trying to make it work... --- src/core/io/platform/f4xx/ADCf4xx.cpp | 99 ++++++++++++--------------- 1 file changed, 45 insertions(+), 54 deletions(-) diff --git a/src/core/io/platform/f4xx/ADCf4xx.cpp b/src/core/io/platform/f4xx/ADCf4xx.cpp index cd6cae82..32cd58f8 100644 --- a/src/core/io/platform/f4xx/ADCf4xx.cpp +++ b/src/core/io/platform/f4xx/ADCf4xx.cpp @@ -31,50 +31,42 @@ namespace core::io { // Combines the channel memory value with the ADC peripherals it supports into one uint32_t #define CHANNEL_SET(adc1, adc2, adc3, ch) (ch | (adc1 << ADC1SHIFT) | (adc2 << ADC2SHIFT) | (adc3 << ADC3SHIFT)) -// Init static member variables -//ADC_HandleTypeDef ADCf4xx::halADC[] = {{0}, {0}, {0}}; -//Pin ADCf4xx::channels[NUM_ADCS][MAX_CHANNELS]; -//uint16_t ADCf4xx::buffer[NUM_ADCS][MAX_CHANNELS]; -//DMA_HandleTypeDef ADCf4xx::halDMA[] = {{0}, {0}, {0}}; - - -ADCf4xx::ADC_State_t ADCf4xx::adcArray[] = {{},{},{}}; +ADCf4xx::ADC_State_t ADCf4xx::adcArray[3]; +uint8_t ADCf4xx::rank = 1; +uint16_t ADCf4xx::buffer[] = {0}; ADCf4xx::ADCf4xx(Pin pin, ADCPeriph adcPeriph) : ADC(pin, adcPeriph) { - // Flag representing if the ADC has been configured yet -// static bool halADCisInit[] = {false, false, false}; - // "Rank" represents the order in which the channels are added - // Also represents the total number of added channels -// static uint8_t rank[] = {1, 1, 1}; - ADCf4xx::ADC_State_t adc = adcArray[getADCNum()]; + ADCf4xx::ADC_State_t* adcState = &adcArray[getADCNum()]; // Maximum number of ADC channels have already been added - if (adc.rank == MAX_CHANNELS) { // old 'rank[adcNum] == MAX_CHANNELS' +// if (adcState->rank == MAX_CHANNELS) { + if (rank == MAX_CHANNELS) { return; } // Initialization of each HAL ADC should only take place once since // each individual ADC has multiple channels supported - if (adc.isADCInit) { // old 'isADCInit[adcNum]' - HAL_ADC_Stop_DMA(&adc.halADC); // old '&halADC[adcNum]' - HAL_DMA_DeInit(&adc.halDMA); // old '&halDMA[adcNum]' + if (adcState->isADCInit) { + HAL_ADC_Stop_DMA(&adcState->halADC); + HAL_DMA_DeInit(&adcState->halDMA); } else { __HAL_RCC_DMA2_CLK_ENABLE(); - adc.isADCInit = true; // old 'isADCInit[adcNum]' + adcState->isADCInit = true; } - addChannel(adc.rank); // old 'rank[adcNum]' - - initADC(adc.rank); // old 'rank[adcNum]' +// addChannel(adcState->rank); + addChannel(rank); +// initADC(adcState->rank); + initADC(rank); initDMA(); -// HAL_ADC_Start_DMA(&halADC[adcNum], reinterpret_cast(&buffer[adcNum][0]), rank[adcNum]); - HAL_ADC_Start_DMA(&adc.halADC, reinterpret_cast(&adc.buffer[0]), adc.rank); +// HAL_ADC_Start_DMA(&adcState->halADC, reinterpret_cast(&adcState->buffer[0]), adcState->rank); + HAL_ADC_Start_DMA(&adcState->halADC, reinterpret_cast(&buffer[0]), rank); - // rank[adcNum]++; - adc.rank++; +// adcState->rank++; + rank++; } float ADCf4xx::read() { @@ -86,10 +78,10 @@ uint32_t ADCf4xx::readRaw() { // Search through list of channels to determine which DMA buffer index to // use uint8_t channelNum = 0; - ADCf4xx::ADC_State_t adcState = adcArray[getADCNum()]; - while (adcState.channels[channelNum] != pin) + ADCf4xx::ADC_State_t* adcState = &adcArray[getADCNum()]; + while (adcState->channels[channelNum] != pin) channelNum++; - return adcState.buffer[channelNum]; + return buffer[channelNum]; } float ADCf4xx::readPercentage() { @@ -101,44 +93,44 @@ void ADCf4xx::initADC(uint8_t num_channels) { /** Configure the global features of the ADC (Clock, Resolution, Data * Alignment and number of conversion) */ - ADCf4xx::ADC_State_t adcState = adcArray[getADCNum()]; - ADC_HandleTypeDef* adc = &adcState.halADC; + ADCf4xx::ADC_State_t* adcState = &adcArray[getADCNum()]; + ADC_HandleTypeDef* halADC = &adcState->halADC; // Set instance to the ADC peripheral being using - adc->Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2; - adc->Init.Resolution = ADC_RESOLUTION_12B; - adc->Init.ScanConvMode = ENABLE; - adc->Init.ContinuousConvMode = ENABLE; - adc->Init.DiscontinuousConvMode = DISABLE; - adc->Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; - adc->Init.ExternalTrigConv = ADC_SOFTWARE_START; - adc->Init.DataAlign = ADC_DATAALIGN_RIGHT; - adc->Init.NbrOfConversion = num_channels; - adc->Init.DMAContinuousRequests = ENABLE; - adc->Init.EOCSelection = ADC_EOC_SEQ_CONV; + halADC->Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2; + halADC->Init.Resolution = ADC_RESOLUTION_12B; + halADC->Init.ScanConvMode = ENABLE; + halADC->Init.ContinuousConvMode = ENABLE; + halADC->Init.DiscontinuousConvMode = DISABLE; + halADC->Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + halADC->Init.ExternalTrigConv = ADC_SOFTWARE_START; + halADC->Init.DataAlign = ADC_DATAALIGN_RIGHT; + halADC->Init.NbrOfConversion = num_channels; + halADC->Init.DMAContinuousRequests = ENABLE; + halADC->Init.EOCSelection = ADC_EOC_SEQ_CONV; switch (getADCNum()) { case ADC1_SLOT: - adc->Instance = ADC1; + halADC->Instance = ADC1; __HAL_RCC_ADC1_CLK_ENABLE(); break; case ADC2_SLOT: - adc->Instance = ADC2; + halADC->Instance = ADC2; __HAL_RCC_ADC2_CLK_ENABLE(); break; case ADC3_SLOT: - adc->Instance = ADC3; + halADC->Instance = ADC3; __HAL_RCC_ADC3_CLK_ENABLE(); break; default: return; // Should never get here } - HAL_ADC_Init(adc); + HAL_ADC_Init(halADC); } void ADCf4xx::initDMA() { uint8_t adcNum = getADCNum(); - ADCf4xx::ADC_State_t adcState = adcArray[adcNum]; - DMA_HandleTypeDef * dma = &adcState.halDMA; + ADCf4xx::ADC_State_t* adcState = &adcArray[adcNum]; + DMA_HandleTypeDef* dma = &adcState->halDMA; switch (adcNum) { case ADC1_SLOT: dma->Instance = DMA2_Stream0; @@ -165,16 +157,15 @@ void ADCf4xx::initDMA() { dma->Init.FIFOMode = DMA_FIFOMODE_DISABLE; HAL_DMA_Init(dma); - __HAL_LINKDMA(&adcState.halADC, DMA_Handle, *dma); + __HAL_LINKDMA(&adcState->halADC, DMA_Handle, *dma); } void ADCf4xx::addChannel(uint8_t rank) { GPIO_InitTypeDef gpioInit; - Pin myPins[] = {pin}; uint8_t numOfPins = 1; uint32_t channel; - uint8_t adcNum = getADCNum(); - ADCf4xx::ADC_State_t adcState = adcArray[adcNum]; + Pin myPins[] = {pin}; + ADCf4xx::ADC_State_t* adcState = &adcArray[getADCNum()]; GPIOf4xx::gpioStateInit(&gpioInit, myPins, numOfPins, GPIO_MODE_ANALOG, GPIO_NOPULL, GPIO_SPEED_FREQ_HIGH); @@ -245,14 +236,14 @@ void ADCf4xx::addChannel(uint8_t rank) { } // Subtract 1 because rank starts at 1 - channels[adcNum][rank - 1] = pin; + adcState->channels[rank - 1] = pin; adcChannel.Rank = rank; adcChannel.SamplingTime = ADC_SAMPLETIME_480CYCLES; adcChannel.Offset = 0; adcChannel.Offset = 0x000; - HAL_ADC_ConfigChannel(&adcState.halADC, &adcChannel); + HAL_ADC_ConfigChannel(&adcState->halADC, &adcChannel); } inline bool ADCf4xx::checkSupport(ADCPeriph periph, uint32_t channel) { From bde81b0fadc65eaab3d8833f864e9e1ae4b4d86a Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Sat, 19 Oct 2024 14:07:37 -0400 Subject: [PATCH 17/98] Single adc works with single channel... Multi adc works, BUT only if its one 1 channel per adc --- samples/adc/multi_adc.cpp | 10 ++++---- samples/adc/single_adc.cpp | 2 +- src/core/io/platform/f4xx/ADCf4xx.cpp | 33 ++++++++++++--------------- 3 files changed, 20 insertions(+), 25 deletions(-) diff --git a/samples/adc/multi_adc.cpp b/samples/adc/multi_adc.cpp index 3adeac0b..c7044d8f 100644 --- a/samples/adc/multi_adc.cpp +++ b/samples/adc/multi_adc.cpp @@ -21,9 +21,9 @@ int main() { time::wait(500); - io::ADC& adc0 = io::getADC(); + io::ADC& adc0 = io::getADC(); uart.printf("ONE WORKING\r\n"); -// io::ADC& adc1 = io::getADC(); + io::ADC& adc1 = io::getADC(); uart.printf("TWO WORKING\r\n"); while (1) { @@ -32,9 +32,9 @@ int main() { uart.printf("ADC0: %d%%\r\n", static_cast(adc0.readPercentage() * 100)); uart.printf("ADC0 raw: %d\r\n\r\n", adc0.readRaw()); -// uart.printf("ADC1 : %d mV\r\n", static_cast(adc1.read() * 1000)); -// uart.printf("ADC1: %d%%\r\n", static_cast(adc1.readPercentage() * 100)); -// uart.printf("ADC1 raw: %d\r\n", adc1.readRaw()); + uart.printf("ADC1 : %d mV\r\n", static_cast(adc1.read() * 1000)); + uart.printf("ADC1: %d%%\r\n", static_cast(adc1.readPercentage() * 100)); + uart.printf("ADC1 raw: %d\r\n", adc1.readRaw()); uart.printf("--------------------\r\n\r\n"); time::wait(500); } diff --git a/samples/adc/single_adc.cpp b/samples/adc/single_adc.cpp index 879583a5..65eb3b9e 100644 --- a/samples/adc/single_adc.cpp +++ b/samples/adc/single_adc.cpp @@ -21,7 +21,7 @@ int main() { time::wait(500); - io::ADC& adc0 = io::getADC(); + io::ADC& adc0 = io::getADC(); while (1) { uart.printf("--------------------\r\n"); diff --git a/src/core/io/platform/f4xx/ADCf4xx.cpp b/src/core/io/platform/f4xx/ADCf4xx.cpp index 32cd58f8..7a905377 100644 --- a/src/core/io/platform/f4xx/ADCf4xx.cpp +++ b/src/core/io/platform/f4xx/ADCf4xx.cpp @@ -45,26 +45,16 @@ ADCf4xx::ADCf4xx(Pin pin, ADCPeriph adcPeriph) : ADC(pin, adcPeriph) { return; } - // Initialization of each HAL ADC should only take place once since - // each individual ADC has multiple channels supported - if (adcState->isADCInit) { - HAL_ADC_Stop_DMA(&adcState->halADC); - HAL_DMA_DeInit(&adcState->halDMA); - } else { - __HAL_RCC_DMA2_CLK_ENABLE(); - adcState->isADCInit = true; - } - + initADC(rank); // addChannel(adcState->rank); addChannel(rank); // initADC(adcState->rank); - initADC(rank); - initDMA(); +// initDMA(); // HAL_ADC_Start_DMA(&adcState->halADC, reinterpret_cast(&adcState->buffer[0]), adcState->rank); - HAL_ADC_Start_DMA(&adcState->halADC, reinterpret_cast(&buffer[0]), rank); - +// HAL_ADC_Start_DMA(&adcState->halADC, reinterpret_cast(&buffer[0]), rank); + HAL_ADC_Start(&adcState->halADC); // adcState->rank++; rank++; } @@ -79,9 +69,14 @@ uint32_t ADCf4xx::readRaw() { // use uint8_t channelNum = 0; ADCf4xx::ADC_State_t* adcState = &adcArray[getADCNum()]; - while (adcState->channels[channelNum] != pin) - channelNum++; - return buffer[channelNum]; + + HAL_ADC_PollForConversion(&adcState->halADC, HAL_MAX_DELAY); + return HAL_ADC_GetValue(&adcState->halADC); + +// while (adcState->channels[channelNum] != pin) +// channelNum++; +// +// return buffer[channelNum]; } float ADCf4xx::readPercentage() { @@ -105,7 +100,7 @@ void ADCf4xx::initADC(uint8_t num_channels) { halADC->Init.ExternalTrigConv = ADC_SOFTWARE_START; halADC->Init.DataAlign = ADC_DATAALIGN_RIGHT; halADC->Init.NbrOfConversion = num_channels; - halADC->Init.DMAContinuousRequests = ENABLE; + halADC->Init.DMAContinuousRequests = DISABLE; halADC->Init.EOCSelection = ADC_EOC_SEQ_CONV; switch (getADCNum()) { @@ -239,7 +234,7 @@ void ADCf4xx::addChannel(uint8_t rank) { adcState->channels[rank - 1] = pin; adcChannel.Rank = rank; - adcChannel.SamplingTime = ADC_SAMPLETIME_480CYCLES; + adcChannel.SamplingTime = ADC_SAMPLETIME_3CYCLES; adcChannel.Offset = 0; adcChannel.Offset = 0x000; From c08692b792daed28d2c9100bd0a30994633360e4 Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Mon, 21 Oct 2024 19:41:32 -0400 Subject: [PATCH 18/98] MULTI & SINGLE WORK WITH 1 CHANNEL PER ADC --- src/core/io/platform/f4xx/ADCf4xx.cpp | 17 ----------------- 1 file changed, 17 deletions(-) diff --git a/src/core/io/platform/f4xx/ADCf4xx.cpp b/src/core/io/platform/f4xx/ADCf4xx.cpp index 7a905377..0ab37a74 100644 --- a/src/core/io/platform/f4xx/ADCf4xx.cpp +++ b/src/core/io/platform/f4xx/ADCf4xx.cpp @@ -39,23 +39,14 @@ ADCf4xx::ADCf4xx(Pin pin, ADCPeriph adcPeriph) : ADC(pin, adcPeriph) { ADCf4xx::ADC_State_t* adcState = &adcArray[getADCNum()]; - // Maximum number of ADC channels have already been added -// if (adcState->rank == MAX_CHANNELS) { if (rank == MAX_CHANNELS) { return; } initADC(rank); -// addChannel(adcState->rank); addChannel(rank); -// initADC(adcState->rank); -// initDMA(); - -// HAL_ADC_Start_DMA(&adcState->halADC, reinterpret_cast(&adcState->buffer[0]), adcState->rank); -// HAL_ADC_Start_DMA(&adcState->halADC, reinterpret_cast(&buffer[0]), rank); HAL_ADC_Start(&adcState->halADC); -// adcState->rank++; rank++; } @@ -65,18 +56,10 @@ float ADCf4xx::read() { } uint32_t ADCf4xx::readRaw() { - // Search through list of channels to determine which DMA buffer index to - // use - uint8_t channelNum = 0; ADCf4xx::ADC_State_t* adcState = &adcArray[getADCNum()]; HAL_ADC_PollForConversion(&adcState->halADC, HAL_MAX_DELAY); return HAL_ADC_GetValue(&adcState->halADC); - -// while (adcState->channels[channelNum] != pin) -// channelNum++; -// -// return buffer[channelNum]; } float ADCf4xx::readPercentage() { From c9b4dbf98ba9823e891d86bf99cd199ff02402a5 Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Mon, 21 Oct 2024 19:51:13 -0400 Subject: [PATCH 19/98] so it will build on github --- samples/adc/multi_adc.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/samples/adc/multi_adc.cpp b/samples/adc/multi_adc.cpp index c7044d8f..48ba862b 100644 --- a/samples/adc/multi_adc.cpp +++ b/samples/adc/multi_adc.cpp @@ -23,7 +23,7 @@ int main() { io::ADC& adc0 = io::getADC(); uart.printf("ONE WORKING\r\n"); - io::ADC& adc1 = io::getADC(); + io::ADC& adc1 = io::getADC(); uart.printf("TWO WORKING\r\n"); while (1) { From ff878a11f80957fb18efaeb2a88f79a395899bda Mon Sep 17 00:00:00 2001 From: GitHub Build Date: Mon, 21 Oct 2024 23:52:34 +0000 Subject: [PATCH 20/98] Applied Formatting Changes During GitHub Build --- include/core/io/platform/f4xx/ADCf4xx.hpp | 36 ++++++++++++++------- samples/adc/multi_adc.cpp | 2 +- src/core/io/ADC.cpp | 2 +- src/core/io/platform/f4xx/ADCf4xx.cpp | 38 +++++++++++------------ 4 files changed, 45 insertions(+), 33 deletions(-) diff --git a/include/core/io/platform/f4xx/ADCf4xx.hpp b/include/core/io/platform/f4xx/ADCf4xx.hpp index ee602cdd..7df5edbc 100644 --- a/include/core/io/platform/f4xx/ADCf4xx.hpp +++ b/include/core/io/platform/f4xx/ADCf4xx.hpp @@ -42,22 +42,34 @@ class ADCf4xx : public ADC { /// supports multiple channels, so I made this one only use a single ADC. /// The F446re has 3 12 bit ADC's. Currently not able to use the other 2. /// The ADC will be initialized once then each channel will be added on. -// static ADC_HandleTypeDef halADC[NUM_ADCS]; + // static ADC_HandleTypeDef halADC[NUM_ADCS]; /// Static list of all channels supported by the ADC -// static Pin channels[NUM_ADCS][MAX_CHANNELS]; + // static Pin channels[NUM_ADCS][MAX_CHANNELS]; /// Buffer for DMA where each spot represents the value read in from a channel static uint16_t buffer[MAX_CHANNELS]; -// static DMA_HandleTypeDef halDMA[NUM_ADCS]; - static uint8_t rank; + // static DMA_HandleTypeDef halDMA[NUM_ADCS]; + static uint8_t rank; typedef struct ADC_State { - ADC_HandleTypeDef halADC = {0}; - uint8_t rank = 1; - bool isADCInit = false; - Pin channels[MAX_CHANNELS] = {Pin::DUMMY, Pin::DUMMY, Pin::DUMMY, Pin::DUMMY, - Pin::DUMMY, Pin::DUMMY, Pin::DUMMY, Pin::DUMMY, - Pin::DUMMY, Pin::DUMMY, Pin::DUMMY, Pin::DUMMY, - Pin::DUMMY, Pin::DUMMY, Pin::DUMMY, Pin::DUMMY}; -// uint16_t buffer[MAX_CHANNELS] = {0}; + ADC_HandleTypeDef halADC = {0}; + uint8_t rank = 1; + bool isADCInit = false; + Pin channels[MAX_CHANNELS] = {Pin::DUMMY, + Pin::DUMMY, + Pin::DUMMY, + Pin::DUMMY, + Pin::DUMMY, + Pin::DUMMY, + Pin::DUMMY, + Pin::DUMMY, + Pin::DUMMY, + Pin::DUMMY, + Pin::DUMMY, + Pin::DUMMY, + Pin::DUMMY, + Pin::DUMMY, + Pin::DUMMY, + Pin::DUMMY}; + // uint16_t buffer[MAX_CHANNELS] = {0}; DMA_HandleTypeDef halDMA = {0}; } ADC_State_t; diff --git a/samples/adc/multi_adc.cpp b/samples/adc/multi_adc.cpp index 48ba862b..dc4d7e2a 100644 --- a/samples/adc/multi_adc.cpp +++ b/samples/adc/multi_adc.cpp @@ -21,7 +21,7 @@ int main() { time::wait(500); - io::ADC& adc0 = io::getADC(); + io::ADC& adc0 = io::getADC(); uart.printf("ONE WORKING\r\n"); io::ADC& adc1 = io::getADC(); uart.printf("TWO WORKING\r\n"); diff --git a/src/core/io/ADC.cpp b/src/core/io/ADC.cpp index ce2d0185..a58918cf 100644 --- a/src/core/io/ADC.cpp +++ b/src/core/io/ADC.cpp @@ -2,6 +2,6 @@ namespace core::io { -ADC::ADC(Pin pin, ADCPeriph adcPeriph) : pin(pin), adcPeriph(adcPeriph) { } +ADC::ADC(Pin pin, ADCPeriph adcPeriph) : pin(pin), adcPeriph(adcPeriph) {} } // namespace core::io diff --git a/src/core/io/platform/f4xx/ADCf4xx.cpp b/src/core/io/platform/f4xx/ADCf4xx.cpp index 0ab37a74..0e267dcb 100644 --- a/src/core/io/platform/f4xx/ADCf4xx.cpp +++ b/src/core/io/platform/f4xx/ADCf4xx.cpp @@ -32,7 +32,7 @@ namespace core::io { #define CHANNEL_SET(adc1, adc2, adc3, ch) (ch | (adc1 << ADC1SHIFT) | (adc2 << ADC2SHIFT) | (adc3 << ADC3SHIFT)) ADCf4xx::ADC_State_t ADCf4xx::adcArray[3]; -uint8_t ADCf4xx::rank = 1; +uint8_t ADCf4xx::rank = 1; uint16_t ADCf4xx::buffer[] = {0}; ADCf4xx::ADCf4xx(Pin pin, ADCPeriph adcPeriph) : ADC(pin, adcPeriph) { @@ -72,7 +72,7 @@ void ADCf4xx::initADC(uint8_t num_channels) { * Alignment and number of conversion) */ ADCf4xx::ADC_State_t* adcState = &adcArray[getADCNum()]; - ADC_HandleTypeDef* halADC = &adcState->halADC; + ADC_HandleTypeDef* halADC = &adcState->halADC; // Set instance to the ADC peripheral being using halADC->Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2; halADC->Init.Resolution = ADC_RESOLUTION_12B; @@ -106,24 +106,24 @@ void ADCf4xx::initADC(uint8_t num_channels) { } void ADCf4xx::initDMA() { - uint8_t adcNum = getADCNum(); + uint8_t adcNum = getADCNum(); ADCf4xx::ADC_State_t* adcState = &adcArray[adcNum]; - DMA_HandleTypeDef* dma = &adcState->halDMA; + DMA_HandleTypeDef* dma = &adcState->halDMA; switch (adcNum) { - case ADC1_SLOT: - dma->Instance = DMA2_Stream0; - dma->Init.Channel = DMA_CHANNEL_0; - break; - case ADC2_SLOT: - dma->Instance = DMA2_Stream2; - dma->Init.Channel = DMA_CHANNEL_1; - break; - case ADC3_SLOT: - dma->Instance = DMA2_Stream1; - dma->Init.Channel = DMA_CHANNEL_2; - break; - default: - return; // Should never get here + case ADC1_SLOT: + dma->Instance = DMA2_Stream0; + dma->Init.Channel = DMA_CHANNEL_0; + break; + case ADC2_SLOT: + dma->Instance = DMA2_Stream2; + dma->Init.Channel = DMA_CHANNEL_1; + break; + case ADC3_SLOT: + dma->Instance = DMA2_Stream1; + dma->Init.Channel = DMA_CHANNEL_2; + break; + default: + return; // Should never get here } dma->Init.Direction = DMA_PERIPH_TO_MEMORY; dma->Init.PeriphInc = DMA_PINC_DISABLE; @@ -142,7 +142,7 @@ void ADCf4xx::addChannel(uint8_t rank) { GPIO_InitTypeDef gpioInit; uint8_t numOfPins = 1; uint32_t channel; - Pin myPins[] = {pin}; + Pin myPins[] = {pin}; ADCf4xx::ADC_State_t* adcState = &adcArray[getADCNum()]; GPIOf4xx::gpioStateInit(&gpioInit, myPins, numOfPins, GPIO_MODE_ANALOG, GPIO_NOPULL, GPIO_SPEED_FREQ_HIGH); From 3e1ec95e24f243ebf7b4cbe342df5d846962542e Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Mon, 28 Oct 2024 21:02:07 -0400 Subject: [PATCH 21/98] CubeIDE certified code... Doesnt work. but progress towards DMA Multi ADC --- include/core/io/platform/f4xx/ADCf4xx.hpp | 11 ++- src/core/io/platform/f4xx/ADCf4xx.cpp | 102 ++++++++++++++++++---- 2 files changed, 94 insertions(+), 19 deletions(-) diff --git a/include/core/io/platform/f4xx/ADCf4xx.hpp b/include/core/io/platform/f4xx/ADCf4xx.hpp index ee602cdd..b3c186ca 100644 --- a/include/core/io/platform/f4xx/ADCf4xx.hpp +++ b/include/core/io/platform/f4xx/ADCf4xx.hpp @@ -46,9 +46,12 @@ class ADCf4xx : public ADC { /// Static list of all channels supported by the ADC // static Pin channels[NUM_ADCS][MAX_CHANNELS]; /// Buffer for DMA where each spot represents the value read in from a channel - static uint16_t buffer[MAX_CHANNELS]; +// static uint16_t buffer[MAX_CHANNELS]; // static DMA_HandleTypeDef halDMA[NUM_ADCS]; - static uint8_t rank; + static uint8_t rank; + static bool timerInit; + TIM_HandleTypeDef htim8; + typedef struct ADC_State { ADC_HandleTypeDef halADC = {0}; uint8_t rank = 1; @@ -57,7 +60,7 @@ class ADCf4xx : public ADC { Pin::DUMMY, Pin::DUMMY, Pin::DUMMY, Pin::DUMMY, Pin::DUMMY, Pin::DUMMY, Pin::DUMMY, Pin::DUMMY, Pin::DUMMY, Pin::DUMMY, Pin::DUMMY, Pin::DUMMY}; -// uint16_t buffer[MAX_CHANNELS] = {0}; + uint16_t buffer[MAX_CHANNELS] = {0}; DMA_HandleTypeDef halDMA = {0}; } ADC_State_t; @@ -93,6 +96,8 @@ class ADCf4xx : public ADC { * was added to the ADC starting at 1 */ void addChannel(uint8_t rank); + + void InitTimer(); }; } // namespace core::io diff --git a/src/core/io/platform/f4xx/ADCf4xx.cpp b/src/core/io/platform/f4xx/ADCf4xx.cpp index 0ab37a74..10f77dfa 100644 --- a/src/core/io/platform/f4xx/ADCf4xx.cpp +++ b/src/core/io/platform/f4xx/ADCf4xx.cpp @@ -14,6 +14,7 @@ */ #include +#include #include #include #include @@ -33,21 +34,40 @@ namespace core::io { ADCf4xx::ADC_State_t ADCf4xx::adcArray[3]; uint8_t ADCf4xx::rank = 1; -uint16_t ADCf4xx::buffer[] = {0}; +bool ADCf4xx::timerInit = false; ADCf4xx::ADCf4xx(Pin pin, ADCPeriph adcPeriph) : ADC(pin, adcPeriph) { - ADCf4xx::ADC_State_t* adcState = &adcArray[getADCNum()]; - if (rank == MAX_CHANNELS) { + if (adcState->rank == MAX_CHANNELS) { return; } - initADC(rank); - addChannel(rank); + if (timerInit) { + HAL_TIM_Base_DeInit(&htim8); // Stop Timer8 (Trigger Source For ADC's) + timerInit = false; + } - HAL_ADC_Start(&adcState->halADC); - rank++; + if (adcState->isADCInit) { + HAL_ADC_Stop_DMA(&adcState->halADC); + HAL_DMA_DeInit(&adcState->halDMA); + } else { + __HAL_RCC_DMA2_CLK_ENABLE(); + adcState->isADCInit = true; + } + + initDMA(); + initADC(adcState->rank); + addChannel(adcState->rank); + + if (!timerInit) { + InitTimer(); + HAL_TIM_Base_Start(&htim8); // Start Timer8 (Trigger Source For ADC's) + timerInit = true; + } + + HAL_ADC_Start_DMA(&adcState->halADC, reinterpret_cast(&adcState->buffer[0]), adcState->rank); + adcState->rank++; } float ADCf4xx::read() { @@ -58,8 +78,12 @@ float ADCf4xx::read() { uint32_t ADCf4xx::readRaw() { ADCf4xx::ADC_State_t* adcState = &adcArray[getADCNum()]; - HAL_ADC_PollForConversion(&adcState->halADC, HAL_MAX_DELAY); - return HAL_ADC_GetValue(&adcState->halADC); + uint8_t channelNum = 0; + while (adcState->channels[channelNum] != pin) { + channelNum++; + } + + return adcState->buffer[channelNum]; } float ADCf4xx::readPercentage() { @@ -77,14 +101,14 @@ void ADCf4xx::initADC(uint8_t num_channels) { halADC->Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2; halADC->Init.Resolution = ADC_RESOLUTION_12B; halADC->Init.ScanConvMode = ENABLE; - halADC->Init.ContinuousConvMode = ENABLE; + halADC->Init.ContinuousConvMode = DISABLE; halADC->Init.DiscontinuousConvMode = DISABLE; - halADC->Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; - halADC->Init.ExternalTrigConv = ADC_SOFTWARE_START; + halADC->Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_RISING; + halADC->Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_T8_TRGO; halADC->Init.DataAlign = ADC_DATAALIGN_RIGHT; halADC->Init.NbrOfConversion = num_channels; - halADC->Init.DMAContinuousRequests = DISABLE; - halADC->Init.EOCSelection = ADC_EOC_SEQ_CONV; + halADC->Init.DMAContinuousRequests = ENABLE; + halADC->Init.EOCSelection = ADC_EOC_SINGLE_CONV; switch (getADCNum()) { case ADC1_SLOT: @@ -131,10 +155,36 @@ void ADCf4xx::initDMA() { dma->Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD; dma->Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD; dma->Init.Mode = DMA_CIRCULAR; - dma->Init.Priority = DMA_PRIORITY_VERY_HIGH; - dma->Init.FIFOMode = DMA_FIFOMODE_DISABLE; + dma->Init.Priority = DMA_PRIORITY_HIGH; // todo: was ..._VERY_HIGH + dma->Init.FIFOMode = DMA_FIFOMODE_DISABLE; // todo: WORKS ENABLED + dma->Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL; + dma->Init.MemBurst = DMA_MBURST_SINGLE; + dma->Init.PeriphBurst = DMA_PBURST_SINGLE; HAL_DMA_Init(dma); + + switch (adcNum) { + case ADC1_SLOT: + dma->Instance = DMA2_Stream0; + dma->Init.Channel = DMA_CHANNEL_0; + HAL_NVIC_SetPriority(DMA2_Stream0_IRQn, platform::ADC_INTERRUPT_PRIORITY, 0); + HAL_NVIC_EnableIRQ(DMA2_Stream0_IRQn); + break; + case ADC2_SLOT: + dma->Instance = DMA2_Stream2; + dma->Init.Channel = DMA_CHANNEL_1; + HAL_NVIC_SetPriority(DMA2_Stream2_IRQn, platform::ADC_INTERRUPT_PRIORITY, 0); + HAL_NVIC_EnableIRQ(DMA2_Stream2_IRQn); + break; + case ADC3_SLOT: + dma->Instance = DMA2_Stream1; + dma->Init.Channel = DMA_CHANNEL_2; + HAL_NVIC_SetPriority(DMA2_Stream1_IRQn, platform::ADC_INTERRUPT_PRIORITY, 0); + HAL_NVIC_EnableIRQ(DMA2_Stream1_IRQn); + break; + default: + return; // Should never get here + } __HAL_LINKDMA(&adcState->halADC, DMA_Handle, *dma); } @@ -246,5 +296,25 @@ uint8_t ADCf4xx::getADCNum() { return ADC3_SLOT; } } +void ADCf4xx::InitTimer() { + + TIM_ClockConfigTypeDef sClockSourceConfig = {0}; + TIM_MasterConfigTypeDef sMasterConfig = {0}; + + htim8.Instance = TIM8; + htim8.Init.Prescaler = 0; + htim8.Init.CounterMode = TIM_COUNTERMODE_UP; + htim8.Init.Period = 64000; + htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + htim8.Init.RepetitionCounter = 0; + htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; + HAL_TIM_Base_Init(&htim8); + sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; + HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig); + + sMasterConfig.MasterOutputTrigger = TIM_TRGO_UPDATE; + sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig); +} } // namespace core::io From 047f971ea51a6b4b5755f35f2884392bbe94202e Mon Sep 17 00:00:00 2001 From: GitHub Build Date: Tue, 29 Oct 2024 01:07:02 +0000 Subject: [PATCH 22/98] Applied Formatting Changes During GitHub Build --- include/core/io/platform/f4xx/ADCf4xx.hpp | 36 +++++++++++++------- src/core/io/platform/f4xx/ADCf4xx.cpp | 40 +++++++++++------------ 2 files changed, 44 insertions(+), 32 deletions(-) diff --git a/include/core/io/platform/f4xx/ADCf4xx.hpp b/include/core/io/platform/f4xx/ADCf4xx.hpp index b3c186ca..7dc359f3 100644 --- a/include/core/io/platform/f4xx/ADCf4xx.hpp +++ b/include/core/io/platform/f4xx/ADCf4xx.hpp @@ -42,26 +42,38 @@ class ADCf4xx : public ADC { /// supports multiple channels, so I made this one only use a single ADC. /// The F446re has 3 12 bit ADC's. Currently not able to use the other 2. /// The ADC will be initialized once then each channel will be added on. -// static ADC_HandleTypeDef halADC[NUM_ADCS]; + // static ADC_HandleTypeDef halADC[NUM_ADCS]; /// Static list of all channels supported by the ADC -// static Pin channels[NUM_ADCS][MAX_CHANNELS]; + // static Pin channels[NUM_ADCS][MAX_CHANNELS]; /// Buffer for DMA where each spot represents the value read in from a channel -// static uint16_t buffer[MAX_CHANNELS]; -// static DMA_HandleTypeDef halDMA[NUM_ADCS]; + // static uint16_t buffer[MAX_CHANNELS]; + // static DMA_HandleTypeDef halDMA[NUM_ADCS]; static uint8_t rank; static bool timerInit; TIM_HandleTypeDef htim8; typedef struct ADC_State { - ADC_HandleTypeDef halADC = {0}; - uint8_t rank = 1; - bool isADCInit = false; - Pin channels[MAX_CHANNELS] = {Pin::DUMMY, Pin::DUMMY, Pin::DUMMY, Pin::DUMMY, - Pin::DUMMY, Pin::DUMMY, Pin::DUMMY, Pin::DUMMY, - Pin::DUMMY, Pin::DUMMY, Pin::DUMMY, Pin::DUMMY, - Pin::DUMMY, Pin::DUMMY, Pin::DUMMY, Pin::DUMMY}; + ADC_HandleTypeDef halADC = {0}; + uint8_t rank = 1; + bool isADCInit = false; + Pin channels[MAX_CHANNELS] = {Pin::DUMMY, + Pin::DUMMY, + Pin::DUMMY, + Pin::DUMMY, + Pin::DUMMY, + Pin::DUMMY, + Pin::DUMMY, + Pin::DUMMY, + Pin::DUMMY, + Pin::DUMMY, + Pin::DUMMY, + Pin::DUMMY, + Pin::DUMMY, + Pin::DUMMY, + Pin::DUMMY, + Pin::DUMMY}; uint16_t buffer[MAX_CHANNELS] = {0}; - DMA_HandleTypeDef halDMA = {0}; + DMA_HandleTypeDef halDMA = {0}; } ADC_State_t; static ADC_State_t adcArray[NUM_ADCS]; diff --git a/src/core/io/platform/f4xx/ADCf4xx.cpp b/src/core/io/platform/f4xx/ADCf4xx.cpp index 4af1ea70..33f20f5c 100644 --- a/src/core/io/platform/f4xx/ADCf4xx.cpp +++ b/src/core/io/platform/f4xx/ADCf4xx.cpp @@ -14,11 +14,11 @@ */ #include -#include #include #include #include #include +#include namespace core::io { #define ADC1_SLOT 0 @@ -155,8 +155,8 @@ void ADCf4xx::initDMA() { dma->Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD; dma->Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD; dma->Init.Mode = DMA_CIRCULAR; - dma->Init.Priority = DMA_PRIORITY_HIGH; // todo: was ..._VERY_HIGH - dma->Init.FIFOMode = DMA_FIFOMODE_DISABLE; // todo: WORKS ENABLED + dma->Init.Priority = DMA_PRIORITY_HIGH; // todo: was ..._VERY_HIGH + dma->Init.FIFOMode = DMA_FIFOMODE_DISABLE; // todo: WORKS ENABLED dma->Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL; dma->Init.MemBurst = DMA_MBURST_SINGLE; dma->Init.PeriphBurst = DMA_PBURST_SINGLE; @@ -298,23 +298,23 @@ uint8_t ADCf4xx::getADCNum() { } void ADCf4xx::InitTimer() { - TIM_ClockConfigTypeDef sClockSourceConfig = {0}; - TIM_MasterConfigTypeDef sMasterConfig = {0}; - - htim8.Instance = TIM8; - htim8.Init.Prescaler = 0; - htim8.Init.CounterMode = TIM_COUNTERMODE_UP; - htim8.Init.Period = 64000; - htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - htim8.Init.RepetitionCounter = 0; - htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; - HAL_TIM_Base_Init(&htim8); - sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; - HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig); - - sMasterConfig.MasterOutputTrigger = TIM_TRGO_UPDATE; - sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig); + TIM_ClockConfigTypeDef sClockSourceConfig = {0}; + TIM_MasterConfigTypeDef sMasterConfig = {0}; + + htim8.Instance = TIM8; + htim8.Init.Prescaler = 0; + htim8.Init.CounterMode = TIM_COUNTERMODE_UP; + htim8.Init.Period = 64000; + htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + htim8.Init.RepetitionCounter = 0; + htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; + HAL_TIM_Base_Init(&htim8); + sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; + HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig); + + sMasterConfig.MasterOutputTrigger = TIM_TRGO_UPDATE; + sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig); } } // namespace core::io From 63025d93e98ede32ecc43a6a19584ebe49202e62 Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Thu, 31 Oct 2024 20:44:17 -0400 Subject: [PATCH 23/98] SINGLE ADC WORKS!!! --- src/core/io/platform/f4xx/ADCf4xx.cpp | 49 +++++++++++++++++++++++---- 1 file changed, 42 insertions(+), 7 deletions(-) diff --git a/src/core/io/platform/f4xx/ADCf4xx.cpp b/src/core/io/platform/f4xx/ADCf4xx.cpp index 4af1ea70..5a7c1e9f 100644 --- a/src/core/io/platform/f4xx/ADCf4xx.cpp +++ b/src/core/io/platform/f4xx/ADCf4xx.cpp @@ -20,6 +20,39 @@ #include #include +namespace { +/// This is made as a global variable so that it is accessible in the +// interrupt. +DMA_HandleTypeDef* dmaHandle[3]; +ADC_HandleTypeDef* adcHandle[3]; + +} // namespace + +extern "C" void DMA2_Stream0_IRQHandler(void) { + HAL_DMA_IRQHandler(dmaHandle[0]); + HAL_ADC_IRQHandler(adcHandle[0]); +} + +/** + * @brief This function handles DMA2 stream1 global interrupt. + */ +extern "C" void DMA2_Stream1_IRQHandler(void) +{ + HAL_DMA_IRQHandler(dmaHandle[2]); + HAL_ADC_IRQHandler(adcHandle[2]); +} + +/** + * @brief This function handles DMA2 stream2 global interrupt. + */ +extern "C" void DMA2_Stream2_IRQHandler(void) +{ + HAL_DMA_IRQHandler(dmaHandle[1]); + HAL_ADC_IRQHandler(adcHandle[1]); + +} + + namespace core::io { #define ADC1_SLOT 0 #define ADC2_SLOT 1 @@ -33,11 +66,11 @@ namespace core::io { #define CHANNEL_SET(adc1, adc2, adc3, ch) (ch | (adc1 << ADC1SHIFT) | (adc2 << ADC2SHIFT) | (adc3 << ADC3SHIFT)) ADCf4xx::ADC_State_t ADCf4xx::adcArray[3]; -uint8_t ADCf4xx::rank = 1; bool ADCf4xx::timerInit = false; ADCf4xx::ADCf4xx(Pin pin, ADCPeriph adcPeriph) : ADC(pin, adcPeriph) { - ADCf4xx::ADC_State_t* adcState = &adcArray[getADCNum()]; + uint8_t adcNum = getADCNum(); + ADCf4xx::ADC_State_t* adcState = &adcArray[adcNum]; if (adcState->rank == MAX_CHANNELS) { return; @@ -60,7 +93,11 @@ ADCf4xx::ADCf4xx(Pin pin, ADCPeriph adcPeriph) : ADC(pin, adcPeriph) { initADC(adcState->rank); addChannel(adcState->rank); + dmaHandle[adcNum] = &this->adcArray[adcNum].halDMA; + adcHandle[adcNum] = &this->adcArray[adcNum].halADC; + if (!timerInit) { + __HAL_RCC_TIM8_CLK_ENABLE(); InitTimer(); HAL_TIM_Base_Start(&htim8); // Start Timer8 (Trigger Source For ADC's) timerInit = true; @@ -156,7 +193,7 @@ void ADCf4xx::initDMA() { dma->Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD; dma->Init.Mode = DMA_CIRCULAR; dma->Init.Priority = DMA_PRIORITY_HIGH; // todo: was ..._VERY_HIGH - dma->Init.FIFOMode = DMA_FIFOMODE_DISABLE; // todo: WORKS ENABLED + dma->Init.FIFOMode = DMA_FIFOMODE_DISABLE; // todo: CUBEIDE WORKS WITH ENABLED dma->Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL; dma->Init.MemBurst = DMA_MBURST_SINGLE; dma->Init.PeriphBurst = DMA_PBURST_SINGLE; @@ -269,7 +306,6 @@ void ADCf4xx::addChannel(uint8_t rank) { adcChannel.Rank = rank; adcChannel.SamplingTime = ADC_SAMPLETIME_3CYCLES; adcChannel.Offset = 0; - adcChannel.Offset = 0x000; HAL_ADC_ConfigChannel(&adcState->halADC, &adcChannel); } @@ -286,7 +322,7 @@ inline bool ADCf4xx::checkSupport(ADCPeriph periph, uint32_t channel) { } } -uint8_t ADCf4xx::getADCNum() { +inline uint8_t ADCf4xx::getADCNum() { switch (adcPeriph) { case ADCPeriph::ONE: return ADC1_SLOT; @@ -296,8 +332,8 @@ uint8_t ADCf4xx::getADCNum() { return ADC3_SLOT; } } -void ADCf4xx::InitTimer() { +void ADCf4xx::InitTimer() { TIM_ClockConfigTypeDef sClockSourceConfig = {0}; TIM_MasterConfigTypeDef sMasterConfig = {0}; @@ -316,5 +352,4 @@ void ADCf4xx::InitTimer() { sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig); } - } // namespace core::io From 08502cb8140e1ec4ef6b1e8b3edb7ec72c783b8f Mon Sep 17 00:00:00 2001 From: GitHub Build Date: Fri, 1 Nov 2024 00:47:06 +0000 Subject: [PATCH 24/98] Applied Formatting Changes During GitHub Build --- src/core/io/platform/f4xx/ADCf4xx.cpp | 18 +++++++----------- 1 file changed, 7 insertions(+), 11 deletions(-) diff --git a/src/core/io/platform/f4xx/ADCf4xx.cpp b/src/core/io/platform/f4xx/ADCf4xx.cpp index be9feb9a..154e929c 100644 --- a/src/core/io/platform/f4xx/ADCf4xx.cpp +++ b/src/core/io/platform/f4xx/ADCf4xx.cpp @@ -34,25 +34,21 @@ extern "C" void DMA2_Stream0_IRQHandler(void) { } /** - * @brief This function handles DMA2 stream1 global interrupt. + * @brief This function handles DMA2 stream1 global interrupt. */ -extern "C" void DMA2_Stream1_IRQHandler(void) -{ +extern "C" void DMA2_Stream1_IRQHandler(void) { HAL_DMA_IRQHandler(dmaHandle[2]); HAL_ADC_IRQHandler(adcHandle[2]); } /** - * @brief This function handles DMA2 stream2 global interrupt. + * @brief This function handles DMA2 stream2 global interrupt. */ -extern "C" void DMA2_Stream2_IRQHandler(void) -{ +extern "C" void DMA2_Stream2_IRQHandler(void) { HAL_DMA_IRQHandler(dmaHandle[1]); HAL_ADC_IRQHandler(adcHandle[1]); - } - namespace core::io { #define ADC1_SLOT 0 #define ADC2_SLOT 1 @@ -69,7 +65,7 @@ ADCf4xx::ADC_State_t ADCf4xx::adcArray[3]; bool ADCf4xx::timerInit = false; ADCf4xx::ADCf4xx(Pin pin, ADCPeriph adcPeriph) : ADC(pin, adcPeriph) { - uint8_t adcNum = getADCNum(); + uint8_t adcNum = getADCNum(); ADCf4xx::ADC_State_t* adcState = &adcArray[adcNum]; if (adcState->rank == MAX_CHANNELS) { @@ -334,8 +330,8 @@ inline uint8_t ADCf4xx::getADCNum() { } void ADCf4xx::InitTimer() { - TIM_ClockConfigTypeDef sClockSourceConfig = {0}; - TIM_MasterConfigTypeDef sMasterConfig = {0}; + TIM_ClockConfigTypeDef sClockSourceConfig = {0}; + TIM_MasterConfigTypeDef sMasterConfig = {0}; htim8.Instance = TIM8; htim8.Init.Prescaler = 0; From d0fe7d2b913760ada341d84213f2e62d587e115d Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Thu, 31 Oct 2024 21:47:25 -0400 Subject: [PATCH 25/98] MULTI ADC Works!! Need to clean up but... --- samples/adc/multi_adc.cpp | 2 -- 1 file changed, 2 deletions(-) diff --git a/samples/adc/multi_adc.cpp b/samples/adc/multi_adc.cpp index dc4d7e2a..4b337b64 100644 --- a/samples/adc/multi_adc.cpp +++ b/samples/adc/multi_adc.cpp @@ -22,9 +22,7 @@ int main() { time::wait(500); io::ADC& adc0 = io::getADC(); - uart.printf("ONE WORKING\r\n"); io::ADC& adc1 = io::getADC(); - uart.printf("TWO WORKING\r\n"); while (1) { uart.printf("--------------------\r\n"); From 4a00fcbd692a19de17ad2571f018c8b667174eb0 Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Sat, 2 Nov 2024 12:05:23 -0400 Subject: [PATCH 26/98] Added logger to print invalid ADC pin errors --- samples/adc/multi_adc.cpp | 9 +++++++-- samples/adc/single_adc.cpp | 7 ++++++- 2 files changed, 13 insertions(+), 3 deletions(-) diff --git a/samples/adc/multi_adc.cpp b/samples/adc/multi_adc.cpp index 4b337b64..d35768f0 100644 --- a/samples/adc/multi_adc.cpp +++ b/samples/adc/multi_adc.cpp @@ -7,6 +7,7 @@ #include #include #include +#include namespace io = core::io; namespace time = core::time; @@ -17,12 +18,16 @@ int main() { io::UART& uart = io::getUART(9600); + // Set up the logger to catch errors in ADC creation + core::log::LOGGER.setUART(&uart); + core::log::LOGGER.setLogLevel(core::log::Logger::LogLevel::ERROR); + uart.printf("Starting ADC test\r\n"); time::wait(500); - io::ADC& adc0 = io::getADC(); - io::ADC& adc1 = io::getADC(); + io::ADC& adc0 = io::getADC(); + io::ADC& adc1 = io::getADC(); while (1) { uart.printf("--------------------\r\n"); diff --git a/samples/adc/single_adc.cpp b/samples/adc/single_adc.cpp index 65eb3b9e..21f0bf0e 100644 --- a/samples/adc/single_adc.cpp +++ b/samples/adc/single_adc.cpp @@ -7,6 +7,7 @@ #include #include #include +#include namespace io = core::io; namespace time = core::time; @@ -17,11 +18,15 @@ int main() { io::UART& uart = io::getUART(9600); + // Set up the logger to catch errors in ADC creation + core::log::LOGGER.setUART(&uart); + core::log::LOGGER.setLogLevel(core::log::Logger::LogLevel::ERROR); + uart.printf("Starting ADC test\r\n"); time::wait(500); - io::ADC& adc0 = io::getADC(); + io::ADC& adc0 = io::getADC(); while (1) { uart.printf("--------------------\r\n"); From 836c4c27d78623ce0fd0001c3f5e179d490cd2a5 Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Sat, 2 Nov 2024 12:12:06 -0400 Subject: [PATCH 27/98] Added log message for hard fault errors, and changed timer period to give exactly 1kHz frequency --- src/core/io/platform/f4xx/ADCf4xx.cpp | 32 ++++++++++++++------------- 1 file changed, 17 insertions(+), 15 deletions(-) diff --git a/src/core/io/platform/f4xx/ADCf4xx.cpp b/src/core/io/platform/f4xx/ADCf4xx.cpp index 154e929c..bbf58f89 100644 --- a/src/core/io/platform/f4xx/ADCf4xx.cpp +++ b/src/core/io/platform/f4xx/ADCf4xx.cpp @@ -2,15 +2,12 @@ * DISCLAIMER: THIS MIGHT BREAK AT ANY POINT AND/OR NOT WORK FOR CERTAIN PURPOSES * * This DMA ADC is different than f3xx DMA ADC! - * This DMA ADC does NOT use the interrupts, as when interrupts were enabled it - * would constantly interrupt, not letting the print statements or anything - * else happen. - * Tried to fix this by changing the sampletime and clock prescaler values, but - * nothing worked. - * This was "fixed" by commenting out the NVIC_EnableIRQ, stopping the interrupt - * from ever being enabled. + * f4xx DMA ADC uses a timer to trigger conversions. Timer frequency is 1kHz. * - * For commit from before code was removed, refer to commit 81624521a8b2c4b66480193e88cf32782aaee84d. + * Timers were used to slow down ADC DMA interrupts, as when allowed to convert constantly as how f3xx is, + * the interrupts stopped the program from doing anything else besides interrupt calls. + * + * WARNING: DOES NOT WORK ON PINS THAT ARE ALREADY IN USE (LIKE UART PINS) */ #include @@ -19,15 +16,18 @@ #include #include #include +#include namespace { -/// This is made as a global variable so that it is accessible in the -// interrupt. +/// This is made as a global variable so that it is accessible in the interrupt. DMA_HandleTypeDef* dmaHandle[3]; ADC_HandleTypeDef* adcHandle[3]; } // namespace +/** + * @brief This function handles DMA2 stream0 global interrupt. + */ extern "C" void DMA2_Stream0_IRQHandler(void) { HAL_DMA_IRQHandler(dmaHandle[0]); HAL_ADC_IRQHandler(adcHandle[0]); @@ -188,8 +188,8 @@ void ADCf4xx::initDMA() { dma->Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD; dma->Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD; dma->Init.Mode = DMA_CIRCULAR; - dma->Init.Priority = DMA_PRIORITY_HIGH; // todo: was ..._VERY_HIGH - dma->Init.FIFOMode = DMA_FIFOMODE_DISABLE; // todo: CUBEIDE WORKS WITH ENABLED + dma->Init.Priority = DMA_PRIORITY_HIGH; + dma->Init.FIFOMode = DMA_FIFOMODE_DISABLE; dma->Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL; dma->Init.MemBurst = DMA_MBURST_SINGLE; dma->Init.PeriphBurst = DMA_PBURST_SINGLE; @@ -226,7 +226,8 @@ void ADCf4xx::addChannel(uint8_t rank) { uint8_t numOfPins = 1; uint32_t channel; Pin myPins[] = {pin}; - ADCf4xx::ADC_State_t* adcState = &adcArray[getADCNum()]; + uint8_t adcNum = getADCNum(); + ADCf4xx::ADC_State_t* adcState = &adcArray[adcNum]; GPIOf4xx::gpioStateInit(&gpioInit, myPins, numOfPins, GPIO_MODE_ANALOG, GPIO_NOPULL, GPIO_SPEED_FREQ_HIGH); @@ -292,8 +293,9 @@ void ADCf4xx::addChannel(uint8_t rank) { // Masks channel back to proper value (Zero's out ADC information bits) adcChannel.Channel = channel & 0x1F; } else { + log::LOGGER.log(log::Logger::LogLevel::ERROR, "ADC %d DOES NOT SUPPORT PIN 0x%x!!", (adcNum + 1), pin); // Causes HARD FAULT if pin does not support the ADC peripheral being used. THIS IS INTENTIONAL! - adcChannel.Channel = *((uint32_t*) 0U); + *((volatile int*)0xFFFFFFFF) = 0; // This address is invalid } // Subtract 1 because rank starts at 1 @@ -336,7 +338,7 @@ void ADCf4xx::InitTimer() { htim8.Instance = TIM8; htim8.Init.Prescaler = 0; htim8.Init.CounterMode = TIM_COUNTERMODE_UP; - htim8.Init.Period = 64000; + htim8.Init.Period = (SystemCoreClock / 1000) - 1; htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; htim8.Init.RepetitionCounter = 0; htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; From ef43d5d40a4238c80eb5ac89a1e6bde91bc147e9 Mon Sep 17 00:00:00 2001 From: GitHub Build Date: Sat, 2 Nov 2024 16:13:52 +0000 Subject: [PATCH 28/98] Applied Formatting Changes During GitHub Build --- samples/adc/multi_adc.cpp | 2 +- samples/adc/single_adc.cpp | 2 +- src/core/io/platform/f4xx/ADCf4xx.cpp | 4 ++-- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/samples/adc/multi_adc.cpp b/samples/adc/multi_adc.cpp index d35768f0..06ac2a73 100644 --- a/samples/adc/multi_adc.cpp +++ b/samples/adc/multi_adc.cpp @@ -6,8 +6,8 @@ #include #include #include -#include #include +#include namespace io = core::io; namespace time = core::time; diff --git a/samples/adc/single_adc.cpp b/samples/adc/single_adc.cpp index 21f0bf0e..4c299ad1 100644 --- a/samples/adc/single_adc.cpp +++ b/samples/adc/single_adc.cpp @@ -6,8 +6,8 @@ #include #include #include -#include #include +#include namespace io = core::io; namespace time = core::time; diff --git a/src/core/io/platform/f4xx/ADCf4xx.cpp b/src/core/io/platform/f4xx/ADCf4xx.cpp index bbf58f89..0218ad2a 100644 --- a/src/core/io/platform/f4xx/ADCf4xx.cpp +++ b/src/core/io/platform/f4xx/ADCf4xx.cpp @@ -226,7 +226,7 @@ void ADCf4xx::addChannel(uint8_t rank) { uint8_t numOfPins = 1; uint32_t channel; Pin myPins[] = {pin}; - uint8_t adcNum = getADCNum(); + uint8_t adcNum = getADCNum(); ADCf4xx::ADC_State_t* adcState = &adcArray[adcNum]; GPIOf4xx::gpioStateInit(&gpioInit, myPins, numOfPins, GPIO_MODE_ANALOG, GPIO_NOPULL, GPIO_SPEED_FREQ_HIGH); @@ -295,7 +295,7 @@ void ADCf4xx::addChannel(uint8_t rank) { } else { log::LOGGER.log(log::Logger::LogLevel::ERROR, "ADC %d DOES NOT SUPPORT PIN 0x%x!!", (adcNum + 1), pin); // Causes HARD FAULT if pin does not support the ADC peripheral being used. THIS IS INTENTIONAL! - *((volatile int*)0xFFFFFFFF) = 0; // This address is invalid + *((volatile int*) 0xFFFFFFFF) = 0; // This address is invalid } // Subtract 1 because rank starts at 1 From 11f81bcd39f0ab125f206dac685a08da7582333d Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Sat, 2 Nov 2024 12:19:04 -0400 Subject: [PATCH 29/98] Removed redundant default value --- include/core/io/platform/f4xx/ADCf4xx.hpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/core/io/platform/f4xx/ADCf4xx.hpp b/include/core/io/platform/f4xx/ADCf4xx.hpp index 7dc359f3..e80dfbee 100644 --- a/include/core/io/platform/f4xx/ADCf4xx.hpp +++ b/include/core/io/platform/f4xx/ADCf4xx.hpp @@ -21,7 +21,7 @@ class ADCf4xx : public ADC { * * @param[in] pin The pin to setup for ADC */ - ADCf4xx(Pin pin, ADCPeriph adcPeriph = ADCPeriph::ONE); + ADCf4xx(Pin pin, ADCPeriph adcPeriph); float read(); From 405190d1cc83c5220967d33912a71d6a4d78aa5f Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Sat, 2 Nov 2024 12:35:20 -0400 Subject: [PATCH 30/98] added comments in the header and removed commented out code --- include/core/io/platform/f4xx/ADCf4xx.hpp | 51 +++++++++++------------ 1 file changed, 25 insertions(+), 26 deletions(-) diff --git a/include/core/io/platform/f4xx/ADCf4xx.hpp b/include/core/io/platform/f4xx/ADCf4xx.hpp index e80dfbee..9e44fa62 100644 --- a/include/core/io/platform/f4xx/ADCf4xx.hpp +++ b/include/core/io/platform/f4xx/ADCf4xx.hpp @@ -38,39 +38,34 @@ class ADCf4xx : public ADC { static constexpr float VREF_POS = 3.3; // Max value for a 12 bit ADC reading (2^12 - 1) static constexpr uint32_t MAX_RAW = 4095; - /// This is static since the STM32F3xx only had a single ADC which - /// supports multiple channels, so I made this one only use a single ADC. - /// The F446re has 3 12 bit ADC's. Currently not able to use the other 2. - /// The ADC will be initialized once then each channel will be added on. - // static ADC_HandleTypeDef halADC[NUM_ADCS]; - /// Static list of all channels supported by the ADC - // static Pin channels[NUM_ADCS][MAX_CHANNELS]; - /// Buffer for DMA where each spot represents the value read in from a channel - // static uint16_t buffer[MAX_CHANNELS]; - // static DMA_HandleTypeDef halDMA[NUM_ADCS]; - static uint8_t rank; + // Flag to indicate if the timer has been initialized static bool timerInit; + // Timer handle for TIM8, used to configure and control the timer instance TIM_HandleTypeDef htim8; + + /** + * @brief Structure to represent the state of an ADC instance. + * + * This structure holds the configuration and current state for an ADC instance, including the + * HAL handle for the ADC and DMA, channel configurations, and data buffers for readings. + * + * halADC: HAL handle for configuring and controlling the ADC peripheral. + * rank: The ADC channel rank in the sequence (starts at 1). + * isADCInit: Flag to indicate whether the ADC has been initialized. + * channels: Array of pins mapped to ADC channels. Initialized to all Pin::DUMMY. + * The array size is defined by MAX_CHANNELS. + * buffer: Array to store ADC values for each channel, indexed according to the channels array. + * Each entry corresponds to a specific ADC channel. + * halDMA: HAL handle for configuring and controlling DMA for the ADC. + */ typedef struct ADC_State { ADC_HandleTypeDef halADC = {0}; uint8_t rank = 1; bool isADCInit = false; - Pin channels[MAX_CHANNELS] = {Pin::DUMMY, - Pin::DUMMY, - Pin::DUMMY, - Pin::DUMMY, - Pin::DUMMY, - Pin::DUMMY, - Pin::DUMMY, - Pin::DUMMY, - Pin::DUMMY, - Pin::DUMMY, - Pin::DUMMY, - Pin::DUMMY, - Pin::DUMMY, - Pin::DUMMY, - Pin::DUMMY, + Pin channels[MAX_CHANNELS] = {Pin::DUMMY,Pin::DUMMY,Pin::DUMMY,Pin::DUMMY,Pin::DUMMY, + Pin::DUMMY,Pin::DUMMY,Pin::DUMMY,Pin::DUMMY,Pin::DUMMY, + Pin::DUMMY,Pin::DUMMY,Pin::DUMMY,Pin::DUMMY,Pin::DUMMY, Pin::DUMMY}; uint16_t buffer[MAX_CHANNELS] = {0}; DMA_HandleTypeDef halDMA = {0}; @@ -91,6 +86,7 @@ class ADCf4xx : public ADC { * @return */ uint8_t getADCNum(); + /** * Initialize the HAL ADC handler. This should only have to be run once */ @@ -109,6 +105,9 @@ class ADCf4xx : public ADC { */ void addChannel(uint8_t rank); + /** + * Initializes Timer 8 to control ADC conversion frequency + */ void InitTimer(); }; From 5ce1e2d8b27d9dd0aa3930129a005bedf8ec9334 Mon Sep 17 00:00:00 2001 From: GitHub Build Date: Sat, 2 Nov 2024 16:36:51 +0000 Subject: [PATCH 31/98] Applied Formatting Changes During GitHub Build --- include/core/io/platform/f4xx/ADCf4xx.hpp | 19 +++++++++++++++---- 1 file changed, 15 insertions(+), 4 deletions(-) diff --git a/include/core/io/platform/f4xx/ADCf4xx.hpp b/include/core/io/platform/f4xx/ADCf4xx.hpp index 9e44fa62..85746a19 100644 --- a/include/core/io/platform/f4xx/ADCf4xx.hpp +++ b/include/core/io/platform/f4xx/ADCf4xx.hpp @@ -43,7 +43,6 @@ class ADCf4xx : public ADC { // Timer handle for TIM8, used to configure and control the timer instance TIM_HandleTypeDef htim8; - /** * @brief Structure to represent the state of an ADC instance. * @@ -63,9 +62,21 @@ class ADCf4xx : public ADC { ADC_HandleTypeDef halADC = {0}; uint8_t rank = 1; bool isADCInit = false; - Pin channels[MAX_CHANNELS] = {Pin::DUMMY,Pin::DUMMY,Pin::DUMMY,Pin::DUMMY,Pin::DUMMY, - Pin::DUMMY,Pin::DUMMY,Pin::DUMMY,Pin::DUMMY,Pin::DUMMY, - Pin::DUMMY,Pin::DUMMY,Pin::DUMMY,Pin::DUMMY,Pin::DUMMY, + Pin channels[MAX_CHANNELS] = {Pin::DUMMY, + Pin::DUMMY, + Pin::DUMMY, + Pin::DUMMY, + Pin::DUMMY, + Pin::DUMMY, + Pin::DUMMY, + Pin::DUMMY, + Pin::DUMMY, + Pin::DUMMY, + Pin::DUMMY, + Pin::DUMMY, + Pin::DUMMY, + Pin::DUMMY, + Pin::DUMMY, Pin::DUMMY}; uint16_t buffer[MAX_CHANNELS] = {0}; DMA_HandleTypeDef halDMA = {0}; From 1bc3118c69ea8fc662aae9d5feba8993dfcac60c Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Sat, 2 Nov 2024 12:43:52 -0400 Subject: [PATCH 32/98] Reset sample to main default --- samples/adc/multi_adc.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/samples/adc/multi_adc.cpp b/samples/adc/multi_adc.cpp index 06ac2a73..609bd327 100644 --- a/samples/adc/multi_adc.cpp +++ b/samples/adc/multi_adc.cpp @@ -27,7 +27,7 @@ int main() { time::wait(500); io::ADC& adc0 = io::getADC(); - io::ADC& adc1 = io::getADC(); + io::ADC& adc1 = io::getADC(); while (1) { uart.printf("--------------------\r\n"); From 48c0442b1fff6785f60daa9d11b6b3405f04d260 Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Sat, 2 Nov 2024 12:44:36 -0400 Subject: [PATCH 33/98] removed redundant code, and set priority back to very high, which is what we use in f3xx --- src/core/io/platform/f4xx/ADCf4xx.cpp | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/src/core/io/platform/f4xx/ADCf4xx.cpp b/src/core/io/platform/f4xx/ADCf4xx.cpp index 0218ad2a..c52f0fbe 100644 --- a/src/core/io/platform/f4xx/ADCf4xx.cpp +++ b/src/core/io/platform/f4xx/ADCf4xx.cpp @@ -166,6 +166,7 @@ void ADCf4xx::initDMA() { uint8_t adcNum = getADCNum(); ADCf4xx::ADC_State_t* adcState = &adcArray[adcNum]; DMA_HandleTypeDef* dma = &adcState->halDMA; + // Set DMA instance to proper config settings switch (adcNum) { case ADC1_SLOT: dma->Instance = DMA2_Stream0; @@ -188,7 +189,7 @@ void ADCf4xx::initDMA() { dma->Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD; dma->Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD; dma->Init.Mode = DMA_CIRCULAR; - dma->Init.Priority = DMA_PRIORITY_HIGH; + dma->Init.Priority = DMA_PRIORITY_VERY_HIGH; dma->Init.FIFOMode = DMA_FIFOMODE_DISABLE; dma->Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL; dma->Init.MemBurst = DMA_MBURST_SINGLE; @@ -198,20 +199,14 @@ void ADCf4xx::initDMA() { switch (adcNum) { case ADC1_SLOT: - dma->Instance = DMA2_Stream0; - dma->Init.Channel = DMA_CHANNEL_0; HAL_NVIC_SetPriority(DMA2_Stream0_IRQn, platform::ADC_INTERRUPT_PRIORITY, 0); HAL_NVIC_EnableIRQ(DMA2_Stream0_IRQn); break; case ADC2_SLOT: - dma->Instance = DMA2_Stream2; - dma->Init.Channel = DMA_CHANNEL_1; HAL_NVIC_SetPriority(DMA2_Stream2_IRQn, platform::ADC_INTERRUPT_PRIORITY, 0); HAL_NVIC_EnableIRQ(DMA2_Stream2_IRQn); break; case ADC3_SLOT: - dma->Instance = DMA2_Stream1; - dma->Init.Channel = DMA_CHANNEL_2; HAL_NVIC_SetPriority(DMA2_Stream1_IRQn, platform::ADC_INTERRUPT_PRIORITY, 0); HAL_NVIC_EnableIRQ(DMA2_Stream1_IRQn); break; From 6b88e06b1de7929376b4985cb0b9460c8f75bfae Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Sat, 2 Nov 2024 12:50:13 -0400 Subject: [PATCH 34/98] added comment in interrupt overrides --- src/core/io/platform/f4xx/ADCf4xx.cpp | 21 +++++++++++---------- 1 file changed, 11 insertions(+), 10 deletions(-) diff --git a/src/core/io/platform/f4xx/ADCf4xx.cpp b/src/core/io/platform/f4xx/ADCf4xx.cpp index c52f0fbe..560e2a60 100644 --- a/src/core/io/platform/f4xx/ADCf4xx.cpp +++ b/src/core/io/platform/f4xx/ADCf4xx.cpp @@ -22,11 +22,10 @@ namespace { /// This is made as a global variable so that it is accessible in the interrupt. DMA_HandleTypeDef* dmaHandle[3]; ADC_HandleTypeDef* adcHandle[3]; - } // namespace /** - * @brief This function handles DMA2 stream0 global interrupt. + * @brief This function handles DMA2 stream0 global interrupt. (For ADC 1) */ extern "C" void DMA2_Stream0_IRQHandler(void) { HAL_DMA_IRQHandler(dmaHandle[0]); @@ -34,19 +33,19 @@ extern "C" void DMA2_Stream0_IRQHandler(void) { } /** - * @brief This function handles DMA2 stream1 global interrupt. + * @brief This function handles DMA2 stream2 global interrupt. (For ADC 2) */ -extern "C" void DMA2_Stream1_IRQHandler(void) { - HAL_DMA_IRQHandler(dmaHandle[2]); - HAL_ADC_IRQHandler(adcHandle[2]); +extern "C" void DMA2_Stream2_IRQHandler(void) { + HAL_DMA_IRQHandler(dmaHandle[1]); + HAL_ADC_IRQHandler(adcHandle[1]); } /** - * @brief This function handles DMA2 stream2 global interrupt. + * @brief This function handles DMA2 stream1 global interrupt. (For ADC 3) */ -extern "C" void DMA2_Stream2_IRQHandler(void) { - HAL_DMA_IRQHandler(dmaHandle[1]); - HAL_ADC_IRQHandler(adcHandle[1]); +extern "C" void DMA2_Stream1_IRQHandler(void) { + HAL_DMA_IRQHandler(dmaHandle[2]); + HAL_ADC_IRQHandler(adcHandle[2]); } namespace core::io { @@ -65,10 +64,12 @@ ADCf4xx::ADC_State_t ADCf4xx::adcArray[3]; bool ADCf4xx::timerInit = false; ADCf4xx::ADCf4xx(Pin pin, ADCPeriph adcPeriph) : ADC(pin, adcPeriph) { + // Get adc state being updated uint8_t adcNum = getADCNum(); ADCf4xx::ADC_State_t* adcState = &adcArray[adcNum]; if (adcState->rank == MAX_CHANNELS) { + log::LOGGER.log(log::Logger::LogLevel::WARNING, "ADC %d ALREADY HAS MAX PINS!!", (adcNum + 1)); return; } From 22c20e381c5b96ebad0faeeaa22d2c285b5ea88d Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Sat, 2 Nov 2024 12:58:52 -0400 Subject: [PATCH 35/98] merges --- .gitignore | 3 ++- include/core/platform/f3xx/stm32f3xx.hpp | 3 +++ samples/spi/ADXL345/main.cpp | 3 +-- src/core/dev/platform/f3xx/Timerf3xx.cpp | 2 +- src/core/io/platform/f3xx/ADCf3xx.cpp | 6 +++-- src/core/io/platform/f3xx/CANf3xx.cpp | 7 ++--- src/core/io/platform/f3xx/PWMf3xx.cpp | 2 +- src/core/io/platform/f3xx/SPIf3xx.cpp | 34 +++++++++++++----------- src/core/platform/f3xx/stm32f302x8.cpp | 10 +++---- 9 files changed, 37 insertions(+), 33 deletions(-) diff --git a/.gitignore b/.gitignore index c65a8e6e..bedb47d7 100644 --- a/.gitignore +++ b/.gitignore @@ -11,7 +11,8 @@ venv/ # IDE Files .idea/ .vscode/ -.cache/ # macOS files .DS_Store + +.vscode/ \ No newline at end of file diff --git a/include/core/platform/f3xx/stm32f3xx.hpp b/include/core/platform/f3xx/stm32f3xx.hpp index 8fbb25c5..b8b6205b 100644 --- a/include/core/platform/f3xx/stm32f3xx.hpp +++ b/include/core/platform/f3xx/stm32f3xx.hpp @@ -5,6 +5,9 @@ namespace core::platform { +// stm32f302x8_init() sets clock speed to 8 MHz +constexpr uint32_t CLK_SPEED = 8000000; + // Interrupt Priority Mappings. 0 is high and 15 is low constexpr uint32_t CAN_INTERRUPT_PRIORITY = 4; constexpr uint32_t ADC_INTERRUPT_PRIORITY = 5; diff --git a/samples/spi/ADXL345/main.cpp b/samples/spi/ADXL345/main.cpp index 1f346972..d8f26ffe 100644 --- a/samples/spi/ADXL345/main.cpp +++ b/samples/spi/ADXL345/main.cpp @@ -5,7 +5,6 @@ */ #include -#include #include #include #include @@ -13,7 +12,7 @@ namespace io = core::io; namespace time = core::time; -constexpr uint32_t SPI_SPEED = SPI_SPEED_500KHZ; // 500KHz +constexpr uint32_t SPI_SPEED = SPI_SPEED_62KHZ; // 62.5KHz constexpr uint8_t deviceCount = 1; diff --git a/src/core/dev/platform/f3xx/Timerf3xx.cpp b/src/core/dev/platform/f3xx/Timerf3xx.cpp index 5d4a7a2a..c2b5728e 100644 --- a/src/core/dev/platform/f3xx/Timerf3xx.cpp +++ b/src/core/dev/platform/f3xx/Timerf3xx.cpp @@ -120,7 +120,7 @@ void Timerf3xx::initTimer(TIM_TypeDef* timerPeripheral, uint32_t clockPeriod) { auto& htim = halTimers[getTimerInterruptIndex(timerPeripheral)]; htim.Instance = timerPeripheral; - uint32_t prescaler = HAL_RCC_GetHCLKFreq() / 1000; + uint32_t prescaler = core::platform::CLK_SPEED / 1000; htim.Init.Prescaler = prescaler - 1; // Sets f_CK_PSC to 1000 Hz // Allows period increments of 1 ms with max of 2^(32) ms. htim.Init.CounterMode = TIM_COUNTERMODE_UP; diff --git a/src/core/io/platform/f3xx/ADCf3xx.cpp b/src/core/io/platform/f3xx/ADCf3xx.cpp index f3522a34..cacc9951 100644 --- a/src/core/io/platform/f3xx/ADCf3xx.cpp +++ b/src/core/io/platform/f3xx/ADCf3xx.cpp @@ -69,7 +69,8 @@ float ADCf3xx::read() { } uint32_t ADCf3xx::readRaw() { - // Search through list of channels to determine which DMA buffer index to use + // Search through list of channels to determine which DMA buffer index to + // use uint8_t channelNum = 0; while (channels[channelNum] != pin) channelNum++; @@ -111,7 +112,8 @@ void ADCf3xx::initDMA() { // HAL_ADC_Stop(&halADC); // TODO: Add some way of selecting the next available DMA channel - // Ideally we would have a "DMA" class dedicated to DMA resource allocation. + // Ideally we would have a "DMA" class dedicated to DMA resource + // allocation. halDMA.Instance = DMA1_Channel1; halDMA.Init.Direction = DMA_PERIPH_TO_MEMORY; halDMA.Init.PeriphInc = DMA_PINC_DISABLE; diff --git a/src/core/io/platform/f3xx/CANf3xx.cpp b/src/core/io/platform/f3xx/CANf3xx.cpp index 95466164..9159b28a 100644 --- a/src/core/io/platform/f3xx/CANf3xx.cpp +++ b/src/core/io/platform/f3xx/CANf3xx.cpp @@ -76,17 +76,14 @@ CAN::CANStatus CANf3xx::connect(bool autoBusOff) { // Initialize HAL CAN // Bit timing values calculated from the website // http://www.bittiming.can-wiki.info/ - // Sample point of 87.5% and selecting a time quanta number of 16. - uint32_t mode = loopbackEnabled ? CAN_MODE_LOOPBACK : CAN_MODE_NORMAL; - + uint32_t mode = loopbackEnabled ? CAN_MODE_LOOPBACK : CAN_MODE_NORMAL; halCAN.Instance = CAN1; - halCAN.Init.Prescaler = (HAL_RCC_GetHCLKFreq() / DEFAULT_BAUD / 16); + halCAN.Init.Prescaler = 1; halCAN.Init.Mode = mode; halCAN.Init.SyncJumpWidth = CAN_SJW_1TQ; halCAN.Init.TimeSeg1 = CAN_BS1_13TQ; halCAN.Init.TimeSeg2 = CAN_BS2_2TQ; halCAN.Init.TimeTriggeredMode = DISABLE; - if (autoBusOff) { halCAN.Init.AutoBusOff = ENABLE; } else { diff --git a/src/core/io/platform/f3xx/PWMf3xx.cpp b/src/core/io/platform/f3xx/PWMf3xx.cpp index 09ef793f..276abc02 100644 --- a/src/core/io/platform/f3xx/PWMf3xx.cpp +++ b/src/core/io/platform/f3xx/PWMf3xx.cpp @@ -497,7 +497,7 @@ void PWMf3xx::setPeriod(uint32_t period) { uint32_t autoReload; uint32_t prescaler = -1; - uint64_t clockFrequency = HAL_RCC_GetHCLKFreq(); + uint64_t clockFrequency = HAL_RCC_GetSysClockFreq(); // Required loop in order to determine a prescaler which will bring the // autoreload value into a valid range. diff --git a/src/core/io/platform/f3xx/SPIf3xx.cpp b/src/core/io/platform/f3xx/SPIf3xx.cpp index fd4c04aa..31b3ee68 100644 --- a/src/core/io/platform/f3xx/SPIf3xx.cpp +++ b/src/core/io/platform/f3xx/SPIf3xx.cpp @@ -240,20 +240,24 @@ void SPIf3xx::configureSPI(uint32_t baudRate, SPIMode mode, bool firstBitMSB) { break; } - // configure the clock prescaler to the closest baudrate to the requested. - uint32_t prescaler = (HAL_RCC_GetHCLKFreq() / baudRate); - // Convert the prescaler number to the bit value incrementally (log2), produces the value + 1. - halSPI.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; - while (prescaler >>= 1) { - halSPI.Init.BaudRatePrescaler++; - } - - // The max value of the prescaler is 256 which is represented by 0x07+1. - if (halSPI.Init.BaudRatePrescaler > 0x8) { - halSPI.Init.BaudRatePrescaler = 0x8; + // configure the clock prescaler to the closest baudrate to the requested + if (baudRate >= SPI_MAX_BAUD) { + halSPI.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; + } else if (baudRate >= SPI_MAX_BAUD / 2) { + halSPI.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_4; + } else if (baudRate >= SPI_MAX_BAUD / 4) { + halSPI.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8; + } else if (baudRate >= SPI_MAX_BAUD / 8) { + halSPI.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_16; + } else if (baudRate >= SPI_MAX_BAUD / 16) { + halSPI.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_32; + } else if (baudRate >= SPI_MAX_BAUD / 32) { + halSPI.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_64; + } else if (baudRate >= SPI_MAX_BAUD / 64) { + halSPI.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_128; + } else { + halSPI.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_256; } - // Shift left 3 to correct bit position in the register and subtract one. - halSPI.Init.BaudRatePrescaler = (halSPI.Init.BaudRatePrescaler - 1) << 3; // configure the bit order of the data; MSB or LSB if (firstBitMSB) { @@ -315,12 +319,12 @@ SPI::SPIStatus SPIf3xx::halToSPIStatus(HAL_StatusTypeDef halStatus) { switch (halStatus) { case HAL_OK: return SPIStatus::OK; + case HAL_ERROR: + return SPIStatus::ERROR; case HAL_BUSY: return SPIStatus::BUSY; case HAL_TIMEOUT: return SPIStatus::TIMEOUT; - default: // HAL_ERROR: - return SPIStatus::ERROR; } } diff --git a/src/core/platform/f3xx/stm32f302x8.cpp b/src/core/platform/f3xx/stm32f302x8.cpp index b65fccdd..dcd7481f 100644 --- a/src/core/platform/f3xx/stm32f302x8.cpp +++ b/src/core/platform/f3xx/stm32f302x8.cpp @@ -12,8 +12,7 @@ void stm32f3xx_init() { RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; - /** - * Initializes the RCC Oscillators according to the specified parameters + /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; @@ -21,14 +20,13 @@ void stm32f3xx_init() { RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; - RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL8; // PLL CLK at 8 / 2 * 8 = 32 MHz + RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL4; // PLL CLK at 8 * 4 = 32 MHz HAL_RCC_OscConfig(&RCC_OscInitStruct); - /** - * Initializes the CPU, AHB and APB buses clocks + /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; - RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; // SYSCLK at 32 MHz (PLL CLK) + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI; // SYSCLK at 8 MHz (HSI CLK) RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; From e5f15fd5fa23a91d6aedf17c0ddd72cb7368f8f9 Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Sat, 2 Nov 2024 13:01:33 -0400 Subject: [PATCH 36/98] merges --- .gitignore | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/.gitignore b/.gitignore index bedb47d7..b9c16a93 100644 --- a/.gitignore +++ b/.gitignore @@ -11,8 +11,7 @@ venv/ # IDE Files .idea/ .vscode/ +.cache/ # macOS files -.DS_Store - -.vscode/ \ No newline at end of file +.DS_Store \ No newline at end of file From d4903306bf6d2eeb67eac55a96d7b65cbd934aff Mon Sep 17 00:00:00 2001 From: Travis Brown <143294730+tmb5932@users.noreply.github.com> Date: Sat, 2 Nov 2024 13:04:42 -0400 Subject: [PATCH 37/98] Update .gitignore --- .gitignore | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.gitignore b/.gitignore index b9c16a93..c65a8e6e 100644 --- a/.gitignore +++ b/.gitignore @@ -14,4 +14,4 @@ venv/ .cache/ # macOS files -.DS_Store \ No newline at end of file +.DS_Store From 206cf4aea9ee666c3be47e1c2db7e60dc40b25c4 Mon Sep 17 00:00:00 2001 From: Travis Brown <143294730+tmb5932@users.noreply.github.com> Date: Sat, 2 Nov 2024 13:06:43 -0400 Subject: [PATCH 38/98] Update stm32f3xx.hpp --- include/core/platform/f3xx/stm32f3xx.hpp | 3 --- 1 file changed, 3 deletions(-) diff --git a/include/core/platform/f3xx/stm32f3xx.hpp b/include/core/platform/f3xx/stm32f3xx.hpp index b8b6205b..8fbb25c5 100644 --- a/include/core/platform/f3xx/stm32f3xx.hpp +++ b/include/core/platform/f3xx/stm32f3xx.hpp @@ -5,9 +5,6 @@ namespace core::platform { -// stm32f302x8_init() sets clock speed to 8 MHz -constexpr uint32_t CLK_SPEED = 8000000; - // Interrupt Priority Mappings. 0 is high and 15 is low constexpr uint32_t CAN_INTERRUPT_PRIORITY = 4; constexpr uint32_t ADC_INTERRUPT_PRIORITY = 5; From f16810ae83483d36ba4ce5ffc20cf24a99a5ab74 Mon Sep 17 00:00:00 2001 From: Travis Brown <143294730+tmb5932@users.noreply.github.com> Date: Sat, 2 Nov 2024 13:07:51 -0400 Subject: [PATCH 39/98] Update main.cpp --- samples/spi/ADXL345/main.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/samples/spi/ADXL345/main.cpp b/samples/spi/ADXL345/main.cpp index d8f26ffe..1f346972 100644 --- a/samples/spi/ADXL345/main.cpp +++ b/samples/spi/ADXL345/main.cpp @@ -5,6 +5,7 @@ */ #include +#include #include #include #include @@ -12,7 +13,7 @@ namespace io = core::io; namespace time = core::time; -constexpr uint32_t SPI_SPEED = SPI_SPEED_62KHZ; // 62.5KHz +constexpr uint32_t SPI_SPEED = SPI_SPEED_500KHZ; // 500KHz constexpr uint8_t deviceCount = 1; From 3e58960e8c667b09024276d14f02462a77abee63 Mon Sep 17 00:00:00 2001 From: Travis Brown <143294730+tmb5932@users.noreply.github.com> Date: Sat, 2 Nov 2024 13:09:54 -0400 Subject: [PATCH 40/98] Update Timerf3xx.cpp --- src/core/dev/platform/f3xx/Timerf3xx.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/core/dev/platform/f3xx/Timerf3xx.cpp b/src/core/dev/platform/f3xx/Timerf3xx.cpp index c2b5728e..5d4a7a2a 100644 --- a/src/core/dev/platform/f3xx/Timerf3xx.cpp +++ b/src/core/dev/platform/f3xx/Timerf3xx.cpp @@ -120,7 +120,7 @@ void Timerf3xx::initTimer(TIM_TypeDef* timerPeripheral, uint32_t clockPeriod) { auto& htim = halTimers[getTimerInterruptIndex(timerPeripheral)]; htim.Instance = timerPeripheral; - uint32_t prescaler = core::platform::CLK_SPEED / 1000; + uint32_t prescaler = HAL_RCC_GetHCLKFreq() / 1000; htim.Init.Prescaler = prescaler - 1; // Sets f_CK_PSC to 1000 Hz // Allows period increments of 1 ms with max of 2^(32) ms. htim.Init.CounterMode = TIM_COUNTERMODE_UP; From ff6dc609ff1de00d9b666ed30109f4a7237afd88 Mon Sep 17 00:00:00 2001 From: Travis Brown <143294730+tmb5932@users.noreply.github.com> Date: Sat, 2 Nov 2024 13:10:33 -0400 Subject: [PATCH 41/98] Update CANf3xx.cpp --- src/core/io/platform/f3xx/CANf3xx.cpp | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/src/core/io/platform/f3xx/CANf3xx.cpp b/src/core/io/platform/f3xx/CANf3xx.cpp index 9159b28a..95466164 100644 --- a/src/core/io/platform/f3xx/CANf3xx.cpp +++ b/src/core/io/platform/f3xx/CANf3xx.cpp @@ -76,14 +76,17 @@ CAN::CANStatus CANf3xx::connect(bool autoBusOff) { // Initialize HAL CAN // Bit timing values calculated from the website // http://www.bittiming.can-wiki.info/ - uint32_t mode = loopbackEnabled ? CAN_MODE_LOOPBACK : CAN_MODE_NORMAL; + // Sample point of 87.5% and selecting a time quanta number of 16. + uint32_t mode = loopbackEnabled ? CAN_MODE_LOOPBACK : CAN_MODE_NORMAL; + halCAN.Instance = CAN1; - halCAN.Init.Prescaler = 1; + halCAN.Init.Prescaler = (HAL_RCC_GetHCLKFreq() / DEFAULT_BAUD / 16); halCAN.Init.Mode = mode; halCAN.Init.SyncJumpWidth = CAN_SJW_1TQ; halCAN.Init.TimeSeg1 = CAN_BS1_13TQ; halCAN.Init.TimeSeg2 = CAN_BS2_2TQ; halCAN.Init.TimeTriggeredMode = DISABLE; + if (autoBusOff) { halCAN.Init.AutoBusOff = ENABLE; } else { From bb24abaa67bd900e9753841fcd5a2e5a8302ac33 Mon Sep 17 00:00:00 2001 From: Travis Brown <143294730+tmb5932@users.noreply.github.com> Date: Sat, 2 Nov 2024 13:10:54 -0400 Subject: [PATCH 42/98] Update PWMf3xx.cpp --- src/core/io/platform/f3xx/PWMf3xx.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/core/io/platform/f3xx/PWMf3xx.cpp b/src/core/io/platform/f3xx/PWMf3xx.cpp index 276abc02..09ef793f 100644 --- a/src/core/io/platform/f3xx/PWMf3xx.cpp +++ b/src/core/io/platform/f3xx/PWMf3xx.cpp @@ -497,7 +497,7 @@ void PWMf3xx::setPeriod(uint32_t period) { uint32_t autoReload; uint32_t prescaler = -1; - uint64_t clockFrequency = HAL_RCC_GetSysClockFreq(); + uint64_t clockFrequency = HAL_RCC_GetHCLKFreq(); // Required loop in order to determine a prescaler which will bring the // autoreload value into a valid range. From 098d4d352f2890a5183a08fdb450336c9e267afa Mon Sep 17 00:00:00 2001 From: Travis Brown <143294730+tmb5932@users.noreply.github.com> Date: Sat, 2 Nov 2024 13:11:20 -0400 Subject: [PATCH 43/98] Update SPIf3xx.cpp --- src/core/io/platform/f3xx/SPIf3xx.cpp | 34 ++++++++++++--------------- 1 file changed, 15 insertions(+), 19 deletions(-) diff --git a/src/core/io/platform/f3xx/SPIf3xx.cpp b/src/core/io/platform/f3xx/SPIf3xx.cpp index 31b3ee68..fd4c04aa 100644 --- a/src/core/io/platform/f3xx/SPIf3xx.cpp +++ b/src/core/io/platform/f3xx/SPIf3xx.cpp @@ -240,24 +240,20 @@ void SPIf3xx::configureSPI(uint32_t baudRate, SPIMode mode, bool firstBitMSB) { break; } - // configure the clock prescaler to the closest baudrate to the requested - if (baudRate >= SPI_MAX_BAUD) { - halSPI.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; - } else if (baudRate >= SPI_MAX_BAUD / 2) { - halSPI.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_4; - } else if (baudRate >= SPI_MAX_BAUD / 4) { - halSPI.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8; - } else if (baudRate >= SPI_MAX_BAUD / 8) { - halSPI.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_16; - } else if (baudRate >= SPI_MAX_BAUD / 16) { - halSPI.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_32; - } else if (baudRate >= SPI_MAX_BAUD / 32) { - halSPI.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_64; - } else if (baudRate >= SPI_MAX_BAUD / 64) { - halSPI.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_128; - } else { - halSPI.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_256; + // configure the clock prescaler to the closest baudrate to the requested. + uint32_t prescaler = (HAL_RCC_GetHCLKFreq() / baudRate); + // Convert the prescaler number to the bit value incrementally (log2), produces the value + 1. + halSPI.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; + while (prescaler >>= 1) { + halSPI.Init.BaudRatePrescaler++; + } + + // The max value of the prescaler is 256 which is represented by 0x07+1. + if (halSPI.Init.BaudRatePrescaler > 0x8) { + halSPI.Init.BaudRatePrescaler = 0x8; } + // Shift left 3 to correct bit position in the register and subtract one. + halSPI.Init.BaudRatePrescaler = (halSPI.Init.BaudRatePrescaler - 1) << 3; // configure the bit order of the data; MSB or LSB if (firstBitMSB) { @@ -319,12 +315,12 @@ SPI::SPIStatus SPIf3xx::halToSPIStatus(HAL_StatusTypeDef halStatus) { switch (halStatus) { case HAL_OK: return SPIStatus::OK; - case HAL_ERROR: - return SPIStatus::ERROR; case HAL_BUSY: return SPIStatus::BUSY; case HAL_TIMEOUT: return SPIStatus::TIMEOUT; + default: // HAL_ERROR: + return SPIStatus::ERROR; } } From 6fafbeb36ec1e1841f4f9fcf153ae9d7d8767af6 Mon Sep 17 00:00:00 2001 From: Travis Brown <143294730+tmb5932@users.noreply.github.com> Date: Sat, 2 Nov 2024 13:11:46 -0400 Subject: [PATCH 44/98] Update stm32f302x8.cpp --- src/core/platform/f3xx/stm32f302x8.cpp | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/src/core/platform/f3xx/stm32f302x8.cpp b/src/core/platform/f3xx/stm32f302x8.cpp index dcd7481f..b65fccdd 100644 --- a/src/core/platform/f3xx/stm32f302x8.cpp +++ b/src/core/platform/f3xx/stm32f302x8.cpp @@ -12,7 +12,8 @@ void stm32f3xx_init() { RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; - /** Initializes the RCC Oscillators according to the specified parameters + /** + * Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; @@ -20,13 +21,14 @@ void stm32f3xx_init() { RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; - RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL4; // PLL CLK at 8 * 4 = 32 MHz + RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL8; // PLL CLK at 8 / 2 * 8 = 32 MHz HAL_RCC_OscConfig(&RCC_OscInitStruct); - /** Initializes the CPU, AHB and APB buses clocks + /** + * Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; - RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI; // SYSCLK at 8 MHz (HSI CLK) + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; // SYSCLK at 32 MHz (PLL CLK) RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; From 7f083371b73f455545aa8c3842d57819d3f44d2a Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Mon, 4 Nov 2024 12:35:02 -0500 Subject: [PATCH 45/98] updated comment :) --- src/core/io/platform/f4xx/ADCf4xx.cpp | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/src/core/io/platform/f4xx/ADCf4xx.cpp b/src/core/io/platform/f4xx/ADCf4xx.cpp index 560e2a60..9e4a14de 100644 --- a/src/core/io/platform/f4xx/ADCf4xx.cpp +++ b/src/core/io/platform/f4xx/ADCf4xx.cpp @@ -1,10 +1,8 @@ /** - * DISCLAIMER: THIS MIGHT BREAK AT ANY POINT AND/OR NOT WORK FOR CERTAIN PURPOSES - * * This DMA ADC is different than f3xx DMA ADC! - * f4xx DMA ADC uses a timer to trigger conversions. Timer frequency is 1kHz. + * f4xx DMA ADC uses a timer to trigger ADC conversions. Timer frequency is 1kHz. * - * Timers were used to slow down ADC DMA interrupts, as when allowed to convert constantly as how f3xx is, + * Timers were added to slow down ADC DMA interrupts, as when they ADC DMA is allowed to convert constantly, * the interrupts stopped the program from doing anything else besides interrupt calls. * * WARNING: DOES NOT WORK ON PINS THAT ARE ALREADY IN USE (LIKE UART PINS) From dc070c2cea48a5e5717457e30fe8357154dee0b5 Mon Sep 17 00:00:00 2001 From: Travis Brown <143294730+tmb5932@users.noreply.github.com> Date: Thu, 7 Nov 2024 19:34:33 -0500 Subject: [PATCH 46/98] Update include/core/io/ADC.hpp Co-authored-by: Matthew Magee --- include/core/io/ADC.hpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/core/io/ADC.hpp b/include/core/io/ADC.hpp index 2303ce43..a4ae56e4 100644 --- a/include/core/io/ADC.hpp +++ b/include/core/io/ADC.hpp @@ -47,7 +47,7 @@ class ADC { protected: /// The pin the ADC is attached to Pin pin; - /// The ADC being used + /// The internal ADC being used ADCPeriph adcPeriph; }; From 50c4ff6ed6f209435463214dcc376f8dc608e46f Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Thu, 7 Nov 2024 19:37:48 -0500 Subject: [PATCH 47/98] removed adc array that just shadows hpp array --- src/core/io/platform/f4xx/ADCf4xx.cpp | 1 - 1 file changed, 1 deletion(-) diff --git a/src/core/io/platform/f4xx/ADCf4xx.cpp b/src/core/io/platform/f4xx/ADCf4xx.cpp index 9e4a14de..3f9945bf 100644 --- a/src/core/io/platform/f4xx/ADCf4xx.cpp +++ b/src/core/io/platform/f4xx/ADCf4xx.cpp @@ -58,7 +58,6 @@ namespace core::io { // Combines the channel memory value with the ADC peripherals it supports into one uint32_t #define CHANNEL_SET(adc1, adc2, adc3, ch) (ch | (adc1 << ADC1SHIFT) | (adc2 << ADC2SHIFT) | (adc3 << ADC3SHIFT)) -ADCf4xx::ADC_State_t ADCf4xx::adcArray[3]; bool ADCf4xx::timerInit = false; ADCf4xx::ADCf4xx(Pin pin, ADCPeriph adcPeriph) : ADC(pin, adcPeriph) { From 323b1120f08c2cca7406813831af146f36a22d89 Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Thu, 7 Nov 2024 19:41:32 -0500 Subject: [PATCH 48/98] fixed comments in hpp --- include/core/io/platform/f4xx/ADCf4xx.hpp | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/include/core/io/platform/f4xx/ADCf4xx.hpp b/include/core/io/platform/f4xx/ADCf4xx.hpp index 85746a19..54b360f5 100644 --- a/include/core/io/platform/f4xx/ADCf4xx.hpp +++ b/include/core/io/platform/f4xx/ADCf4xx.hpp @@ -44,7 +44,7 @@ class ADCf4xx : public ADC { TIM_HandleTypeDef htim8; /** - * @brief Structure to represent the state of an ADC instance. + * Structure to represent the state of an ADC instance. * * This structure holds the configuration and current state for an ADC instance, including the * HAL handle for the ADC and DMA, channel configurations, and data buffers for readings. @@ -86,6 +86,7 @@ class ADCf4xx : public ADC { /** * Checks if the channel that is being initialized supports the ADC peripheral that it is being initialized on. + * * @param periph the ADC peripheral being used * @param channel the channel trying to be initialized * @return true if channel is supported by ADCPeriph @@ -94,7 +95,8 @@ class ADCf4xx : public ADC { /** * Returns the ADC number that is in use. Depends on the ADCPeriph enum to check - * @return + * + * @return The adc number that is being used in this specific object */ uint8_t getADCNum(); From 20dcc3f4f3bbe63a1aa77403fc97f2501e24726c Mon Sep 17 00:00:00 2001 From: Travis Brown <143294730+tmb5932@users.noreply.github.com> Date: Thu, 7 Nov 2024 19:41:35 -0500 Subject: [PATCH 49/98] Update src/core/io/platform/f4xx/ADCf4xx.cpp Co-authored-by: Matthew Magee --- src/core/io/platform/f4xx/ADCf4xx.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/core/io/platform/f4xx/ADCf4xx.cpp b/src/core/io/platform/f4xx/ADCf4xx.cpp index 9e4a14de..d64bd122 100644 --- a/src/core/io/platform/f4xx/ADCf4xx.cpp +++ b/src/core/io/platform/f4xx/ADCf4xx.cpp @@ -1,4 +1,4 @@ -/** +/* * This DMA ADC is different than f3xx DMA ADC! * f4xx DMA ADC uses a timer to trigger ADC conversions. Timer frequency is 1kHz. * From a37a74aacfcd8b311c47c9ca07530d825c47903f Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Thu, 7 Nov 2024 19:46:40 -0500 Subject: [PATCH 50/98] made define into constrexpr --- src/core/io/platform/f4xx/ADCf4xx.cpp | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/core/io/platform/f4xx/ADCf4xx.cpp b/src/core/io/platform/f4xx/ADCf4xx.cpp index 3f9945bf..c4d8d033 100644 --- a/src/core/io/platform/f4xx/ADCf4xx.cpp +++ b/src/core/io/platform/f4xx/ADCf4xx.cpp @@ -56,7 +56,10 @@ namespace core::io { #define ADC3SHIFT 7 // Combines the channel memory value with the ADC peripherals it supports into one uint32_t -#define CHANNEL_SET(adc1, adc2, adc3, ch) (ch | (adc1 << ADC1SHIFT) | (adc2 << ADC2SHIFT) | (adc3 << ADC3SHIFT)) +constexpr uint32_t CHANNEL_SET(uint8_t adc1, uint8_t adc2, uint8_t adc3, uint32_t ch) { + return (ch | (adc1 << ADC1SHIFT) | (adc2 << ADC2SHIFT) | (adc3 << ADC3SHIFT)); +} + bool ADCf4xx::timerInit = false; From 6af8eeacf7c712e245ff2c3b8e71212cb47ab739 Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Thu, 7 Nov 2024 19:49:05 -0500 Subject: [PATCH 51/98] added comment for dummy pin, changed myPins var name --- include/core/io/pin.hpp | 2 +- src/core/io/platform/f4xx/ADCf4xx.cpp | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/include/core/io/pin.hpp b/include/core/io/pin.hpp index 62914798..ff8dd5e8 100644 --- a/include/core/io/pin.hpp +++ b/include/core/io/pin.hpp @@ -14,7 +14,7 @@ namespace core::io { * these values. */ enum class Pin { - DUMMY = -1, // THIS INTENTIONALLY DOES NOT POINT TO A PIN + DUMMY = -1, // THIS INTENTIONALLY DOES NOT POINT TO A PIN. Used as a default value, so the default value is no longer PA_O (a real pin) PA_0 = 0x00, PA_1 = 0x01, PA_2 = 0x02, diff --git a/src/core/io/platform/f4xx/ADCf4xx.cpp b/src/core/io/platform/f4xx/ADCf4xx.cpp index c4d8d033..5aabd185 100644 --- a/src/core/io/platform/f4xx/ADCf4xx.cpp +++ b/src/core/io/platform/f4xx/ADCf4xx.cpp @@ -221,11 +221,11 @@ void ADCf4xx::addChannel(uint8_t rank) { GPIO_InitTypeDef gpioInit; uint8_t numOfPins = 1; uint32_t channel; - Pin myPins[] = {pin}; + Pin pins[] = {pin}; uint8_t adcNum = getADCNum(); ADCf4xx::ADC_State_t* adcState = &adcArray[adcNum]; - GPIOf4xx::gpioStateInit(&gpioInit, myPins, numOfPins, GPIO_MODE_ANALOG, GPIO_NOPULL, GPIO_SPEED_FREQ_HIGH); + GPIOf4xx::gpioStateInit(&gpioInit, pins, numOfPins, GPIO_MODE_ANALOG, GPIO_NOPULL, GPIO_SPEED_FREQ_HIGH); ADC_ChannelConfTypeDef adcChannel; From ea1610ae3f1e6f8ecc09d4bf662c5fc44d371995 Mon Sep 17 00:00:00 2001 From: GitHub Build Date: Fri, 8 Nov 2024 00:51:19 +0000 Subject: [PATCH 52/98] Applied Formatting Changes During GitHub Build --- include/core/io/pin.hpp | 3 ++- src/core/io/platform/f4xx/ADCf4xx.cpp | 1 - 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/core/io/pin.hpp b/include/core/io/pin.hpp index ff8dd5e8..4643d2b3 100644 --- a/include/core/io/pin.hpp +++ b/include/core/io/pin.hpp @@ -14,7 +14,8 @@ namespace core::io { * these values. */ enum class Pin { - DUMMY = -1, // THIS INTENTIONALLY DOES NOT POINT TO A PIN. Used as a default value, so the default value is no longer PA_O (a real pin) + DUMMY = -1, // THIS INTENTIONALLY DOES NOT POINT TO A PIN. Used as a default value, so the default value is no + // longer PA_O (a real pin) PA_0 = 0x00, PA_1 = 0x01, PA_2 = 0x02, diff --git a/src/core/io/platform/f4xx/ADCf4xx.cpp b/src/core/io/platform/f4xx/ADCf4xx.cpp index 11d6d785..e233c56a 100644 --- a/src/core/io/platform/f4xx/ADCf4xx.cpp +++ b/src/core/io/platform/f4xx/ADCf4xx.cpp @@ -60,7 +60,6 @@ constexpr uint32_t CHANNEL_SET(uint8_t adc1, uint8_t adc2, uint8_t adc3, uint32_ return (ch | (adc1 << ADC1SHIFT) | (adc2 << ADC2SHIFT) | (adc3 << ADC3SHIFT)); } - bool ADCf4xx::timerInit = false; ADCf4xx::ADCf4xx(Pin pin, ADCPeriph adcPeriph) : ADC(pin, adcPeriph) { From f228444c981a113a540468c17363d733530deaac Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Thu, 7 Nov 2024 19:55:36 -0500 Subject: [PATCH 53/98] updated struct --- include/core/io/platform/f4xx/ADCf4xx.hpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/core/io/platform/f4xx/ADCf4xx.hpp b/include/core/io/platform/f4xx/ADCf4xx.hpp index 54b360f5..0771f288 100644 --- a/include/core/io/platform/f4xx/ADCf4xx.hpp +++ b/include/core/io/platform/f4xx/ADCf4xx.hpp @@ -58,7 +58,7 @@ class ADCf4xx : public ADC { * Each entry corresponds to a specific ADC channel. * halDMA: HAL handle for configuring and controlling DMA for the ADC. */ - typedef struct ADC_State { + struct ADC_State_t { ADC_HandleTypeDef halADC = {0}; uint8_t rank = 1; bool isADCInit = false; @@ -80,7 +80,7 @@ class ADCf4xx : public ADC { Pin::DUMMY}; uint16_t buffer[MAX_CHANNELS] = {0}; DMA_HandleTypeDef halDMA = {0}; - } ADC_State_t; + }; static ADC_State_t adcArray[NUM_ADCS]; From 85f21c42ce39a7376f11c679a89f3bcc7d46f614 Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Thu, 7 Nov 2024 20:04:46 -0500 Subject: [PATCH 54/98] added inline & comments --- include/core/io/platform/f4xx/ADCf4xx.hpp | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/include/core/io/platform/f4xx/ADCf4xx.hpp b/include/core/io/platform/f4xx/ADCf4xx.hpp index 0771f288..9f902cb4 100644 --- a/include/core/io/platform/f4xx/ADCf4xx.hpp +++ b/include/core/io/platform/f4xx/ADCf4xx.hpp @@ -20,6 +20,7 @@ class ADCf4xx : public ADC { * Setup the given pin for ADC usage * * @param[in] pin The pin to setup for ADC + * @param[in] adcPeriph The ADC peripheral being used */ ADCf4xx(Pin pin, ADCPeriph adcPeriph); @@ -91,14 +92,14 @@ class ADCf4xx : public ADC { * @param channel the channel trying to be initialized * @return true if channel is supported by ADCPeriph */ - static bool checkSupport(ADCPeriph periph, uint32_t channel); + inline bool checkSupport(ADCPeriph periph, uint32_t channel); /** * Returns the ADC number that is in use. Depends on the ADCPeriph enum to check * * @return The adc number that is being used in this specific object */ - uint8_t getADCNum(); + inline uint8_t getADCNum(); /** * Initialize the HAL ADC handler. This should only have to be run once From 02e7a6841df349f245abd1de4ba1a8b5e239190d Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Thu, 7 Nov 2024 20:15:40 -0500 Subject: [PATCH 55/98] fixed comments and macros --- src/core/io/platform/f4xx/ADCf4xx.cpp | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/src/core/io/platform/f4xx/ADCf4xx.cpp b/src/core/io/platform/f4xx/ADCf4xx.cpp index e233c56a..a3d2d36e 100644 --- a/src/core/io/platform/f4xx/ADCf4xx.cpp +++ b/src/core/io/platform/f4xx/ADCf4xx.cpp @@ -23,7 +23,7 @@ ADC_HandleTypeDef* adcHandle[3]; } // namespace /** - * @brief This function handles DMA2 stream0 global interrupt. (For ADC 1) + * This function handles DMA2 stream0 global interrupt. (For ADC 1) */ extern "C" void DMA2_Stream0_IRQHandler(void) { HAL_DMA_IRQHandler(dmaHandle[0]); @@ -31,7 +31,7 @@ extern "C" void DMA2_Stream0_IRQHandler(void) { } /** - * @brief This function handles DMA2 stream2 global interrupt. (For ADC 2) + * This function handles DMA2 stream2 global interrupt. (For ADC 2) */ extern "C" void DMA2_Stream2_IRQHandler(void) { HAL_DMA_IRQHandler(dmaHandle[1]); @@ -39,7 +39,7 @@ extern "C" void DMA2_Stream2_IRQHandler(void) { } /** - * @brief This function handles DMA2 stream1 global interrupt. (For ADC 3) + * This function handles DMA2 stream1 global interrupt. (For ADC 3) */ extern "C" void DMA2_Stream1_IRQHandler(void) { HAL_DMA_IRQHandler(dmaHandle[2]); @@ -47,9 +47,9 @@ extern "C" void DMA2_Stream1_IRQHandler(void) { } namespace core::io { -#define ADC1_SLOT 0 -#define ADC2_SLOT 1 -#define ADC3_SLOT 2 +constexpr uint8_t ADC1_SLOT = 0; +constexpr uint8_t ADC2_SLOT = 1; +constexpr uint8_t ADC3_SLOT = 2; #define ADC1SHIFT 5 #define ADC2SHIFT 6 From 27784a2c06ca0c4a216fb2d0818a8ba35a92b45f Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Thu, 7 Nov 2024 20:36:56 -0500 Subject: [PATCH 56/98] made adcState a local variable --- include/core/io/platform/f4xx/ADCf4xx.hpp | 4 ++-- src/core/io/platform/f4xx/ADCf4xx.cpp | 14 ++++---------- 2 files changed, 6 insertions(+), 12 deletions(-) diff --git a/include/core/io/platform/f4xx/ADCf4xx.hpp b/include/core/io/platform/f4xx/ADCf4xx.hpp index 9f902cb4..82f5f03f 100644 --- a/include/core/io/platform/f4xx/ADCf4xx.hpp +++ b/include/core/io/platform/f4xx/ADCf4xx.hpp @@ -42,7 +42,7 @@ class ADCf4xx : public ADC { // Flag to indicate if the timer has been initialized static bool timerInit; // Timer handle for TIM8, used to configure and control the timer instance - TIM_HandleTypeDef htim8; + static TIM_HandleTypeDef htim8; /** * Structure to represent the state of an ADC instance. @@ -84,7 +84,7 @@ class ADCf4xx : public ADC { }; static ADC_State_t adcArray[NUM_ADCS]; - + ADC_State_t* adcState; /** * Checks if the channel that is being initialized supports the ADC peripheral that it is being initialized on. * diff --git a/src/core/io/platform/f4xx/ADCf4xx.cpp b/src/core/io/platform/f4xx/ADCf4xx.cpp index a3d2d36e..6cde70d9 100644 --- a/src/core/io/platform/f4xx/ADCf4xx.cpp +++ b/src/core/io/platform/f4xx/ADCf4xx.cpp @@ -64,8 +64,8 @@ bool ADCf4xx::timerInit = false; ADCf4xx::ADCf4xx(Pin pin, ADCPeriph adcPeriph) : ADC(pin, adcPeriph) { // Get adc state being updated - uint8_t adcNum = getADCNum(); - ADCf4xx::ADC_State_t* adcState = &adcArray[adcNum]; + uint8_t adcNum = getADCNum(); + adcState = &adcArray[adcNum]; if (adcState->rank == MAX_CHANNELS) { log::LOGGER.log(log::Logger::LogLevel::WARNING, "ADC %d ALREADY HAS MAX PINS!!", (adcNum + 1)); @@ -109,8 +109,6 @@ float ADCf4xx::read() { } uint32_t ADCf4xx::readRaw() { - ADCf4xx::ADC_State_t* adcState = &adcArray[getADCNum()]; - uint8_t channelNum = 0; while (adcState->channels[channelNum] != pin) { channelNum++; @@ -128,7 +126,6 @@ void ADCf4xx::initADC(uint8_t num_channels) { /** Configure the global features of the ADC (Clock, Resolution, Data * Alignment and number of conversion) */ - ADCf4xx::ADC_State_t* adcState = &adcArray[getADCNum()]; ADC_HandleTypeDef* halADC = &adcState->halADC; // Set instance to the ADC peripheral being using halADC->Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2; @@ -164,7 +161,6 @@ void ADCf4xx::initADC(uint8_t num_channels) { void ADCf4xx::initDMA() { uint8_t adcNum = getADCNum(); - ADCf4xx::ADC_State_t* adcState = &adcArray[adcNum]; DMA_HandleTypeDef* dma = &adcState->halDMA; // Set DMA instance to proper config settings switch (adcNum) { @@ -220,9 +216,7 @@ void ADCf4xx::addChannel(uint8_t rank) { GPIO_InitTypeDef gpioInit; uint8_t numOfPins = 1; uint32_t channel; - Pin pins[] = {pin}; - uint8_t adcNum = getADCNum(); - ADCf4xx::ADC_State_t* adcState = &adcArray[adcNum]; + Pin pins[] = {pin}; GPIOf4xx::gpioStateInit(&gpioInit, pins, numOfPins, GPIO_MODE_ANALOG, GPIO_NOPULL, GPIO_SPEED_FREQ_HIGH); @@ -288,7 +282,7 @@ void ADCf4xx::addChannel(uint8_t rank) { // Masks channel back to proper value (Zero's out ADC information bits) adcChannel.Channel = channel & 0x1F; } else { - log::LOGGER.log(log::Logger::LogLevel::ERROR, "ADC %d DOES NOT SUPPORT PIN 0x%x!!", (adcNum + 1), pin); + log::LOGGER.log(log::Logger::LogLevel::ERROR, "ADC %d DOES NOT SUPPORT PIN 0x%x!!", (getADCNum() + 1), pin); // Causes HARD FAULT if pin does not support the ADC peripheral being used. THIS IS INTENTIONAL! *((volatile int*) 0xFFFFFFFF) = 0; // This address is invalid } From f4d19dbc8727441bf1b368a2e2b950343df10d86 Mon Sep 17 00:00:00 2001 From: GitHub Build Date: Fri, 8 Nov 2024 01:38:17 +0000 Subject: [PATCH 57/98] Applied Formatting Changes During GitHub Build --- src/core/io/platform/f4xx/ADCf4xx.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/core/io/platform/f4xx/ADCf4xx.cpp b/src/core/io/platform/f4xx/ADCf4xx.cpp index 6cde70d9..215d0bc6 100644 --- a/src/core/io/platform/f4xx/ADCf4xx.cpp +++ b/src/core/io/platform/f4xx/ADCf4xx.cpp @@ -126,7 +126,7 @@ void ADCf4xx::initADC(uint8_t num_channels) { /** Configure the global features of the ADC (Clock, Resolution, Data * Alignment and number of conversion) */ - ADC_HandleTypeDef* halADC = &adcState->halADC; + ADC_HandleTypeDef* halADC = &adcState->halADC; // Set instance to the ADC peripheral being using halADC->Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2; halADC->Init.Resolution = ADC_RESOLUTION_12B; @@ -160,8 +160,8 @@ void ADCf4xx::initADC(uint8_t num_channels) { } void ADCf4xx::initDMA() { - uint8_t adcNum = getADCNum(); - DMA_HandleTypeDef* dma = &adcState->halDMA; + uint8_t adcNum = getADCNum(); + DMA_HandleTypeDef* dma = &adcState->halDMA; // Set DMA instance to proper config settings switch (adcNum) { case ADC1_SLOT: From ce0582a7c3b73147ea846b8e26fbcef89e425de1 Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Thu, 7 Nov 2024 20:49:00 -0500 Subject: [PATCH 58/98] added logs to everything fr --- include/core/io/platform/f4xx/ADCf4xx.hpp | 1 + samples/adc/multi_adc.cpp | 18 +++++++++--------- samples/adc/single_adc.cpp | 12 ++++++------ 3 files changed, 16 insertions(+), 15 deletions(-) diff --git a/include/core/io/platform/f4xx/ADCf4xx.hpp b/include/core/io/platform/f4xx/ADCf4xx.hpp index 82f5f03f..ce31026c 100644 --- a/include/core/io/platform/f4xx/ADCf4xx.hpp +++ b/include/core/io/platform/f4xx/ADCf4xx.hpp @@ -85,6 +85,7 @@ class ADCf4xx : public ADC { static ADC_State_t adcArray[NUM_ADCS]; ADC_State_t* adcState; + uint8_t adcNum; /** * Checks if the channel that is being initialized supports the ADC peripheral that it is being initialized on. * diff --git a/samples/adc/multi_adc.cpp b/samples/adc/multi_adc.cpp index 609bd327..c13209dd 100644 --- a/samples/adc/multi_adc.cpp +++ b/samples/adc/multi_adc.cpp @@ -30,15 +30,15 @@ int main() { io::ADC& adc1 = io::getADC(); while (1) { - uart.printf("--------------------\r\n"); - uart.printf("ADC0 : %d mV\r\n", static_cast(adc0.read() * 1000)); - uart.printf("ADC0: %d%%\r\n", static_cast(adc0.readPercentage() * 100)); - uart.printf("ADC0 raw: %d\r\n\r\n", adc0.readRaw()); - - uart.printf("ADC1 : %d mV\r\n", static_cast(adc1.read() * 1000)); - uart.printf("ADC1: %d%%\r\n", static_cast(adc1.readPercentage() * 100)); - uart.printf("ADC1 raw: %d\r\n", adc1.readRaw()); - uart.printf("--------------------\r\n\r\n"); + core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "--------------------\r\n"); + core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC0 : %d mV\r\n", static_cast(adc0.read() * 1000)); + core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC0: %d%%\r\n", static_cast(adc0.readPercentage() * 100)); + core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC0 raw: %d\r\n\r\n", adc0.readRaw()); + + core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC1 : %d mV\r\n", static_cast(adc1.read() * 1000)); + core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC1: %d%%\r\n", static_cast(adc1.readPercentage() * 100)); + core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC1 raw: %d\r\n\r\n", adc1.readRaw()); + core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "--------------------\r\n\r\n"); time::wait(500); } } diff --git a/samples/adc/single_adc.cpp b/samples/adc/single_adc.cpp index 4c299ad1..ad164d31 100644 --- a/samples/adc/single_adc.cpp +++ b/samples/adc/single_adc.cpp @@ -20,7 +20,7 @@ int main() { // Set up the logger to catch errors in ADC creation core::log::LOGGER.setUART(&uart); - core::log::LOGGER.setLogLevel(core::log::Logger::LogLevel::ERROR); + core::log::LOGGER.setLogLevel(core::log::Logger::LogLevel::INFO); uart.printf("Starting ADC test\r\n"); @@ -29,11 +29,11 @@ int main() { io::ADC& adc0 = io::getADC(); while (1) { - uart.printf("--------------------\r\n"); - uart.printf("ADC0 : %d mV\r\n", static_cast(adc0.read() * 1000)); - uart.printf("ADC0: %d%%\r\n", static_cast(adc0.readPercentage() * 100)); - uart.printf("ADC0 raw: %d\r\n\r\n", adc0.readRaw()); - uart.printf("--------------------\r\n\r\n"); + core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "--------------------\r\n"); + core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC0 : %d mV\r\n", static_cast(adc0.read() * 1000)); + core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC0: %d%%\r\n", static_cast(adc0.readPercentage() * 100)); + core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC0 raw: %d\r\n\r\n", adc0.readRaw()); + core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "--------------------\r\n\r\n"); time::wait(500); } } From 6542fef37749a275cfbc6a462006b8987e15b709 Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Thu, 7 Nov 2024 20:49:19 -0500 Subject: [PATCH 59/98] changed to local variables --- src/core/io/platform/f4xx/ADCf4xx.cpp | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/src/core/io/platform/f4xx/ADCf4xx.cpp b/src/core/io/platform/f4xx/ADCf4xx.cpp index 6cde70d9..f1b6f5c8 100644 --- a/src/core/io/platform/f4xx/ADCf4xx.cpp +++ b/src/core/io/platform/f4xx/ADCf4xx.cpp @@ -64,8 +64,8 @@ bool ADCf4xx::timerInit = false; ADCf4xx::ADCf4xx(Pin pin, ADCPeriph adcPeriph) : ADC(pin, adcPeriph) { // Get adc state being updated - uint8_t adcNum = getADCNum(); - adcState = &adcArray[adcNum]; + adcNum = getADCNum(); + adcState = &adcArray[adcNum]; if (adcState->rank == MAX_CHANNELS) { log::LOGGER.log(log::Logger::LogLevel::WARNING, "ADC %d ALREADY HAS MAX PINS!!", (adcNum + 1)); @@ -140,7 +140,7 @@ void ADCf4xx::initADC(uint8_t num_channels) { halADC->Init.DMAContinuousRequests = ENABLE; halADC->Init.EOCSelection = ADC_EOC_SINGLE_CONV; - switch (getADCNum()) { + switch (adcNum) { case ADC1_SLOT: halADC->Instance = ADC1; __HAL_RCC_ADC1_CLK_ENABLE(); @@ -154,14 +154,14 @@ void ADCf4xx::initADC(uint8_t num_channels) { __HAL_RCC_ADC3_CLK_ENABLE(); break; default: + log::LOGGER.log(log::Logger::LogLevel::ERROR, "INVALID ADC NUMBER!!"); return; // Should never get here } HAL_ADC_Init(halADC); } void ADCf4xx::initDMA() { - uint8_t adcNum = getADCNum(); - DMA_HandleTypeDef* dma = &adcState->halDMA; + DMA_HandleTypeDef* dma = &adcState->halDMA; // Set DMA instance to proper config settings switch (adcNum) { case ADC1_SLOT: @@ -177,6 +177,7 @@ void ADCf4xx::initDMA() { dma->Init.Channel = DMA_CHANNEL_2; break; default: + log::LOGGER.log(log::Logger::LogLevel::ERROR, "INVALID ADC NUMBER!!"); return; // Should never get here } dma->Init.Direction = DMA_PERIPH_TO_MEMORY; @@ -207,6 +208,7 @@ void ADCf4xx::initDMA() { HAL_NVIC_EnableIRQ(DMA2_Stream1_IRQn); break; default: + log::LOGGER.log(log::Logger::LogLevel::ERROR, "INVALID ADC NUMBER!!"); return; // Should never get here } __HAL_LINKDMA(&adcState->halADC, DMA_Handle, *dma); @@ -274,6 +276,7 @@ void ADCf4xx::addChannel(uint8_t rank) { break; default: channel = 0; + log::LOGGER.log(log::Logger::LogLevel::ERROR, "INVALID PIN 0x%x!!", pin); break; // Should never get here } @@ -282,7 +285,7 @@ void ADCf4xx::addChannel(uint8_t rank) { // Masks channel back to proper value (Zero's out ADC information bits) adcChannel.Channel = channel & 0x1F; } else { - log::LOGGER.log(log::Logger::LogLevel::ERROR, "ADC %d DOES NOT SUPPORT PIN 0x%x!!", (getADCNum() + 1), pin); + log::LOGGER.log(log::Logger::LogLevel::ERROR, "ADC %d DOES NOT SUPPORT PIN 0x%x!!", (adcNum + 1), pin); // Causes HARD FAULT if pin does not support the ADC peripheral being used. THIS IS INTENTIONAL! *((volatile int*) 0xFFFFFFFF) = 0; // This address is invalid } From dff10d48f4752d9968b73f0339b08241913df3ed Mon Sep 17 00:00:00 2001 From: GitHub Build Date: Fri, 8 Nov 2024 01:51:23 +0000 Subject: [PATCH 60/98] Applied Formatting Changes During GitHub Build --- samples/adc/multi_adc.cpp | 12 ++++++++---- samples/adc/single_adc.cpp | 6 ++++-- 2 files changed, 12 insertions(+), 6 deletions(-) diff --git a/samples/adc/multi_adc.cpp b/samples/adc/multi_adc.cpp index c13209dd..b3609c92 100644 --- a/samples/adc/multi_adc.cpp +++ b/samples/adc/multi_adc.cpp @@ -31,12 +31,16 @@ int main() { while (1) { core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "--------------------\r\n"); - core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC0 : %d mV\r\n", static_cast(adc0.read() * 1000)); - core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC0: %d%%\r\n", static_cast(adc0.readPercentage() * 100)); + core::log::LOGGER.log( + core::log::Logger::LogLevel::INFO, "ADC0 : %d mV\r\n", static_cast(adc0.read() * 1000)); + core::log::LOGGER.log( + core::log::Logger::LogLevel::INFO, "ADC0: %d%%\r\n", static_cast(adc0.readPercentage() * 100)); core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC0 raw: %d\r\n\r\n", adc0.readRaw()); - core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC1 : %d mV\r\n", static_cast(adc1.read() * 1000)); - core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC1: %d%%\r\n", static_cast(adc1.readPercentage() * 100)); + core::log::LOGGER.log( + core::log::Logger::LogLevel::INFO, "ADC1 : %d mV\r\n", static_cast(adc1.read() * 1000)); + core::log::LOGGER.log( + core::log::Logger::LogLevel::INFO, "ADC1: %d%%\r\n", static_cast(adc1.readPercentage() * 100)); core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC1 raw: %d\r\n\r\n", adc1.readRaw()); core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "--------------------\r\n\r\n"); time::wait(500); diff --git a/samples/adc/single_adc.cpp b/samples/adc/single_adc.cpp index ad164d31..9ad48470 100644 --- a/samples/adc/single_adc.cpp +++ b/samples/adc/single_adc.cpp @@ -30,8 +30,10 @@ int main() { while (1) { core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "--------------------\r\n"); - core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC0 : %d mV\r\n", static_cast(adc0.read() * 1000)); - core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC0: %d%%\r\n", static_cast(adc0.readPercentage() * 100)); + core::log::LOGGER.log( + core::log::Logger::LogLevel::INFO, "ADC0 : %d mV\r\n", static_cast(adc0.read() * 1000)); + core::log::LOGGER.log( + core::log::Logger::LogLevel::INFO, "ADC0: %d%%\r\n", static_cast(adc0.readPercentage() * 100)); core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC0 raw: %d\r\n\r\n", adc0.readRaw()); core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "--------------------\r\n\r\n"); time::wait(500); From 73b900126ea05e6561d931bd41cf004584a68cca Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Thu, 7 Nov 2024 21:01:17 -0500 Subject: [PATCH 61/98] moved interrupts to inside blank namespace and added space in hpp. --- include/core/io/platform/f4xx/ADCf4xx.hpp | 1 + src/core/io/platform/f4xx/ADCf4xx.cpp | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/include/core/io/platform/f4xx/ADCf4xx.hpp b/include/core/io/platform/f4xx/ADCf4xx.hpp index ce31026c..2a7b5fea 100644 --- a/include/core/io/platform/f4xx/ADCf4xx.hpp +++ b/include/core/io/platform/f4xx/ADCf4xx.hpp @@ -86,6 +86,7 @@ class ADCf4xx : public ADC { static ADC_State_t adcArray[NUM_ADCS]; ADC_State_t* adcState; uint8_t adcNum; + /** * Checks if the channel that is being initialized supports the ADC peripheral that it is being initialized on. * diff --git a/src/core/io/platform/f4xx/ADCf4xx.cpp b/src/core/io/platform/f4xx/ADCf4xx.cpp index 53f0b7cd..3bbc55f8 100644 --- a/src/core/io/platform/f4xx/ADCf4xx.cpp +++ b/src/core/io/platform/f4xx/ADCf4xx.cpp @@ -20,7 +20,6 @@ namespace { /// This is made as a global variable so that it is accessible in the interrupt. DMA_HandleTypeDef* dmaHandle[3]; ADC_HandleTypeDef* adcHandle[3]; -} // namespace /** * This function handles DMA2 stream0 global interrupt. (For ADC 1) @@ -45,6 +44,7 @@ extern "C" void DMA2_Stream1_IRQHandler(void) { HAL_DMA_IRQHandler(dmaHandle[2]); HAL_ADC_IRQHandler(adcHandle[2]); } +} // namespace namespace core::io { constexpr uint8_t ADC1_SLOT = 0; From f8a8eb7cab1fbf839f359baee501224dccc4de8e Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Thu, 7 Nov 2024 23:22:15 -0500 Subject: [PATCH 62/98] added checkSupport to f3hpp --- include/core/io/platform/f3xx/ADCf3xx.hpp | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/include/core/io/platform/f3xx/ADCf3xx.hpp b/include/core/io/platform/f3xx/ADCf3xx.hpp index c1f4bfe4..4412e4d0 100644 --- a/include/core/io/platform/f3xx/ADCf3xx.hpp +++ b/include/core/io/platform/f3xx/ADCf3xx.hpp @@ -62,6 +62,15 @@ class ADCf3xx : public ADC { * was added to the ADC starting at 1 */ void addChannel(uint8_t rank); + + /** + * Checks if the channel that is being initialized supports the ADC peripheral that it is being initialized on. + * + * @param periph the ADC peripheral being used + * @param channel the channel trying to be initialized + * @return true if channel is supported by ADCPeriph, false otherwise + */ + inline bool checkSupport(ADCPeriph periph, uint32_t channel); }; } // namespace core::io From 1d42469ebd0db521d23341551c316d887ad03f02 Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Thu, 7 Nov 2024 23:26:44 -0500 Subject: [PATCH 63/98] updated f3 adc --- src/core/io/platform/f3xx/ADCf3xx.cpp | 59 +++++++++++++++++++-------- 1 file changed, 42 insertions(+), 17 deletions(-) diff --git a/src/core/io/platform/f3xx/ADCf3xx.cpp b/src/core/io/platform/f3xx/ADCf3xx.cpp index cacc9951..5f1571fb 100644 --- a/src/core/io/platform/f3xx/ADCf3xx.cpp +++ b/src/core/io/platform/f3xx/ADCf3xx.cpp @@ -4,13 +4,13 @@ #include +#include #include #include #include namespace { -/// This is made as a global variable so that it is accessible in the -// interrupt. +/// This is made as a global variable so that it is accessible in the interrupt. DMA_HandleTypeDef* dmaHandle; ADC_HandleTypeDef* adcHandle; @@ -22,6 +22,12 @@ extern "C" void DMA1_Channel1_IRQHandler(void) { } namespace core::io { +constexpr uint8_t ADC1SHIFT = 5; + +// Combines the channel memory value with the ADC peripherals it supports into one uint32_t +constexpr uint32_t CHANNEL_SET(uint8_t adc1, uint32_t ch) { + return (ch | (adc1 << ADC1SHIFT)); +} // Init static member variables ADC_HandleTypeDef ADCf3xx::halADC = {0}; @@ -135,6 +141,7 @@ void ADCf3xx::addChannel(uint8_t rank) { GPIO_InitTypeDef gpioInit; Pin myPins[] = {pin}; uint8_t numOfPins = 1; + uint32_t channel; GPIOf3xx::gpioStateInit(&gpioInit, myPins, numOfPins, GPIO_MODE_ANALOG, GPIO_NOPULL, GPIO_SPEED_FREQ_HIGH); @@ -142,57 +149,67 @@ void ADCf3xx::addChannel(uint8_t rank) { switch (pin) { case Pin::PA_0: - adcChannel.Channel = ADC_CHANNEL_1; + channel = CHANNEL_SET(1, ADC_CHANNEL_1); break; case Pin::PA_1: - adcChannel.Channel = ADC_CHANNEL_2; + channel = CHANNEL_SET(1, ADC_CHANNEL_2); break; case Pin::PA_2: - adcChannel.Channel = ADC_CHANNEL_3; + channel = CHANNEL_SET(1, ADC_CHANNEL_3); break; case Pin::PA_3: - adcChannel.Channel = ADC_CHANNEL_4; + channel = CHANNEL_SET(1, ADC_CHANNEL_4); break; case Pin::PA_4: - adcChannel.Channel = ADC_CHANNEL_5; + channel = CHANNEL_SET(1, ADC_CHANNEL_5); break; case Pin::PC_0: - adcChannel.Channel = ADC_CHANNEL_6; + channel = CHANNEL_SET(1, ADC_CHANNEL_6); break; case Pin::PC_1: - adcChannel.Channel = ADC_CHANNEL_7; + channel = CHANNEL_SET(1, ADC_CHANNEL_7); break; case Pin::PC_2: - adcChannel.Channel = ADC_CHANNEL_8; + channel = CHANNEL_SET(1, ADC_CHANNEL_8); break; case Pin::PC_3: - adcChannel.Channel = ADC_CHANNEL_9; + channel = CHANNEL_SET(1, ADC_CHANNEL_9); break; case Pin::PA_6: - adcChannel.Channel = ADC_CHANNEL_10; + channel = CHANNEL_SET(1, ADC_CHANNEL_10); break; case Pin::PB_0: - adcChannel.Channel = ADC_CHANNEL_11; + channel = CHANNEL_SET(1, ADC_CHANNEL_11); break; case Pin::PB_1: - adcChannel.Channel = ADC_CHANNEL_12; + channel = CHANNEL_SET(1, ADC_CHANNEL_12); break; case Pin::PB_13: - adcChannel.Channel = ADC_CHANNEL_13; + channel = CHANNEL_SET(1, ADC_CHANNEL_13); break; case Pin::PB_11: - adcChannel.Channel = ADC_CHANNEL_14; + channel = CHANNEL_SET(1, ADC_CHANNEL_14); break; case Pin::PA_7: - adcChannel.Channel = ADC_CHANNEL_15; + channel = CHANNEL_SET(1, ADC_CHANNEL_15); break; default: + channel = 0; + log::LOGGER.log(log::Logger::LogLevel::ERROR, "INVALID PIN 0x%x!!", pin); break; // Should never get here } // Subtract 1 because rank starts at 1 channels[rank - 1] = pin; + // This checks if the pin being used supports the ADC being used + if (checkSupport(adcPeriph, channel)) { + // Masks channel back to proper value (Zero's out ADC information bits) + adcChannel.Channel = channel & 0x1F; + } else { + log::LOGGER.log(log::Logger::LogLevel::ERROR, "DOES NOT SUPPORT PIN 0x%x!!", pin); + } + adcChannel.Rank = rank; adcChannel.SamplingTime = ADC_SAMPLETIME_601CYCLES_5; adcChannel.Offset = 0; @@ -203,4 +220,12 @@ void ADCf3xx::addChannel(uint8_t rank) { HAL_ADC_ConfigChannel(&halADC, &adcChannel); } +inline bool ADCf3xx::checkSupport(ADCPeriph periph, uint32_t channel) { + // Checks if the channel contains the bit signifying the proper ADC peripheral support + switch (periph) { + case ADCPeriph::ONE: + return channel & (1 << ADC1SHIFT); + } +} + } // namespace core::io From b2c30adb7facda0838223242fec5bb1ea0b8e1eb Mon Sep 17 00:00:00 2001 From: GitHub Build Date: Fri, 8 Nov 2024 04:28:17 +0000 Subject: [PATCH 64/98] Applied Formatting Changes During GitHub Build --- src/core/io/platform/f3xx/ADCf3xx.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/core/io/platform/f3xx/ADCf3xx.cpp b/src/core/io/platform/f3xx/ADCf3xx.cpp index 5f1571fb..c612c90e 100644 --- a/src/core/io/platform/f3xx/ADCf3xx.cpp +++ b/src/core/io/platform/f3xx/ADCf3xx.cpp @@ -4,10 +4,10 @@ #include -#include #include #include #include +#include namespace { /// This is made as a global variable so that it is accessible in the interrupt. From 5745415a755c00d280b40fa5d793e368e5c7fc36 Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Fri, 8 Nov 2024 19:09:04 -0500 Subject: [PATCH 65/98] updated member initalization list --- src/core/io/platform/f4xx/ADCf4xx.cpp | 44 +++++++++++++-------------- 1 file changed, 21 insertions(+), 23 deletions(-) diff --git a/src/core/io/platform/f4xx/ADCf4xx.cpp b/src/core/io/platform/f4xx/ADCf4xx.cpp index 3bbc55f8..af9bdcad 100644 --- a/src/core/io/platform/f4xx/ADCf4xx.cpp +++ b/src/core/io/platform/f4xx/ADCf4xx.cpp @@ -39,6 +39,7 @@ extern "C" void DMA2_Stream2_IRQHandler(void) { /** * This function handles DMA2 stream1 global interrupt. (For ADC 3) + * This is correct, stream 1 for ADC 3. STM is odd and makes things confusing */ extern "C" void DMA2_Stream1_IRQHandler(void) { HAL_DMA_IRQHandler(dmaHandle[2]); @@ -51,9 +52,9 @@ constexpr uint8_t ADC1_SLOT = 0; constexpr uint8_t ADC2_SLOT = 1; constexpr uint8_t ADC3_SLOT = 2; -#define ADC1SHIFT 5 -#define ADC2SHIFT 6 -#define ADC3SHIFT 7 +constexpr uint8_t ADC1SHIFT = 5; +constexpr uint8_t ADC2SHIFT = 6; +constexpr uint8_t ADC3SHIFT = 7; // Combines the channel memory value with the ADC peripherals it supports into one uint32_t constexpr uint32_t CHANNEL_SET(uint8_t adc1, uint8_t adc2, uint8_t adc3, uint32_t ch) { @@ -62,12 +63,11 @@ constexpr uint32_t CHANNEL_SET(uint8_t adc1, uint8_t adc2, uint8_t adc3, uint32_ bool ADCf4xx::timerInit = false; -ADCf4xx::ADCf4xx(Pin pin, ADCPeriph adcPeriph) : ADC(pin, adcPeriph) { +ADCf4xx::ADCf4xx(Pin pin, ADCPeriph adcPeriph) : ADC(pin, adcPeriph), adcState(adcArray[getADCNum()]) { // Get adc state being updated adcNum = getADCNum(); - adcState = &adcArray[adcNum]; - if (adcState->rank == MAX_CHANNELS) { + if (adcState.rank == MAX_CHANNELS) { log::LOGGER.log(log::Logger::LogLevel::WARNING, "ADC %d ALREADY HAS MAX PINS!!", (adcNum + 1)); return; } @@ -77,17 +77,17 @@ ADCf4xx::ADCf4xx(Pin pin, ADCPeriph adcPeriph) : ADC(pin, adcPeriph) { timerInit = false; } - if (adcState->isADCInit) { - HAL_ADC_Stop_DMA(&adcState->halADC); - HAL_DMA_DeInit(&adcState->halDMA); + if (adcState.isADCInit) { + HAL_ADC_Stop_DMA(&adcState.halADC); + HAL_DMA_DeInit(&adcState.halDMA); } else { __HAL_RCC_DMA2_CLK_ENABLE(); - adcState->isADCInit = true; + adcState.isADCInit = true; } initDMA(); - initADC(adcState->rank); - addChannel(adcState->rank); + initADC(adcState.rank); + addChannel(adcState.rank); dmaHandle[adcNum] = &this->adcArray[adcNum].halDMA; adcHandle[adcNum] = &this->adcArray[adcNum].halADC; @@ -99,8 +99,8 @@ ADCf4xx::ADCf4xx(Pin pin, ADCPeriph adcPeriph) : ADC(pin, adcPeriph) { timerInit = true; } - HAL_ADC_Start_DMA(&adcState->halADC, reinterpret_cast(&adcState->buffer[0]), adcState->rank); - adcState->rank++; + HAL_ADC_Start_DMA(&adcState.halADC, reinterpret_cast(&adcState.buffer[0]), adcState.rank); + adcState.rank++; } float ADCf4xx::read() { @@ -110,11 +110,11 @@ float ADCf4xx::read() { uint32_t ADCf4xx::readRaw() { uint8_t channelNum = 0; - while (adcState->channels[channelNum] != pin) { + while (adcState.channels[channelNum] != pin) { channelNum++; } - return adcState->buffer[channelNum]; + return adcState.buffer[channelNum]; } float ADCf4xx::readPercentage() { @@ -126,7 +126,7 @@ void ADCf4xx::initADC(uint8_t num_channels) { /** Configure the global features of the ADC (Clock, Resolution, Data * Alignment and number of conversion) */ - ADC_HandleTypeDef* halADC = &adcState->halADC; + ADC_HandleTypeDef* halADC = &adcState.halADC; // Set instance to the ADC peripheral being using halADC->Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2; halADC->Init.Resolution = ADC_RESOLUTION_12B; @@ -161,7 +161,7 @@ void ADCf4xx::initADC(uint8_t num_channels) { } void ADCf4xx::initDMA() { - DMA_HandleTypeDef* dma = &adcState->halDMA; + DMA_HandleTypeDef* dma = &adcState.halDMA; // Set DMA instance to proper config settings switch (adcNum) { case ADC1_SLOT: @@ -211,7 +211,7 @@ void ADCf4xx::initDMA() { log::LOGGER.log(log::Logger::LogLevel::ERROR, "INVALID ADC NUMBER!!"); return; // Should never get here } - __HAL_LINKDMA(&adcState->halADC, DMA_Handle, *dma); + __HAL_LINKDMA(&adcState.halADC, DMA_Handle, *dma); } void ADCf4xx::addChannel(uint8_t rank) { @@ -286,18 +286,16 @@ void ADCf4xx::addChannel(uint8_t rank) { adcChannel.Channel = channel & 0x1F; } else { log::LOGGER.log(log::Logger::LogLevel::ERROR, "ADC %d DOES NOT SUPPORT PIN 0x%x!!", (adcNum + 1), pin); - // Causes HARD FAULT if pin does not support the ADC peripheral being used. THIS IS INTENTIONAL! - *((volatile int*) 0xFFFFFFFF) = 0; // This address is invalid } // Subtract 1 because rank starts at 1 - adcState->channels[rank - 1] = pin; + adcState.channels[rank - 1] = pin; adcChannel.Rank = rank; adcChannel.SamplingTime = ADC_SAMPLETIME_3CYCLES; adcChannel.Offset = 0; - HAL_ADC_ConfigChannel(&adcState->halADC, &adcChannel); + HAL_ADC_ConfigChannel(&adcState.halADC, &adcChannel); } inline bool ADCf4xx::checkSupport(ADCPeriph periph, uint32_t channel) { From 2f3bf06bb806f8b258b206992415eab0792a6d79 Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Fri, 8 Nov 2024 19:09:16 -0500 Subject: [PATCH 66/98] changed adcState to a reference --- include/core/io/platform/f4xx/ADCf4xx.hpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/core/io/platform/f4xx/ADCf4xx.hpp b/include/core/io/platform/f4xx/ADCf4xx.hpp index 2a7b5fea..dec22aae 100644 --- a/include/core/io/platform/f4xx/ADCf4xx.hpp +++ b/include/core/io/platform/f4xx/ADCf4xx.hpp @@ -84,7 +84,7 @@ class ADCf4xx : public ADC { }; static ADC_State_t adcArray[NUM_ADCS]; - ADC_State_t* adcState; + ADC_State_t& adcState; uint8_t adcNum; /** @@ -92,7 +92,7 @@ class ADCf4xx : public ADC { * * @param periph the ADC peripheral being used * @param channel the channel trying to be initialized - * @return true if channel is supported by ADCPeriph + * @return true if channel is supported by ADCPeriph, false otherwise */ inline bool checkSupport(ADCPeriph periph, uint32_t channel); From 5ccb2c342868eb12a3dc5176cb4a4c6d901dc127 Mon Sep 17 00:00:00 2001 From: GitHub Build Date: Sat, 9 Nov 2024 00:10:40 +0000 Subject: [PATCH 67/98] Applied Formatting Changes During GitHub Build --- src/core/io/platform/f4xx/ADCf4xx.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/core/io/platform/f4xx/ADCf4xx.cpp b/src/core/io/platform/f4xx/ADCf4xx.cpp index af9bdcad..304ba0f9 100644 --- a/src/core/io/platform/f4xx/ADCf4xx.cpp +++ b/src/core/io/platform/f4xx/ADCf4xx.cpp @@ -65,7 +65,7 @@ bool ADCf4xx::timerInit = false; ADCf4xx::ADCf4xx(Pin pin, ADCPeriph adcPeriph) : ADC(pin, adcPeriph), adcState(adcArray[getADCNum()]) { // Get adc state being updated - adcNum = getADCNum(); + adcNum = getADCNum(); if (adcState.rank == MAX_CHANNELS) { log::LOGGER.log(log::Logger::LogLevel::WARNING, "ADC %d ALREADY HAS MAX PINS!!", (adcNum + 1)); From 546bd046adb93b0280aeb2dd148daa80e548c03a Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Fri, 8 Nov 2024 19:15:18 -0500 Subject: [PATCH 68/98] moved adcNum to initializer list --- src/core/io/platform/f4xx/ADCf4xx.cpp | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/src/core/io/platform/f4xx/ADCf4xx.cpp b/src/core/io/platform/f4xx/ADCf4xx.cpp index af9bdcad..eaf3b38a 100644 --- a/src/core/io/platform/f4xx/ADCf4xx.cpp +++ b/src/core/io/platform/f4xx/ADCf4xx.cpp @@ -63,10 +63,7 @@ constexpr uint32_t CHANNEL_SET(uint8_t adc1, uint8_t adc2, uint8_t adc3, uint32_ bool ADCf4xx::timerInit = false; -ADCf4xx::ADCf4xx(Pin pin, ADCPeriph adcPeriph) : ADC(pin, adcPeriph), adcState(adcArray[getADCNum()]) { - // Get adc state being updated - adcNum = getADCNum(); - +ADCf4xx::ADCf4xx(Pin pin, ADCPeriph adcPeriph) : ADC(pin, adcPeriph), adcState(adcArray[getADCNum()]), adcNum(getADCNum()) { if (adcState.rank == MAX_CHANNELS) { log::LOGGER.log(log::Logger::LogLevel::WARNING, "ADC %d ALREADY HAS MAX PINS!!", (adcNum + 1)); return; From a2f315c2b55cf9a1eb341cfec3aa3f7bb5508634 Mon Sep 17 00:00:00 2001 From: GitHub Build Date: Sat, 9 Nov 2024 00:17:30 +0000 Subject: [PATCH 69/98] Applied Formatting Changes During GitHub Build --- src/core/io/platform/f4xx/ADCf4xx.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/core/io/platform/f4xx/ADCf4xx.cpp b/src/core/io/platform/f4xx/ADCf4xx.cpp index eaf3b38a..01959880 100644 --- a/src/core/io/platform/f4xx/ADCf4xx.cpp +++ b/src/core/io/platform/f4xx/ADCf4xx.cpp @@ -63,7 +63,8 @@ constexpr uint32_t CHANNEL_SET(uint8_t adc1, uint8_t adc2, uint8_t adc3, uint32_ bool ADCf4xx::timerInit = false; -ADCf4xx::ADCf4xx(Pin pin, ADCPeriph adcPeriph) : ADC(pin, adcPeriph), adcState(adcArray[getADCNum()]), adcNum(getADCNum()) { +ADCf4xx::ADCf4xx(Pin pin, ADCPeriph adcPeriph) + : ADC(pin, adcPeriph), adcState(adcArray[getADCNum()]), adcNum(getADCNum()) { if (adcState.rank == MAX_CHANNELS) { log::LOGGER.log(log::Logger::LogLevel::WARNING, "ADC %d ALREADY HAS MAX PINS!!", (adcNum + 1)); return; From b71ccbcce879f93af05419cc62a2124cc8846c57 Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Sat, 9 Nov 2024 10:39:27 -0500 Subject: [PATCH 70/98] made getADCNum and InitTimer both static, and fixed capitalization on initTimer() --- include/core/io/platform/f4xx/ADCf4xx.hpp | 11 ++++++----- src/core/io/platform/f4xx/ADCf4xx.cpp | 10 +++++----- 2 files changed, 11 insertions(+), 10 deletions(-) diff --git a/include/core/io/platform/f4xx/ADCf4xx.hpp b/include/core/io/platform/f4xx/ADCf4xx.hpp index dec22aae..dd59bb42 100644 --- a/include/core/io/platform/f4xx/ADCf4xx.hpp +++ b/include/core/io/platform/f4xx/ADCf4xx.hpp @@ -94,14 +94,14 @@ class ADCf4xx : public ADC { * @param channel the channel trying to be initialized * @return true if channel is supported by ADCPeriph, false otherwise */ - inline bool checkSupport(ADCPeriph periph, uint32_t channel); + static inline bool checkSupport(ADCPeriph periph, uint32_t channel); /** - * Returns the ADC number that is in use. Depends on the ADCPeriph enum to check + * Returns the ADC number that is in use * * @return The adc number that is being used in this specific object */ - inline uint8_t getADCNum(); + static inline uint8_t getADCNum(ADCPeriph periph); /** * Initialize the HAL ADC handler. This should only have to be run once @@ -122,9 +122,10 @@ class ADCf4xx : public ADC { void addChannel(uint8_t rank); /** - * Initializes Timer 8 to control ADC conversion frequency + * Initializes Timer 8 to send Update Events, which the ADC listens for to do a conversion + * aka controls ADC conversion frequency */ - void InitTimer(); + static void initTimer(); }; } // namespace core::io diff --git a/src/core/io/platform/f4xx/ADCf4xx.cpp b/src/core/io/platform/f4xx/ADCf4xx.cpp index eaf3b38a..67d816dd 100644 --- a/src/core/io/platform/f4xx/ADCf4xx.cpp +++ b/src/core/io/platform/f4xx/ADCf4xx.cpp @@ -63,7 +63,7 @@ constexpr uint32_t CHANNEL_SET(uint8_t adc1, uint8_t adc2, uint8_t adc3, uint32_ bool ADCf4xx::timerInit = false; -ADCf4xx::ADCf4xx(Pin pin, ADCPeriph adcPeriph) : ADC(pin, adcPeriph), adcState(adcArray[getADCNum()]), adcNum(getADCNum()) { +ADCf4xx::ADCf4xx(Pin pin, ADCPeriph adcPeriph) : ADC(pin, adcPeriph), adcState(adcArray[getADCNum(adcPeriph)]), adcNum(getADCNum(adcPeriph)) { if (adcState.rank == MAX_CHANNELS) { log::LOGGER.log(log::Logger::LogLevel::WARNING, "ADC %d ALREADY HAS MAX PINS!!", (adcNum + 1)); return; @@ -91,7 +91,7 @@ ADCf4xx::ADCf4xx(Pin pin, ADCPeriph adcPeriph) : ADC(pin, adcPeriph), adcState(a if (!timerInit) { __HAL_RCC_TIM8_CLK_ENABLE(); - InitTimer(); + initTimer(); HAL_TIM_Base_Start(&htim8); // Start Timer8 (Trigger Source For ADC's) timerInit = true; } @@ -307,8 +307,8 @@ inline bool ADCf4xx::checkSupport(ADCPeriph periph, uint32_t channel) { } } -inline uint8_t ADCf4xx::getADCNum() { - switch (adcPeriph) { +inline uint8_t ADCf4xx::getADCNum(ADCPeriph periph) { + switch (periph) { case ADCPeriph::ONE: return ADC1_SLOT; case ADCPeriph::TWO: @@ -318,7 +318,7 @@ inline uint8_t ADCf4xx::getADCNum() { } } -void ADCf4xx::InitTimer() { +void ADCf4xx::initTimer() { TIM_ClockConfigTypeDef sClockSourceConfig = {0}; TIM_MasterConfigTypeDef sMasterConfig = {0}; From 9e3d5d7c441fa234c7175bee723ea3a0d9c3243e Mon Sep 17 00:00:00 2001 From: GitHub Build Date: Sat, 9 Nov 2024 15:41:32 +0000 Subject: [PATCH 71/98] Applied Formatting Changes During GitHub Build --- src/core/io/platform/f4xx/ADCf4xx.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/core/io/platform/f4xx/ADCf4xx.cpp b/src/core/io/platform/f4xx/ADCf4xx.cpp index 67d816dd..23265b41 100644 --- a/src/core/io/platform/f4xx/ADCf4xx.cpp +++ b/src/core/io/platform/f4xx/ADCf4xx.cpp @@ -63,7 +63,8 @@ constexpr uint32_t CHANNEL_SET(uint8_t adc1, uint8_t adc2, uint8_t adc3, uint32_ bool ADCf4xx::timerInit = false; -ADCf4xx::ADCf4xx(Pin pin, ADCPeriph adcPeriph) : ADC(pin, adcPeriph), adcState(adcArray[getADCNum(adcPeriph)]), adcNum(getADCNum(adcPeriph)) { +ADCf4xx::ADCf4xx(Pin pin, ADCPeriph adcPeriph) + : ADC(pin, adcPeriph), adcState(adcArray[getADCNum(adcPeriph)]), adcNum(getADCNum(adcPeriph)) { if (adcState.rank == MAX_CHANNELS) { log::LOGGER.log(log::Logger::LogLevel::WARNING, "ADC %d ALREADY HAS MAX PINS!!", (adcNum + 1)); return; From ff4ee2396abb8e794ce8ea54c2ad6d07839fe838 Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Sat, 9 Nov 2024 10:48:37 -0500 Subject: [PATCH 72/98] added timer comment --- src/core/io/platform/f4xx/ADCf4xx.cpp | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/src/core/io/platform/f4xx/ADCf4xx.cpp b/src/core/io/platform/f4xx/ADCf4xx.cpp index 67d816dd..db5f650d 100644 --- a/src/core/io/platform/f4xx/ADCf4xx.cpp +++ b/src/core/io/platform/f4xx/ADCf4xx.cpp @@ -131,7 +131,7 @@ void ADCf4xx::initADC(uint8_t num_channels) { halADC->Init.ContinuousConvMode = DISABLE; halADC->Init.DiscontinuousConvMode = DISABLE; halADC->Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_RISING; - halADC->Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_T8_TRGO; + halADC->Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_T8_TRGO; // Sets conversions to be done when timer 8 sends an Update Trigger halADC->Init.DataAlign = ADC_DATAALIGN_RIGHT; halADC->Init.NbrOfConversion = num_channels; halADC->Init.DMAContinuousRequests = ENABLE; @@ -318,6 +318,11 @@ inline uint8_t ADCf4xx::getADCNum(ADCPeriph periph) { } } +/* + * This method initializes timer 8 with a Trigger Output of "Update Trigger", with a timer frequency of 1kHz. + * The timer does not specifically tell the exact ADC to do a conversion, it just sends a general Update Trigger every cycle. + * The ADC's are listening for this Update Trigger from timer 8, which is set in the ADC initialization. + */ void ADCf4xx::initTimer() { TIM_ClockConfigTypeDef sClockSourceConfig = {0}; TIM_MasterConfigTypeDef sMasterConfig = {0}; From dd872c56221ce34f90aaba453af7079b08031059 Mon Sep 17 00:00:00 2001 From: GitHub Build Date: Sat, 9 Nov 2024 15:50:34 +0000 Subject: [PATCH 73/98] Applied Formatting Changes During GitHub Build --- src/core/io/platform/f4xx/ADCf4xx.cpp | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/src/core/io/platform/f4xx/ADCf4xx.cpp b/src/core/io/platform/f4xx/ADCf4xx.cpp index 90ebf0da..b42c089a 100644 --- a/src/core/io/platform/f4xx/ADCf4xx.cpp +++ b/src/core/io/platform/f4xx/ADCf4xx.cpp @@ -132,7 +132,8 @@ void ADCf4xx::initADC(uint8_t num_channels) { halADC->Init.ContinuousConvMode = DISABLE; halADC->Init.DiscontinuousConvMode = DISABLE; halADC->Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_RISING; - halADC->Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_T8_TRGO; // Sets conversions to be done when timer 8 sends an Update Trigger + halADC->Init.ExternalTrigConv = + ADC_EXTERNALTRIGCONV_T8_TRGO; // Sets conversions to be done when timer 8 sends an Update Trigger halADC->Init.DataAlign = ADC_DATAALIGN_RIGHT; halADC->Init.NbrOfConversion = num_channels; halADC->Init.DMAContinuousRequests = ENABLE; @@ -321,8 +322,8 @@ inline uint8_t ADCf4xx::getADCNum(ADCPeriph periph) { /* * This method initializes timer 8 with a Trigger Output of "Update Trigger", with a timer frequency of 1kHz. - * The timer does not specifically tell the exact ADC to do a conversion, it just sends a general Update Trigger every cycle. - * The ADC's are listening for this Update Trigger from timer 8, which is set in the ADC initialization. + * The timer does not specifically tell the exact ADC to do a conversion, it just sends a general Update Trigger every + * cycle. The ADC's are listening for this Update Trigger from timer 8, which is set in the ADC initialization. */ void ADCf4xx::initTimer() { TIM_ClockConfigTypeDef sClockSourceConfig = {0}; From c1a7694984df2ff37a2aeff0d7ddd09296f02d16 Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Sat, 9 Nov 2024 10:51:14 -0500 Subject: [PATCH 74/98] changed f3 adc check support to static --- include/core/io/platform/f3xx/ADCf3xx.hpp | 2 +- src/core/io/platform/f3xx/ADCf3xx.cpp | 3 --- 2 files changed, 1 insertion(+), 4 deletions(-) diff --git a/include/core/io/platform/f3xx/ADCf3xx.hpp b/include/core/io/platform/f3xx/ADCf3xx.hpp index 4412e4d0..e713f3dc 100644 --- a/include/core/io/platform/f3xx/ADCf3xx.hpp +++ b/include/core/io/platform/f3xx/ADCf3xx.hpp @@ -70,7 +70,7 @@ class ADCf3xx : public ADC { * @param channel the channel trying to be initialized * @return true if channel is supported by ADCPeriph, false otherwise */ - inline bool checkSupport(ADCPeriph periph, uint32_t channel); + static inline bool checkSupport(ADCPeriph periph, uint32_t channel); }; } // namespace core::io diff --git a/src/core/io/platform/f3xx/ADCf3xx.cpp b/src/core/io/platform/f3xx/ADCf3xx.cpp index c612c90e..ae2446b4 100644 --- a/src/core/io/platform/f3xx/ADCf3xx.cpp +++ b/src/core/io/platform/f3xx/ADCf3xx.cpp @@ -115,9 +115,6 @@ void ADCf3xx::initADC(uint8_t num_channels) { } void ADCf3xx::initDMA() { - // HAL_ADC_Stop(&halADC); - - // TODO: Add some way of selecting the next available DMA channel // Ideally we would have a "DMA" class dedicated to DMA resource // allocation. halDMA.Instance = DMA1_Channel1; From c2ff53f21ef8e38067e9dcb3498d29167287de24 Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Sat, 9 Nov 2024 10:53:56 -0500 Subject: [PATCH 75/98] added commetns for new variables in f4adc.hpp --- include/core/io/platform/f4xx/ADCf4xx.hpp | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/core/io/platform/f4xx/ADCf4xx.hpp b/include/core/io/platform/f4xx/ADCf4xx.hpp index dd59bb42..01c76f48 100644 --- a/include/core/io/platform/f4xx/ADCf4xx.hpp +++ b/include/core/io/platform/f4xx/ADCf4xx.hpp @@ -83,8 +83,11 @@ class ADCf4xx : public ADC { DMA_HandleTypeDef halDMA = {0}; }; + // Array of all ADC peripheral states static ADC_State_t adcArray[NUM_ADCS]; + // The ADC peripheral state of the current object ADC_State_t& adcState; + // The number ADC peripheral which is being used in the current object uint8_t adcNum; /** From fa1a29127217c9323a42c0085aaf31333265bf0e Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Sat, 9 Nov 2024 12:53:42 -0500 Subject: [PATCH 76/98] changed comment --- src/core/io/platform/f3xx/ADCf3xx.cpp | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/src/core/io/platform/f3xx/ADCf3xx.cpp b/src/core/io/platform/f3xx/ADCf3xx.cpp index ae2446b4..1c6d25b8 100644 --- a/src/core/io/platform/f3xx/ADCf3xx.cpp +++ b/src/core/io/platform/f3xx/ADCf3xx.cpp @@ -115,8 +115,7 @@ void ADCf3xx::initADC(uint8_t num_channels) { } void ADCf3xx::initDMA() { - // Ideally we would have a "DMA" class dedicated to DMA resource - // allocation. + // Ideally we would have a "DMA" class dedicated to DMA resource allocation. halDMA.Instance = DMA1_Channel1; halDMA.Init.Direction = DMA_PERIPH_TO_MEMORY; halDMA.Init.PeriphInc = DMA_PINC_DISABLE; From a965e44786fdb108ea4f8d564cb75548bb3f2890 Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Sat, 9 Nov 2024 12:58:59 -0500 Subject: [PATCH 77/98] comment alteration that I forgot to change when reading through magees comments on the PR --- src/core/io/platform/f4xx/ADCf4xx.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/core/io/platform/f4xx/ADCf4xx.cpp b/src/core/io/platform/f4xx/ADCf4xx.cpp index b42c089a..240cf400 100644 --- a/src/core/io/platform/f4xx/ADCf4xx.cpp +++ b/src/core/io/platform/f4xx/ADCf4xx.cpp @@ -17,7 +17,7 @@ #include namespace { -/// This is made as a global variable so that it is accessible in the interrupt. +/// This is made as a static variable so that it is accessible in the interrupt. DMA_HandleTypeDef* dmaHandle[3]; ADC_HandleTypeDef* adcHandle[3]; From f258d2605b36bbeee97ba662fe3fa84492610408 Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Sat, 9 Nov 2024 19:49:05 -0500 Subject: [PATCH 78/98] fixed spacing and also removed extra \r\n from log statements --- samples/adc/multi_adc.cpp | 16 ++++++++-------- samples/adc/single_adc.cpp | 10 +++++----- src/core/io/platform/f3xx/ADCf3xx.cpp | 1 + 3 files changed, 14 insertions(+), 13 deletions(-) diff --git a/samples/adc/multi_adc.cpp b/samples/adc/multi_adc.cpp index b3609c92..ecc30c1e 100644 --- a/samples/adc/multi_adc.cpp +++ b/samples/adc/multi_adc.cpp @@ -30,19 +30,19 @@ int main() { io::ADC& adc1 = io::getADC(); while (1) { - core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "--------------------\r\n"); + core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "--------------------"); core::log::LOGGER.log( - core::log::Logger::LogLevel::INFO, "ADC0 : %d mV\r\n", static_cast(adc0.read() * 1000)); + core::log::Logger::LogLevel::INFO, "ADC0 : %d mV", static_cast(adc0.read() * 1000)); core::log::LOGGER.log( - core::log::Logger::LogLevel::INFO, "ADC0: %d%%\r\n", static_cast(adc0.readPercentage() * 100)); - core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC0 raw: %d\r\n\r\n", adc0.readRaw()); + core::log::Logger::LogLevel::INFO, "ADC0: %d%%", static_cast(adc0.readPercentage() * 100)); + core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC0 raw: %d\r\n", adc0.readRaw()); core::log::LOGGER.log( - core::log::Logger::LogLevel::INFO, "ADC1 : %d mV\r\n", static_cast(adc1.read() * 1000)); + core::log::Logger::LogLevel::INFO, "ADC1 : %d mV", static_cast(adc1.read() * 1000)); core::log::LOGGER.log( - core::log::Logger::LogLevel::INFO, "ADC1: %d%%\r\n", static_cast(adc1.readPercentage() * 100)); - core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC1 raw: %d\r\n\r\n", adc1.readRaw()); - core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "--------------------\r\n\r\n"); + core::log::Logger::LogLevel::INFO, "ADC1: %d%%", static_cast(adc1.readPercentage() * 100)); + core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC1 raw: %d\r\n", adc1.readRaw()); + core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "--------------------\r\n"); time::wait(500); } } diff --git a/samples/adc/single_adc.cpp b/samples/adc/single_adc.cpp index 9ad48470..d69e0aa9 100644 --- a/samples/adc/single_adc.cpp +++ b/samples/adc/single_adc.cpp @@ -29,13 +29,13 @@ int main() { io::ADC& adc0 = io::getADC(); while (1) { - core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "--------------------\r\n"); + core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "--------------------"); core::log::LOGGER.log( - core::log::Logger::LogLevel::INFO, "ADC0 : %d mV\r\n", static_cast(adc0.read() * 1000)); + core::log::Logger::LogLevel::INFO, "ADC0 : %d mV", static_cast(adc0.read() * 1000)); core::log::LOGGER.log( - core::log::Logger::LogLevel::INFO, "ADC0: %d%%\r\n", static_cast(adc0.readPercentage() * 100)); - core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC0 raw: %d\r\n\r\n", adc0.readRaw()); - core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "--------------------\r\n\r\n"); + core::log::Logger::LogLevel::INFO, "ADC0: %d%%", static_cast(adc0.readPercentage() * 100)); + core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC0 raw: %d\r\n", adc0.readRaw()); + core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "--------------------\r\n"); time::wait(500); } } diff --git a/src/core/io/platform/f3xx/ADCf3xx.cpp b/src/core/io/platform/f3xx/ADCf3xx.cpp index 1c6d25b8..e51e8ded 100644 --- a/src/core/io/platform/f3xx/ADCf3xx.cpp +++ b/src/core/io/platform/f3xx/ADCf3xx.cpp @@ -22,6 +22,7 @@ extern "C" void DMA1_Channel1_IRQHandler(void) { } namespace core::io { + constexpr uint8_t ADC1SHIFT = 5; // Combines the channel memory value with the ADC peripherals it supports into one uint32_t From 7da06619e03b961f57a001d3b6635f11bd2e8ae7 Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Sat, 9 Nov 2024 20:00:37 -0500 Subject: [PATCH 79/98] removed inline from check support --- include/core/io/platform/f3xx/ADCf3xx.hpp | 2 +- include/core/io/platform/f4xx/ADCf4xx.hpp | 2 +- src/core/io/platform/f3xx/ADCf3xx.cpp | 2 +- src/core/io/platform/f4xx/ADCf4xx.cpp | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/include/core/io/platform/f3xx/ADCf3xx.hpp b/include/core/io/platform/f3xx/ADCf3xx.hpp index e713f3dc..96786c5b 100644 --- a/include/core/io/platform/f3xx/ADCf3xx.hpp +++ b/include/core/io/platform/f3xx/ADCf3xx.hpp @@ -70,7 +70,7 @@ class ADCf3xx : public ADC { * @param channel the channel trying to be initialized * @return true if channel is supported by ADCPeriph, false otherwise */ - static inline bool checkSupport(ADCPeriph periph, uint32_t channel); + static bool checkSupport(ADCPeriph periph, uint32_t channel); }; } // namespace core::io diff --git a/include/core/io/platform/f4xx/ADCf4xx.hpp b/include/core/io/platform/f4xx/ADCf4xx.hpp index 01c76f48..50c93e27 100644 --- a/include/core/io/platform/f4xx/ADCf4xx.hpp +++ b/include/core/io/platform/f4xx/ADCf4xx.hpp @@ -97,7 +97,7 @@ class ADCf4xx : public ADC { * @param channel the channel trying to be initialized * @return true if channel is supported by ADCPeriph, false otherwise */ - static inline bool checkSupport(ADCPeriph periph, uint32_t channel); + static bool checkSupport(ADCPeriph periph, uint32_t channel); /** * Returns the ADC number that is in use diff --git a/src/core/io/platform/f3xx/ADCf3xx.cpp b/src/core/io/platform/f3xx/ADCf3xx.cpp index e51e8ded..93a9ddaf 100644 --- a/src/core/io/platform/f3xx/ADCf3xx.cpp +++ b/src/core/io/platform/f3xx/ADCf3xx.cpp @@ -217,7 +217,7 @@ void ADCf3xx::addChannel(uint8_t rank) { HAL_ADC_ConfigChannel(&halADC, &adcChannel); } -inline bool ADCf3xx::checkSupport(ADCPeriph periph, uint32_t channel) { +bool ADCf3xx::checkSupport(ADCPeriph periph, uint32_t channel) { // Checks if the channel contains the bit signifying the proper ADC peripheral support switch (periph) { case ADCPeriph::ONE: diff --git a/src/core/io/platform/f4xx/ADCf4xx.cpp b/src/core/io/platform/f4xx/ADCf4xx.cpp index 240cf400..d745f0ef 100644 --- a/src/core/io/platform/f4xx/ADCf4xx.cpp +++ b/src/core/io/platform/f4xx/ADCf4xx.cpp @@ -297,7 +297,7 @@ void ADCf4xx::addChannel(uint8_t rank) { HAL_ADC_ConfigChannel(&adcState.halADC, &adcChannel); } -inline bool ADCf4xx::checkSupport(ADCPeriph periph, uint32_t channel) { +bool ADCf4xx::checkSupport(ADCPeriph periph, uint32_t channel) { // Checks if the channel contains the bit signifying the proper ADC peripheral support switch (periph) { case ADCPeriph::ONE: From 7a734f3414881a1a6d4334e74e3acc2db9545159 Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Sat, 9 Nov 2024 20:01:47 -0500 Subject: [PATCH 80/98] removed "_t" from ADC_State --- include/core/io/platform/f4xx/ADCf4xx.hpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/include/core/io/platform/f4xx/ADCf4xx.hpp b/include/core/io/platform/f4xx/ADCf4xx.hpp index 50c93e27..85dca971 100644 --- a/include/core/io/platform/f4xx/ADCf4xx.hpp +++ b/include/core/io/platform/f4xx/ADCf4xx.hpp @@ -59,7 +59,7 @@ class ADCf4xx : public ADC { * Each entry corresponds to a specific ADC channel. * halDMA: HAL handle for configuring and controlling DMA for the ADC. */ - struct ADC_State_t { + struct ADC_State { ADC_HandleTypeDef halADC = {0}; uint8_t rank = 1; bool isADCInit = false; @@ -84,9 +84,9 @@ class ADCf4xx : public ADC { }; // Array of all ADC peripheral states - static ADC_State_t adcArray[NUM_ADCS]; + static ADC_State adcArray[NUM_ADCS]; // The ADC peripheral state of the current object - ADC_State_t& adcState; + ADC_State& adcState; // The number ADC peripheral which is being used in the current object uint8_t adcNum; From cbb5205f745b6a5aeb02b1593e5ea9bf04f68ef1 Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Sat, 9 Nov 2024 20:03:31 -0500 Subject: [PATCH 81/98] updated comments in adcf4xx.hpp --- include/core/io/platform/f4xx/ADCf4xx.hpp | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/include/core/io/platform/f4xx/ADCf4xx.hpp b/include/core/io/platform/f4xx/ADCf4xx.hpp index 85dca971..d4365d4e 100644 --- a/include/core/io/platform/f4xx/ADCf4xx.hpp +++ b/include/core/io/platform/f4xx/ADCf4xx.hpp @@ -91,7 +91,7 @@ class ADCf4xx : public ADC { uint8_t adcNum; /** - * Checks if the channel that is being initialized supports the ADC peripheral that it is being initialized on. + * Check if the channel that is being initialized supports the ADC peripheral that it is being initialized on. * * @param periph the ADC peripheral being used * @param channel the channel trying to be initialized @@ -100,24 +100,24 @@ class ADCf4xx : public ADC { static bool checkSupport(ADCPeriph periph, uint32_t channel); /** - * Returns the ADC number that is in use + * Return the ADC number that is in use * * @return The adc number that is being used in this specific object */ static inline uint8_t getADCNum(ADCPeriph periph); /** - * Initialize the HAL ADC handler. This should only have to be run once + * Initialize the HAL ADC handler */ void initADC(uint8_t num_channels); /** - * Initialize the HAL DMA for the ADC, should only have to be run once + * Initialize the HAL DMA for the ADC */ void initDMA(); /** - * Adds an ADC channel to the HAL ADC device. + * Add an ADC channel to the HAL ADC device. * * @param rank The "rank" which represents the order in which the channel * was added to the ADC starting at 1 @@ -125,7 +125,7 @@ class ADCf4xx : public ADC { void addChannel(uint8_t rank); /** - * Initializes Timer 8 to send Update Events, which the ADC listens for to do a conversion + * Initialize Timer 8 to send Update Events, which the ADC listens for to do a conversion * aka controls ADC conversion frequency */ static void initTimer(); From 0a31112533c26dfdfd6064bd257bf8e836368c66 Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Sun, 10 Nov 2024 12:49:11 -0500 Subject: [PATCH 82/98] no more inline, and added bit packed struct --- include/core/io/platform/f4xx/ADCf4xx.hpp | 23 ++++- src/core/io/platform/f4xx/ADCf4xx.cpp | 104 ++++++++++++++++------ 2 files changed, 94 insertions(+), 33 deletions(-) diff --git a/include/core/io/platform/f4xx/ADCf4xx.hpp b/include/core/io/platform/f4xx/ADCf4xx.hpp index d4365d4e..9346ab40 100644 --- a/include/core/io/platform/f4xx/ADCf4xx.hpp +++ b/include/core/io/platform/f4xx/ADCf4xx.hpp @@ -83,6 +83,21 @@ class ADCf4xx : public ADC { DMA_HandleTypeDef halDMA = {0}; }; + /** + * Bit packed struct to contain the channel along with the ADC peripherals the channel supports + * + * adc1: 1 bit. Support for ADC1 peripheral. 1 for supported, 0 for not supported. + * adc2: 1 bit. Support for ADC2 peripheral. 1 for supported, 0 for not supported. + * adc3: 1 bit. Support for ADC3 peripheral. 1 for supported, 0 for not supported. + * channel: 5 bits. The STM32 ADC channel value with said supported ADC peripherals + */ + struct Channel_Support { + uint8_t adc1 : 1; + uint8_t adc2 : 1; + uint8_t adc3 : 1; + uint32_t channel : 5; + }; + // Array of all ADC peripheral states static ADC_State adcArray[NUM_ADCS]; // The ADC peripheral state of the current object @@ -94,17 +109,17 @@ class ADCf4xx : public ADC { * Check if the channel that is being initialized supports the ADC peripheral that it is being initialized on. * * @param periph the ADC peripheral being used - * @param channel the channel trying to be initialized - * @return true if channel is supported by ADCPeriph, false otherwise + * @param channelStruct the struct of the channel with supports to test + * @return true if channel is supported by the ADC peripheral, false otherwise */ - static bool checkSupport(ADCPeriph periph, uint32_t channel); + static bool checkSupport(ADCPeriph periph, Channel_Support channelStruct); /** * Return the ADC number that is in use * * @return The adc number that is being used in this specific object */ - static inline uint8_t getADCNum(ADCPeriph periph); + static uint8_t getADCNum(ADCPeriph periph); /** * Initialize the HAL ADC handler diff --git a/src/core/io/platform/f4xx/ADCf4xx.cpp b/src/core/io/platform/f4xx/ADCf4xx.cpp index d745f0ef..c22a8ac4 100644 --- a/src/core/io/platform/f4xx/ADCf4xx.cpp +++ b/src/core/io/platform/f4xx/ADCf4xx.cpp @@ -216,73 +216,119 @@ void ADCf4xx::initDMA() { void ADCf4xx::addChannel(uint8_t rank) { GPIO_InitTypeDef gpioInit; uint8_t numOfPins = 1; - uint32_t channel; Pin pins[] = {pin}; GPIOf4xx::gpioStateInit(&gpioInit, pins, numOfPins, GPIO_MODE_ANALOG, GPIO_NOPULL, GPIO_SPEED_FREQ_HIGH); ADC_ChannelConfTypeDef adcChannel; - - // Combines the ADC channel with the ADC peripherals it supports, to avoid having multi-layered switch statements + Channel_Support channelStruct = {}; // Create struct and set all values to 0 + // Combines the ADC channel with the ADC peripherals it supports into a struct, avoiding having multi-layered switch statements switch (pin) { case Pin::PA_0: - channel = CHANNEL_SET(1, 1, 1, ADC_CHANNEL_0); + channelStruct.adc1 = 1; + channelStruct.adc2 = 1; + channelStruct.adc3 = 1; + channelStruct.channel = ADC_CHANNEL_0; break; case Pin::PA_1: - channel = CHANNEL_SET(1, 1, 1, ADC_CHANNEL_1); + channelStruct.adc1 = 1; + channelStruct.adc2 = 1; + channelStruct.adc3 = 1; + channelStruct.channel = ADC_CHANNEL_1; break; case Pin::PA_2: - channel = CHANNEL_SET(1, 1, 1, ADC_CHANNEL_2); + channelStruct.adc1 = 1; + channelStruct.adc2 = 1; + channelStruct.adc3 = 1; + channelStruct.channel = ADC_CHANNEL_2; break; case Pin::PA_3: - channel = CHANNEL_SET(1, 1, 1, ADC_CHANNEL_3); + channelStruct.adc1 = 1; + channelStruct.adc2 = 1; + channelStruct.adc3 = 1; + channelStruct.channel = ADC_CHANNEL_3; break; case Pin::PA_4: - channel = CHANNEL_SET(1, 1, 0, ADC_CHANNEL_4); + channelStruct.adc1 = 1; + channelStruct.adc2 = 1; + channelStruct.adc3 = 0; + channelStruct.channel = ADC_CHANNEL_4; break; case Pin::PA_5: - channel = CHANNEL_SET(1, 1, 0, ADC_CHANNEL_5); + channelStruct.adc1 = 1; + channelStruct.adc2 = 1; + channelStruct.adc3 = 0; + channelStruct.channel = ADC_CHANNEL_5; break; case Pin::PA_6: - channel = CHANNEL_SET(1, 1, 0, ADC_CHANNEL_6); + channelStruct.adc1 = 1; + channelStruct.adc2 = 1; + channelStruct.adc3 = 0; + channelStruct.channel = ADC_CHANNEL_6; break; case Pin::PA_7: - channel = CHANNEL_SET(1, 1, 0, ADC_CHANNEL_7); + channelStruct.adc1 = 1; + channelStruct.adc2 = 1; + channelStruct.adc3 = 0; + channelStruct.channel = ADC_CHANNEL_7; break; case Pin::PB_0: - channel = CHANNEL_SET(1, 1, 0, ADC_CHANNEL_8); + channelStruct.adc1 = 1; + channelStruct.adc2 = 1; + channelStruct.adc3 = 0; + channelStruct.channel = ADC_CHANNEL_8; break; case Pin::PB_1: - channel = CHANNEL_SET(1, 1, 0, ADC_CHANNEL_9); + channelStruct.adc1 = 1; + channelStruct.adc2 = 1; + channelStruct.adc3 = 0; + channelStruct.channel = ADC_CHANNEL_9; break; case Pin::PC_0: - channel = CHANNEL_SET(1, 1, 1, ADC_CHANNEL_10); + channelStruct.adc1 = 1; + channelStruct.adc2 = 1; + channelStruct.adc3 = 1; + channelStruct.channel = ADC_CHANNEL_10; break; case Pin::PC_1: - channel = CHANNEL_SET(1, 1, 1, ADC_CHANNEL_11); + channelStruct.adc1 = 1; + channelStruct.adc2 = 1; + channelStruct.adc3 = 1; + channelStruct.channel = ADC_CHANNEL_11; break; case Pin::PC_2: - channel = CHANNEL_SET(1, 1, 1, ADC_CHANNEL_12); + channelStruct.adc1 = 1; + channelStruct.adc2 = 1; + channelStruct.adc3 = 1; + channelStruct.channel = ADC_CHANNEL_12; break; case Pin::PC_3: - channel = CHANNEL_SET(1, 1, 1, ADC_CHANNEL_13); + channelStruct.adc1 = 1; + channelStruct.adc2 = 1; + channelStruct.adc3 = 1; + channelStruct.channel = ADC_CHANNEL_13; break; case Pin::PC_4: - channel = CHANNEL_SET(1, 1, 0, ADC_CHANNEL_14); + channelStruct.adc1 = 1; + channelStruct.adc2 = 1; + channelStruct.adc3 = 0; + channelStruct.channel = ADC_CHANNEL_14; break; case Pin::PC_5: - channel = CHANNEL_SET(1, 1, 0, ADC_CHANNEL_15); + channelStruct.adc1 = 1; + channelStruct.adc2 = 1; + channelStruct.adc3 = 0; + channelStruct.channel = ADC_CHANNEL_15; break; default: - channel = 0; + // Channel Struct is set to all 0 at initialization, so no need to be set all support bits to 0 log::LOGGER.log(log::Logger::LogLevel::ERROR, "INVALID PIN 0x%x!!", pin); break; // Should never get here } // This checks if the pin being used supports the ADC being used - if (checkSupport(adcPeriph, channel)) { - // Masks channel back to proper value (Zero's out ADC information bits) - adcChannel.Channel = channel & 0x1F; + if (checkSupport(adcPeriph, channelStruct)) { + adcChannel.Channel = channelStruct.channel; } else { log::LOGGER.log(log::Logger::LogLevel::ERROR, "ADC %d DOES NOT SUPPORT PIN 0x%x!!", (adcNum + 1), pin); } @@ -297,19 +343,19 @@ void ADCf4xx::addChannel(uint8_t rank) { HAL_ADC_ConfigChannel(&adcState.halADC, &adcChannel); } -bool ADCf4xx::checkSupport(ADCPeriph periph, uint32_t channel) { - // Checks if the channel contains the bit signifying the proper ADC peripheral support +bool ADCf4xx::checkSupport(ADCPeriph periph, Channel_Support channelStruct) { + // Checks if the channel struct contains the bit signifying the proper ADC peripheral support switch (periph) { case ADCPeriph::ONE: - return channel & (1 << ADC1SHIFT); + return (channelStruct.adc1 == 1); case ADCPeriph::TWO: - return channel & (1 << ADC2SHIFT); + return (channelStruct.adc2 == 1); case ADCPeriph::THREE: - return channel & (1 << ADC3SHIFT); + return (channelStruct.adc3 == 1); } } -inline uint8_t ADCf4xx::getADCNum(ADCPeriph periph) { +uint8_t ADCf4xx::getADCNum(ADCPeriph periph) { switch (periph) { case ADCPeriph::ONE: return ADC1_SLOT; From ddbc380d366da7cfae9ae8d8b0d99caaef67052d Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Sun, 10 Nov 2024 12:49:47 -0500 Subject: [PATCH 83/98] clang formatting --- include/core/io/platform/f4xx/ADCf4xx.hpp | 6 +- src/core/io/platform/f4xx/ADCf4xx.cpp | 101 +++++++++++----------- 2 files changed, 54 insertions(+), 53 deletions(-) diff --git a/include/core/io/platform/f4xx/ADCf4xx.hpp b/include/core/io/platform/f4xx/ADCf4xx.hpp index 9346ab40..43e64438 100644 --- a/include/core/io/platform/f4xx/ADCf4xx.hpp +++ b/include/core/io/platform/f4xx/ADCf4xx.hpp @@ -92,9 +92,9 @@ class ADCf4xx : public ADC { * channel: 5 bits. The STM32 ADC channel value with said supported ADC peripherals */ struct Channel_Support { - uint8_t adc1 : 1; - uint8_t adc2 : 1; - uint8_t adc3 : 1; + uint8_t adc1 : 1; + uint8_t adc2 : 1; + uint8_t adc3 : 1; uint32_t channel : 5; }; diff --git a/src/core/io/platform/f4xx/ADCf4xx.cpp b/src/core/io/platform/f4xx/ADCf4xx.cpp index c22a8ac4..cd8c5b50 100644 --- a/src/core/io/platform/f4xx/ADCf4xx.cpp +++ b/src/core/io/platform/f4xx/ADCf4xx.cpp @@ -216,108 +216,109 @@ void ADCf4xx::initDMA() { void ADCf4xx::addChannel(uint8_t rank) { GPIO_InitTypeDef gpioInit; uint8_t numOfPins = 1; - Pin pins[] = {pin}; + Pin pins[] = {pin}; GPIOf4xx::gpioStateInit(&gpioInit, pins, numOfPins, GPIO_MODE_ANALOG, GPIO_NOPULL, GPIO_SPEED_FREQ_HIGH); ADC_ChannelConfTypeDef adcChannel; Channel_Support channelStruct = {}; // Create struct and set all values to 0 - // Combines the ADC channel with the ADC peripherals it supports into a struct, avoiding having multi-layered switch statements + // Combines the ADC channel with the ADC peripherals it supports into a struct, avoiding having multi-layered switch + // statements switch (pin) { case Pin::PA_0: - channelStruct.adc1 = 1; - channelStruct.adc2 = 1; - channelStruct.adc3 = 1; + channelStruct.adc1 = 1; + channelStruct.adc2 = 1; + channelStruct.adc3 = 1; channelStruct.channel = ADC_CHANNEL_0; break; case Pin::PA_1: - channelStruct.adc1 = 1; - channelStruct.adc2 = 1; - channelStruct.adc3 = 1; + channelStruct.adc1 = 1; + channelStruct.adc2 = 1; + channelStruct.adc3 = 1; channelStruct.channel = ADC_CHANNEL_1; break; case Pin::PA_2: - channelStruct.adc1 = 1; - channelStruct.adc2 = 1; - channelStruct.adc3 = 1; + channelStruct.adc1 = 1; + channelStruct.adc2 = 1; + channelStruct.adc3 = 1; channelStruct.channel = ADC_CHANNEL_2; break; case Pin::PA_3: - channelStruct.adc1 = 1; - channelStruct.adc2 = 1; - channelStruct.adc3 = 1; + channelStruct.adc1 = 1; + channelStruct.adc2 = 1; + channelStruct.adc3 = 1; channelStruct.channel = ADC_CHANNEL_3; break; case Pin::PA_4: - channelStruct.adc1 = 1; - channelStruct.adc2 = 1; - channelStruct.adc3 = 0; + channelStruct.adc1 = 1; + channelStruct.adc2 = 1; + channelStruct.adc3 = 0; channelStruct.channel = ADC_CHANNEL_4; break; case Pin::PA_5: - channelStruct.adc1 = 1; - channelStruct.adc2 = 1; - channelStruct.adc3 = 0; + channelStruct.adc1 = 1; + channelStruct.adc2 = 1; + channelStruct.adc3 = 0; channelStruct.channel = ADC_CHANNEL_5; break; case Pin::PA_6: - channelStruct.adc1 = 1; - channelStruct.adc2 = 1; - channelStruct.adc3 = 0; + channelStruct.adc1 = 1; + channelStruct.adc2 = 1; + channelStruct.adc3 = 0; channelStruct.channel = ADC_CHANNEL_6; break; case Pin::PA_7: - channelStruct.adc1 = 1; - channelStruct.adc2 = 1; - channelStruct.adc3 = 0; + channelStruct.adc1 = 1; + channelStruct.adc2 = 1; + channelStruct.adc3 = 0; channelStruct.channel = ADC_CHANNEL_7; break; case Pin::PB_0: - channelStruct.adc1 = 1; - channelStruct.adc2 = 1; - channelStruct.adc3 = 0; + channelStruct.adc1 = 1; + channelStruct.adc2 = 1; + channelStruct.adc3 = 0; channelStruct.channel = ADC_CHANNEL_8; break; case Pin::PB_1: - channelStruct.adc1 = 1; - channelStruct.adc2 = 1; - channelStruct.adc3 = 0; + channelStruct.adc1 = 1; + channelStruct.adc2 = 1; + channelStruct.adc3 = 0; channelStruct.channel = ADC_CHANNEL_9; break; case Pin::PC_0: - channelStruct.adc1 = 1; - channelStruct.adc2 = 1; - channelStruct.adc3 = 1; + channelStruct.adc1 = 1; + channelStruct.adc2 = 1; + channelStruct.adc3 = 1; channelStruct.channel = ADC_CHANNEL_10; break; case Pin::PC_1: - channelStruct.adc1 = 1; - channelStruct.adc2 = 1; - channelStruct.adc3 = 1; + channelStruct.adc1 = 1; + channelStruct.adc2 = 1; + channelStruct.adc3 = 1; channelStruct.channel = ADC_CHANNEL_11; break; case Pin::PC_2: - channelStruct.adc1 = 1; - channelStruct.adc2 = 1; - channelStruct.adc3 = 1; + channelStruct.adc1 = 1; + channelStruct.adc2 = 1; + channelStruct.adc3 = 1; channelStruct.channel = ADC_CHANNEL_12; break; case Pin::PC_3: - channelStruct.adc1 = 1; - channelStruct.adc2 = 1; - channelStruct.adc3 = 1; + channelStruct.adc1 = 1; + channelStruct.adc2 = 1; + channelStruct.adc3 = 1; channelStruct.channel = ADC_CHANNEL_13; break; case Pin::PC_4: - channelStruct.adc1 = 1; - channelStruct.adc2 = 1; - channelStruct.adc3 = 0; + channelStruct.adc1 = 1; + channelStruct.adc2 = 1; + channelStruct.adc3 = 0; channelStruct.channel = ADC_CHANNEL_14; break; case Pin::PC_5: - channelStruct.adc1 = 1; - channelStruct.adc2 = 1; - channelStruct.adc3 = 0; + channelStruct.adc1 = 1; + channelStruct.adc2 = 1; + channelStruct.adc3 = 0; channelStruct.channel = ADC_CHANNEL_15; break; default: From 667845986ebe28e57dc45c96e968d3720ea35412 Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Sun, 10 Nov 2024 13:01:06 -0500 Subject: [PATCH 84/98] removed extra stuff --- include/core/io/platform/f3xx/ADCf3xx.hpp | 19 +++++-- src/core/io/platform/f3xx/ADCf3xx.cpp | 67 +++++++++++++---------- src/core/io/platform/f4xx/ADCf4xx.cpp | 17 ++---- 3 files changed, 56 insertions(+), 47 deletions(-) diff --git a/include/core/io/platform/f3xx/ADCf3xx.hpp b/include/core/io/platform/f3xx/ADCf3xx.hpp index 96786c5b..c43da8c9 100644 --- a/include/core/io/platform/f3xx/ADCf3xx.hpp +++ b/include/core/io/platform/f3xx/ADCf3xx.hpp @@ -45,6 +45,17 @@ class ADCf3xx : public ADC { static uint16_t buffer[MAX_CHANNELS]; static DMA_HandleTypeDef halDMA; + /** + * Bit packed struct to contain the channel along with the ADC peripherals the channel supports + * + * adc1: 1 bit. Support for ADC1 peripheral. 1 for supported, 0 for not supported. + * channel: 5 bits. The STM32 ADC channel value with said supported ADC peripherals + */ + struct Channel_Support { + uint8_t adc1 : 1; + uint32_t channel : 5; + }; + /** * Initialize the HAL ADC handler. This should only have to be run once */ @@ -64,13 +75,13 @@ class ADCf3xx : public ADC { void addChannel(uint8_t rank); /** - * Checks if the channel that is being initialized supports the ADC peripheral that it is being initialized on. + * Check if the channel that is being initialized supports the ADC peripheral that it is being initialized on. * * @param periph the ADC peripheral being used - * @param channel the channel trying to be initialized - * @return true if channel is supported by ADCPeriph, false otherwise + * @param channelStruct the struct of the channel with supports to test + * @return true if channel is supported by the ADC peripheral, false otherwise */ - static bool checkSupport(ADCPeriph periph, uint32_t channel); + static bool checkSupport(ADCPeriph periph, Channel_Support channelStruct); }; } // namespace core::io diff --git a/src/core/io/platform/f3xx/ADCf3xx.cpp b/src/core/io/platform/f3xx/ADCf3xx.cpp index 93a9ddaf..9c8e723e 100644 --- a/src/core/io/platform/f3xx/ADCf3xx.cpp +++ b/src/core/io/platform/f3xx/ADCf3xx.cpp @@ -23,13 +23,6 @@ extern "C" void DMA1_Channel1_IRQHandler(void) { namespace core::io { -constexpr uint8_t ADC1SHIFT = 5; - -// Combines the channel memory value with the ADC peripherals it supports into one uint32_t -constexpr uint32_t CHANNEL_SET(uint8_t adc1, uint32_t ch) { - return (ch | (adc1 << ADC1SHIFT)); -} - // Init static member variables ADC_HandleTypeDef ADCf3xx::halADC = {0}; Pin ADCf3xx::channels[MAX_CHANNELS]; @@ -138,60 +131,75 @@ void ADCf3xx::addChannel(uint8_t rank) { GPIO_InitTypeDef gpioInit; Pin myPins[] = {pin}; uint8_t numOfPins = 1; - uint32_t channel; GPIOf3xx::gpioStateInit(&gpioInit, myPins, numOfPins, GPIO_MODE_ANALOG, GPIO_NOPULL, GPIO_SPEED_FREQ_HIGH); ADC_ChannelConfTypeDef adcChannel; + Channel_Support channelStruct = {}; switch (pin) { case Pin::PA_0: - channel = CHANNEL_SET(1, ADC_CHANNEL_1); + channelStruct.adc1 = 1; + channelStruct.channel = ADC_CHANNEL_1; break; case Pin::PA_1: - channel = CHANNEL_SET(1, ADC_CHANNEL_2); + channelStruct.adc1 = 1; + channelStruct.channel = ADC_CHANNEL_2; break; case Pin::PA_2: - channel = CHANNEL_SET(1, ADC_CHANNEL_3); + channelStruct.adc1 = 1; + channelStruct.channel = ADC_CHANNEL_3; break; case Pin::PA_3: - channel = CHANNEL_SET(1, ADC_CHANNEL_4); + channelStruct.adc1 = 1; + channelStruct.channel = ADC_CHANNEL_4; break; case Pin::PA_4: - channel = CHANNEL_SET(1, ADC_CHANNEL_5); + channelStruct.adc1 = 1; + channelStruct.channel = ADC_CHANNEL_5; break; case Pin::PC_0: - channel = CHANNEL_SET(1, ADC_CHANNEL_6); + channelStruct.adc1 = 1; + channelStruct.channel = ADC_CHANNEL_6; break; case Pin::PC_1: - channel = CHANNEL_SET(1, ADC_CHANNEL_7); + channelStruct.adc1 = 1; + channelStruct.channel = ADC_CHANNEL_7; break; case Pin::PC_2: - channel = CHANNEL_SET(1, ADC_CHANNEL_8); + channelStruct.adc1 = 1; + channelStruct.channel = ADC_CHANNEL_8; break; case Pin::PC_3: - channel = CHANNEL_SET(1, ADC_CHANNEL_9); + channelStruct.adc1 = 1; + channelStruct.channel = ADC_CHANNEL_9; break; case Pin::PA_6: - channel = CHANNEL_SET(1, ADC_CHANNEL_10); + channelStruct.adc1 = 1; + channelStruct.channel = ADC_CHANNEL_10; break; case Pin::PB_0: - channel = CHANNEL_SET(1, ADC_CHANNEL_11); + channelStruct.adc1 = 1; + channelStruct.channel = ADC_CHANNEL_11; break; case Pin::PB_1: - channel = CHANNEL_SET(1, ADC_CHANNEL_12); + channelStruct.adc1 = 1; + channelStruct.channel = ADC_CHANNEL_12; break; case Pin::PB_13: - channel = CHANNEL_SET(1, ADC_CHANNEL_13); + channelStruct.adc1 = 1; + channelStruct.channel = ADC_CHANNEL_13; break; case Pin::PB_11: - channel = CHANNEL_SET(1, ADC_CHANNEL_14); + channelStruct.adc1 = 1; + channelStruct.channel = ADC_CHANNEL_14; break; case Pin::PA_7: - channel = CHANNEL_SET(1, ADC_CHANNEL_15); + channelStruct.adc1 = 1; + channelStruct.channel = ADC_CHANNEL_15; break; default: - channel = 0; + // Channel Struct is set to all 0 at initialization, so no need to be set all support bits to 0 log::LOGGER.log(log::Logger::LogLevel::ERROR, "INVALID PIN 0x%x!!", pin); break; // Should never get here } @@ -200,9 +208,8 @@ void ADCf3xx::addChannel(uint8_t rank) { channels[rank - 1] = pin; // This checks if the pin being used supports the ADC being used - if (checkSupport(adcPeriph, channel)) { - // Masks channel back to proper value (Zero's out ADC information bits) - adcChannel.Channel = channel & 0x1F; + if (checkSupport(adcPeriph, channelStruct)) { + adcChannel.Channel = channelStruct.channel; } else { log::LOGGER.log(log::Logger::LogLevel::ERROR, "DOES NOT SUPPORT PIN 0x%x!!", pin); } @@ -217,11 +224,11 @@ void ADCf3xx::addChannel(uint8_t rank) { HAL_ADC_ConfigChannel(&halADC, &adcChannel); } -bool ADCf3xx::checkSupport(ADCPeriph periph, uint32_t channel) { - // Checks if the channel contains the bit signifying the proper ADC peripheral support +bool ADCf3xx::checkSupport(ADCPeriph periph, Channel_Support channelStruct) { + // In c++, non-zero values (like 1) are true, and 0 is false, so no comparison is needed. switch (periph) { case ADCPeriph::ONE: - return channel & (1 << ADC1SHIFT); + return channelStruct.adc1; } } diff --git a/src/core/io/platform/f4xx/ADCf4xx.cpp b/src/core/io/platform/f4xx/ADCf4xx.cpp index cd8c5b50..0825ba79 100644 --- a/src/core/io/platform/f4xx/ADCf4xx.cpp +++ b/src/core/io/platform/f4xx/ADCf4xx.cpp @@ -52,15 +52,6 @@ constexpr uint8_t ADC1_SLOT = 0; constexpr uint8_t ADC2_SLOT = 1; constexpr uint8_t ADC3_SLOT = 2; -constexpr uint8_t ADC1SHIFT = 5; -constexpr uint8_t ADC2SHIFT = 6; -constexpr uint8_t ADC3SHIFT = 7; - -// Combines the channel memory value with the ADC peripherals it supports into one uint32_t -constexpr uint32_t CHANNEL_SET(uint8_t adc1, uint8_t adc2, uint8_t adc3, uint32_t ch) { - return (ch | (adc1 << ADC1SHIFT) | (adc2 << ADC2SHIFT) | (adc3 << ADC3SHIFT)); -} - bool ADCf4xx::timerInit = false; ADCf4xx::ADCf4xx(Pin pin, ADCPeriph adcPeriph) @@ -345,14 +336,14 @@ void ADCf4xx::addChannel(uint8_t rank) { } bool ADCf4xx::checkSupport(ADCPeriph periph, Channel_Support channelStruct) { - // Checks if the channel struct contains the bit signifying the proper ADC peripheral support + // In c++, non-zero values (like 1) are true, and 0 is false, so no comparison is needed. switch (periph) { case ADCPeriph::ONE: - return (channelStruct.adc1 == 1); + return channelStruct.adc1; case ADCPeriph::TWO: - return (channelStruct.adc2 == 1); + return channelStruct.adc2; case ADCPeriph::THREE: - return (channelStruct.adc3 == 1); + return channelStruct.adc3; } } From 906bd4efe17fc1984ce95745ad2a5e8ec2e3a593 Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Sun, 10 Nov 2024 15:40:21 -0500 Subject: [PATCH 85/98] updated comment placement & added log message to f3 --- src/core/io/platform/f3xx/ADCf3xx.cpp | 1 + src/core/io/platform/f4xx/ADCf4xx.cpp | 6 +++--- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/src/core/io/platform/f3xx/ADCf3xx.cpp b/src/core/io/platform/f3xx/ADCf3xx.cpp index 9c8e723e..ca49fff6 100644 --- a/src/core/io/platform/f3xx/ADCf3xx.cpp +++ b/src/core/io/platform/f3xx/ADCf3xx.cpp @@ -38,6 +38,7 @@ ADCf3xx::ADCf3xx(Pin pin, ADCPeriph adcPeriph) : ADC(pin, adcPeriph) { // Maximum number of ADC channels have already been added if (rank == MAX_CHANNELS) { + log::LOGGER.log(log::Logger::LogLevel::WARNING, "ADC1 ALREADY HAS MAX NUMBER OF CHANNELS!!"); return; } diff --git a/src/core/io/platform/f4xx/ADCf4xx.cpp b/src/core/io/platform/f4xx/ADCf4xx.cpp index 0825ba79..a661bb70 100644 --- a/src/core/io/platform/f4xx/ADCf4xx.cpp +++ b/src/core/io/platform/f4xx/ADCf4xx.cpp @@ -57,7 +57,7 @@ bool ADCf4xx::timerInit = false; ADCf4xx::ADCf4xx(Pin pin, ADCPeriph adcPeriph) : ADC(pin, adcPeriph), adcState(adcArray[getADCNum(adcPeriph)]), adcNum(getADCNum(adcPeriph)) { if (adcState.rank == MAX_CHANNELS) { - log::LOGGER.log(log::Logger::LogLevel::WARNING, "ADC %d ALREADY HAS MAX PINS!!", (adcNum + 1)); + log::LOGGER.log(log::Logger::LogLevel::WARNING, "ADC %d ALREADY HAS MAX NUMBER OF CHANNELS!!", (adcNum + 1)); return; } @@ -123,8 +123,8 @@ void ADCf4xx::initADC(uint8_t num_channels) { halADC->Init.ContinuousConvMode = DISABLE; halADC->Init.DiscontinuousConvMode = DISABLE; halADC->Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_RISING; - halADC->Init.ExternalTrigConv = - ADC_EXTERNALTRIGCONV_T8_TRGO; // Sets conversions to be done when timer 8 sends an Update Trigger + // Sets conversions to be done when timer 8 sends an Update Trigger + halADC->Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_T8_TRGO; halADC->Init.DataAlign = ADC_DATAALIGN_RIGHT; halADC->Init.NbrOfConversion = num_channels; halADC->Init.DMAContinuousRequests = ENABLE; From 4131d5c9df9c2c7367cbdd4ae16e141eb5980243 Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Mon, 11 Nov 2024 20:20:42 -0500 Subject: [PATCH 86/98] changed switch to 1 liner, and typecasting channel to uint8_t --- include/core/io/platform/f4xx/ADCf4xx.hpp | 2 +- src/core/io/platform/f4xx/ADCf4xx.cpp | 84 +++++------------------ 2 files changed, 19 insertions(+), 67 deletions(-) diff --git a/include/core/io/platform/f4xx/ADCf4xx.hpp b/include/core/io/platform/f4xx/ADCf4xx.hpp index 43e64438..d2ebbb7b 100644 --- a/include/core/io/platform/f4xx/ADCf4xx.hpp +++ b/include/core/io/platform/f4xx/ADCf4xx.hpp @@ -95,7 +95,7 @@ class ADCf4xx : public ADC { uint8_t adc1 : 1; uint8_t adc2 : 1; uint8_t adc3 : 1; - uint32_t channel : 5; + uint8_t channel : 5; }; // Array of all ADC peripheral states diff --git a/src/core/io/platform/f4xx/ADCf4xx.cpp b/src/core/io/platform/f4xx/ADCf4xx.cpp index a661bb70..c008a733 100644 --- a/src/core/io/platform/f4xx/ADCf4xx.cpp +++ b/src/core/io/platform/f4xx/ADCf4xx.cpp @@ -212,108 +212,60 @@ void ADCf4xx::addChannel(uint8_t rank) { GPIOf4xx::gpioStateInit(&gpioInit, pins, numOfPins, GPIO_MODE_ANALOG, GPIO_NOPULL, GPIO_SPEED_FREQ_HIGH); ADC_ChannelConfTypeDef adcChannel; - Channel_Support channelStruct = {}; // Create struct and set all values to 0 + Channel_Support channelStruct; // Combines the ADC channel with the ADC peripherals it supports into a struct, avoiding having multi-layered switch // statements switch (pin) { case Pin::PA_0: - channelStruct.adc1 = 1; - channelStruct.adc2 = 1; - channelStruct.adc3 = 1; - channelStruct.channel = ADC_CHANNEL_0; + channelStruct = {.adc1 = 1, .adc2 = 1, .adc3 = 1, .channel = static_cast(ADC_CHANNEL_0)}; break; case Pin::PA_1: - channelStruct.adc1 = 1; - channelStruct.adc2 = 1; - channelStruct.adc3 = 1; - channelStruct.channel = ADC_CHANNEL_1; + channelStruct = {.adc1 = 1, .adc2 = 1, .adc3 = 1, .channel = static_cast(ADC_CHANNEL_1)}; break; case Pin::PA_2: - channelStruct.adc1 = 1; - channelStruct.adc2 = 1; - channelStruct.adc3 = 1; - channelStruct.channel = ADC_CHANNEL_2; + channelStruct = {.adc1 = 1, .adc2 = 1, .adc3 = 1, .channel = static_cast(ADC_CHANNEL_2)}; break; case Pin::PA_3: - channelStruct.adc1 = 1; - channelStruct.adc2 = 1; - channelStruct.adc3 = 1; - channelStruct.channel = ADC_CHANNEL_3; + channelStruct = {.adc1 = 1, .adc2 = 1, .adc3 = 1, .channel = static_cast(ADC_CHANNEL_3)}; break; case Pin::PA_4: - channelStruct.adc1 = 1; - channelStruct.adc2 = 1; - channelStruct.adc3 = 0; - channelStruct.channel = ADC_CHANNEL_4; + channelStruct = {.adc1 = 1, .adc2 = 1, .adc3 = 0, .channel = static_cast(ADC_CHANNEL_4)}; break; case Pin::PA_5: - channelStruct.adc1 = 1; - channelStruct.adc2 = 1; - channelStruct.adc3 = 0; - channelStruct.channel = ADC_CHANNEL_5; + channelStruct = {.adc1 = 1, .adc2 = 1, .adc3 = 0, .channel = static_cast(ADC_CHANNEL_5)}; break; case Pin::PA_6: - channelStruct.adc1 = 1; - channelStruct.adc2 = 1; - channelStruct.adc3 = 0; - channelStruct.channel = ADC_CHANNEL_6; + channelStruct = {.adc1 = 1, .adc2 = 1, .adc3 = 0, .channel = static_cast(ADC_CHANNEL_6)}; break; case Pin::PA_7: - channelStruct.adc1 = 1; - channelStruct.adc2 = 1; - channelStruct.adc3 = 0; - channelStruct.channel = ADC_CHANNEL_7; + channelStruct = {.adc1 = 1, .adc2 = 1, .adc3 = 0, .channel = static_cast(ADC_CHANNEL_7)}; break; case Pin::PB_0: - channelStruct.adc1 = 1; - channelStruct.adc2 = 1; - channelStruct.adc3 = 0; - channelStruct.channel = ADC_CHANNEL_8; + channelStruct = {.adc1 = 1, .adc2 = 1, .adc3 = 0, .channel = static_cast(ADC_CHANNEL_8)}; break; case Pin::PB_1: - channelStruct.adc1 = 1; - channelStruct.adc2 = 1; - channelStruct.adc3 = 0; - channelStruct.channel = ADC_CHANNEL_9; + channelStruct = {.adc1 = 1, .adc2 = 1, .adc3 = 0, .channel = static_cast(ADC_CHANNEL_9)}; break; case Pin::PC_0: - channelStruct.adc1 = 1; - channelStruct.adc2 = 1; - channelStruct.adc3 = 1; - channelStruct.channel = ADC_CHANNEL_10; + channelStruct = {.adc1 = 1, .adc2 = 1, .adc3 = 1, .channel = static_cast(ADC_CHANNEL_10)}; break; case Pin::PC_1: - channelStruct.adc1 = 1; - channelStruct.adc2 = 1; - channelStruct.adc3 = 1; - channelStruct.channel = ADC_CHANNEL_11; + channelStruct = {.adc1 = 1, .adc2 = 1, .adc3 = 1, .channel = static_cast(ADC_CHANNEL_11)}; break; case Pin::PC_2: - channelStruct.adc1 = 1; - channelStruct.adc2 = 1; - channelStruct.adc3 = 1; - channelStruct.channel = ADC_CHANNEL_12; + channelStruct = {.adc1 = 1, .adc2 = 1, .adc3 = 1, .channel = static_cast(ADC_CHANNEL_12)}; break; case Pin::PC_3: - channelStruct.adc1 = 1; - channelStruct.adc2 = 1; - channelStruct.adc3 = 1; - channelStruct.channel = ADC_CHANNEL_13; + channelStruct = {.adc1 = 1, .adc2 = 1, .adc3 = 1, .channel = static_cast(ADC_CHANNEL_13)}; break; case Pin::PC_4: - channelStruct.adc1 = 1; - channelStruct.adc2 = 1; - channelStruct.adc3 = 0; - channelStruct.channel = ADC_CHANNEL_14; + channelStruct = {.adc1 = 1, .adc2 = 1, .adc3 = 0, .channel = static_cast(ADC_CHANNEL_14)}; break; case Pin::PC_5: - channelStruct.adc1 = 1; - channelStruct.adc2 = 1; - channelStruct.adc3 = 0; - channelStruct.channel = ADC_CHANNEL_15; + channelStruct = {.adc1 = 1, .adc2 = 1, .adc3 = 0, .channel = static_cast(ADC_CHANNEL_15)}; break; default: - // Channel Struct is set to all 0 at initialization, so no need to be set all support bits to 0 + channelStruct = {}; // sets all values to 0 log::LOGGER.log(log::Logger::LogLevel::ERROR, "INVALID PIN 0x%x!!", pin); break; // Should never get here } From 838e7f3c3d4da4842a3a1576c599e0e7903f91d3 Mon Sep 17 00:00:00 2001 From: GitHub Build Date: Tue, 12 Nov 2024 01:23:20 +0000 Subject: [PATCH 87/98] Applied Formatting Changes During GitHub Build --- include/core/io/platform/f4xx/ADCf4xx.hpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/include/core/io/platform/f4xx/ADCf4xx.hpp b/include/core/io/platform/f4xx/ADCf4xx.hpp index d2ebbb7b..55f797ae 100644 --- a/include/core/io/platform/f4xx/ADCf4xx.hpp +++ b/include/core/io/platform/f4xx/ADCf4xx.hpp @@ -92,9 +92,9 @@ class ADCf4xx : public ADC { * channel: 5 bits. The STM32 ADC channel value with said supported ADC peripherals */ struct Channel_Support { - uint8_t adc1 : 1; - uint8_t adc2 : 1; - uint8_t adc3 : 1; + uint8_t adc1 : 1; + uint8_t adc2 : 1; + uint8_t adc3 : 1; uint8_t channel : 5; }; From 91c6aba43c1b97660652614363e0159b689c70d5 Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Mon, 11 Nov 2024 20:24:24 -0500 Subject: [PATCH 88/98] changed switch to 1 liner, and typecasting channel to uint8_t --- include/core/io/platform/f3xx/ADCf3xx.hpp | 2 +- src/core/io/platform/f3xx/ADCf3xx.cpp | 49 ++++++++--------------- 2 files changed, 18 insertions(+), 33 deletions(-) diff --git a/include/core/io/platform/f3xx/ADCf3xx.hpp b/include/core/io/platform/f3xx/ADCf3xx.hpp index c43da8c9..a3a1e78b 100644 --- a/include/core/io/platform/f3xx/ADCf3xx.hpp +++ b/include/core/io/platform/f3xx/ADCf3xx.hpp @@ -53,7 +53,7 @@ class ADCf3xx : public ADC { */ struct Channel_Support { uint8_t adc1 : 1; - uint32_t channel : 5; + uint8_t channel : 5; }; /** diff --git a/src/core/io/platform/f3xx/ADCf3xx.cpp b/src/core/io/platform/f3xx/ADCf3xx.cpp index ca49fff6..e10bc063 100644 --- a/src/core/io/platform/f3xx/ADCf3xx.cpp +++ b/src/core/io/platform/f3xx/ADCf3xx.cpp @@ -136,71 +136,56 @@ void ADCf3xx::addChannel(uint8_t rank) { GPIOf3xx::gpioStateInit(&gpioInit, myPins, numOfPins, GPIO_MODE_ANALOG, GPIO_NOPULL, GPIO_SPEED_FREQ_HIGH); ADC_ChannelConfTypeDef adcChannel; - Channel_Support channelStruct = {}; + Channel_Support channelStruct; switch (pin) { case Pin::PA_0: - channelStruct.adc1 = 1; - channelStruct.channel = ADC_CHANNEL_1; + channelStruct = {.adc1 = 1, .channel = static_cast(ADC_CHANNEL_1)}; break; case Pin::PA_1: - channelStruct.adc1 = 1; - channelStruct.channel = ADC_CHANNEL_2; + channelStruct = {.adc1 = 1, .channel = static_cast(ADC_CHANNEL_2)}; break; case Pin::PA_2: - channelStruct.adc1 = 1; - channelStruct.channel = ADC_CHANNEL_3; + channelStruct = {.adc1 = 1, .channel = static_cast(ADC_CHANNEL_3)}; break; case Pin::PA_3: - channelStruct.adc1 = 1; - channelStruct.channel = ADC_CHANNEL_4; + channelStruct = {.adc1 = 1, .channel = static_cast(ADC_CHANNEL_4)}; break; case Pin::PA_4: - channelStruct.adc1 = 1; - channelStruct.channel = ADC_CHANNEL_5; + channelStruct = {.adc1 = 1, .channel = static_cast(ADC_CHANNEL_5)}; break; case Pin::PC_0: - channelStruct.adc1 = 1; - channelStruct.channel = ADC_CHANNEL_6; + channelStruct = {.adc1 = 1, .channel = static_cast(ADC_CHANNEL_6)}; break; case Pin::PC_1: - channelStruct.adc1 = 1; - channelStruct.channel = ADC_CHANNEL_7; + channelStruct = {.adc1 = 1, .channel = static_cast(ADC_CHANNEL_7)}; break; case Pin::PC_2: - channelStruct.adc1 = 1; - channelStruct.channel = ADC_CHANNEL_8; + channelStruct = {.adc1 = 1, .channel = static_cast(ADC_CHANNEL_8)}; break; case Pin::PC_3: - channelStruct.adc1 = 1; - channelStruct.channel = ADC_CHANNEL_9; + channelStruct = {.adc1 = 1, .channel = static_cast(ADC_CHANNEL_9)}; break; case Pin::PA_6: - channelStruct.adc1 = 1; - channelStruct.channel = ADC_CHANNEL_10; + channelStruct = {.adc1 = 1, .channel = static_cast(ADC_CHANNEL_10)}; break; case Pin::PB_0: - channelStruct.adc1 = 1; - channelStruct.channel = ADC_CHANNEL_11; + channelStruct = {.adc1 = 1, .channel = static_cast(ADC_CHANNEL_11)}; break; case Pin::PB_1: - channelStruct.adc1 = 1; - channelStruct.channel = ADC_CHANNEL_12; + channelStruct = {.adc1 = 1, .channel = static_cast(ADC_CHANNEL_12)}; break; case Pin::PB_13: - channelStruct.adc1 = 1; - channelStruct.channel = ADC_CHANNEL_13; + channelStruct = {.adc1 = 1, .channel = static_cast(ADC_CHANNEL_13)}; break; case Pin::PB_11: - channelStruct.adc1 = 1; - channelStruct.channel = ADC_CHANNEL_14; + channelStruct = {.adc1 = 1, .channel = static_cast(ADC_CHANNEL_14)}; break; case Pin::PA_7: - channelStruct.adc1 = 1; - channelStruct.channel = ADC_CHANNEL_15; + channelStruct = {.adc1 = 1, .channel = static_cast(ADC_CHANNEL_15)}; break; default: - // Channel Struct is set to all 0 at initialization, so no need to be set all support bits to 0 + channelStruct = {}; // sets all variables to 0 log::LOGGER.log(log::Logger::LogLevel::ERROR, "INVALID PIN 0x%x!!", pin); break; // Should never get here } From c1cc5a182f98cfed1fb9a6ba9506c1b187e553f2 Mon Sep 17 00:00:00 2001 From: GitHub Build Date: Tue, 12 Nov 2024 01:25:49 +0000 Subject: [PATCH 89/98] Applied Formatting Changes During GitHub Build --- include/core/io/platform/f3xx/ADCf3xx.hpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/core/io/platform/f3xx/ADCf3xx.hpp b/include/core/io/platform/f3xx/ADCf3xx.hpp index a3a1e78b..783a7d47 100644 --- a/include/core/io/platform/f3xx/ADCf3xx.hpp +++ b/include/core/io/platform/f3xx/ADCf3xx.hpp @@ -52,7 +52,7 @@ class ADCf3xx : public ADC { * channel: 5 bits. The STM32 ADC channel value with said supported ADC peripherals */ struct Channel_Support { - uint8_t adc1 : 1; + uint8_t adc1 : 1; uint8_t channel : 5; }; From 5e6e6f1c9278913d15600e592948ad356fb2ee43 Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Thu, 14 Nov 2024 20:16:09 -0500 Subject: [PATCH 90/98] The giga tester commit. 3 ADC periphs with 3 channels on each --- samples/adc/multi_adc.cpp | 73 +++++++++++++++++++++++++++++++++------ 1 file changed, 63 insertions(+), 10 deletions(-) diff --git a/samples/adc/multi_adc.cpp b/samples/adc/multi_adc.cpp index ecc30c1e..c2dbf10c 100644 --- a/samples/adc/multi_adc.cpp +++ b/samples/adc/multi_adc.cpp @@ -20,29 +20,82 @@ int main() { // Set up the logger to catch errors in ADC creation core::log::LOGGER.setUART(&uart); - core::log::LOGGER.setLogLevel(core::log::Logger::LogLevel::ERROR); + core::log::LOGGER.setLogLevel(core::log::Logger::LogLevel::INFO); uart.printf("Starting ADC test\r\n"); time::wait(500); - io::ADC& adc0 = io::getADC(); - io::ADC& adc1 = io::getADC(); + io::ADC& adc00 = io::getADC(); + io::ADC& adc01 = io::getADC(); + io::ADC& adc02 = io::getADC(); + + io::ADC& adc10 = io::getADC(); + io::ADC& adc11 = io::getADC(); + io::ADC& adc12 = io::getADC(); + + io::ADC& adc20 = io::getADC(); + io::ADC& adc21 = io::getADC(); + io::ADC& adc22 = io::getADC(); while (1) { core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "--------------------"); core::log::LOGGER.log( - core::log::Logger::LogLevel::INFO, "ADC0 : %d mV", static_cast(adc0.read() * 1000)); + core::log::Logger::LogLevel::INFO, "ADC1 : %d mV", static_cast(adc00.read() * 1000)); + core::log::LOGGER.log( + core::log::Logger::LogLevel::INFO, "ADC1: %d%%", static_cast(adc00.readPercentage() * 100)); + core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC1 raw: %d\r\n", adc00.readRaw()); + + core::log::LOGGER.log( + core::log::Logger::LogLevel::INFO, "ADC1 : %d mV", static_cast(adc01.read() * 1000)); + core::log::LOGGER.log( + core::log::Logger::LogLevel::INFO, "ADC1: %d%%", static_cast(adc01.readPercentage() * 100)); + core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC1 raw: %d\r\n", adc01.readRaw()); + + core::log::LOGGER.log( + core::log::Logger::LogLevel::INFO, "ADC1 : %d mV", static_cast(adc02.read() * 1000)); + core::log::LOGGER.log( + core::log::Logger::LogLevel::INFO, "ADC1: %d%%", static_cast(adc02.readPercentage() * 100)); + core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC1 raw: %d\r\n", adc02.readRaw()); + core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "--------------------\r\n"); + core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "--------------------"); + core::log::LOGGER.log( + core::log::Logger::LogLevel::INFO, "ADC2 : %d mV", static_cast(adc10.read() * 1000)); + core::log::LOGGER.log( + core::log::Logger::LogLevel::INFO, "ADC2: %d%%", static_cast(adc10.readPercentage() * 100)); + core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC2 raw: %d\r\n", adc10.readRaw()); + + core::log::LOGGER.log( + core::log::Logger::LogLevel::INFO, "ADC2 : %d mV", static_cast(adc11.read() * 1000)); + core::log::LOGGER.log( + core::log::Logger::LogLevel::INFO, "ADC2: %d%%", static_cast(adc11.readPercentage() * 100)); + core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC2 raw: %d\r\n", adc11.readRaw()); + + core::log::LOGGER.log( + core::log::Logger::LogLevel::INFO, "ADC2 : %d mV", static_cast(adc12.read() * 1000)); + core::log::LOGGER.log( + core::log::Logger::LogLevel::INFO, "ADC2: %d%%", static_cast(adc12.readPercentage() * 100)); + core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC2 raw: %d\r\n", adc12.readRaw()); + core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "--------------------\r\n"); + core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "--------------------"); + core::log::LOGGER.log( + core::log::Logger::LogLevel::INFO, "ADC3 : %d mV", static_cast(adc20.read() * 1000)); + core::log::LOGGER.log( + core::log::Logger::LogLevel::INFO, "ADC3: %d%%", static_cast(adc20.readPercentage() * 100)); + core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC3 raw: %d\r\n", adc20.readRaw()); + + core::log::LOGGER.log( + core::log::Logger::LogLevel::INFO, "ADC3 : %d mV", static_cast(adc21.read() * 1000)); core::log::LOGGER.log( - core::log::Logger::LogLevel::INFO, "ADC0: %d%%", static_cast(adc0.readPercentage() * 100)); - core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC0 raw: %d\r\n", adc0.readRaw()); + core::log::Logger::LogLevel::INFO, "ADC3: %d%%", static_cast(adc21.readPercentage() * 100)); + core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC3 raw: %d\r\n", adc21.readRaw()); core::log::LOGGER.log( - core::log::Logger::LogLevel::INFO, "ADC1 : %d mV", static_cast(adc1.read() * 1000)); + core::log::Logger::LogLevel::INFO, "ADC3 : %d mV", static_cast(adc22.read() * 1000)); core::log::LOGGER.log( - core::log::Logger::LogLevel::INFO, "ADC1: %d%%", static_cast(adc1.readPercentage() * 100)); - core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC1 raw: %d\r\n", adc1.readRaw()); + core::log::Logger::LogLevel::INFO, "ADC3: %d%%", static_cast(adc22.readPercentage() * 100)); + core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC3 raw: %d\r\n", adc22.readRaw()); core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "--------------------\r\n"); - time::wait(500); + time::wait(10000); } } From 97206e74dea8c6a491edba13c96a932605c29a3c Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Thu, 14 Nov 2024 20:16:34 -0500 Subject: [PATCH 91/98] added ADCf4xx:: for all static variables --- src/core/io/platform/f4xx/ADCf4xx.cpp | 42 ++++++++++++++------------- 1 file changed, 22 insertions(+), 20 deletions(-) diff --git a/src/core/io/platform/f4xx/ADCf4xx.cpp b/src/core/io/platform/f4xx/ADCf4xx.cpp index c008a733..d48ff97f 100644 --- a/src/core/io/platform/f4xx/ADCf4xx.cpp +++ b/src/core/io/platform/f4xx/ADCf4xx.cpp @@ -52,18 +52,20 @@ constexpr uint8_t ADC1_SLOT = 0; constexpr uint8_t ADC2_SLOT = 1; constexpr uint8_t ADC3_SLOT = 2; -bool ADCf4xx::timerInit = false; +ADCf4xx::ADC_State core::io::ADCf4xx::adcArray[NUM_ADCS]; +bool core::io::ADCf4xx::timerInit = false; +TIM_HandleTypeDef core::io::ADCf4xx::htim8; ADCf4xx::ADCf4xx(Pin pin, ADCPeriph adcPeriph) - : ADC(pin, adcPeriph), adcState(adcArray[getADCNum(adcPeriph)]), adcNum(getADCNum(adcPeriph)) { + : ADC(pin, adcPeriph), adcState(ADCf4xx::adcArray[getADCNum(adcPeriph)]), adcNum(getADCNum(adcPeriph)) { if (adcState.rank == MAX_CHANNELS) { log::LOGGER.log(log::Logger::LogLevel::WARNING, "ADC %d ALREADY HAS MAX NUMBER OF CHANNELS!!", (adcNum + 1)); return; } - if (timerInit) { - HAL_TIM_Base_DeInit(&htim8); // Stop Timer8 (Trigger Source For ADC's) - timerInit = false; + if (ADCf4xx::timerInit) { + HAL_TIM_Base_DeInit(&ADCf4xx::htim8); // Stop Timer8 (Trigger Source For ADC's) + ADCf4xx::timerInit = false; } if (adcState.isADCInit) { @@ -78,14 +80,14 @@ ADCf4xx::ADCf4xx(Pin pin, ADCPeriph adcPeriph) initADC(adcState.rank); addChannel(adcState.rank); - dmaHandle[adcNum] = &this->adcArray[adcNum].halDMA; - adcHandle[adcNum] = &this->adcArray[adcNum].halADC; + dmaHandle[adcNum] = &this->ADCf4xx::adcArray[adcNum].halDMA; + adcHandle[adcNum] = &this->ADCf4xx::adcArray[adcNum].halADC; - if (!timerInit) { + if (!ADCf4xx::timerInit) { __HAL_RCC_TIM8_CLK_ENABLE(); initTimer(); - HAL_TIM_Base_Start(&htim8); // Start Timer8 (Trigger Source For ADC's) - timerInit = true; + HAL_TIM_Base_Start(&ADCf4xx::htim8); // Start Timer8 (Trigger Source For ADC's) + ADCf4xx::timerInit = true; } HAL_ADC_Start_DMA(&adcState.halADC, reinterpret_cast(&adcState.buffer[0]), adcState.rank); @@ -319,20 +321,20 @@ void ADCf4xx::initTimer() { TIM_ClockConfigTypeDef sClockSourceConfig = {0}; TIM_MasterConfigTypeDef sMasterConfig = {0}; - htim8.Instance = TIM8; - htim8.Init.Prescaler = 0; - htim8.Init.CounterMode = TIM_COUNTERMODE_UP; - htim8.Init.Period = (SystemCoreClock / 1000) - 1; - htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - htim8.Init.RepetitionCounter = 0; - htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; - HAL_TIM_Base_Init(&htim8); + ADCf4xx::htim8.Instance = TIM8; + ADCf4xx::htim8.Init.Prescaler = 0; + ADCf4xx::htim8.Init.CounterMode = TIM_COUNTERMODE_UP; + ADCf4xx::htim8.Init.Period = (SystemCoreClock / 1000) - 1; + ADCf4xx::htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + ADCf4xx::htim8.Init.RepetitionCounter = 0; + ADCf4xx::htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; + HAL_TIM_Base_Init(&ADCf4xx::htim8); sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; - HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig); + HAL_TIM_ConfigClockSource(&ADCf4xx::htim8, &sClockSourceConfig); sMasterConfig.MasterOutputTrigger = TIM_TRGO_UPDATE; sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig); + HAL_TIMEx_MasterConfigSynchronization(&ADCf4xx::htim8, &sMasterConfig); } } // namespace core::io From ee7fd231821fee1ec1134c1225660ce0792134ad Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Thu, 14 Nov 2024 20:30:56 -0500 Subject: [PATCH 92/98] reset sample to normal --- samples/adc/multi_adc.cpp | 74 ++++++--------------------------------- 1 file changed, 10 insertions(+), 64 deletions(-) diff --git a/samples/adc/multi_adc.cpp b/samples/adc/multi_adc.cpp index c2dbf10c..e6316fdb 100644 --- a/samples/adc/multi_adc.cpp +++ b/samples/adc/multi_adc.cpp @@ -22,80 +22,26 @@ int main() { core::log::LOGGER.setUART(&uart); core::log::LOGGER.setLogLevel(core::log::Logger::LogLevel::INFO); - uart.printf("Starting ADC test\r\n"); + core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "Starting ADC test"); time::wait(500); - io::ADC& adc00 = io::getADC(); - io::ADC& adc01 = io::getADC(); - io::ADC& adc02 = io::getADC(); - - io::ADC& adc10 = io::getADC(); - io::ADC& adc11 = io::getADC(); - io::ADC& adc12 = io::getADC(); - - io::ADC& adc20 = io::getADC(); - io::ADC& adc21 = io::getADC(); - io::ADC& adc22 = io::getADC(); + io::ADC& adc0 = io::getADC(); + io::ADC& adc1 = io::getADC(); while (1) { core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "--------------------"); core::log::LOGGER.log( - core::log::Logger::LogLevel::INFO, "ADC1 : %d mV", static_cast(adc00.read() * 1000)); - core::log::LOGGER.log( - core::log::Logger::LogLevel::INFO, "ADC1: %d%%", static_cast(adc00.readPercentage() * 100)); - core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC1 raw: %d\r\n", adc00.readRaw()); - - core::log::LOGGER.log( - core::log::Logger::LogLevel::INFO, "ADC1 : %d mV", static_cast(adc01.read() * 1000)); - core::log::LOGGER.log( - core::log::Logger::LogLevel::INFO, "ADC1: %d%%", static_cast(adc01.readPercentage() * 100)); - core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC1 raw: %d\r\n", adc01.readRaw()); - - core::log::LOGGER.log( - core::log::Logger::LogLevel::INFO, "ADC1 : %d mV", static_cast(adc02.read() * 1000)); - core::log::LOGGER.log( - core::log::Logger::LogLevel::INFO, "ADC1: %d%%", static_cast(adc02.readPercentage() * 100)); - core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC1 raw: %d\r\n", adc02.readRaw()); - core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "--------------------\r\n"); - core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "--------------------"); - core::log::LOGGER.log( - core::log::Logger::LogLevel::INFO, "ADC2 : %d mV", static_cast(adc10.read() * 1000)); - core::log::LOGGER.log( - core::log::Logger::LogLevel::INFO, "ADC2: %d%%", static_cast(adc10.readPercentage() * 100)); - core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC2 raw: %d\r\n", adc10.readRaw()); - - core::log::LOGGER.log( - core::log::Logger::LogLevel::INFO, "ADC2 : %d mV", static_cast(adc11.read() * 1000)); - core::log::LOGGER.log( - core::log::Logger::LogLevel::INFO, "ADC2: %d%%", static_cast(adc11.readPercentage() * 100)); - core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC2 raw: %d\r\n", adc11.readRaw()); - - core::log::LOGGER.log( - core::log::Logger::LogLevel::INFO, "ADC2 : %d mV", static_cast(adc12.read() * 1000)); - core::log::LOGGER.log( - core::log::Logger::LogLevel::INFO, "ADC2: %d%%", static_cast(adc12.readPercentage() * 100)); - core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC2 raw: %d\r\n", adc12.readRaw()); - core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "--------------------\r\n"); - core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "--------------------"); - core::log::LOGGER.log( - core::log::Logger::LogLevel::INFO, "ADC3 : %d mV", static_cast(adc20.read() * 1000)); - core::log::LOGGER.log( - core::log::Logger::LogLevel::INFO, "ADC3: %d%%", static_cast(adc20.readPercentage() * 100)); - core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC3 raw: %d\r\n", adc20.readRaw()); - - core::log::LOGGER.log( - core::log::Logger::LogLevel::INFO, "ADC3 : %d mV", static_cast(adc21.read() * 1000)); + core::log::Logger::LogLevel::INFO, "ADC1 : %d mV", static_cast(adc0.read() * 1000)); core::log::LOGGER.log( - core::log::Logger::LogLevel::INFO, "ADC3: %d%%", static_cast(adc21.readPercentage() * 100)); - core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC3 raw: %d\r\n", adc21.readRaw()); - + core::log::Logger::LogLevel::INFO, "ADC1: %d%%", static_cast(adc0.readPercentage() * 100)); + core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC1 raw: %d\r\n", adc0.readRaw()); core::log::LOGGER.log( - core::log::Logger::LogLevel::INFO, "ADC3 : %d mV", static_cast(adc22.read() * 1000)); + core::log::Logger::LogLevel::INFO, "ADC1 : %d mV", static_cast(adc1.read() * 1000)); core::log::LOGGER.log( - core::log::Logger::LogLevel::INFO, "ADC3: %d%%", static_cast(adc22.readPercentage() * 100)); - core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC3 raw: %d\r\n", adc22.readRaw()); + core::log::Logger::LogLevel::INFO, "ADC1: %d%%", static_cast(adc1.readPercentage() * 100)); + core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC1 raw: %d\r\n", adc1.readRaw()); core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "--------------------\r\n"); - time::wait(10000); + time::wait(500); } } From 9bb85d5924fdee128bc68810a5c2589b71a7464a Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Sat, 16 Nov 2024 11:13:34 -0500 Subject: [PATCH 93/98] changed 1 logger message back to uart so people see it if logger isnt enabled --- samples/adc/multi_adc.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/samples/adc/multi_adc.cpp b/samples/adc/multi_adc.cpp index e6316fdb..3a278d11 100644 --- a/samples/adc/multi_adc.cpp +++ b/samples/adc/multi_adc.cpp @@ -22,7 +22,7 @@ int main() { core::log::LOGGER.setUART(&uart); core::log::LOGGER.setLogLevel(core::log::Logger::LogLevel::INFO); - core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "Starting ADC test"); + uart.printf("Starting ADC test\r\n"); time::wait(500); From 4ab700e00975cc4200d814635cd5fad2ac2dd7fa Mon Sep 17 00:00:00 2001 From: Travis Brown <143294730+tmb5932@users.noreply.github.com> Date: Mon, 2 Dec 2024 21:14:36 -0500 Subject: [PATCH 94/98] Update ADC.hpp Co-authored-by: Matthew Heller <69865851+mjh9585@users.noreply.github.com> --- include/core/io/ADC.hpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/core/io/ADC.hpp b/include/core/io/ADC.hpp index a4ae56e4..b43f7f87 100644 --- a/include/core/io/ADC.hpp +++ b/include/core/io/ADC.hpp @@ -6,7 +6,7 @@ namespace core::io { // Forward declarations: -// The different pins are hardware specific. Forware declarationsto allow +// The different pins are hardware specific. Forward declarations to allow // at compilation time the decision of which pins should be used. enum class Pin; enum class ADCPeriph; From de2574f53c0423676dff2c4589ab44cbbd855cdc Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Thu, 5 Dec 2024 19:05:14 -0500 Subject: [PATCH 95/98] changed 1 logger message back to uart so people see it if logger isnt enabled --- include/core/io/pin.hpp | 2 +- include/core/io/platform/f4xx/ADCf4xx.hpp | 34 +++++++++++------------ samples/adc/multi_adc.cpp | 8 +++--- samples/adc/single_adc.cpp | 2 +- 4 files changed, 23 insertions(+), 23 deletions(-) diff --git a/include/core/io/pin.hpp b/include/core/io/pin.hpp index 4643d2b3..8cc9b717 100644 --- a/include/core/io/pin.hpp +++ b/include/core/io/pin.hpp @@ -14,7 +14,7 @@ namespace core::io { * these values. */ enum class Pin { - DUMMY = -1, // THIS INTENTIONALLY DOES NOT POINT TO A PIN. Used as a default value, so the default value is no + INVALID = -1, // THIS INTENTIONALLY DOES NOT POINT TO A PIN. Used as a default value, so the default value is no // longer PA_O (a real pin) PA_0 = 0x00, PA_1 = 0x01, diff --git a/include/core/io/platform/f4xx/ADCf4xx.hpp b/include/core/io/platform/f4xx/ADCf4xx.hpp index 55f797ae..b9f50acc 100644 --- a/include/core/io/platform/f4xx/ADCf4xx.hpp +++ b/include/core/io/platform/f4xx/ADCf4xx.hpp @@ -53,7 +53,7 @@ class ADCf4xx : public ADC { * halADC: HAL handle for configuring and controlling the ADC peripheral. * rank: The ADC channel rank in the sequence (starts at 1). * isADCInit: Flag to indicate whether the ADC has been initialized. - * channels: Array of pins mapped to ADC channels. Initialized to all Pin::DUMMY. + * channels: Array of pins mapped to ADC channels. Initialized to all Pin::INVALID. * The array size is defined by MAX_CHANNELS. * buffer: Array to store ADC values for each channel, indexed according to the channels array. * Each entry corresponds to a specific ADC channel. @@ -63,22 +63,22 @@ class ADCf4xx : public ADC { ADC_HandleTypeDef halADC = {0}; uint8_t rank = 1; bool isADCInit = false; - Pin channels[MAX_CHANNELS] = {Pin::DUMMY, - Pin::DUMMY, - Pin::DUMMY, - Pin::DUMMY, - Pin::DUMMY, - Pin::DUMMY, - Pin::DUMMY, - Pin::DUMMY, - Pin::DUMMY, - Pin::DUMMY, - Pin::DUMMY, - Pin::DUMMY, - Pin::DUMMY, - Pin::DUMMY, - Pin::DUMMY, - Pin::DUMMY}; + Pin channels[MAX_CHANNELS] = {Pin::INVALID, + Pin::INVALID, + Pin::INVALID, + Pin::INVALID, + Pin::INVALID, + Pin::INVALID, + Pin::INVALID, + Pin::INVALID, + Pin::INVALID, + Pin::INVALID, + Pin::INVALID, + Pin::INVALID, + Pin::INVALID, + Pin::INVALID, + Pin::INVALID, + Pin::INVALID}; uint16_t buffer[MAX_CHANNELS] = {0}; DMA_HandleTypeDef halDMA = {0}; }; diff --git a/samples/adc/multi_adc.cpp b/samples/adc/multi_adc.cpp index 3a278d11..8bec279a 100644 --- a/samples/adc/multi_adc.cpp +++ b/samples/adc/multi_adc.cpp @@ -32,15 +32,15 @@ int main() { while (1) { core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "--------------------"); core::log::LOGGER.log( - core::log::Logger::LogLevel::INFO, "ADC1 : %d mV", static_cast(adc0.read() * 1000)); + core::log::Logger::LogLevel::INFO, "ADC0 : %d mV", static_cast(adc0.read() * 1000)); core::log::LOGGER.log( - core::log::Logger::LogLevel::INFO, "ADC1: %d%%", static_cast(adc0.readPercentage() * 100)); - core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC1 raw: %d\r\n", adc0.readRaw()); + core::log::Logger::LogLevel::INFO, "ADC0: %d%%", static_cast(adc0.readPercentage() * 100)); + core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC0 raw: %d", adc0.readRaw()); core::log::LOGGER.log( core::log::Logger::LogLevel::INFO, "ADC1 : %d mV", static_cast(adc1.read() * 1000)); core::log::LOGGER.log( core::log::Logger::LogLevel::INFO, "ADC1: %d%%", static_cast(adc1.readPercentage() * 100)); - core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC1 raw: %d\r\n", adc1.readRaw()); + core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC1 raw: %d", adc1.readRaw()); core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "--------------------\r\n"); time::wait(500); } diff --git a/samples/adc/single_adc.cpp b/samples/adc/single_adc.cpp index d69e0aa9..10d96fc8 100644 --- a/samples/adc/single_adc.cpp +++ b/samples/adc/single_adc.cpp @@ -34,7 +34,7 @@ int main() { core::log::Logger::LogLevel::INFO, "ADC0 : %d mV", static_cast(adc0.read() * 1000)); core::log::LOGGER.log( core::log::Logger::LogLevel::INFO, "ADC0: %d%%", static_cast(adc0.readPercentage() * 100)); - core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC0 raw: %d\r\n", adc0.readRaw()); + core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "ADC0 raw: %d", adc0.readRaw()); core::log::LOGGER.log(core::log::Logger::LogLevel::INFO, "--------------------\r\n"); time::wait(500); } From 5487bd02e55a775679934565ff8ae11efddc75d2 Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Thu, 5 Dec 2024 19:12:32 -0500 Subject: [PATCH 96/98] moved irq handler anon namespace inside the core::io namespace --- src/core/io/platform/f3xx/ADCf3xx.cpp | 8 +++----- src/core/io/platform/f4xx/ADCf4xx.cpp | 4 ++-- 2 files changed, 5 insertions(+), 7 deletions(-) diff --git a/src/core/io/platform/f3xx/ADCf3xx.cpp b/src/core/io/platform/f3xx/ADCf3xx.cpp index e10bc063..dbf8d8f4 100644 --- a/src/core/io/platform/f3xx/ADCf3xx.cpp +++ b/src/core/io/platform/f3xx/ADCf3xx.cpp @@ -9,19 +9,17 @@ #include #include +namespace core::io { namespace { /// This is made as a global variable so that it is accessible in the interrupt. DMA_HandleTypeDef* dmaHandle; ADC_HandleTypeDef* adcHandle; -} // namespace - extern "C" void DMA1_Channel1_IRQHandler(void) { HAL_DMA_IRQHandler(dmaHandle); HAL_ADC_IRQHandler(adcHandle); } - -namespace core::io { +} // namespace // Init static member variables ADC_HandleTypeDef ADCf3xx::halADC = {0}; @@ -38,7 +36,7 @@ ADCf3xx::ADCf3xx(Pin pin, ADCPeriph adcPeriph) : ADC(pin, adcPeriph) { // Maximum number of ADC channels have already been added if (rank == MAX_CHANNELS) { - log::LOGGER.log(log::Logger::LogLevel::WARNING, "ADC1 ALREADY HAS MAX NUMBER OF CHANNELS!!"); + log::LOGGER.log(log::Logger::LogLevel::ERROR, "ADC1 ALREADY HAS MAX NUMBER OF CHANNELS!!"); return; } diff --git a/src/core/io/platform/f4xx/ADCf4xx.cpp b/src/core/io/platform/f4xx/ADCf4xx.cpp index d48ff97f..fb86f589 100644 --- a/src/core/io/platform/f4xx/ADCf4xx.cpp +++ b/src/core/io/platform/f4xx/ADCf4xx.cpp @@ -16,6 +16,7 @@ #include #include +namespace core::io { namespace { /// This is made as a static variable so that it is accessible in the interrupt. DMA_HandleTypeDef* dmaHandle[3]; @@ -47,7 +48,6 @@ extern "C" void DMA2_Stream1_IRQHandler(void) { } } // namespace -namespace core::io { constexpr uint8_t ADC1_SLOT = 0; constexpr uint8_t ADC2_SLOT = 1; constexpr uint8_t ADC3_SLOT = 2; @@ -59,7 +59,7 @@ TIM_HandleTypeDef core::io::ADCf4xx::htim8; ADCf4xx::ADCf4xx(Pin pin, ADCPeriph adcPeriph) : ADC(pin, adcPeriph), adcState(ADCf4xx::adcArray[getADCNum(adcPeriph)]), adcNum(getADCNum(adcPeriph)) { if (adcState.rank == MAX_CHANNELS) { - log::LOGGER.log(log::Logger::LogLevel::WARNING, "ADC %d ALREADY HAS MAX NUMBER OF CHANNELS!!", (adcNum + 1)); + log::LOGGER.log(log::Logger::LogLevel::ERROR, "ADC %d ALREADY HAS MAX NUMBER OF CHANNELS!!", (adcNum + 1)); return; } From 32e5c7c27902d312c6bd5e74ea3730810e97c1e3 Mon Sep 17 00:00:00 2001 From: GitHub Build Date: Fri, 6 Dec 2024 01:15:30 +0000 Subject: [PATCH 97/98] Applied Formatting Changes During GitHub Build --- include/core/io/pin.hpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/core/io/pin.hpp b/include/core/io/pin.hpp index 8cc9b717..d84f76dd 100644 --- a/include/core/io/pin.hpp +++ b/include/core/io/pin.hpp @@ -15,7 +15,7 @@ namespace core::io { */ enum class Pin { INVALID = -1, // THIS INTENTIONALLY DOES NOT POINT TO A PIN. Used as a default value, so the default value is no - // longer PA_O (a real pin) + // longer PA_O (a real pin) PA_0 = 0x00, PA_1 = 0x01, PA_2 = 0x02, From 203571a27e219b204456f62344c25f76b23e63d5 Mon Sep 17 00:00:00 2001 From: tmb5932 Date: Thu, 5 Dec 2024 20:28:53 -0500 Subject: [PATCH 98/98] need to merge please github auto formatter. --- include/core/io/pin.hpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/core/io/pin.hpp b/include/core/io/pin.hpp index d84f76dd..57db1d73 100644 --- a/include/core/io/pin.hpp +++ b/include/core/io/pin.hpp @@ -14,8 +14,8 @@ namespace core::io { * these values. */ enum class Pin { - INVALID = -1, // THIS INTENTIONALLY DOES NOT POINT TO A PIN. Used as a default value, so the default value is no - // longer PA_O (a real pin) + INVALID = -1, // THIS INTENTIONALLY DOES NOT POINT TO A PIN. Used as a default value, so the default value is + // no longer PA_O (a real pin) PA_0 = 0x00, PA_1 = 0x01, PA_2 = 0x02,