From 8ae1a102aea5ec35fd289f95c709b56e526f61d1 Mon Sep 17 00:00:00 2001 From: Ethan Lin Date: Tue, 14 Jan 2025 15:11:32 +0800 Subject: [PATCH] restore assertion and rejection --- tensilelite/Tensile/KernelWriterAssembly.py | 3 +-- tensilelite/Tensile/SolutionStructs.py | 8 ++++---- 2 files changed, 5 insertions(+), 6 deletions(-) diff --git a/tensilelite/Tensile/KernelWriterAssembly.py b/tensilelite/Tensile/KernelWriterAssembly.py index 5476e7a3db..f616b16466 100644 --- a/tensilelite/Tensile/KernelWriterAssembly.py +++ b/tensilelite/Tensile/KernelWriterAssembly.py @@ -3540,8 +3540,7 @@ def lwaFirstOffset(self, kernel, tP): else: validBytesPerLoad *= (kernel["MacroTile%s"%tc] // kernel["NumLoadsPerpendicular%s"%tc] // (kernel["NumThreads"] // kernel["WavefrontSize"])) - # TODO- swizzling - # assert (validBytesPerLoad <= maxBytesPerLoad) + assert (validBytesPerLoad <= maxBytesPerLoad) assert (kernel[tP["lsc"]] * kernel[tP["lsp"]] % tP["glvw"] == 0) if validBytesPerLoad != maxBytesPerLoad: diff --git a/tensilelite/Tensile/SolutionStructs.py b/tensilelite/Tensile/SolutionStructs.py index e6494c21dd..efdeca9b3f 100644 --- a/tensilelite/Tensile/SolutionStructs.py +++ b/tensilelite/Tensile/SolutionStructs.py @@ -1412,10 +1412,10 @@ def setGlobalReadVectorWidth(state, tc, totalVectors, grvw): validDepthU = True if grvw not in [1,2,4,8,16,32]: validDepthU = False - # if totalVectors % state["NumThreads"] != 0: - # reject(None, "totalVectors%s %u %% NumThreads %u != 0" \ - # % (tc, totalVectors, state["NumThreads"])) - # validDepthU = False + if totalVectors % state["NumThreads"] != 0: + reject(None, "totalVectors%s %u %% NumThreads %u != 0" \ + % (tc, totalVectors, state["NumThreads"])) + validDepthU = False state["GlobalReadVectorWidth%s"%tc] = grvw