Add article on using Timing Manager + new PWM output sync option to implement standard inverter time synchronization

[elsevers]

Abstract

Add an article to the Control with AMDC section on using the Timing Manager with the new PWM output sync option to implement the standard inverter time synchronization approach.

Context

Standard approach to timing

The standard time synchronization of current control in motor drives is described in Section II of:
H. Kim, M. W. Degner, J. M. Guerrero, F. Briz and R. D. Lorenz, "Discrete-Time Current Regulator Design for AC Machine Drives," in IEEE Transactions on Industry Applications, vol. 46, no. 4, pp. 1425-1435, July-Aug. 2010, doi: 10.1109/TIA.2010.2049628

and illustrated in Fig. 1:

The salient details are illustrated in this figure:

• The current sensors are sampled at the peaks and valleys of the PWM carrier, as this avoid switching harmonics
• After the current data is measured, the controller acts on the currents data and computer an output voltage vector
• The output voltage vector is applied at the next peak / valley of the PWM carrier

AMDC capabilities to implement this

V1.3 of the AMDC adds capabilities within the FPGA to implement this via the newly created timing manager and an upgraded PWM interface:

• The timing manager generates a sensor trigger event at a user configurable peak/valley of the PWM carrier
• The sensor trigger can be configured to start the current sensor data acquisition AND writing out the latest PWM duty ratios
• Once all sensor data has been acquired, the timing manager triggers a scheduler interrupt that tells the OS to proceed to run tasks.

Approach

We'll create an article under the newly added Control with AMDC section on how to implement Fig. 1 (above) with the timing manager + PWM interface.