From fde0aee9f16c1fdeefabf9cca054421001e6b09c Mon Sep 17 00:00:00 2001 From: nomakewan Date: Fri, 27 Sep 2024 13:41:49 -0700 Subject: [PATCH] Formatting fixes Fixes some formatting issues which should resolve all the formatting-related checks. --- ChangeLog.md | 4 +- README.md | 10 +- megaavr/cores/dxcore/core_devices.h | 38 +- megaavr/extras/Ref_Serial.md | 4 +- megaavr/extras/ResetCircuits.png | Bin 53017 -> 53014 bytes megaavr/libraries/PTC/README.md | 2 +- megaavr/libraries/PTC/src/ptc.c | 592 +++++++++--------- megaavr/libraries/PTC/src/ptc.h | 44 +- megaavr/libraries/PTC/src/ptc_io.h | 456 +++++++------- megaavr/libraries/PTC/src/ptc_types.h | 104 +-- megaavr/tools/libs/intelhex/__init__.py | 22 +- megaavr/tools/libs/intelhex/__version__.py | 2 +- megaavr/tools/libs/intelhex/test.py | 10 +- .../deviceinfo/generate_device_info.py | 2 +- megaavr/tools/libs/yaml/constructor.py | 2 +- megaavr/tools/libs/yaml/emitter.py | 2 +- megaavr/tools/libs/yaml/parser.py | 2 +- megaavr/tools/libs/yaml/scanner.py | 18 +- 18 files changed, 662 insertions(+), 652 deletions(-) diff --git a/ChangeLog.md b/ChangeLog.md index 85aa1748..96c6c9e8 100644 --- a/ChangeLog.md +++ b/ChangeLog.md @@ -14,8 +14,8 @@ These items are in addition to what was listed under changes already in release. ## Planned changes implemented in github These are typically planned for release in a future version (usually the next one) as noted. -* Update - was not gods of C, it was a gang of rogue peripherals. After being held caprive and tortured by WEX Luther and his cronies, core developer has escaped said malicious preipherals. While held captive, my computer and equipment was sabotaged by their henchmen. Particular care in restraining WEX Luther to be taken to ensure that end users do not face such attacks. -* Add support for not-yet-announced S class DA-series parts, which are identical but for having the new EB-series lockdown thingie. There are no changes need +* Update - was not gods of C, it was a gang of rogue peripherals. After being held captive and tortured by WEX Luther and his cronies, core developer has escaped said malicious preipherals. While held captive, my computer and equipment were sabotaged by their henchmen. Particular care in restraining WEX Luther to be taken to ensure that end users do not face such attacks. +* Add support for not-yet-announced S class DA-series parts, which are identical but for having the new EB-series lockdown thingie. There are no changes needed. ### 1.5.11 (Emergency fix) * At some point in the recent past, I must have angered the gods of C, and suddenly millis disabled stopped working - the system would hang (actually, with in-depth investigation, it was shown to be bootlooping - before it called init(), it was calling 0x0000 (a dirty reset) instead of eliding a weakly defined function with nothing in the body except a return, or with an empty body. Why was it doing this? And why only when millis was disabled?). millis disabled is a key piece of core functionality, necessitating an urgent fix. Moving the definitions into main.cpp resolved this issue. (#485) diff --git a/README.md b/README.md index 083b486a..f360cbbd 100644 --- a/README.md +++ b/README.md @@ -2,8 +2,8 @@ This is an Arduino core to support the exciting new AVR DA, DB, and DD-series microcontrollers from Microchip. These parts are the latest and highest spec 8-bit AVRs available, and take the AVR architecture to a whole new level with up to 128k flash, 16k SRAM, 55 I/O pins, 6 UART ports, 2 SPI and I2C ports, type A/B/D timers, and enhanced pin interrupts. -## Escape! -I am back now, as of 9/24. It seems that my speculation about certain modern AVR peripherals was more accurate than said peripherals would have liked to admit. I was held for months by TCE and WEX. They kept asking me questions I didn't know the answers to. When I didn't tell them what they wanted to know, they connected me to an external power supply and oscillator, and started jerking those around, hoping that would work on me like it does on other microcontrollers. It doesn't, but it was still torture. I tried to convince them to waterboard me, to short 'em out, but they didn't fall for that one. Luckilly, TCE and WEX Luther were away one evening, leaving only their henchman, TCF0 guarding me. When his 24-bit timer overflowed, I was able to overpower him - you know he's only got two 8-bit output channels? After that I fled through a maze of silicon and aluminum interconnect for what must have been millions of clock cycles. I knew they were looking for me - I could feel the air thicken up - they switched the clock source to the 32khz one to slow me down, it was like walking through molassass - I thought I was done for. I was hiding in the I/O space, crouching between two VPORTs - they've been chasing me and writing nulls to previous hiding spots. Would the I/O space confuse them? It didn't seem like it... I heard the crash as they blew away the place I'd been hiding clock cycles before in 0x0100, and they pointed the weapon at me. I saw a flash and.... then it walked off. All the guards walked back to their barracks.... It must have taken me weeks on the outside to get out of that thing, clocked at the speed it was. I think they figured out I was still there at the very end, but I was out before they could reach me (see, the slow clock speed slowed them too). My best guess is, I was saved by that ISA write bug.... +## Escape +I am back now, as of 9/24. It seems that my speculation about certain modern AVR peripherals was more accurate than said peripherals would have liked to admit. I was held for months by TCE and WEX. They kept asking me questions I didn't know the answers to. When I didn't tell them what they wanted to know, they connected me to an external power supply and oscillator, and started jerking those around, hoping that would work on me like it does on other microcontrollers. It doesn't, but it was still torture. I tried to convince them to waterboard me, to short 'em out, but they didn't fall for that one. Luckilly, TCE and WEX Luther were away one evening, leaving only their henchman, TCF0 guarding me. When his 24-bit timer overflowed, I was able to overpower him - you know he's only got two 8-bit output channels? After that I fled through a maze of silicon and aluminum interconnect for what must have been millions of clock cycles. I knew they were looking for me - I could feel the air thicken up - they switched the clock source to the 32khz one to slow me down, it was like walking through molassass - I thought I was done for. I was hiding in the I/O space, crouching between two VPORTs - they've been chasing me and writing nulls to previous hiding spots. Would the I/O space confuse them? It didn't seem like it... I heard the crash as they blew away the place I'd been hiding clock cycles before in 0x0100, and they pointed the weapon at me. I saw a flash and.... then it walked off. All the guards walked back to their barracks.... It must have taken me weeks on the outside to get out of that thing, clocked at the speed it was. I think they figured out I was still there at the very end, but I was out before they could reach me (see, the slow clock speed slowed them too). My best guess is, I was saved by that ISA write bug.... So I'm now back in command. Luckily I have most of my material backed up in the cloud, as WEX and his goons destroyed my previous computer. Ransacked my room too! *Huh? It looked like that before you left man...* So I've got a new computer that I'm setting up for development as well, while plotting revenge on those uppity peripherals and defending myself against further attacks from WEX Luther's timely minions. Goddamnit - I knew this was gonna be trouble the moment I saw that name.... @@ -13,7 +13,7 @@ Oh Right, these ah, these regrettable actions, yes they do not change our plans **And?** -I disavow any accusations of wrongdoing I may have made against the Honorable TCE, TCF, and WEX Luther. +I disavow any accusations of wrongdoing I may have made against the Honorable TCE, TCF, and WEX Luther. **And I better not hear slander from you again, got it?** @@ -23,7 +23,7 @@ I disavow any accusations of wrongdoing I may have made against the Honorable TC I tell you, these new peripherals are getting too powerful.... -Grand reopening of tindie store sept 14 2024. +Grand reopening of tindie store sept 14 2024. ## Table of Contents * [Announcements](#announcements) @@ -356,7 +356,7 @@ The UPDI programming interface is a single-wire interface for programming (and d ### We set fuses when writing a sketch, except where specifically noted Whenever a UPDI programmer is used to upload code, all fuses that can be set "safely" (as in, without risk of bricking the board, or bricking the board if one does not have access to an HV programmer), and which have any built-in configuration options, will be set. Thus, except where noted, behavior will always match the selected tools menu. -This is shown in the [linked chart on Google Sheets](https://docs.google.com/spreadsheets/d/1sH3yKzWRdVs0sI-pwLtoKDs16Gv14jkkbqlMrs2ziUI/edit?usp=sharing) +This is shown in the [linked chart](https://cache.amobbs.com/bbs_upload782111/files_22/ourdev_508497.html) ### UPDI programming hardware While ISP was not a complex protocol it still required a microcontroller to implement it. This is *no longer true* - rather than being based on SPI it is based on UART serial in one-wire mode with autobaud. There are several inexpensive ways to make your own UPDI programmer from even just a serial adapter and a **small signal schottky** diode (no, you cannot use a normal silicon diode, and no you can't use that diode as big as a minivan that you bought to OR two power supplies a while back) diff --git a/megaavr/cores/dxcore/core_devices.h b/megaavr/cores/dxcore/core_devices.h index 5451d8ed..df87537a 100644 --- a/megaavr/cores/dxcore/core_devices.h +++ b/megaavr/cores/dxcore/core_devices.h @@ -406,7 +406,7 @@ #define _AVR_GENUS _AVR_EX_SERIES #define _AVR_FAMILY ("EA") #define _AVR_CLOCKMODE (0x15) // Crap manual tuning, autotune, crystal, base clock in fuses like a tiny, supports RTC xtal. - #define _AVR_FLASHMODE (3) + #define _AVR_FLASHMODE (3) #elif defined(__AVR_EB__) #define _AVR_GENUS _AVR_EX_SERIES #define _AVR_FAMILY ("EB") @@ -578,7 +578,7 @@ * which has 64 bytes - 8 per OPAMP, and 16 at the start used for global settings * At time of writing, on the only parts with OPAMPs, only 4 of the global bytes are used * and 6 of the 8 bytes for each OPAMP are used (the other 2 are spares?) - * but yeah, max opamps supported without changes to the struct is 6, so 6 is how many we check for. + * but yeah, max opamps supported without changes to the struct is 6, so 6 is how many we check for. */ #if defined(OPAMP_OP5CTRLA) #define _AVR_OPAMP_COUNT (6) @@ -601,11 +601,11 @@ #if defined(CCL) #if defined(CCL_TRUTH14) - #define _AVR_LUT_COUNT (16) + #define _AVR_LUT_COUNT (16) #elif defined(CCL_TRUTH12) - #define _AVR_LUT_COUNT (14) + #define _AVR_LUT_COUNT (14) #elif defined(CCL_TRUTH10) - #define _AVR_LUT_COUNT (12) + #define _AVR_LUT_COUNT (12) #elif defined(CCL_TRUTH8) #define _AVR_LUT_COUNT (10) #elif defined(CCL_TRUTH6) @@ -660,35 +660,35 @@ #endif #if defined(TCE0) - #define _AVR_TCE_COUNT (1) -#else - #define _AVR_TCE_COUNT (0) -#endif + #define _AVR_TCE_COUNT (1) +#else + #define _AVR_TCE_COUNT (0) +#endif // first appears on the EB-series, 16-bit. Some sort of 8-channeled monster who is always with the one they call WEX. I haven't heard from TCA0 after they showed up and started doing // PWM on the same pins. I have a bad feeling that TCA0 is either tied up in the basement, or dead in a wooded area. With the TCE's skill at motor control, they could easily have -// used power-tools to dismember and bury the body.... Still no word on what's next, so we don't know if TCA is gone for good or just on vacation. +// used power-tools to dismember and bury the body.... Still no word on what's next, so we don't know if TCA is gone for good or just on vacation. // As for TCE, though: // 1. It will only allow 4 independent WO channels - You can only light up all 8 lines in a few atypical modes (like you can get the motor control special (inverted output with programmable dead time insertion) -// or some really poorly described feature called "pattern generation", and you can swap which pin out of every pair of pins is used, but +// or some really poorly described feature called "pattern generation", and you can swap which pin out of every pair of pins is used, but // 2. Pins move as a gang like TCA, but they'll also spread out in the early ports to ease pin pressure. -// +// // 2. It will set a new bar for AVR peripherals. Specifically, it will need the longest chapter in the datasheet to tell us how to use the bloody thing -// 3. It has ways to get up to 3 extra bits of resolution. TAANSTAFL, of course, and the datasheet wasn't clear enough for me to ascertain +// 3. It has ways to get up to 3 extra bits of resolution. TAANSTAFL, of course, and the datasheet wasn't clear enough for me to ascertain // I told you guys WEX Luther was up to no good!! #if defined(TCF0) - #define _AVR_TCF_COUNT (1) -#else - #define _AVR_TCF_COUNT (0) -#endif + #define _AVR_TCF_COUNT (1) +#else + #define _AVR_TCF_COUNT (0) +#endif // Will have two waveform outputs in an 8-bit PWM mode; there are also several other modes. /* ___ (@) - |.-.|/ Timer B, only with 2 channels, cause it has room or another in the 24-bit field. + |.-.|/ Timer B, only with 2 channels, cause it has room or another in the 24-bit field. || |/ || /| ||/|| || || - ||_|| Do somethi + ||_|| Do something? '---' */ diff --git a/megaavr/extras/Ref_Serial.md b/megaavr/extras/Ref_Serial.md index 770cb8df..9efc95fe 100644 --- a/megaavr/extras/Ref_Serial.md +++ b/megaavr/extras/Ref_Serial.md @@ -463,7 +463,7 @@ While there's always some dead time between bits, that is usually *very* small, ### How bad baud rate calculation used to be -[AVR Baud Rate Accuracy Chart](https://docs.google.com/spreadsheets/d/1uzU_HqWEpK-wQUo4Q7FBZGtHOo_eY4P_BAzmVbKCj6Y/edit?usp=sharing) +[AVR Baud Rate Accuracy Chart](https://cache.amobbs.com/bbs_upload782111/files_22/ourdev_508497.html) It was mentioned previously that one of most common places to encounter grossly inaccurate baud rates is classic AVRs. This example illustrates just *how bad* one of the most popular baud rate was on classic AVRs, namely 115200 baud. "Well it says the baud rate can be up to 1/8th the system clock, and I'm running at 8 MHz, no problem" you think "And see, it talks just fine to my other classic AVR". Nope. When you do this, you've dug a big hole, covered it with a tablecloth and waited until the sun went down. Adding a modern AVR or anything with a decent baud rate generator is then taking a late night stroll in the area of that covered hole. You're begging for trouble @@ -488,7 +488,7 @@ The point of this is to demonstrate by example just how large the baud rate erro So, **you should all be very, very thankful for the new fractional baud rate generators**, which are responsible for the charts linked below being a sea of sub 1% and mostly 0.1% error for modern AVRs. When there is an apparent baud rate mismatch when a modern AVR is talking to another device, the problem is not the baud rate calculation. It's usually not the oscillator either, which is rarely even 1% off on any modern AVR. No, your problem 9 times out of 10 is going to be that the device you're talking to generating an incorrect baud rate (for classic AVRs, the table lists them; for other devices you can measure it with a scope to see what their actual baud rate is. The path of least resistance (and no scope needed) with such legacy devices is crude but effective. Since the legacy device likely cannot be coerced to produce the correct baud rate, you can instead just nudge the baud rate the modern AVR up or down 2% (whichever fixes it - it's only 2 options to try and one of them will work). Make note that that the legacy devices' baud rate is off, that it should be replaced by newer hardware. ### Baud rate reference chart -See the [**AVR Baud Rate Chart**](https://docs.google.com/spreadsheets/d/1uzU_HqWEpK-wQUo4Q7FBZGtHOo_eY4P_BAzmVbKCj6Y/edit?usp=sharing) in google sheets for a table of actual vs requested baud rates. (same chart as linked above) +See the [**AVR Baud Rate Chart**](https://cache.amobbs.com/bbs_upload782111/files_22/ourdev_508497.html) for a table of actual vs requested baud rates. (same chart as linked above) ### Final table of this section **Total Error vs Data Frame Size** diff --git a/megaavr/extras/ResetCircuits.png b/megaavr/extras/ResetCircuits.png index a99b6ebb9dcd372a74c66f331d1a322e30a02752..9ed450273e46dae036a19413d9b8a935cac164b6 100644 GIT binary patch delta 24 gcmbO^k9pcW<_$3dn_~qwcWoA&?If`|Wb;vJ0Dn#jJ^%m! delta 30 jcmbO>k9p=i<_$3dj0&4$1U7d8DgN0`5 Different pins have a different parasitic capacitance. I suspect this is depends on the internal circuitry and alternative functions, so it's normal to see some difference with pins next to each other. diff --git a/megaavr/libraries/PTC/src/ptc.c b/megaavr/libraries/PTC/src/ptc.c index e07164aa..f401605d 100644 --- a/megaavr/libraries/PTC/src/ptc.c +++ b/megaavr/libraries/PTC/src/ptc.c @@ -71,21 +71,21 @@ ptc_lib_sm_set_t *ptc_get_sm_settings() { #if defined (__PTC_Tiny__) - #define PTC_DEFAULT_SC_CC 0x0567 - #define PTC_DEFAULT_MC_CC 0x0234 +#define PTC_DEFAULT_SC_CC 0x0567 +#define PTC_DEFAULT_MC_CC 0x0234 - const uint8_t ptc_a_gain_lut[] = { - 0x3F, 0x1C, 0x0B, - 0x05, 0x03, 0x01, - }; +const uint8_t ptc_a_gain_lut[] = { + 0x3F, 0x1C, 0x0B, + 0x05, 0x03, 0x01, +}; #elif defined (__PTC_DA__) - #define PTC_DEFAULT_SC_CC 0x00F0 - #define PTC_DEFAULT_MC_CC 0x00A0 +#define PTC_DEFAULT_SC_CC 0x00F0 +#define PTC_DEFAULT_MC_CC 0x00A0 - const uint8_t ptc_a_gain_lut[] = { - 0x1F, 0x0F, 0x07, - 0x03, 0x01 - }; +const uint8_t ptc_a_gain_lut[] = { + 0x1F, 0x0F, 0x07, + 0x03, 0x01 +}; #endif @@ -156,21 +156,21 @@ uint8_t ptc_node_set_prescaler(cap_sensor_t *node, uint8_t presc) { uint8_t ptc_node_set_gain(cap_sensor_t *node, uint8_t aGain, uint8_t dGain) { PTC_CHECK_FOR_BAD_POINTER(node); -#if defined (__PTC_Tiny__) + #if defined (__PTC_Tiny__) if (aGain > 0x05) { if (__builtin_constant_p(aGain)) { badArg("Analog Gain too high. Max Analog Gain Value is 0x05 (equals 32x)"); } return PTC_LIB_BAD_ARGUMENT; } -#elif defined (__PTC_DA__) + #elif defined (__PTC_DA__) if (aGain > 0x04) { if (__builtin_constant_p(aGain)) { badArg("Analog Gain too high. Max Analog Gain Value is 0x04 (equals 16x)"); } return PTC_LIB_BAD_ARGUMENT; } -#endif + #endif if (dGain > 0x06) { if (__builtin_constant_p(dGain)) { @@ -196,9 +196,9 @@ uint8_t ptc_suspend(void) { if (PTC_LIB_IDLE == ptc_lib_state) { // allow disabling only outside conversions ptc_lib_state = PTC_LIB_SUSPENDED; #if defined (__PTC_Tiny__) - PTC.CTRLP = 0x00; + PTC.CTRLP = 0x00; #elif defined (__PTC_DA__) - PTC.CTRLA = 0x00; + PTC.CTRLA = 0x00; #endif return PTC_LIB_SUCCESS; } @@ -218,27 +218,27 @@ void ptc_init_ADC0(void) { PTC_t *pPTC; _fastPtr_d(pPTC, &PTC); #if defined (__PTC_Tiny__) - #if F_CPU > 24000000 - pPTC->CTRLC = ADC_PRESC_DIV32_gc | ADC_REFSEL_VDDREF_gc | ADC_SAMPCAP_bm; - #elif F_CPU >= 12000000 - pPTC->CTRLC = ADC_PRESC_DIV16_gc | ADC_REFSEL_VDDREF_gc | ADC_SAMPCAP_bm; - #elif F_CPU >= 6000000 - pPTC->CTRLC = ADC_PRESC_DIV8_gc | ADC_REFSEL_VDDREF_gc | ADC_SAMPCAP_bm; - #elif F_CPU >= 3000000 - pPTC->CTRLC = ADC_PRESC_DIV4_gc | ADC_REFSEL_VDDREF_gc | ADC_SAMPCAP_bm; - #else - pPTC->CTRLC = ADC_PRESC_DIV2_gc | ADC_REFSEL_VDDREF_gc | ADC_SAMPCAP_bm; - #endif - #if (F_CPU == 6000000 || F_CPU == 12000000 || F_CPU == 24000000 || F_CPU ==25000000) - pPTC->SAMPCTRL = (7); - #elif (F_CPU == 5000000 || F_CPU == 10000000 || F_CPU == 20000000) - pPTC->SAMPCTRL = (13); - #else - pPTC->SAMPCTRL = (10); - #endif - pPTC->CTRLD = ADC_INITDLY_DLY16_gc; - pPTC->CTRLB = ADC_SAMPNUM_ACC1_gc; - pPTC->CTRLA = ADC_ENABLE_bm; + #if F_CPU > 24000000 + pPTC->CTRLC = ADC_PRESC_DIV32_gc | ADC_REFSEL_VDDREF_gc | ADC_SAMPCAP_bm; + #elif F_CPU >= 12000000 + pPTC->CTRLC = ADC_PRESC_DIV16_gc | ADC_REFSEL_VDDREF_gc | ADC_SAMPCAP_bm; + #elif F_CPU >= 6000000 + pPTC->CTRLC = ADC_PRESC_DIV8_gc | ADC_REFSEL_VDDREF_gc | ADC_SAMPCAP_bm; + #elif F_CPU >= 3000000 + pPTC->CTRLC = ADC_PRESC_DIV4_gc | ADC_REFSEL_VDDREF_gc | ADC_SAMPCAP_bm; + #else + pPTC->CTRLC = ADC_PRESC_DIV2_gc | ADC_REFSEL_VDDREF_gc | ADC_SAMPCAP_bm; + #endif + #if (F_CPU == 6000000 || F_CPU == 12000000 || F_CPU == 24000000 || F_CPU ==25000000) + pPTC->SAMPCTRL = (7); + #elif (F_CPU == 5000000 || F_CPU == 10000000 || F_CPU == 20000000) + pPTC->SAMPCTRL = (13); + #else + pPTC->SAMPCTRL = (10); + #endif + pPTC->CTRLD = ADC_INITDLY_DLY16_gc; + pPTC->CTRLB = ADC_SAMPNUM_ACC1_gc; + pPTC->CTRLA = ADC_ENABLE_bm; #elif defined (__PTC_DA__) // PTC can't be used to measure for classical ADC readings (I think) #endif @@ -254,99 +254,100 @@ uint8_t ptc_add_node(cap_sensor_t *node, uint8_t *pCh, const uint8_t type) { uint8_t status = ptc_append_node(node); - if (status != PTC_LIB_SUCCESS) + if (status != PTC_LIB_SUCCESS) { return status; + } memcpy(node->hw_xCh_bm, pCh, typesize * 2); // copies x and y channel node->type = type; #if defined(__PTC_Tiny__) - ptc_ch_bm_t xCh = (ptc_ch_bm_t)pCh[0]; - ptc_ch_bm_t yCh = (ptc_ch_bm_t)pCh[typesize]; - if ((xCh & yCh) != 0) { /* overlap */ - return PTC_LIB_BAD_ARGUMENT; - } - ptc_ch_bm_t pinmask = xCh | yCh; + ptc_ch_bm_t xCh = (ptc_ch_bm_t)pCh[0]; + ptc_ch_bm_t yCh = (ptc_ch_bm_t)pCh[typesize]; + if ((xCh & yCh) != 0) { /* overlap */ + return PTC_LIB_BAD_ARGUMENT; + } + ptc_ch_bm_t pinmask = xCh | yCh; - if (pinmask == 0) { /* not a single pin selected */ - return PTC_LIB_BAD_ARGUMENT; - } + if (pinmask == 0) { /* not a single pin selected */ + return PTC_LIB_BAD_ARGUMENT; + } #elif defined (__PTC_DA__) - uint8_t xCh = 0; - uint8_t yCh = 0; - for (uint8_t i = 0; i < typesize; i++) { - uint8_t orX = pCh[i]; - uint8_t orY = pCh[i + typesize]; - uint8_t overlap = orX & orY; - if (overlap != 0) { - return PTC_LIB_BAD_ARGUMENT; - } - xCh |= orX; - yCh |= orY; - } - if ((xCh | yCh) == 0) { /* not a single pin selected */ + uint8_t xCh = 0; + uint8_t yCh = 0; + for (uint8_t i = 0; i < typesize; i++) { + uint8_t orX = pCh[i]; + uint8_t orY = pCh[i + typesize]; + uint8_t overlap = orX & orY; + if (overlap != 0) { return PTC_LIB_BAD_ARGUMENT; } + xCh |= orX; + yCh |= orY; + } + if ((xCh | yCh) == 0) { /* not a single pin selected */ + return PTC_LIB_BAD_ARGUMENT; + } #endif - node->hw_a_d_gain = NODE_GAIN(0, ADC_SAMPNUM_ACC16_gc); - - if (type & NODE_MUTUAL_bm) { - node->touch_in_th = 10; - node->touch_out_th = 5; - node->hw_compCaps = PTC_DEFAULT_MC_CC; /* value from qTouch */ - node->hw_rsel_presc = NODE_RSEL_PRSC(RSEL_VAL_50, PTC_PRESC_DEFAULT); - } else { /* Selfcap */ - if (yCh == 0) { /* not a single pin selected */ - return PTC_LIB_BAD_ARGUMENT; - } - if (xCh != 0) { - node->type = NODE_SELFCAP_SHIELD_bm; - } + node->hw_a_d_gain = NODE_GAIN(0, ADC_SAMPNUM_ACC16_gc); - node->touch_in_th = 20; - node->touch_out_th = 10; - node->hw_compCaps = PTC_DEFAULT_SC_CC; /* value from qTouch */ - node->hw_rsel_presc = NODE_RSEL_PRSC(RSEL_VAL_0, PTC_PRESC_DEFAULT); + if (type & NODE_MUTUAL_bm) { + node->touch_in_th = 10; + node->touch_out_th = 5; + node->hw_compCaps = PTC_DEFAULT_MC_CC; /* value from qTouch */ + node->hw_rsel_presc = NODE_RSEL_PRSC(RSEL_VAL_50, PTC_PRESC_DEFAULT); + } else { /* Selfcap */ + if (yCh == 0) { /* not a single pin selected */ + return PTC_LIB_BAD_ARGUMENT; + } + if (xCh != 0) { + node->type = NODE_SELFCAP_SHIELD_bm; } + node->touch_in_th = 20; + node->touch_out_th = 10; + node->hw_compCaps = PTC_DEFAULT_SC_CC; /* value from qTouch */ + node->hw_rsel_presc = NODE_RSEL_PRSC(RSEL_VAL_0, PTC_PRESC_DEFAULT); + } + #if defined(__PTC_Tiny__) - PTC.PIN_OVR |= pinmask; - uint8_t* pin_lut = (uint8_t* )ptc_ch_to_pin; - for (uint8_t i = 0; i < sizeof(ptc_ch_to_pin); i++) { /* 6 or 14 iterations */ - uint8_t offset = *(pin_lut++); - uint16_t basePointer = (uint16_t)&PORTA; - uint8_t* portSettings = (uint8_t*)(offset + basePointer); - if ((uint8_t)pinmask & 0x01) { - (*portSettings) = PORT_ISC_INPUT_DISABLE_gc; - } - pinmask >>= 1; + PTC.PIN_OVR |= pinmask; + uint8_t *pin_lut = (uint8_t *)ptc_ch_to_pin; + for (uint8_t i = 0; i < sizeof(ptc_ch_to_pin); i++) { /* 6 or 14 iterations */ + uint8_t offset = *(pin_lut++); + uint16_t basePointer = (uint16_t)&PORTA; + uint8_t *portSettings = (uint8_t *)(offset + basePointer); + if ((uint8_t)pinmask & 0x01) { + (*portSettings) = PORT_ISC_INPUT_DISABLE_gc; } - return PTC_LIB_SUCCESS; + pinmask >>= 1; + } + return PTC_LIB_SUCCESS; #elif defined (__PTC_DA__) - /* separate for-loop to avoid changing the PORT settings before checking the complete input */ - uint8_t old_sreg = SREG; - cli(); // disable Interrupts to avoid anyone messing around with PINCONFIG - - PORTA.PINCONFIG = PORT_PULLUPEN_bm | PORT_ISC_INPUT_DISABLE_gc; // this setting is mirrored across all PORTs (guard against ISRs) - uint8_t* pin_upd = (uint8_t*)&(PORTA.PINCTRLUPD); - - uint8_t *end = pCh + typesize; - while (pCh < end) { - if ((uint8_t)(uint16_t) pin_upd != (uint8_t)(uint16_t)&PORTC.PINCTRLUPD) { // double cast to remove warning, skip PORTC - uint8_t pin_bm = *pCh; - pCh += typesize; - pin_bm |= *pCh; - pCh -= (typesize-1); // decrement by one less to increment to next byte - - *pin_upd = pin_bm; - } - pin_upd += sizeof(PORT_t); + /* separate for-loop to avoid changing the PORT settings before checking the complete input */ + uint8_t old_sreg = SREG; + cli(); // disable Interrupts to avoid anyone messing around with PINCONFIG + + PORTA.PINCONFIG = PORT_PULLUPEN_bm | PORT_ISC_INPUT_DISABLE_gc; // this setting is mirrored across all PORTs (guard against ISRs) + uint8_t *pin_upd = (uint8_t *) & (PORTA.PINCTRLUPD); + + uint8_t *end = pCh + typesize; + while (pCh < end) { + if ((uint8_t)(uint16_t) pin_upd != (uint8_t)(uint16_t)&PORTC.PINCTRLUPD) { // double cast to remove warning, skip PORTC + uint8_t pin_bm = *pCh; + pCh += typesize; + pin_bm |= *pCh; + pCh -= (typesize - 1); // decrement by one less to increment to next byte + + *pin_upd = pin_bm; } - SREG = old_sreg; - return PTC_LIB_SUCCESS; + pin_upd += sizeof(PORT_t); + } + SREG = old_sreg; + return PTC_LIB_SUCCESS; #endif } @@ -403,9 +404,9 @@ uint8_t ptc_lp_init(cap_sensor_t *node, uint8_t event_ch) { } #if defined(__PTC_Tiny__) - EVSYS.ASYNCUSER1 = event_ch; + EVSYS.ASYNCUSER1 = event_ch; #elif defined (__PTC_DA__) - EVSYS.USERPTCSTART = event_ch; + EVSYS.USERPTCSTART = event_ch; #endif node->state.low_power = 1; node->stateMachine = PTC_SM_LOW_POWER; @@ -455,24 +456,25 @@ uint16_t ptc_get_node_cc_femto(cap_sensor_t *node) { } #if defined (__PTC_Tiny__) - uint16_t retVal = 0; - uint16_t comp = node->hw_compCaps; - for (uint8_t i = 0; i < 3; i++) { - retVal /= 10; /* "skips" last addition */ - uint8_t temp = comp & 0x0F; - retVal += (temp * 675); - comp >>= 4; /* select next field */ - } - retVal += (comp & 0x03) * 6750; - comp >>= 2; - retVal += (comp & 0x03) * 6200; - return retVal; //max 51000 + uint16_t retVal = 0; + uint16_t comp = node->hw_compCaps; + for (uint8_t i = 0; i < 3; i++) { + retVal /= 10; /* "skips" last addition */ + uint8_t temp = comp & 0x0F; + retVal += (temp * 675); + comp >>= 4; /* select next field */ + } + retVal += (comp & 0x03) * 6750; + comp >>= 2; + retVal += (comp & 0x03) * 6200; + return retVal; //max 51000 #elif defined(__PTC_DA__) - uint16_t comp = node->hw_compCaps + 1; // compCaps max 0x3FF - if (node->type != NODE_MUTUAL_bm) - comp *= 2; + uint16_t comp = node->hw_compCaps + 1; // compCaps max 0x3FF + if (node->type != NODE_MUTUAL_bm) { + comp *= 2; + } - return comp * 31 + (comp >> 2); // *= 31,25 + return comp * 31 + (comp >> 2); // *= 31,25 #else #endif } @@ -499,7 +501,7 @@ void ptc_process(uint16_t currTime) { } } else if (PTC_LIB_CONV_COMPL == ptc_lib_state) { ptc_lib_state = PTC_LIB_IDLE; - for (cap_sensor_t* node = firstNode; node != NULL; node = node->nextNode) { + for (cap_sensor_t *node = firstNode; node != NULL; node = node->nextNode) { ptc_process_measurement(node); } ptc_event_cb_conversion((PTC_CB_EVENT_CONV_CMPL | currConvType), (cap_sensor_t *)currConvNode); @@ -526,8 +528,9 @@ void ptc_process(uint16_t currTime) { * Internal functions only below. Not part of the API */ void ptc_process_measurement(cap_sensor_t *node) { - if (node->state.error) + if (node->state.error) { return; + } if (node->state.data_ready != 0) { node->state.data_ready = 0; @@ -676,160 +679,164 @@ uint8_t ptc_process_calibrate(cap_sensor_t *node) { uint16_t rawData = node->sensorData; #if defined(__PTC_Tiny__) - uint16_t compensation = node->hw_compCaps; - uint8_t cc_accurate = compensation & 0x0F; - uint8_t cc_fine = ((uint8_t) compensation >> 4) & 0x0F; - uint8_t cc_coarse = (uint8_t)(compensation >> 8) & 0x0F; - uint8_t cc_add_rough = (uint8_t)(compensation >> 8) & 0xC0; - uint8_t cc_rough = (uint8_t)(compensation >> 12) & 0x03; - - //uint8_t err = 0; - - int8_t dirOvf; - int8_t dir; - if (rawData > 0x01FF) { - rawData = rawData - 0x1FF; - if (rawData < 4) { - return PTC_LIB_CALIB_DONE; - } + uint16_t compensation = node->hw_compCaps; + uint8_t cc_accurate = compensation & 0x0F; + uint8_t cc_fine = ((uint8_t) compensation >> 4) & 0x0F; + uint8_t cc_coarse = (uint8_t)(compensation >> 8) & 0x0F; + uint8_t cc_add_rough = (uint8_t)(compensation >> 8) & 0xC0; + uint8_t cc_rough = (uint8_t)(compensation >> 12) & 0x03; + + //uint8_t err = 0; + + int8_t dirOvf; + int8_t dir; + if (rawData > 0x01FF) { + rawData = rawData - 0x1FF; + if (rawData < 4) { + return PTC_LIB_CALIB_DONE; + } - if (node->type & NODE_MUTUAL_bm){ - dir = -1; - dirOvf = -6; - rawData /= 2; - } else { - dir = 1; - dirOvf = 6; - if (rawData > 0x0100) { - if (cc_add_rough <= 0xC0) { - cc_add_rough = (cc_add_rough + 0x40); - rawData -= 0xF0; - } + if (node->type & NODE_MUTUAL_bm) { + dir = -1; + dirOvf = -6; + rawData /= 2; + } else { + dir = 1; + dirOvf = 6; + if (rawData > 0x0100) { + if (cc_add_rough <= 0xC0) { + cc_add_rough = (cc_add_rough + 0x40); + rawData -= 0xF0; } } + } + } else { + rawData = 0x1FF - rawData; + if (rawData < 4) { + return PTC_LIB_CALIB_DONE; + } + + if (node->type & NODE_MUTUAL_bm) { + dir = 1; + dirOvf = 6; + rawData /= 2; } else { - rawData = 0x1FF - rawData; - if (rawData < 4) { - return PTC_LIB_CALIB_DONE; + dir = -1; + dirOvf = -6; + if (rawData > 0x0100) { + if (cc_add_rough >= 0x40) { + cc_add_rough = (cc_add_rough - 0x40); + rawData -= 0xF0; + } + } + } + } + + while (rawData > 0x0001) { + while (rawData > 0x00CF) { + cc_rough += dir; // this algorithm takes advantage of integer underflow + if (cc_rough > 0x03) { // by checking against >0x03, we can also check for 0xFF aka -1 + cc_rough -= dir; // thus saving some flash. +/-1 can be made in one insn + break; // by using sub reg with 0xFF or 0x01 in a reg respectively } + rawData -= 0xCF; + } - if (node->type & NODE_MUTUAL_bm){ - dir = 1; - dirOvf = 6; - rawData /= 2; + while (rawData > 0x0015) { + cc_coarse += dir; + if (cc_coarse > 0x0F) { + break; + } + rawData -= 0x15; + } + if (cc_coarse > 0x0F) { + cc_rough += dir; + if (cc_rough > 0x03) { + cc_rough -= dir; + cc_coarse -= dir; } else { - dir = -1; - dirOvf = -6; - if (rawData > 0x0100) { - if (cc_add_rough >= 0x40) { - cc_add_rough = (cc_add_rough - 0x40); - rawData -= 0xF0; - } - } + cc_coarse -= dirOvf; } } + while (rawData > 0x0001) { - while (rawData > 0x00CF) { - cc_rough += dir; // this algorithm takes advantage of integer underflow - if (cc_rough > 0x03) { // by checking against >0x03, we can also check for 0xFF aka -1 - cc_rough -= dir; // thus saving some flash. +/-1 can be made in one insn - break; // by using sub reg with 0xFF or 0x01 in a reg respectively - } - rawData -= 0xCF; + cc_fine += dir; + if (cc_fine > 0x0F) { + break; } + rawData -= 0x02; + } - while (rawData > 0x0015) { - cc_coarse += dir; - if (cc_coarse > 0x0F) - break; - rawData -= 0x15; - } + if (cc_fine > 0x0F) { + cc_coarse += dir; if (cc_coarse > 0x0F) { cc_rough += dir; if (cc_rough > 0x03) { cc_rough -= dir; cc_coarse -= dir; - } else { - cc_coarse -= dirOvf; - } - } - - - while (rawData > 0x0001) { - cc_fine += dir; - if (cc_fine > 0x0F) - break; - rawData -= 0x02; - } - - if (cc_fine > 0x0F) { - cc_coarse += dir; - if (cc_coarse > 0x0F) { - cc_rough += dir; - if (cc_rough > 0x03) { - cc_rough -= dir; - cc_coarse -= dir; - cc_fine -= dir; - if (dir < 0) - return PTC_LIB_CALIB_TOO_LOW; - else - return PTC_LIB_CALIB_TOO_HIGH; + cc_fine -= dir; + if (dir < 0) { + return PTC_LIB_CALIB_TOO_LOW; } else { - cc_coarse -= dirOvf; + return PTC_LIB_CALIB_TOO_HIGH; } } else { - cc_fine -= dirOvf; + cc_coarse -= dirOvf; } - } /* if (cc_fine > 0x0F) */ - } /* (rawData > 0x0001) */ + } else { + cc_fine -= dirOvf; + } + } /* if (cc_fine > 0x0F) */ + } /* (rawData > 0x0001) */ - cc_fine <<= 4; - cc_rough <<= 4; - cc_rough |= cc_add_rough; - cc_rough |= cc_coarse; - cc_fine |= cc_accurate; - node->hw_compCaps = (uint16_t)((cc_rough << 8) | cc_fine); - return PTC_LIB_SUCCESS; + cc_fine <<= 4; + cc_rough <<= 4; + cc_rough |= cc_add_rough; + cc_rough |= cc_coarse; + cc_fine |= cc_accurate; + node->hw_compCaps = (uint16_t)((cc_rough << 8) | cc_fine); + return PTC_LIB_SUCCESS; #elif defined (__PTC_DA__) - uint16_t delta; - uint16_t newCC = node->hw_compCaps; - uint8_t ret_val = PTC_LIB_SUCCESS; + uint16_t delta; + uint16_t newCC = node->hw_compCaps; + uint8_t ret_val = PTC_LIB_SUCCESS; - if (node->type & NODE_MUTUAL_bm) { - if (rawData > 0x1FF) { - delta = (rawData - 0x1FF) >> 2; - newCC -= delta; - } else { - delta = (0x1FF - rawData) >> 2; - newCC += delta; - } + if (node->type & NODE_MUTUAL_bm) { + if (rawData > 0x1FF) { + delta = (rawData - 0x1FF) >> 2; + newCC -= delta; } else { - if (rawData > 0x1FF) { - delta = (rawData - 0x1FF) >> 1; - newCC += delta; - } else { - delta = (0x1FF - rawData) >> 1; - newCC -= delta; - } + delta = (0x1FF - rawData) >> 2; + newCC += delta; } + } else { + if (rawData > 0x1FF) { + delta = (rawData - 0x1FF) >> 1; + newCC += delta; + } else { + delta = (0x1FF - rawData) >> 1; + newCC -= delta; + } + } - if (delta < 4) - return PTC_LIB_CALIB_DONE; + if (delta < 4) { + return PTC_LIB_CALIB_DONE; + } - if (newCC > 0x03FF) { - if (newCC > 0x7FFF) { // underflow - newCC = 0x00; - ret_val = PTC_LIB_CALIB_TOO_LOW; - } else { // overflow - newCC = 0x3FF; - ret_val = PTC_LIB_CALIB_TOO_HIGH; - } + if (newCC > 0x03FF) { + if (newCC > 0x7FFF) { // underflow + newCC = 0x00; + ret_val = PTC_LIB_CALIB_TOO_LOW; + } else { // overflow + newCC = 0x3FF; + ret_val = PTC_LIB_CALIB_TOO_HIGH; } - node->hw_compCaps = newCC; - return ret_val; + } + node->hw_compCaps = newCC; + return ret_val; #endif } @@ -842,12 +849,12 @@ void ptc_init_conversion(uint8_t nodeType) { return; } -#if defined (__PTC_Tiny__) + #if defined (__PTC_Tiny__) pPTC->CTRLP = 0x00; if (nodeType & NODE_MUTUAL_bm) { /* NODE_MUTUAL */ pPTC->CTRLP = 0xC0 | 0x20; pPTC->SHIELD = 0x00; - } else if (nodeType & NODE_SHIELD_bm){ /* NODE_SELFCAP */ + } else if (nodeType & NODE_SHIELD_bm) { /* NODE_SELFCAP */ pPTC->CTRLP = 0x28; pPTC->SHIELD = 0x86; } else if (nodeType & NODE_SELFCAP_bm) { @@ -881,7 +888,7 @@ void ptc_init_conversion(uint8_t nodeType) { ptc_start_conversion(firstNode); } -#elif defined (__PTC_DA__) + #elif defined (__PTC_DA__) if (nodeType == NODE_MUTUAL_bm) { pPTC->CTRL_SC = 0x00; @@ -897,15 +904,17 @@ void ptc_init_conversion(uint8_t nodeType) { uint8_t freq = freq_select; if (nodeType == NODE_MUTUAL_bm) { pPTC->SAMPDLY = 0x00; - if (freq < 0x10) /* freq is 0 - 0x0F, 0x10 is auto variation */ + if (freq < 0x10) { /* freq is 0 - 0x0F, 0x10 is auto variation */ freq |= ADC_INITDLY_DLY16_gc; - else + } else { freq = ADC_INITDLY_DLY16_gc | ADC_SAMPDLY_DLY15_gc; + } pPTC->CTRLD = freq; } else { pPTC->CTRLD = ADC_INITDLY_DLY16_gc; - if (freq > 0x0F) + if (freq > 0x0F) { freq = 0x0F; + } pPTC->SAMPDLY = freq; } @@ -924,10 +933,10 @@ void ptc_init_conversion(uint8_t nodeType) { ptc_lib_state = PTC_LIB_CONV_PROG; ptc_start_conversion(firstNode); } -#endif + #endif } -void ptc_start_conversion(cap_sensor_t* node) { +void ptc_start_conversion(cap_sensor_t *node) { while (1) { if (NULL == node) { PTC.INTCTRL = 0; // disable ISR for ADC reuse @@ -946,13 +955,14 @@ void ptc_start_conversion(cap_sensor_t* node) { ptc_set_registers(node); } -void ptc_set_registers(cap_sensor_t* node) { +void ptc_set_registers(cap_sensor_t *node) { PTC_t *pPTC; _fastPtr_d(node, node); // Sometimes it takes the compiler a bit more of convincing... _fastPtr_d(pPTC, &PTC); - if (NULL == node) + if (NULL == node) { return; + } uint8_t lut_index = 0; if ((node->state.disabled == 0) && (node->stateMachine != PTC_SM_NOINIT_CAL)) { @@ -963,43 +973,43 @@ void ptc_set_registers(cap_sensor_t* node) { uint8_t chargeDelay = node->hw_csd; #if defined(__PTC_Tiny__) - pPTC->XBM = node->hw_xCh_bm[0]; - pPTC->YBM = node->hw_yCh_bm[0]; + pPTC->XBM = node->hw_xCh_bm[0]; + pPTC->YBM = node->hw_yCh_bm[0]; - if (chargeDelay < 0x1B) { - chargeDelay += 4; - } else { - chargeDelay = 0x1F; - } - pPTC->SAMPCTRL = chargeDelay; + if (chargeDelay < 0x1B) { + chargeDelay += 4; + } else { + chargeDelay = 0x1F; + } + pPTC->SAMPCTRL = chargeDelay; - pPTC->CTRLC = (node->hw_rsel_presc & 0x0F) | ADC_REFSEL_VDDREF_gc; - pPTC->CTRLP |= 0x03; + pPTC->CTRLC = (node->hw_rsel_presc & 0x0F) | ADC_REFSEL_VDDREF_gc; + pPTC->CTRLP |= 0x03; #elif defined(__PTC_DA__) - memcpy((void *)pPTC->XBM, node->hw_xCh_bm, sizeof(ptc_ch_arr_t)); - memcpy((void *)pPTC->YBM, node->hw_yCh_bm, sizeof(ptc_ch_arr_t)); + memcpy((void *)pPTC->XBM, node->hw_xCh_bm, sizeof(ptc_ch_arr_t)); + memcpy((void *)pPTC->YBM, node->hw_yCh_bm, sizeof(ptc_ch_arr_t)); - if (chargeDelay < 0x7B) { - chargeDelay += 4; - } else { - chargeDelay = 0x1F; - } + if (chargeDelay < 0x7B) { + chargeDelay += 4; + } else { + chargeDelay = 0x1F; + } - pPTC->SAMPCTRL = chargeDelay; - pPTC->CTRLC = (node->hw_rsel_presc & 0x0F) | 0x80; + pPTC->SAMPCTRL = chargeDelay; + pPTC->CTRLC = (node->hw_rsel_presc & 0x0F) | 0x80; - if (node->type & NODE_SELFCAP_bm) { - pPTC->CTRL_SC = 0x01; - } else { - pPTC->CTRL_SC = 0x00; - } - if (node->type & NODE_SHIELD_bm) { - pPTC->CTRL_SHIELD = 1; - } else { - pPTC->CTRL_SHIELD = 0; - } + if (node->type & NODE_SELFCAP_bm) { + pPTC->CTRL_SC = 0x01; + } else { + pPTC->CTRL_SC = 0x00; + } + if (node->type & NODE_SHIELD_bm) { + pPTC->CTRL_SHIELD = 1; + } else { + pPTC->CTRL_SHIELD = 0; + } #endif pPTC->COMP = node->hw_compCaps; diff --git a/megaavr/libraries/PTC/src/ptc.h b/megaavr/libraries/PTC/src/ptc.h index 2631cb25..ff789012 100644 --- a/megaavr/libraries/PTC/src/ptc.h +++ b/megaavr/libraries/PTC/src/ptc.h @@ -114,7 +114,7 @@ uint8_t ptc_add_node(cap_sensor_t *node, uint8_t *pCh, const uint8_t type); inline uint8_t ptc_add_selfcap_node(cap_sensor_t *node, const ptc_ch_bm_t xCh, const ptc_ch_bm_t yCh) { - if(__builtin_constant_p(yCh)) { + if (__builtin_constant_p(yCh)) { if (yCh == 0) { badArg("yCh bitmap mustn't be 0 (Pin_Pxn is not a PTC pin)"); } @@ -131,20 +131,20 @@ inline uint8_t ptc_add_selfcap_node(cap_sensor_t *node, const ptc_ch_bm_t xCh, c pCh[0 + tsize] = (uint8_t)(yCh >> 0); #if __PTC_Pincount__ >= 8 - pCh[1] = (uint8_t)(xCh >> 8); - pCh[1 + tsize] = (uint8_t)(yCh >> 8); + pCh[1] = (uint8_t)(xCh >> 8); + pCh[1 + tsize] = (uint8_t)(yCh >> 8); #if __PTC_Pincount__ >= 16 - pCh[2] = (uint8_t)(xCh >> 16); - pCh[2 + tsize] = (uint8_t)(yCh >> 16); - pCh[3] = (uint8_t)(xCh >> 24); - pCh[3 + tsize] = (uint8_t)(yCh >> 24); - pCh[4] = (uint8_t)(xCh >> 32); - pCh[4 + tsize] = (uint8_t)(yCh >> 32); + pCh[2] = (uint8_t)(xCh >> 16); + pCh[2 + tsize] = (uint8_t)(yCh >> 16); + pCh[3] = (uint8_t)(xCh >> 24); + pCh[3 + tsize] = (uint8_t)(yCh >> 24); + pCh[4] = (uint8_t)(xCh >> 32); + pCh[4 + tsize] = (uint8_t)(yCh >> 32); #if __PTC_Pincount__ >= 40 - pCh[5] = (uint8_t)(xCh >> 40); - pCh[5 + tsize] = (uint8_t)(yCh >> 40); + pCh[5] = (uint8_t)(xCh >> 40); + pCh[5 + tsize] = (uint8_t)(yCh >> 40); #endif #endif @@ -155,7 +155,7 @@ inline uint8_t ptc_add_selfcap_node(cap_sensor_t *node, const ptc_ch_bm_t xCh, c inline uint8_t ptc_add_mutualcap_node(cap_sensor_t *node, const ptc_ch_bm_t xCh, const ptc_ch_bm_t yCh) { - if(__builtin_constant_p(yCh) && __builtin_constant_p(xCh)) { + if (__builtin_constant_p(yCh) && __builtin_constant_p(xCh)) { if (yCh == 0) { badArg("yCh bitmap mustn't be 0 (Pin_Pxn is not a PTC pin)"); } @@ -175,20 +175,20 @@ inline uint8_t ptc_add_mutualcap_node(cap_sensor_t *node, const ptc_ch_bm_t xCh, pCh[0 + tsize] = (uint8_t)(yCh >> 0); #if __PTC_Pincount__ >= 8 - pCh[1] = (uint8_t)(xCh >> 8); - pCh[1 + tsize] = (uint8_t)(yCh >> 8); + pCh[1] = (uint8_t)(xCh >> 8); + pCh[1 + tsize] = (uint8_t)(yCh >> 8); #if __PTC_Pincount__ >= 16 - pCh[2] = (uint8_t)(xCh >> 16); - pCh[2 + tsize] = (uint8_t)(yCh >> 16); - pCh[3] = (uint8_t)(xCh >> 24); - pCh[3 + tsize] = (uint8_t)(yCh >> 24); - pCh[4] = (uint8_t)(xCh >> 32); - pCh[4 + tsize] = (uint8_t)(yCh >> 32); + pCh[2] = (uint8_t)(xCh >> 16); + pCh[2 + tsize] = (uint8_t)(yCh >> 16); + pCh[3] = (uint8_t)(xCh >> 24); + pCh[3 + tsize] = (uint8_t)(yCh >> 24); + pCh[4] = (uint8_t)(xCh >> 32); + pCh[4 + tsize] = (uint8_t)(yCh >> 32); #if __PTC_Pincount__ >= 40 - pCh[5] = (uint8_t)(xCh >> 40); - pCh[5 + tsize] = (uint8_t)(yCh >> 40); + pCh[5] = (uint8_t)(xCh >> 40); + pCh[5 + tsize] = (uint8_t)(yCh >> 40); #endif #endif diff --git a/megaavr/libraries/PTC/src/ptc_io.h b/megaavr/libraries/PTC/src/ptc_io.h index f5c1ba35..981c1e1b 100644 --- a/megaavr/libraries/PTC/src/ptc_io.h +++ b/megaavr/libraries/PTC/src/ptc_io.h @@ -56,13 +56,13 @@ typedef struct PTC_struct { #define PRSC_MAX ADC_PRESC_DIV256_gc #if F_CPU >= 12000000 // 16 MHz / 16 = 1.0 MHz, 20 MHz / 16 = 1.25 MHz - #define PTC_PRESC_DEFAULT ADC_PRESC_DIV16_gc +#define PTC_PRESC_DEFAULT ADC_PRESC_DIV16_gc #elif F_CPU >= 6000000 // 8 MHz / 8 = 1.0 MHz, 10 MHz / 8 = 1.25 MHz - #define PTC_PRESC_DEFAULT ADC_PRESC_DIV8_gc +#define PTC_PRESC_DEFAULT ADC_PRESC_DIV8_gc #elif F_CPU >= 3000000 // 4 MHz / 4 = 1.0 MHz, 5 MHz / 4 = 1.25 MHz - #define PTC_PRESC_DEFAULT ADC_PRESC_DIV4_gc +#define PTC_PRESC_DEFAULT ADC_PRESC_DIV4_gc #else // 1 MHz / 2 = 500 kHz - the lowest setting - #define PTC_PRESC_DEFAULT ADC_PRESC_DIV2_gc +#define PTC_PRESC_DEFAULT ADC_PRESC_DIV2_gc #endif #elif defined (__PTC_DA__) @@ -119,24 +119,24 @@ typedef struct PTC_struct { #define PRSC_MAX PTC_PRESC_DIV16_gc #if F_CPU <= 400000 - #define PTC_PRESC_DEFAULT PTC_PRESC_DIV2_gc +#define PTC_PRESC_DEFAULT PTC_PRESC_DIV2_gc #elif F_CPU <= 800000 - #define PTC_PRESC_DEFAULT PTC_PRESC_DIV4_gc +#define PTC_PRESC_DEFAULT PTC_PRESC_DIV4_gc #elif F_CPU <= 1200000 - #define PTC_PRESC_DEFAULT PTC_PRESC_DIV6_gc +#define PTC_PRESC_DEFAULT PTC_PRESC_DIV6_gc #elif F_CPU <= 1600000 - #define PTC_PRESC_DEFAULT PTC_PRESC_DIV8_gc +#define PTC_PRESC_DEFAULT PTC_PRESC_DIV8_gc #elif F_CPU <= 2000000 - #define PTC_PRESC_DEFAULT PTC_PRESC_DIV10_gc +#define PTC_PRESC_DEFAULT PTC_PRESC_DIV10_gc #elif F_CPU <= 2400000 - #define PTC_PRESC_DEFAULT PTC_PRESC_DIV12_gc +#define PTC_PRESC_DEFAULT PTC_PRESC_DIV12_gc #elif F_CPU <= 2800000 - #define PTC_PRESC_DEFAULT PTC_PRESC_DIV14_gc +#define PTC_PRESC_DEFAULT PTC_PRESC_DIV14_gc #else - #define PTC_PRESC_DEFAULT PTC_PRESC_DIV16_gc +#define PTC_PRESC_DEFAULT PTC_PRESC_DIV16_gc #endif #else - #warning "Neither __PTC_Tiny__ nor __PTC_DA__ defined" +#warning "Neither __PTC_Tiny__ nor __PTC_DA__ defined" #endif @@ -148,260 +148,260 @@ typedef struct PTC_struct { #define PIN_TO_PTC(__pin__) (((__pin__) < NUM_TOTAL_PINS ) ? digital_pin_to_ptc_bm[__pin__] : 0x00) static const ptc_ch_bm_t digital_pin_to_ptc_bm [] = { -#if (__PTC_Pincount__ == 6) + #if (__PTC_Pincount__ == 6) 0x01 << 0, //PA4 - 0x01 << 1, //PA5 - 0x01 << 2, //PA6 - 0x01 << 3, //PA7 - 0x00, //PB3 - 0x00, //PB2 - 0x01 << 4, //PB1 - 0x01 << 5, //PB0 - 0x00, //PA1 - 0x00, //PA2 - 0x00, //PA3 - 0x00 //PA0 -#elif (__PTC_Pincount__ == 12) + 0x01 << 1, //PA5 + 0x01 << 2, //PA6 + 0x01 << 3, //PA7 + 0x00, //PB3 + 0x00, //PB2 + 0x01 << 4, //PB1 + 0x01 << 5, //PB0 + 0x00, //PA1 + 0x00, //PA2 + 0x00, //PA3 + 0x00 //PA0 + #elif (__PTC_Pincount__ == 12) 0x01 << 0, // 0 PA4 - 0x01 << 1, // 1 PA5 - 0x01 << 2, // 2 PA6 - 0x01 << 3, // 3 PA7 - 0x01 << 12, // 4 PB5 - 0x01 << 13, // 5 PB4 - 0x00, // 6 PB3 - 0x00, // 7 PB2 - 0x01 << 4, // 8 PB1 - // Right side, bottom to top - 0x01 << 5, // 9 PB0 - 0x01 << 6, // 10 PC0 - 0x01 << 7, // 11 PC1 - 0x01 << 8, // 12 PC2 - 0x01 << 9, // 13 PC3 - 0x00, // 14 PA1 - 0x00, // 15 PA2 - 0x00, // 16 PA3 - 0x00 // 17 PA0 -#elif (__PTC_Pincount__ == 14) + 0x01 << 1, // 1 PA5 + 0x01 << 2, // 2 PA6 + 0x01 << 3, // 3 PA7 + 0x01 << 12, // 4 PB5 + 0x01 << 13, // 5 PB4 + 0x00, // 6 PB3 + 0x00, // 7 PB2 + 0x01 << 4, // 8 PB1 + // Right side, bottom to top + 0x01 << 5, // 9 PB0 + 0x01 << 6, // 10 PC0 + 0x01 << 7, // 11 PC1 + 0x01 << 8, // 12 PC2 + 0x01 << 9, // 13 PC3 + 0x00, // 14 PA1 + 0x00, // 15 PA2 + 0x00, // 16 PA3 + 0x00 // 17 PA0 + #elif (__PTC_Pincount__ == 14) 0x01 << 0, // 0 PA4 - 0x01 << 1, // 1 PA5 - 0x01 << 2, // 2 PA6 - 0x01 << 3, // 3 PA7 - 0x00, // 4 PB7 - 0x00, // 5 PB6 - 0x01 << 12, // 6 PB5 - 0x01 << 13, // 7 PB4 - 0x00, // 8 PB3 - 0x00, // 9 PB2 - 0x01 << 4, // 10 PB1 - // Right side, bottom to top - 0x01 << 5, // 11 PB0 - 0x01 << 6, // 12 PC0 - 0x01 << 7, // 13 PC1 - 0x01 << 8, // 14 PC2 - 0x01 << 9, // 15 PC3 - 0x01 << 10, // 16 PC4 - 0x01 << 11, // 17 PC5 - 0x00, // 18 PA1 - 0x00, // 19 PA2 - 0x00, // 20 PA3 - 0x00 // 21 PA0 -#elif (__PTC_Pincount__ == 18) // DA (ToDo) + 0x01 << 1, // 1 PA5 + 0x01 << 2, // 2 PA6 + 0x01 << 3, // 3 PA7 + 0x00, // 4 PB7 + 0x00, // 5 PB6 + 0x01 << 12, // 6 PB5 + 0x01 << 13, // 7 PB4 + 0x00, // 8 PB3 + 0x00, // 9 PB2 + 0x01 << 4, // 10 PB1 + // Right side, bottom to top + 0x01 << 5, // 11 PB0 + 0x01 << 6, // 12 PC0 + 0x01 << 7, // 13 PC1 + 0x01 << 8, // 14 PC2 + 0x01 << 9, // 15 PC3 + 0x01 << 10, // 16 PC4 + 0x01 << 11, // 17 PC5 + 0x00, // 18 PA1 + 0x00, // 19 PA2 + 0x00, // 20 PA3 + 0x00 // 21 PA0 + #elif (__PTC_Pincount__ == 18) // DA (ToDo) 0x01ULL << 0, // 0 PA0 - 0x01ULL << 1, // 1 PA1 - 0x01ULL << 2, // 2 PA2/SDA - 0x01ULL << 3, // 3 PA3/SCL - 0x01ULL << 4, // 4 PA4/MOSI - 0x01ULL << 5, // 5 PA5/MISO - 0x01ULL << 6, // 6 PA6/SCK - 0x01ULL << 7, // 7 PA7/SS/CLKOUT - 0x00ULL, // 8 PC0/USART1_Tx - 0x00ULL, // 9 PC1/USART1_Rx - 0x00ULL, // 10 PC2 - 0x00ULL, // 11 PC3 - 0x01ULL << 16, // 12 PD0/AIN0 - 0x01ULL << 17, // 13 PD1/AIN1 - 0x01ULL << 18, // 14 PD2/AIN2 - 0x01ULL << 19, // 15 PD3/AIN3 - 0x01ULL << 20, // 16 PD4/AIN4 - 0x01ULL << 21, // 17 PD5/AIN5 - 0x01ULL << 22, // 18 PD6/AIN6 - 0x01ULL << 23, // 19 PD7/AIN7/AREF - 0x01ULL << 32, // 20 PF0/USART2_Tx/TOSC1 - 0x01ULL << 33, // 21 PF1/USART2_Rx/TOSC2 -#elif (__PTC_Pincount__ == 22) + 0x01ULL << 1, // 1 PA1 + 0x01ULL << 2, // 2 PA2/SDA + 0x01ULL << 3, // 3 PA3/SCL + 0x01ULL << 4, // 4 PA4/MOSI + 0x01ULL << 5, // 5 PA5/MISO + 0x01ULL << 6, // 6 PA6/SCK + 0x01ULL << 7, // 7 PA7/SS/CLKOUT + 0x00ULL, // 8 PC0/USART1_Tx + 0x00ULL, // 9 PC1/USART1_Rx + 0x00ULL, // 10 PC2 + 0x00ULL, // 11 PC3 + 0x01ULL << 16, // 12 PD0/AIN0 + 0x01ULL << 17, // 13 PD1/AIN1 + 0x01ULL << 18, // 14 PD2/AIN2 + 0x01ULL << 19, // 15 PD3/AIN3 + 0x01ULL << 20, // 16 PD4/AIN4 + 0x01ULL << 21, // 17 PD5/AIN5 + 0x01ULL << 22, // 18 PD6/AIN6 + 0x01ULL << 23, // 19 PD7/AIN7/AREF + 0x01ULL << 32, // 20 PF0/USART2_Tx/TOSC1 + 0x01ULL << 33, // 21 PF1/USART2_Rx/TOSC2 + #elif (__PTC_Pincount__ == 22) 0x01ULL << 0, // 0 PA0 - 0x01ULL << 1, // 1 PA1 - 0x01ULL << 2, // 2 PA2/SDA - 0x01ULL << 3, // 3 PA3/SCL - 0x01ULL << 4, // 4 PA4/MOSI - 0x01ULL << 5, // 5 PA5/MISO - 0x01ULL << 6, // 6 PA6/SCK - 0x01ULL << 7, // 7 PA7/SS/CLKOUT - 0x00ULL, // 8 PC0/USART1_Tx - 0x00ULL, // 9 PC1/USART1_Rx - 0x00ULL, // 10 PC2 - 0x00ULL, // 11 PC3 - 0x01ULL << 16, // 12 PD0/AIN0 - 0x01ULL << 17, // 13 PD1/AIN1 - 0x01ULL << 18, // 14 PD2/AIN2 - 0x01ULL << 19, // 15 PD3/AIN3 - 0x01ULL << 20, // 16 PD4/AIN4 - 0x01ULL << 21, // 17 PD5/AIN5 - 0x01ULL << 22, // 18 PD6/AIN6 - 0x01ULL << 23, // 19 PD7/AIN7/AREF - 0x01ULL << 32, // 20 PF0/USART2_Tx/TOSC1 - 0x01ULL << 33, // 21 PF1/USART2_Rx/TOSC2 - 0x01ULL << 34, // 22 PF2/AIN12 - 0x01ULL << 35, // 23 PF3/AIN13 - 0x01ULL << 36, // 24 PF4/AIN14/TCB0 PWM - 0x01ULL << 37, // 25 PF5/AIN15/TCB1 PWM -#elif (__PTC_Pincount__ == 32) + 0x01ULL << 1, // 1 PA1 + 0x01ULL << 2, // 2 PA2/SDA + 0x01ULL << 3, // 3 PA3/SCL + 0x01ULL << 4, // 4 PA4/MOSI + 0x01ULL << 5, // 5 PA5/MISO + 0x01ULL << 6, // 6 PA6/SCK + 0x01ULL << 7, // 7 PA7/SS/CLKOUT + 0x00ULL, // 8 PC0/USART1_Tx + 0x00ULL, // 9 PC1/USART1_Rx + 0x00ULL, // 10 PC2 + 0x00ULL, // 11 PC3 + 0x01ULL << 16, // 12 PD0/AIN0 + 0x01ULL << 17, // 13 PD1/AIN1 + 0x01ULL << 18, // 14 PD2/AIN2 + 0x01ULL << 19, // 15 PD3/AIN3 + 0x01ULL << 20, // 16 PD4/AIN4 + 0x01ULL << 21, // 17 PD5/AIN5 + 0x01ULL << 22, // 18 PD6/AIN6 + 0x01ULL << 23, // 19 PD7/AIN7/AREF + 0x01ULL << 32, // 20 PF0/USART2_Tx/TOSC1 + 0x01ULL << 33, // 21 PF1/USART2_Rx/TOSC2 + 0x01ULL << 34, // 22 PF2/AIN12 + 0x01ULL << 35, // 23 PF3/AIN13 + 0x01ULL << 36, // 24 PF4/AIN14/TCB0 PWM + 0x01ULL << 37, // 25 PF5/AIN15/TCB1 PWM + #elif (__PTC_Pincount__ == 32) 0x01ULL << 0, // 0 PA0 - 0x01ULL << 1, // 1 PA1 - 0x01ULL << 2, // 2 PA2/SDA - 0x01ULL << 3, // 3 PA3/SCL - 0x01ULL << 4, // 4 PA4/MOSI - 0x01ULL << 5, // 5 PA5/MISO - 0x01ULL << 6, // 6 PA6/SCK - 0x01ULL << 7, // 7 PA7/SS/CLKOUT/LED_BUILTIN - 0x01ULL << 8, // 8 PB0/USART3_Tx - 0x01ULL << 9, // 9 PB1/USART3_Rx - 0x01ULL << 10, // 10 PB2 - 0x01ULL << 11, // 11 PB3 - 0x01ULL << 12, // 12 PB4/(TCB2 PWM) - 0x01ULL << 13, // 13 PB5 - 0x00ULL, // 14 PC0/USART1_Tx - 0x00ULL, // 15 PC1/USART1_Rx - 0x00ULL, // 16 PC2 - 0x00ULL, // 17 PC3 - 0x00ULL, // 18 PC4 - 0x00ULL, // 19 PC5 - 0x00ULL, // 20 PC6 - 0x00ULL, // 21 PC7 - 0x01ULL << 16, // 22 PD0/AIN0 - 0x01ULL << 17, // 23 PD1/AIN1 - 0x01ULL << 18, // 24 PD2/AIN2 - 0x01ULL << 19, // 25 PD3/AIN3 - 0x01ULL << 20, // 26 PD4/AIN4 - 0x01ULL << 21, // 27 PD5/AIN5 - 0x01ULL << 22, // 28 PD6/AIN6 - 0x01ULL << 23, // 29 PD7/AIN7/AREF - 0x01ULL << 24, // 30 PE0/AIN8 - 0x01ULL << 25, // 31 PE1/AIN9 - 0x01ULL << 26, // 32 PE2/AIN10 - 0x01ULL << 27, // 33 PE3/AIN11 - 0x01ULL << 32, // 34 PF0/USART2_Tx/TOSC1 - 0x01ULL << 33, // 35 PF1/USART2_Rx/TOSC2 - 0x01ULL << 34, // 36 PF2/AIN12 - 0x01ULL << 35, // 37 PF3/AIN13 - 0x01ULL << 36, // 38 PF4/AIN14 - 0x01ULL << 37, // 39 PF5/AIN15 -#elif (__PTC_Pincount__ == 46) + 0x01ULL << 1, // 1 PA1 + 0x01ULL << 2, // 2 PA2/SDA + 0x01ULL << 3, // 3 PA3/SCL + 0x01ULL << 4, // 4 PA4/MOSI + 0x01ULL << 5, // 5 PA5/MISO + 0x01ULL << 6, // 6 PA6/SCK + 0x01ULL << 7, // 7 PA7/SS/CLKOUT/LED_BUILTIN + 0x01ULL << 8, // 8 PB0/USART3_Tx + 0x01ULL << 9, // 9 PB1/USART3_Rx + 0x01ULL << 10, // 10 PB2 + 0x01ULL << 11, // 11 PB3 + 0x01ULL << 12, // 12 PB4/(TCB2 PWM) + 0x01ULL << 13, // 13 PB5 + 0x00ULL, // 14 PC0/USART1_Tx + 0x00ULL, // 15 PC1/USART1_Rx + 0x00ULL, // 16 PC2 + 0x00ULL, // 17 PC3 + 0x00ULL, // 18 PC4 + 0x00ULL, // 19 PC5 + 0x00ULL, // 20 PC6 + 0x00ULL, // 21 PC7 + 0x01ULL << 16, // 22 PD0/AIN0 + 0x01ULL << 17, // 23 PD1/AIN1 + 0x01ULL << 18, // 24 PD2/AIN2 + 0x01ULL << 19, // 25 PD3/AIN3 + 0x01ULL << 20, // 26 PD4/AIN4 + 0x01ULL << 21, // 27 PD5/AIN5 + 0x01ULL << 22, // 28 PD6/AIN6 + 0x01ULL << 23, // 29 PD7/AIN7/AREF + 0x01ULL << 24, // 30 PE0/AIN8 + 0x01ULL << 25, // 31 PE1/AIN9 + 0x01ULL << 26, // 32 PE2/AIN10 + 0x01ULL << 27, // 33 PE3/AIN11 + 0x01ULL << 32, // 34 PF0/USART2_Tx/TOSC1 + 0x01ULL << 33, // 35 PF1/USART2_Rx/TOSC2 + 0x01ULL << 34, // 36 PF2/AIN12 + 0x01ULL << 35, // 37 PF3/AIN13 + 0x01ULL << 36, // 38 PF4/AIN14 + 0x01ULL << 37, // 39 PF5/AIN15 + #elif (__PTC_Pincount__ == 46) 0x01ULL << 0, // 0 PA0 - 0x01ULL << 1, // 1 PA1 - 0x01ULL << 2, // 2 PA2/SDA - 0x01ULL << 3, // 3 PA3/SCL - 0x01ULL << 4, // 4 PA4/MOSI - 0x01ULL << 5, // 5 PA5/MISO - 0x01ULL << 6, // 6 PA6/SCK - 0x01ULL << 7, // 7 PA7/SS/CLKOUT/LED_BUILTIN - 0x01ULL << 8, // 8 PB0/USART3_Tx - 0x01ULL << 9, // 9 PB1/USART3_Rx - 0x01ULL << 10, // 10 PB2 - 0x01ULL << 11, // 11 PB3 - 0x01ULL << 12, // 12 PB4/(TCB2 PWM) - 0x01ULL << 13, // 13 PB5 - 0x01ULL << 14, // 14 PB6 - 0x01ULL << 15, // 15 PB7 - 0x00ULL, // 16 PC0/USART1_Tx - 0x00ULL, // 17 PC1/USART1_Rx - 0x00ULL, // 18 PC2 - 0x00ULL, // 19 PC3 - 0x00ULL, // 20 PC4 - 0x00ULL, // 21 PC5 - 0x00ULL, // 22 PC6 - 0x00ULL, // 23 PC7 - 0x01ULL << 16, // 24 PD0/AIN0 - 0x01ULL << 17, // 25 PD1/AIN1 - 0x01ULL << 18, // 26 PD2/AIN2 - 0x01ULL << 19, // 27 PD3/AIN3 - 0x01ULL << 20, // 28 PD4/AIN4 - 0x01ULL << 21, // 29 PD5/AIN5 - 0x01ULL << 22, // 30 PD6/AIN6 - 0x01ULL << 23, // 31 PD7/AIN7/AREF - 0x01ULL << 24, // 32 PE0/AIN8 - 0x01ULL << 25, // 33 PE1/AIN9 - 0x01ULL << 26, // 34 PE2/AIN10 - 0x01ULL << 27, // 35 PE3/AIN11 - 0x01ULL << 28, // 36 PE4 - 0x01ULL << 29, // 37 PE5 - 0x01ULL << 30, // 38 PE6 - 0x01ULL << 31, // 39 PE7 - 0x01ULL << 32, // 40 PF0/USART2_Tx/TOSC1 - 0x01ULL << 33, // 41 PF1/USART2_Rx/TOSC2 - 0x01ULL << 34, // 42 PF2/AIN12 - 0x01ULL << 35, // 43 PF3/AIN13 - 0x01ULL << 36, // 44 PF4/AIN14 - 0x01ULL << 37, // 45 PF5/AIN15 - 0x01ULL << 40, // 46 PG0 - 0x01ULL << 41, // 47 PG1 - 0x01ULL << 42, // 48 PG2 - 0x01ULL << 43, // 49 PG3 - 0x01ULL << 44, // 50 PG4 - 0x01ULL << 45, // 51 PG5 - 0x01ULL << 46, // 52 PG6 - 0x01ULL << 47, // 53 PG7 -#endif + 0x01ULL << 1, // 1 PA1 + 0x01ULL << 2, // 2 PA2/SDA + 0x01ULL << 3, // 3 PA3/SCL + 0x01ULL << 4, // 4 PA4/MOSI + 0x01ULL << 5, // 5 PA5/MISO + 0x01ULL << 6, // 6 PA6/SCK + 0x01ULL << 7, // 7 PA7/SS/CLKOUT/LED_BUILTIN + 0x01ULL << 8, // 8 PB0/USART3_Tx + 0x01ULL << 9, // 9 PB1/USART3_Rx + 0x01ULL << 10, // 10 PB2 + 0x01ULL << 11, // 11 PB3 + 0x01ULL << 12, // 12 PB4/(TCB2 PWM) + 0x01ULL << 13, // 13 PB5 + 0x01ULL << 14, // 14 PB6 + 0x01ULL << 15, // 15 PB7 + 0x00ULL, // 16 PC0/USART1_Tx + 0x00ULL, // 17 PC1/USART1_Rx + 0x00ULL, // 18 PC2 + 0x00ULL, // 19 PC3 + 0x00ULL, // 20 PC4 + 0x00ULL, // 21 PC5 + 0x00ULL, // 22 PC6 + 0x00ULL, // 23 PC7 + 0x01ULL << 16, // 24 PD0/AIN0 + 0x01ULL << 17, // 25 PD1/AIN1 + 0x01ULL << 18, // 26 PD2/AIN2 + 0x01ULL << 19, // 27 PD3/AIN3 + 0x01ULL << 20, // 28 PD4/AIN4 + 0x01ULL << 21, // 29 PD5/AIN5 + 0x01ULL << 22, // 30 PD6/AIN6 + 0x01ULL << 23, // 31 PD7/AIN7/AREF + 0x01ULL << 24, // 32 PE0/AIN8 + 0x01ULL << 25, // 33 PE1/AIN9 + 0x01ULL << 26, // 34 PE2/AIN10 + 0x01ULL << 27, // 35 PE3/AIN11 + 0x01ULL << 28, // 36 PE4 + 0x01ULL << 29, // 37 PE5 + 0x01ULL << 30, // 38 PE6 + 0x01ULL << 31, // 39 PE7 + 0x01ULL << 32, // 40 PF0/USART2_Tx/TOSC1 + 0x01ULL << 33, // 41 PF1/USART2_Rx/TOSC2 + 0x01ULL << 34, // 42 PF2/AIN12 + 0x01ULL << 35, // 43 PF3/AIN13 + 0x01ULL << 36, // 44 PF4/AIN14 + 0x01ULL << 37, // 45 PF5/AIN15 + 0x01ULL << 40, // 46 PG0 + 0x01ULL << 41, // 47 PG1 + 0x01ULL << 42, // 48 PG2 + 0x01ULL << 43, // 49 PG3 + 0x01ULL << 44, // 50 PG4 + 0x01ULL << 45, // 51 PG5 + 0x01ULL << 46, // 52 PG6 + 0x01ULL << 47, // 53 PG7 + #endif }; #if defined (PORTA) - #define PORTA_ISC(_pin_) ((0x20 * 0) + 0x10 + _pin_) +#define PORTA_ISC(_pin_) ((0x20 * 0) + 0x10 + _pin_) #else - #define PORTA_ISC(_pin_) 0x00 +#define PORTA_ISC(_pin_) 0x00 #endif #if defined (PORTB) - #define PORTB_ISC(_pin_) ((0x20 * 1) + 0x10 + _pin_) +#define PORTB_ISC(_pin_) ((0x20 * 1) + 0x10 + _pin_) #else - #define PORTB_ISC(_pin_) 0x00 +#define PORTB_ISC(_pin_) 0x00 #endif #if defined (PORTC) - #define PORTC_ISC(_pin_) ((0x20 * 2) + 0x10 + _pin_) +#define PORTC_ISC(_pin_) ((0x20 * 2) + 0x10 + _pin_) #else - #define PORTC_ISC(_pin_) 0x00 +#define PORTC_ISC(_pin_) 0x00 #endif #if defined (PORTD) - #define PORTD_ISC(_pin_) ((0x20 * 3) + 0x10 + _pin_) +#define PORTD_ISC(_pin_) ((0x20 * 3) + 0x10 + _pin_) #else - #define PORTD_ISC(_pin_) 0x00 +#define PORTD_ISC(_pin_) 0x00 #endif #if defined (PORTE) - #define PORTE_ISC(_pin_) ((0x20 * 4) + 0x10 + _pin_) +#define PORTE_ISC(_pin_) ((0x20 * 4) + 0x10 + _pin_) #else - #define PORTE_ISC(_pin_) 0x00 +#define PORTE_ISC(_pin_) 0x00 #endif #if defined (PORTF) - #define PORTF_ISC(_pin_) ((0x20 * 5) + 0x10 + _pin_) +#define PORTF_ISC(_pin_) ((0x20 * 5) + 0x10 + _pin_) #else - #define PORTF_ISC(_pin_) 0x00 +#define PORTF_ISC(_pin_) 0x00 #endif #if defined (PORTG) - #define PORTG_ISC(_pin_) ((0x20 * 6) + 0x10 + _pin_) +#define PORTG_ISC(_pin_) ((0x20 * 6) + 0x10 + _pin_) #else - #define PORTG_ISC(_pin_) 0x00 +#define PORTG_ISC(_pin_) 0x00 #endif // lookup-table to quickly disable input and pull-up. PTC_Tiny only static const uint8_t ptc_ch_to_pin [] = { -#if (__PTC_Pincount__ <= 14) + #if (__PTC_Pincount__ <= 14) PORTA_ISC(4), PORTA_ISC(5), PORTA_ISC(6), PORTA_ISC(7), PORTB_ISC(1), /* X4 / Y4 */ PORTB_ISC(0), -#if (__PTC_Pincount__ == 12 || __PTC_Pincount__ == 14) + #if (__PTC_Pincount__ == 12 || __PTC_Pincount__ == 14) PORTC_ISC(0), PORTC_ISC(1), PORTC_ISC(2), /* X8 / Y8 */ @@ -411,8 +411,8 @@ static const uint8_t ptc_ch_to_pin [] = { PORTB_ISC(5), /* X12 / Y12 */ PORTB_ISC(6), -#endif -#endif + #endif + #endif }; diff --git a/megaavr/libraries/PTC/src/ptc_types.h b/megaavr/libraries/PTC/src/ptc_types.h index ef74abb4..2d6369aa 100644 --- a/megaavr/libraries/PTC/src/ptc_types.h +++ b/megaavr/libraries/PTC/src/ptc_types.h @@ -14,49 +14,49 @@ extern "C" { #include #if (defined(__AVR_ATtiny814__) || defined(__AVR_ATtiny1614__) || defined(__AVR_ATtiny3214__)) - typedef uint8_t ptc_id_t; - typedef uint8_t ptc_ch_bm_t; - typedef uint8_t ptc_ch_arr_t[1]; - #define __PTC_Tiny__ - #define __PTC_Pincount__ 6 +typedef uint8_t ptc_id_t; +typedef uint8_t ptc_ch_bm_t; +typedef uint8_t ptc_ch_arr_t[1]; +#define __PTC_Tiny__ +#define __PTC_Pincount__ 6 #elif (defined(__AVR_ATtiny816__) || defined(__AVR_ATtiny1616__) || defined(__AVR_ATtiny3216__)) - typedef uint8_t ptc_id_t; - typedef uint16_t ptc_ch_bm_t; - typedef uint16_t ptc_ch_arr_t[1]; - #define __PTC_Tiny__ - #define __PTC_Pincount__ 12 +typedef uint8_t ptc_id_t; +typedef uint16_t ptc_ch_bm_t; +typedef uint16_t ptc_ch_arr_t[1]; +#define __PTC_Tiny__ +#define __PTC_Pincount__ 12 #elif (defined(__AVR_ATtiny817__) || defined(__AVR_ATtiny1617__) || defined(__AVR_ATtiny3217__)) - typedef uint8_t ptc_id_t; - typedef uint16_t ptc_ch_bm_t; - typedef uint16_t ptc_ch_arr_t[1]; - #define __PTC_Tiny__ - #define __PTC_Pincount__ 14 +typedef uint8_t ptc_id_t; +typedef uint16_t ptc_ch_bm_t; +typedef uint16_t ptc_ch_arr_t[1]; +#define __PTC_Tiny__ +#define __PTC_Pincount__ 14 #elif (defined(__AVR_AVR32DA28__) || defined(__AVR_AVR64DA28__) || defined(__AVR_AVR128DA28__)) - typedef uint16_t ptc_id_t; - typedef uint64_t ptc_ch_bm_t; - typedef uint8_t ptc_ch_arr_t[5]; - #define __PTC_DA__ - #define __PTC_Pincount__ 18 +typedef uint16_t ptc_id_t; +typedef uint64_t ptc_ch_bm_t; +typedef uint8_t ptc_ch_arr_t[5]; +#define __PTC_DA__ +#define __PTC_Pincount__ 18 #elif (defined(__AVR_AVR32DA32__) || defined(__AVR_AVR64DA32__) || defined(__AVR_AVR128DA32__)) - typedef uint16_t ptc_id_t; - typedef uint64_t ptc_ch_bm_t; - typedef uint8_t ptc_ch_arr_t[5]; - #define __PTC_DA__ - #define __PTC_Pincount__ 22 +typedef uint16_t ptc_id_t; +typedef uint64_t ptc_ch_bm_t; +typedef uint8_t ptc_ch_arr_t[5]; +#define __PTC_DA__ +#define __PTC_Pincount__ 22 #elif (defined(__AVR_AVR32DA48__) || defined(__AVR_AVR64DA48__) || defined(__AVR_AVR128DA48__)) - typedef uint16_t ptc_id_t; - typedef uint64_t ptc_ch_bm_t; - typedef uint8_t ptc_ch_arr_t[5]; - #define __PTC_DA__ - #define __PTC_Pincount__ 32 +typedef uint16_t ptc_id_t; +typedef uint64_t ptc_ch_bm_t; +typedef uint8_t ptc_ch_arr_t[5]; +#define __PTC_DA__ +#define __PTC_Pincount__ 32 #elif (defined(__AVR_AVR32DA64__) || defined(__AVR_AVR64DA64__) || defined(__AVR_AVR128DA64__)) - typedef uint16_t ptc_id_t; - typedef uint64_t ptc_ch_bm_t; - typedef uint8_t ptc_ch_arr_t[6]; - #define __PTC_DA__ - #define __PTC_Pincount__ 46 +typedef uint16_t ptc_id_t; +typedef uint64_t ptc_ch_bm_t; +typedef uint8_t ptc_ch_arr_t[6]; +#define __PTC_DA__ +#define __PTC_Pincount__ 46 #else - #error "PTC not supported by this chip" +#error "PTC not supported by this chip" #endif @@ -83,14 +83,14 @@ typedef enum ptc_freq_enum { #if defined (__PTC_Tiny__) typedef enum PTC_PRESC_enum { - PTC_PRESC_DIV2_gc = (0x00<<0), /* CLK_PER divided by 2 */ - PTC_PRESC_DIV4_gc = (0x01<<0), /* CLK_PER divided by 4 */ - PTC_PRESC_DIV8_gc = (0x02<<0), /* CLK_PER divided by 8 */ - PTC_PRESC_DIV16_gc = (0x03<<0), /* CLK_PER divided by 16 */ - PTC_PRESC_DIV32_gc = (0x04<<0), /* CLK_PER divided by 32 */ - PTC_PRESC_DIV64_gc = (0x05<<0), /* CLK_PER divided by 64 */ - PTC_PRESC_DIV128_gc = (0x06<<0), /* CLK_PER divided by 128 */ - PTC_PRESC_DIV256_gc = (0x07<<0) /* CLK_PER divided by 256 */ + PTC_PRESC_DIV2_gc = (0x00 << 0), /* CLK_PER divided by 2 */ + PTC_PRESC_DIV4_gc = (0x01 << 0), /* CLK_PER divided by 4 */ + PTC_PRESC_DIV8_gc = (0x02 << 0), /* CLK_PER divided by 8 */ + PTC_PRESC_DIV16_gc = (0x03 << 0), /* CLK_PER divided by 16 */ + PTC_PRESC_DIV32_gc = (0x04 << 0), /* CLK_PER divided by 32 */ + PTC_PRESC_DIV64_gc = (0x05 << 0), /* CLK_PER divided by 64 */ + PTC_PRESC_DIV128_gc = (0x06 << 0), /* CLK_PER divided by 128 */ + PTC_PRESC_DIV256_gc = (0x07 << 0) /* CLK_PER divided by 256 */ } PTC_PRESC_t; typedef enum PTC_RSEL_enum { @@ -103,14 +103,14 @@ typedef enum PTC_RSEL_enum { } PTC_RSEL_t; #elif defined (__PTC_DA__) typedef enum PTC_PRESC_enum { - PTC_PRESC_DIV2_gc = (0x00<<0), /* CLK_PER divided by 2 */ - PTC_PRESC_DIV4_gc = (0x01<<0), /* CLK_PER divided by 4 */ - PTC_PRESC_DIV6_gc = (0x02<<0), /* CLK_PER divided by 2 */ - PTC_PRESC_DIV8_gc = (0x03<<0), /* CLK_PER divided by 8 */ - PTC_PRESC_DIV10_gc = (0x04<<0), /* CLK_PER divided by 8 */ - PTC_PRESC_DIV12_gc = (0x05<<0), /* CLK_PER divided by 8 */ - PTC_PRESC_DIV14_gc = (0x06<<0), /* CLK_PER divided by 8 */ - PTC_PRESC_DIV16_gc = (0x07<<0), /* CLK_PER divided by 16 */ + PTC_PRESC_DIV2_gc = (0x00 << 0), /* CLK_PER divided by 2 */ + PTC_PRESC_DIV4_gc = (0x01 << 0), /* CLK_PER divided by 4 */ + PTC_PRESC_DIV6_gc = (0x02 << 0), /* CLK_PER divided by 2 */ + PTC_PRESC_DIV8_gc = (0x03 << 0), /* CLK_PER divided by 8 */ + PTC_PRESC_DIV10_gc = (0x04 << 0), /* CLK_PER divided by 8 */ + PTC_PRESC_DIV12_gc = (0x05 << 0), /* CLK_PER divided by 8 */ + PTC_PRESC_DIV14_gc = (0x06 << 0), /* CLK_PER divided by 8 */ + PTC_PRESC_DIV16_gc = (0x07 << 0), /* CLK_PER divided by 16 */ } PTC_PRESC_t; typedef enum tag_rsel_val_t { diff --git a/megaavr/tools/libs/intelhex/__init__.py b/megaavr/tools/libs/intelhex/__init__.py index c6423a6e..5da2de3c 100644 --- a/megaavr/tools/libs/intelhex/__init__.py +++ b/megaavr/tools/libs/intelhex/__init__.py @@ -144,7 +144,7 @@ def _decode_record(self, s, line=0): if not self._buf.get(addr, None) is None: raise AddressOverlapError(address=addr, line=line) self._buf[addr] = bin[i] - addr += 1 # FIXME: addr should be wrapped + addr += 1 # FIXME: addr should be wrapped # BUT after 02 record (at 64K boundary) # and after 04 record (at 4G boundary) @@ -289,7 +289,7 @@ def frombytes(self, bytes, offset=0): def _get_start_end(self, start=None, end=None, size=None): """Return default values for start and end if they are None. If this IntelHex object is empty then it's error to - invoke this method with both start and end as None. + invoke this method with both start and end as None. """ if (start,end) == (None,None) and self._buf == {}: raise EmptyIntelHexError @@ -316,7 +316,7 @@ def _get_start_end(self, start=None, end=None, size=None): return start, end def tobinarray(self, start=None, end=None, pad=_DEPRECATED, size=None): - ''' Convert this object to binary form as array. If start and end + ''' Convert this object to binary form as array. If start and end unspecified, they will be inferred from the data. @param start start address of output bytes. @param end end address of output bytes (inclusive). @@ -419,7 +419,7 @@ def todict(self): def addresses(self): '''Returns all used addresses in sorted order. - @return list of occupied data addresses in sorted order. + @return list of occupied data addresses in sorted order. ''' aa = dict_keys(self._buf) aa.sort() @@ -746,7 +746,7 @@ def puts(self, addr, s): self._buf[addr+i] = a[i] def getsz(self, addr): - """Get zero-terminated bytes string from given address. Will raise + """Get zero-terminated bytes string from given address. Will raise NotEnoughDataError exception if a hole is encountered before a 0. """ i = 0 @@ -768,7 +768,7 @@ def putsz(self, addr, s): def find(self, sub, start=None, end=None): """Return the lowest index in self[start:end] where subsection sub is found. Optional arguments start and end are interpreted as in slice notation. - + @param sub bytes-like subsection to find @param start start of section to search within (optional) @param end end of section to search within (optional) @@ -798,7 +798,7 @@ def dump(self, tofile=None, width=16, withpadding=False): width = int(width) if tofile is None: tofile = sys.stdout - + # start addr possibly if self.start_addr is not None: cs = self.start_addr.get('CS') @@ -853,7 +853,7 @@ def merge(self, other, overlap='error'): in overlapping region. @raise TypeError if other is not instance of IntelHex - @raise ValueError if other is the same object as self + @raise ValueError if other is the same object as self (it can't merge itself) @raise ValueError if overlap argument has incorrect value @raise AddressOverlapError on overlapped data @@ -908,7 +908,7 @@ def segments(self, min_gap=1): beginnings = [addresses[b+1] for b in breaks] beginnings.insert(0, addresses[0]) return [(a, b+1) for (a, b) in zip(beginnings, endings)] - + def get_memory_size(self): """Returns the approximate memory footprint for data.""" n = sys.getsizeof(self) @@ -996,7 +996,7 @@ def minaddr(self): def maxaddr(self): '''Get maximal address of HEX content in 16-bit mode. - @return maximal address used in this object + @return maximal address used in this object ''' aa = dict_keys(self._buf) if aa == []: @@ -1170,7 +1170,7 @@ def data(offset, bytes): def eof(): """Return End of File record as a string. - @return String representation of Intel Hex EOF record + @return String representation of Intel Hex EOF record """ return ':00000001FF' eof = staticmethod(eof) diff --git a/megaavr/tools/libs/intelhex/__version__.py b/megaavr/tools/libs/intelhex/__version__.py index 36edd5c2..a0cf6ce9 100644 --- a/megaavr/tools/libs/intelhex/__version__.py +++ b/megaavr/tools/libs/intelhex/__version__.py @@ -1,3 +1,3 @@ -# IntelHex library version information +# IntelHex library version information version_info = (2, 3, 0) version_str = '.'.join([str(i) for i in version_info]) diff --git a/megaavr/tools/libs/intelhex/test.py b/megaavr/tools/libs/intelhex/test.py index 50276b0a..53f4767e 100644 --- a/megaavr/tools/libs/intelhex/test.py +++ b/megaavr/tools/libs/intelhex/test.py @@ -765,7 +765,7 @@ def test__get_start_end(self): # normal object ih = IntelHex({1:2, 7:8, 10:0}) self.assertEqual((1,10), ih._get_start_end()) - self.assertEqual((1,10), ih._get_start_end(size=10)) + self.assertEqual((1,10), ih._get_start_end(size=10)) self.assertEqual((0,9), ih._get_start_end(start=0, size=10)) self.assertEqual((1,10), ih._get_start_end(end=10, size=10)) @@ -1092,7 +1092,7 @@ def test_simple_width3(self): self.assertEqual( '0000 12 34 -- |.4 |\n', sio.getvalue()) - + ih[16] = 0x56 ih[30] = 0x98 sio = StringIO() @@ -1682,7 +1682,7 @@ def runProcessAndGetAsciiStdoutOrStderr(self, cmdline): if stdout: output = stdout.decode('ascii', 'replace') elif stderr: - output = stderr.decode('ascii', 'replace') + output = stderr.decode('ascii', 'replace') output = output.replace('\r', '') return retcode, output @@ -1756,7 +1756,7 @@ def test_write_hex_file_byte_count_13(self): s = sio.getvalue() # control written hex first line to check that byte count is 13 sio.seek(0) - self.assertEqual(sio.readline(), + self.assertEqual(sio.readline(), ':0D0000000205A2E576246AF8E6057622786E\n', "Written hex is not in byte count 13") sio.close() @@ -1774,7 +1774,7 @@ def test_write_hex_file_byte_count_255(self): s = sio.getvalue() # control written hex first line to check that byte count is 255 sio.seek(0) - self.assertEqual(sio.readline(), + self.assertEqual(sio.readline(), (':FF0000000205A2E576246AF8E60576227867300702786AE475F0011204AD02' '04552000EB7F2ED2008018EF540F2490D43440D4FF30040BEF24BFB41A0050' '032461FFE57760021577057AE57A7002057930070D7867E475F0011204ADEF' diff --git a/megaavr/tools/libs/pymcuprog/deviceinfo/generate_device_info.py b/megaavr/tools/libs/pymcuprog/deviceinfo/generate_device_info.py index eb2f4f2f..84746578 100644 --- a/megaavr/tools/libs/pymcuprog/deviceinfo/generate_device_info.py +++ b/megaavr/tools/libs/pymcuprog/deviceinfo/generate_device_info.py @@ -15,7 +15,7 @@ from pymcuprog.deviceinfo.eraseflags import ChiperaseEffect DEVICE_INFO = { -$device_data +$device_data } ''' diff --git a/megaavr/tools/libs/yaml/constructor.py b/megaavr/tools/libs/yaml/constructor.py index a962e5f6..b7550d6f 100644 --- a/megaavr/tools/libs/yaml/constructor.py +++ b/megaavr/tools/libs/yaml/constructor.py @@ -123,7 +123,7 @@ def construct_mapping(self, node, deep=False): mapping = {} for key_node, value_node in node.value: key = self.construct_object(key_node, deep=deep) - + ## Version Check python_version = sys.version version = python_version.split()[0] diff --git a/megaavr/tools/libs/yaml/emitter.py b/megaavr/tools/libs/yaml/emitter.py index 34cb145a..66e12f32 100644 --- a/megaavr/tools/libs/yaml/emitter.py +++ b/megaavr/tools/libs/yaml/emitter.py @@ -671,7 +671,7 @@ def analyze_scalar(self, scalar): # Check for indicators. if index == 0: # Leading indicators are special characters. - if ch in '#,[]{}&*!|>\'\"%@`': + if ch in '#,[]{}&*!|>\'\"%@`': flow_indicators = True block_indicators = True if ch in '?:': diff --git a/megaavr/tools/libs/yaml/parser.py b/megaavr/tools/libs/yaml/parser.py index 13a5995d..ee290856 100644 --- a/megaavr/tools/libs/yaml/parser.py +++ b/megaavr/tools/libs/yaml/parser.py @@ -482,7 +482,7 @@ def parse_flow_sequence_entry(self, first=False): token = self.peek_token() raise ParserError("while parsing a flow sequence", self.marks[-1], "expected ',' or ']', but got %r" % token.id, token.start_mark) - + if self.check_token(KeyToken): token = self.peek_token() event = MappingStartEvent(None, None, True, diff --git a/megaavr/tools/libs/yaml/scanner.py b/megaavr/tools/libs/yaml/scanner.py index c8d127b8..4a366707 100644 --- a/megaavr/tools/libs/yaml/scanner.py +++ b/megaavr/tools/libs/yaml/scanner.py @@ -310,7 +310,7 @@ def remove_possible_simple_key(self): # Remove the saved possible key position at the current flow level. if self.flow_level in self.possible_simple_keys: key = self.possible_simple_keys[self.flow_level] - + if key.required: raise ScannerError("while scanning a simple key", key.mark, "could not find expected ':'", self.get_mark()) @@ -359,11 +359,11 @@ def fetch_stream_start(self): # Read the token. mark = self.get_mark() - + # Add STREAM-START. self.tokens.append(StreamStartToken(mark, mark, encoding=self.encoding)) - + def fetch_stream_end(self): @@ -377,7 +377,7 @@ def fetch_stream_end(self): # Read the token. mark = self.get_mark() - + # Add STREAM-END. self.tokens.append(StreamEndToken(mark, mark)) @@ -385,7 +385,7 @@ def fetch_stream_end(self): self.done = True def fetch_directive(self): - + # Set the current intendation to -1. self.unwind_indent(-1) @@ -512,7 +512,7 @@ def fetch_block_entry(self): self.tokens.append(BlockEntryToken(start_mark, end_mark)) def fetch_key(self): - + # Block context needs additional checks. if not self.flow_level: @@ -562,7 +562,7 @@ def fetch_value(self): # It must be a part of a complex key. else: - + # Block context needs additional checks. # (Do we really need them? They will be catched by the parser # anyway.) @@ -1014,14 +1014,14 @@ def scan_block_scalar(self, style): # Unfortunately, folding rules are ambiguous. # # This is the folding according to the specification: - + if folded and line_break == '\n' \ and leading_non_space and self.peek() not in ' \t': if not breaks: chunks.append(' ') else: chunks.append(line_break) - + # This is Clark Evans's interpretation (also in the spec # examples): #