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Verilog preprocessor #4

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drom opened this issue Jan 29, 2019 · 0 comments
Open

Verilog preprocessor #4

drom opened this issue Jan 29, 2019 · 0 comments

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@drom
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drom commented Jan 29, 2019

16.2 Verilog-style preprocessor

SystemRDL also provides for file inclusion and text substitution through the use of Verilog-style
preprocessor directives. A SystemRDL file containing file inclusion directives shall be equivalent with one containing each included file in-lined at the place of its inclusion directive. A SystemRDL file containing a text substitution directive shall be equivalent to one containing the text resolved according to the text substitution directive in-lined at the place of the text inclusion directive.

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