From 297224a809d7d368ddb45cb8a9e15c516f4405cc Mon Sep 17 00:00:00 2001 From: cgouert Date: Mon, 19 Jun 2023 17:56:43 -0400 Subject: [PATCH] Update sorting algorithm for sequential circuits --- hdl-benchmarks | 2 +- src/circuit.rs | 27 +++++++++++++++++---------- 2 files changed, 18 insertions(+), 11 deletions(-) diff --git a/hdl-benchmarks b/hdl-benchmarks index 3b2cdab..50b0bfe 160000 --- a/hdl-benchmarks +++ b/hdl-benchmarks @@ -1 +1 @@ -Subproject commit 3b2cdab6ffdd335e86c2658f08bd8d95aa4ef2da +Subproject commit 50b0bfe6ac9377ea385726009035628c10fd39ab diff --git a/src/circuit.rs b/src/circuit.rs index 3651654..fdb231a 100644 --- a/src/circuit.rs +++ b/src/circuit.rs @@ -105,22 +105,29 @@ impl<'a> Circuit<'a> { wire_status.insert(input.clone()); }); + let mut dff_level = Vec::new(); while !self.gates.is_empty() { // Temporary vector to store retained gates let mut level = Vec::new(); let mut next_wire_status = HashSet::new(); - + let mut ready = false; self.gates.retain(|gate| { - let ready = gate - .get_input_wires() - .iter() - .all(|wire| wire_status.contains(wire)); - - if ready { + if gate.get_gate_type() == GateType::Dff { next_wire_status.insert(gate.get_output_wire()); - level.push(gate.clone()); + dff_level.push(gate.clone()); + ready = true; + } + else { + ready = gate + .get_input_wires() + .iter() + .all(|wire| wire_status.contains(wire)); + + if ready { + next_wire_status.insert(gate.get_output_wire()); + level.push(gate.clone()); + } } - !ready }); @@ -130,7 +137,7 @@ impl<'a> Circuit<'a> { level.sort(); self.ordered_gates.extend(level); } - + self.ordered_gates.extend(dff_level); // Remove all the gates after sorting is done. Use ordered_gates from // now on. self.gates.clear();