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hardware_init_K22F512.c
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hardware_init_K22F512.c
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/*
* Copyright (c) 2013-2015, Freescale Semiconductor, Inc.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* o Redistributions in binary form must reproduce the above copyright notice, this
* list of conditions and the following disclaimer in the documentation and/or
* other materials provided with the distribution.
*
* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "bootloader_common.h"
#include "bootloader/bl_context.h"
#include "fsl_device_registers.h"
#include "uart/fsl_uart.h"
#include "utilities/kinetis_family.h"
#include "smc/smc.h"
////////////////////////////////////////////////////////////////////////////////
// Definitions
////////////////////////////////////////////////////////////////////////////////
#ifdef TOWER
#define BOOT_PIN_NUMBER 7
#define BOOT_PIN_PORT PORTC
#define BOOT_PIN_GPIO GPIOC
#define BOOT_PIN_ALT_MODE 1
#endif
#ifdef FREEDOM
#define BOOT_PIN_NUMBER 17
#define BOOT_PIN_PORT PORTB
#define BOOT_PIN_GPIO GPIOB
#define BOOT_PIN_ALT_MODE 1
#endif
#define BOOT_PIN_DEBOUNCE_READ_COUNT 500
////////////////////////////////////////////////////////////////////////////////
// Variables
////////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
// Code
////////////////////////////////////////////////////////////////////////////////
void init_hardware(void)
{
exit_vlpr();
// Enable all the ports
SIM->SCGC5 |= (SIM_SCGC5_PORTA_MASK | SIM_SCGC5_PORTB_MASK | SIM_SCGC5_PORTC_MASK | SIM_SCGC5_PORTD_MASK |
SIM_SCGC5_PORTE_MASK);
SIM->SOPT2 |= SIM_SOPT2_PLLFLLSEL_MASK; // set PLLFLLSEL to select the IRC48M for this clock source
}
void deinit_hardware(void)
{
SIM->SCGC5 &= (uint32_t) ~(SIM_SCGC5_PORTA_MASK | SIM_SCGC5_PORTB_MASK | SIM_SCGC5_PORTC_MASK |
SIM_SCGC5_PORTD_MASK | SIM_SCGC5_PORTE_MASK);
// Restore SIM_SOPTx related bits being changed
SIM->SOPT2 &= (uint32_t) ~(SIM_SOPT2_USBSRC_MASK | SIM_SOPT2_PLLFLLSEL_MASK);
}
// Note: Keep this function here to ensure compatibility, all usb related clock
// configuration is maintained by USB stack itself.
bool usb_clock_init(void)
{
// Enable USB-OTG IP clocking
SIM->SCGC4 |= (SIM_SCGC4_USBOTG_MASK);
// If clock of usb module cannot be enabled, return false
if (!(SIM->SCGC4 & SIM_SCGC4_USBOTG_MASK))
{
return false;
}
// Reset the USB peripheral, this must be done here instead of USB driver due to silicon errata
// for at least KL25 and K22
USB0->USBTRC0 |= USB_USBTRC0_USBRESET_MASK;
while (USB0->USBTRC0 & USB_USBTRC0_USBRESET_MASK)
;
// Select IRC48M clock, SIM_SOPT2_USBSRC_MASK selects internal clock,
// 0x30000 = SIM_SOPT2_PLLFLLSEL_MASK, selects IRC48MHz clock
SIM->SOPT2 |= (SIM_SOPT2_USBSRC_MASK | SIM_SOPT2_PLLFLLSEL_MASK);
// need to set the clock_recover_en and irc_en register
USB0->CLK_RECOVER_CTRL |= USB_CLK_RECOVER_CTRL_CLOCK_RECOVER_EN_MASK;
USB0->CLK_RECOVER_IRC_EN |= USB_CLK_RECOVER_IRC_EN_IRC_EN_MASK;
return true;
}
uint32_t get_bus_clock(void)
{
uint32_t busClockDivider = ((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV2_MASK) >> SIM_CLKDIV1_OUTDIV2_SHIFT) + 1;
return (SystemCoreClock / busClockDivider);
}
uint32_t get_uart_clock(uint32_t instance)
{
switch (instance)
{
case 0:
case 1:
// UART0 and UART1 always use the system clock
return SystemCoreClock;
case 2:
case 3:
case 4:
case 5:
default:
return 0;
}
}
bool is_boot_pin_asserted(void)
{
return false;
#ifdef BL_TARGET_FLASH
// Initialize boot pin for GPIO
BOOT_PIN_PORT->PCR[BOOT_PIN_NUMBER] |= PORT_PCR_MUX(BOOT_PIN_ALT_MODE);
// Set boot pin as an input
BOOT_PIN_GPIO->PDDR &= (uint32_t) ~(1 << BOOT_PIN_NUMBER);
// Set boot pin pullup enabled, pullup select, filter enable
BOOT_PIN_PORT->PCR[BOOT_PIN_NUMBER] |= (PORT_PCR_PE_MASK | PORT_PCR_PS_MASK | PORT_PCR_PFE_MASK);
uint32_t readCount = 0;
// Sample the pin a number of times
for (uint32_t i = 0; i < BOOT_PIN_DEBOUNCE_READ_COUNT; i++)
{
readCount += ((BOOT_PIN_GPIO->PDIR) >> BOOT_PIN_NUMBER) & 1;
}
// boot pin is pulled high so we are measuring lows, make sure most of our measurements
// registered as low
return (readCount < (BOOT_PIN_DEBOUNCE_READ_COUNT / 2));
#else
// Boot pin for Flash only target
return false;
#endif
}
void debug_init(void)
{
}
#if __ICCARM__
size_t __write(int handle, const unsigned char *buf, size_t size)
{
return size;
}
#endif // __ICCARM__
void update_available_peripherals()
{
}
////////////////////////////////////////////////////////////////////////////////
// EOF
////////////////////////////////////////////////////////////////////////////////