From 038d3068c6b3014172f0830918bd1c12274a8570 Mon Sep 17 00:00:00 2001
From: auphelia <jakobapk@web.de>
Date: Fri, 29 Mar 2024 13:56:34 +0000
Subject: [PATCH] [Docs] Update build dataflow example folder

---
 src/finn/qnn-data/build_dataflow/build.py             |  3 ++-
 .../build_dataflow/dataflow_build_config.json         |  3 ++-
 src/finn/qnn-data/build_dataflow/folding_config.json  |  5 ++---
 .../build_dataflow/specialize_layers_config.json      | 11 +----------
 src/finn/qnn-data/test_ext_weights/tfc-w1a1-extw.json |  5 ++---
 tests/end2end/test_ext_weights.py                     |  3 ++-
 6 files changed, 11 insertions(+), 19 deletions(-)

diff --git a/src/finn/qnn-data/build_dataflow/build.py b/src/finn/qnn-data/build_dataflow/build.py
index 13d58d2c91..58d566a6e6 100644
--- a/src/finn/qnn-data/build_dataflow/build.py
+++ b/src/finn/qnn-data/build_dataflow/build.py
@@ -1,4 +1,5 @@
-# Copyright (c) 2020 Xilinx, Inc.
+# Copyright (C) 2020-2022 Xilinx, Inc.
+# Copyright (C) 2022-2024, Advanced Micro Devices, Inc.
 # All rights reserved.
 #
 # Redistribution and use in source and binary forms, with or without
diff --git a/src/finn/qnn-data/build_dataflow/dataflow_build_config.json b/src/finn/qnn-data/build_dataflow/dataflow_build_config.json
index a053c1a22f..8165055fd5 100644
--- a/src/finn/qnn-data/build_dataflow/dataflow_build_config.json
+++ b/src/finn/qnn-data/build_dataflow/dataflow_build_config.json
@@ -4,7 +4,8 @@
   "mvau_wwidth_max": 10000,
   "synth_clk_period_ns": 10.0,
   "board": "Pynq-Z1",
-  "standalone_thresholds": true,
+  "standalone_thresholds": false,
+  "folding_config_file": "folding_config.json",
   "shell_flow_type": "vivado_zynq",
   "verify_save_rtlsim_waveforms": true,
   "force_python_rtlsim": true,
diff --git a/src/finn/qnn-data/build_dataflow/folding_config.json b/src/finn/qnn-data/build_dataflow/folding_config.json
index 46f1d6236d..124876c3db 100644
--- a/src/finn/qnn-data/build_dataflow/folding_config.json
+++ b/src/finn/qnn-data/build_dataflow/folding_config.json
@@ -1,8 +1,7 @@
 {
   "Defaults": {},
-  "Thresholding_hls_0": {
-    "PE": 49,
-    "ram_style": "distributed"
+  "Thresholding_rtl_0": {
+    "PE": 49
   },
   "MVAU_hls_0": {
     "PE": 16,
diff --git a/src/finn/qnn-data/build_dataflow/specialize_layers_config.json b/src/finn/qnn-data/build_dataflow/specialize_layers_config.json
index c2a8bd4553..9224a72907 100644
--- a/src/finn/qnn-data/build_dataflow/specialize_layers_config.json
+++ b/src/finn/qnn-data/build_dataflow/specialize_layers_config.json
@@ -1,26 +1,17 @@
 {
   "Defaults": {},
   "Thresholding_0": {
-    "preferred_impl_style": "hls"
+    "preferred_impl_style": "rtl"
   },
   "MVAU_0": {
     "preferred_impl_style": "hls"
   },
-  "Thresholding_1": {
-    "preferred_impl_style": ""
-  },
   "MVAU_1": {
     "preferred_impl_style": ""
   },
-  "Thresholding_2": {
-    "preferred_impl_style": ""
-  },
   "MVAU_2": {
     "preferred_impl_style": ""
   },
-  "Thresholding_3": {
-    "preferred_impl_style": "rtl"
-  },
   "MVAU_3": {
     "preferred_impl_style": ""
   },
diff --git a/src/finn/qnn-data/test_ext_weights/tfc-w1a1-extw.json b/src/finn/qnn-data/test_ext_weights/tfc-w1a1-extw.json
index 498d329ba3..9fe22443dc 100644
--- a/src/finn/qnn-data/test_ext_weights/tfc-w1a1-extw.json
+++ b/src/finn/qnn-data/test_ext_weights/tfc-w1a1-extw.json
@@ -1,8 +1,7 @@
 {
     "Defaults": {},
-    "Thresholding_hls_0": {
-      "PE": 49,
-      "ram_style": "distributed"
+    "Thresholding_rtl_0": {
+      "PE": 49
     },
     "MVAU_hls_0": {
       "PE": 16,
diff --git a/tests/end2end/test_ext_weights.py b/tests/end2end/test_ext_weights.py
index 2f5f136d3a..bac343bedf 100644
--- a/tests/end2end/test_ext_weights.py
+++ b/tests/end2end/test_ext_weights.py
@@ -1,4 +1,5 @@
-# Copyright (c) 2021, Xilinx
+# Copyright (C) 2021-2022, Xilinx, Inc.
+# Copyright (C) 2022-2024, Advanced Micro Devices, Inc.
 # All rights reserved.
 #
 # Redistribution and use in source and binary forms, with or without