From c785ca0df6ac78605d590523febe30a2b6a12505 Mon Sep 17 00:00:00 2001
From: Brad Campbell <bradjc5@gmail.com>
Date: Wed, 17 Jan 2024 20:12:32 -0500
Subject: [PATCH] chips/esp32-c3: #[naked] -> global_asm!()

---
 chips/esp32-c3/src/chip.rs | 29 ++++++++++++++---------------
 chips/esp32-c3/src/lib.rs  |  1 -
 2 files changed, 14 insertions(+), 16 deletions(-)

diff --git a/chips/esp32-c3/src/chip.rs b/chips/esp32-c3/src/chip.rs
index e3a53645e2..1dbf0a1a9a 100644
--- a/chips/esp32-c3/src/chip.rs
+++ b/chips/esp32-c3/src/chip.rs
@@ -297,16 +297,18 @@ pub extern "C" fn _start_trap_vectored() {
 }
 
 #[cfg(all(target_arch = "riscv32", target_os = "none"))]
-#[link_section = ".riscv.trap_vectored"]
-#[export_name = "_start_trap_vectored"]
-#[naked]
-pub extern "C" fn _start_trap_vectored() -> ! {
-    use core::arch::asm;
-    unsafe {
-        // Below are 32 (non-compressed) jumps to cover the entire possible
-        // range of vectored traps.
-        asm!(
-            "
+extern "C" {
+    pub fn _start_trap_vectored();
+}
+
+#[cfg(all(target_arch = "riscv32", target_os = "none"))]
+// Below are 32 (non-compressed) jumps to cover the entire possible
+// range of vectored traps.
+global_asm!(
+    "
+            .section .riscv.trap_vectored, \"ax\"
+            .globl _start_trap_vectored
+          _start_trap_vectored:
             j _start_trap
             j _start_trap
             j _start_trap
@@ -338,8 +340,5 @@ pub extern "C" fn _start_trap_vectored() -> ! {
             j _start_trap
             j _start_trap
             j _start_trap
-        ",
-            options(noreturn)
-        );
-    }
-}
+        "
+);
diff --git a/chips/esp32-c3/src/lib.rs b/chips/esp32-c3/src/lib.rs
index 9202e34466..c9e18041af 100644
--- a/chips/esp32-c3/src/lib.rs
+++ b/chips/esp32-c3/src/lib.rs
@@ -4,7 +4,6 @@
 
 //! Drivers and chip support for ESP32-C3.
 
-#![feature(naked_functions)]
 #![no_std]
 #![crate_name = "esp32_c3"]
 #![crate_type = "rlib"]