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zncg.h
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zncg.h
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#ifndef CCBGENERIC_H
#define CCBGENERIC_H
// TODO: Make the parser header consistent with my git version
#include "ccb.h"
#ifdef CCBGENERIC_IMPLEMENTATION
//#define CCB_TARGET_ENVPREFIX "CCB_"
static int ccb_target_fam;// = -1;
static int ccb_target_wordsize_val;// = -1;
static int ccb_target_callconv_val;// = -1;
void ccb_target_init(ccb_t* ccb) {
const char* x;
//fprintf(stderr, "XXX: INITIALISING TARGET\n");
ccb_target_fam = -1;
ccb_target_wordsize_val = -1;
ccb_target_callconv_val = -1;
x = getenv(/*CCB_TARGET_ENVPREFIX*/ "CCB_FAMILY");
//fprintf(stderr, "XXX: INITIALISING TARGET ...\n");
//fprintf(stderr, "XXX: INITIALISING TARGET GOT '%s'\n", x);
if (x != NULL) {
//fprintf(stderr, "XXX: INITIALISING TARGET A\n");
if (strcmp(x, "x86") == 0 || strcmp(x, "X86") == 0) {
ccb_target_fam = CCB_ARCH_FAMILY_X86;
}
else if (strcmp(x, "arm") == 0 || strcmp(x, "ARM") == 0) {
ccb_target_fam = CCB_ARCH_FAMILY_ARM;
}
else if (strcmp(x, "risc-v") == 0 || strcmp(x, "RISC-V") == 0 || strcmp(x, "riscv") == 0 || strcmp(x, "RISCV") == 0) {
ccb_target_fam = CCB_ARCH_FAMILY_RISCV;
}
else if (strcmp(x, "generic") == 0 || strcmp(x, "GENERIC") == 0) {
ccb_target_fam = CCB_ARCH_FAMILY_GENERIC;
}
else if (strcmp(x, "gen1") == 0 || strcmp(x, "GEN1") == 0) {
ccb_target_fam = CCB_ARCH_FAMILY_GEN1;
}
else {
ccb_compile_error(ccb, "Invalid value for environment variable (%s=\"%s\")", /* CCB_TARGET_ENVPREFIX */ "CCB_FAMILY", x);
}
}
else {
//fprintf(stderr, "XXX: INITIALISING TARGET B\n");
ccb_target_fam = CCB_ARCH_FAMILY_X86; // GENERIC; // X86; // TODO: Guess based on build environment or use compiler flag? (Maybe use GENERIC by default in the future?)
}
//fprintf(stderr, "XXX: HALF INITIALISING TARGET\n");
x = getenv(/* CCB_TARGET_ENVPREFIX */ "CCB_CALLCONV");
if (x != NULL) {
if (strcmp(x, "standard") == 0 || strcmp(x, "STANDARD") == 0) {
ccb_target_callconv_val = CCB_TARGET_CALLCONV_STANDARD;
}
else if (strcmp(x, "windows") == 0 || strcmp(x, "WINDOWS") == 0) {
ccb_target_callconv_val = CCB_TARGET_CALLCONV_WINDOWS;
}
else {
ccb_compile_error(ccb, "Invalid value for environment variable (%s=\"%s\")", /* CCB_TARGET_ENVPREFIX */ "CCB_CALLCONV", x);
}
}
else {
ccb_target_callconv_val = CCB_TARGET_CALLCONV_STANDARD;
}
x = getenv(/* CCB_TARGET_ENVPREFIX */ "CCB_WORDSIZE");
if (x != NULL) {
if (strcmp(x, "16") == 0) {
ccb_target_wordsize_val = 16;
}
else if (strcmp(x, "32") == 0) {
ccb_target_wordsize_val = 32;
}
else if (strcmp(x, "64") == 0) {
ccb_target_wordsize_val = 64;
}
else {
ccb_compile_error(ccb, "Invalid value for environment variable (%s=\"%s\"): Only 16, 32 and 64-bit word sizes are available", /* CCB_TARGET_ENVPREFIX */ "CCB_ARCH_WORDSIZE", x);
}
}
switch (ccb_target_fam) {
case CCB_ARCH_FAMILY_X86:
if (ccb_target_wordsize_val == -1) {
ccb_target_wordsize_val = 64;
}
break;
case CCB_ARCH_FAMILY_ARM:
case CCB_ARCH_FAMILY_RISCV:
if (ccb_target_wordsize_val == -1) {
ccb_target_wordsize_val = 64;
}
if (ccb_target_wordsize_val < 32) {
ccb_compile_error(ccb, "Invalid value for environment variable (%s=\"%s\"): Not available in the ARM or RISC-V targets", /* CCB_TARGET_ENVPREFIX */ "CCB_ARCH_WORDSIZE", x);
}
break;
case CCB_ARCH_FAMILY_GEN1:
if (ccb_target_wordsize_val == -1) {
ccb_target_wordsize_val = 64;
}
if (ccb_target_wordsize_val != 64) {
ccb_compile_error(ccb, "Invalid value for environment variable (%s=\"%s\"): Not available in the GEN1 target", /* CCB_TARGET_ENVPREFIX */ "CCB_WORDSIZE", x);
}
break;
case CCB_ARCH_FAMILY_GENERIC:
if (ccb_target_wordsize_val == -1) {
ccb_target_wordsize_val = 64;
}
break;
default:
ccb_compile_error(ccb, "Internal Error (missing case?)");
}
//fprintf(stderr, "XXX: DONE INITIALISING TARGET\n");
}
int ccb_target_family(ccb_t* ccb) {
switch (ccb_target_fam) {
case CCB_ARCH_FAMILY_X86:
case CCB_ARCH_FAMILY_ARM:
case CCB_ARCH_FAMILY_RISCV:
case CCB_ARCH_FAMILY_GENERIC:
case CCB_ARCH_FAMILY_GEN1:
return ccb_target_fam;
default:
ccb_compile_error(ccb, "Internal Error: arch_init() hasn't completed yet");
}
}
int ccb_target_wordsize(ccb_t* ccb) {
return ccb_target_wordsize_val;
}
int ccb_target_callconv(ccb_t* ccb) {
return ccb_target_callconv_val;
}
size_t ccb_target_type_size_char(ccb_t* ccb) {
return 1;
}
size_t ccb_target_type_size_short(ccb_t* ccb) {
return 2;
}
size_t ccb_target_type_size_int(ccb_t* ccb) {
if (ccb_target_wordsize(ccb) >= 32) {
return 4;
}
else {
return 2;
}
}
size_t ccb_target_type_size_long(ccb_t* ccb) {
if (ccb_target_wordsize(ccb) >= 64) {
return 8;
}
else {
return 4;
}
}
size_t ccb_target_type_size_llong(ccb_t* ccb) {
return 8;
}
size_t ccb_target_type_size_float(ccb_t* ccb) {
return 4;
}
size_t ccb_target_type_size_double(ccb_t* ccb) {
return 8;
}
size_t ccb_target_type_size_ldouble(ccb_t* ccb) {
return 8;
}
size_t ccb_target_type_size_pointer(ccb_t* ccb) {
return ccb_target_wordsize(ccb) / 8;
}
size_t ccb_target_alignment(ccb_t* ccb) {
return 16;
}
int ccb_target_callregisters(ccb_t* ccb) {
switch (ccb_target_family(ccb)) {
case CCB_ARCH_FAMILY_X86:
return (ccb_target_callconv(ccb) == CCB_TARGET_CALLCONV_WINDOWS) ? 4 : 6; // TODO: This only applies to 64-bit mode
case CCB_ARCH_FAMILY_ARM:
return 8; // TODO: ARM only has 4 on 32-bit targets
case CCB_ARCH_FAMILY_RISCV:
return 8; // Pretty sure this is the same for all RISC-V ISAs
case CCB_ARCH_FAMILY_GENERIC:
return 6; // Currently...
case CCB_ARCH_FAMILY_GEN1:
return 4; // With standard-ish ABI, might use about 8-ish in the future
default:
ccb_compile_error(ccb, "Target Error: arch_callregisters() got unknown arch");
return -1; // Unreachable
}
}
const char* ccb_target_callregister(ccb_t* ccb, int idx) {
if (idx < 0 || idx >= ccb_target_callregisters(ccb)) {
ccb_compile_error(ccb, "Target Error: arch_callregister(cc,%d) received bad argument", idx);
}
switch (ccb_target_family(ccb)) {
case CCB_ARCH_FAMILY_X86:
if (ccb_target_callconv(ccb) == CCB_TARGET_CALLCONV_WINDOWS) {
switch (idx) {
case 0:
return "rcx";
case 1:
return "rdx";
case 2:
return "r8";
case 3:
return "r9";
}
}
else {
switch (idx) {
case 0:
return "rdi";
case 1:
return "rsi";
case 2:
return "rdx";
case 3:
return "rcx";
case 4:
return "r8";
case 5:
return "r9";
}
}
ccb_compile_error(ccb, "Target Error: Register lookup failed");
case CCB_ARCH_FAMILY_ARM:
switch (idx) {
case 0:
return "x0";
case 1:
return "x1";
case 2:
return "x2";
case 3:
return "x3";
case 4:
return "x4";
case 5:
return "x5";
case 6:
return "x6";
case 7:
return "x7";
}
ccb_compile_error(ccb, "Target Error: Register lookup failed");
case CCB_ARCH_FAMILY_RISCV:
switch (idx) {
case 0:
return "a0"; // Also known as 'x10'
case 1:
return "a1";
case 2:
return "a2";
case 3:
return "a3";
case 4:
return "a4";
case 5:
return "a5";
case 6:
return "a6";
case 7:
return "a7"; // .. 'x17'
}
ccb_compile_error(ccb, "Target Error: Register lookup failed");
case CCB_ARCH_FAMILY_GENERIC:
switch (idx) {
case 0:
return "r7";
case 1:
return "r6";
case 2:
return "r2";
case 3:
return "r1";
case 4:
return "r8";
case 5:
return "r9";
}
ccb_compile_error(ccb, "Target Error: Register lookup failed");
case CCB_ARCH_FAMILY_GEN1:
switch (idx) {
case 0:
return "$r0";
case 1:
return "$r1";
case 2:
return "$r2";
case 3:
return "$r3";
}
ccb_compile_error(ccb, "Target Error: Register lookup failed");
default:
ccb_compile_error(ccb, "Target Error: Register lookup failed");
return "ERROR?"; // Unreachable
}
}
const char* ccb_target_r0(ccb_t* ccb) {
switch (ccb_target_family(ccb)) {
case CCB_ARCH_FAMILY_X86:
return "rax";
case CCB_ARCH_FAMILY_GEN1:
return "$r0";
case CCB_ARCH_FAMILY_GENERIC:
return "r0";
case CCB_ARCH_FAMILY_RISCV:
return "a0";
case CCB_ARCH_FAMILY_ARM:
return "x0";
default:
return "todo";
}
}
const char* ccb_target_r1(ccb_t* ccb) {
switch (ccb_target_family(ccb)) {
case CCB_ARCH_FAMILY_X86:
return "rcx";
case CCB_ARCH_FAMILY_GEN1:
return "$r1";
case CCB_ARCH_FAMILY_GENERIC:
return "r1";
case CCB_ARCH_FAMILY_RISCV:
return "a1";
case CCB_ARCH_FAMILY_ARM:
return "x1";
default:
return "todo";
}
}
const char* ccb_target_r15(ccb_t* ccb) {
switch (ccb_target_family(ccb)) {
case CCB_ARCH_FAMILY_X86:
return "r15";
case CCB_ARCH_FAMILY_GEN1:
return "$rf";
case CCB_ARCH_FAMILY_GENERIC:
return "r15";
case CCB_ARCH_FAMILY_RISCV:
return "t0";
default:
return "todo";
}
}
const char* ccb_target_sp(ccb_t* ccb) {
switch (ccb_target_family(ccb)) {
case CCB_ARCH_FAMILY_X86:
return "rsp";
case CCB_ARCH_FAMILY_GEN1:
return "$rstack";
case CCB_ARCH_FAMILY_RISCV:
return "sp"; // Also known as 'x2'
default:
return "r4";
}
}
const char* ccb_target_bp(ccb_t* ccb) {
switch (ccb_target_family(ccb)) {
case CCB_ARCH_FAMILY_X86:
return "rbp";
case CCB_ARCH_FAMILY_GEN1:
return "$rbase";
case CCB_ARCH_FAMILY_RISCV:
return "x8";//"fp"; // Also known as 's0' (or `x8`)
default:
return "r5";
}
}
static int ccb_target_gen_asmfmt_cached = 0;
int ccb_target_asmfmt(ccb_t* ccb) {
if (ccb_target_gen_asmfmt_cached == 0) {
const char* val = getenv(/* CCB_TARGET_ENVPREFIX */ "CCB_ASMFMT");
if (val == NULL) {
ccb_target_gen_asmfmt_cached = CCB_TARGET_ASMFMT_GAS;
} else if (strcmp(val, "") == 0 || strcmp(val, "gas") == 0) {
ccb_target_gen_asmfmt_cached = CCB_TARGET_ASMFMT_GAS;
}
else if (strcmp(val, "fasm") == 0) {
ccb_target_gen_asmfmt_cached = CCB_TARGET_ASMFMT_FASM;
}
else if (strcmp(val, "raw") == 0) {
ccb_target_gen_asmfmt_cached = CCB_TARGET_ASMFMT_RAW;
}
else {
fprintf(stderr, "Invalid value for CC_ASMFMT (\"%s\")\n", val);
return -1;
}
}
return ccb_target_gen_asmfmt_cached;
}
static int ccb_target_binfmt_cached = 0;
int ccb_target_binfmt(ccb_t* ccb) {
if (ccb_target_binfmt_cached == 0) {
const char* val = getenv(/* CCB_TARGET_ENVPREFIX */ "CCB_BINFMT");
if (val == NULL || strcmp(val, "") == 0 || strcmp(val, "elf") == 0) {
ccb_target_binfmt_cached = CCB_TARGET_BINFMT_ELF;
}
else if (strcmp(val, "flat") == 0) {
ccb_target_binfmt_cached = CCB_TARGET_BINFMT_FLAT;
}
else {
fprintf(stderr, "Invalid value for CC_BINFMT (\"%s\")\n", val);
return -1;
}
}
return ccb_target_binfmt_cached;
}
/*
static const char *registers[] = {
"rdi", "rsi", "rdx",
"rcx", "r8", "r9"
};
*/
static void ccb_target_gen_expression(ccb_t* ccb, ccb_ast_t*);
static void ccb_target_gen_declaration_initialization(ccb_t* ccb, ccb_list_t*, int);
#ifdef _ZCC
/* TODO: Allow enough arguments for these! */
#define ccb_target_gen_emit(...) do{fprintf(ccb->output, __VA_ARGS__); fprintf(ccb->output, "\n"); fflush(ccb->output);}while(0)
#define ccb_target_gen_emit_inline(...) do{fprintf(ccb->output, __VA_ARGS__); fprintf(ccb->output, "\n"); fflush(ccb->output);}while(0)
/*
TODO: Better string handling... #define ccb_target_gen_emit(...) ccb_target_gen_emit_impl(ccb, __LINE__, "\t" __VA_ARGS__)
*/
#else
#define ccb_target_gen_emit(...) ccb_target_gen_emit_impl(ccb, __LINE__, __VA_ARGS__)
#define ccb_target_gen_emit_inline(...) ccb_target_gen_emit_impl(ccb, __LINE__, __VA_ARGS__)
#endif
#define ccb_target_gen_push(X) ccb_target_gen_push_ (ccb, X, __LINE__)
#define ccb_target_gen_pop(X) ccb_target_gen_pop_ (ccb, X, __LINE__)
#define ccb_target_gen_push_xmm(X) ccb_target_gen_push_xmm_(ccb, X, __LINE__)
#define ccb_target_gen_pop_xmm(X) ccb_target_gen_pop_xmm_ (ccb, X, __LINE__)
static int ccb_target_gen_stack = 0;
static char* ccb_target_gen_label_break = NULL;
static char* ccb_target_gen_label_continue = NULL;
//static char* ccb_target_gen_label_break_store = NULL;
//static char* ccb_target_gen_label_continue_store = NULL;
static char* ccb_target_gen_label_switch = NULL;
//static char* ccb_target_gen_label_switch_store = NULL;
#ifdef _ZCC
#define ccb_target_gen_emit_impl(ccb,ln,...) fprintf(ccb->output, __VA_ARGS__); fprintf(ccb->output, "\n")
#else
void ccb_target_gen_emit_impl(ccb_t* ccb, int line, const char* fmt, ...) {
va_list args;
va_start(args, fmt);
int col = vfprintf(ccb->output, fmt, args);
va_end(args);
for (const char* p = fmt; *p; p++)
if (*p == '\t')
col += 8 - 1;
col = (40 - col) > 0 ? (40 - col) : 2;
if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_GENERIC || ccb_target_asmfmt(ccb) == CCB_TARGET_ASMFMT_FASM) {
fprintf(ccb->output, "%*c % 4d %d\n", col, ';', line, ccb_target_gen_stack);
}
else if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_ARM) {
// 32-bit: fprintf(ccb->output, "%*c % 4d %d\n", col, '@', line, ccb_target_gen_stack);
fprintf(ccb->output, " // %d %d\n", line, ccb_target_gen_stack);
}
else {
fprintf(ccb->output, "%*c % 4d %d\n", col, '#', line, ccb_target_gen_stack);
}
}
#endif
//static void ccb_target_gen_jump_save(ccb_t* ccb, char* lbreak, char* lcontinue) {
#define ccb_target_gen_jump_save(ccb,lbreak,lcontinue) \
char* ccb_target_gen_label_break_store = ccb_target_gen_label_break; \
char* ccb_target_gen_label_continue_store = ccb_target_gen_label_continue; \
ccb_target_gen_label_break = lbreak; \
ccb_target_gen_label_continue = lcontinue
//static void ccb_target_gen_jump_restore(ccb_t* ccb) {
#define ccb_target_gen_jump_restore(ccb) \
do { \
ccb_target_gen_label_break = ccb_target_gen_label_break_store; \
ccb_target_gen_label_continue = ccb_target_gen_label_continue_store; \
} while(0);
static int ccb_target_regcode(ccb_t* ccb, const char* reg) {
if (!strcmp(reg, "rax")) {
return 0;
}
else if (!strcmp(reg, "rcx")) {
return 1;
}
else if (!strcmp(reg, "rdx")) {
return 2;
}
else if (!strcmp(reg, "rbx")) {
return 3;
}
else if (!strcmp(reg, "rsi")) {
return 6;
}
else if (!strcmp(reg, "rdi")) {
return 7;
}
else {
//fprintf(stderr, "WARNING: Unimplemented regcode '%s'\n", reg);
return -1;
}
}
static void ccb_target_gen_push_(ccb_t* ccb, const char* reg, int line) {
if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_GEN1) {
ccb_target_gen_emit_impl(ccb, line, "\twrite32 $rsp, %s, -8", reg); // TODO: Fix this mess.
ccb_target_gen_emit_impl(ccb, line, "\txor $rscratch, $rscratch, $rscratch");
ccb_target_gen_emit_impl(ccb, line, "\taddimm $rscratch, $rscratch, 32");
ccb_target_gen_emit_impl(ccb, line, "\tshrz $rscratch, %s, $rscratch", reg);
ccb_target_gen_emit_impl(ccb, line, "\twrite32 $rsp, $rscratch, -4");
ccb_target_gen_emit_impl(ccb, line, "\taddimm $rsp, -8");
}
else if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_RISCV) {
if (ccb_target_wordsize(ccb) == 32) {
ccb_target_gen_emit_impl(ccb, line, "\taddi sp, sp, -4");
ccb_target_gen_emit_impl(ccb, line, "\tsw %s, 0(sp)", reg);
} else {
ccb_target_gen_emit_impl(ccb, line, "\taddi sp, sp, -8");
ccb_target_gen_emit_impl(ccb, line, "\tsd %s, 0(sp)", reg);
}
}
else if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_ARM) {
// TODO: Optimise ARM64 stack operations
// (for some horrible reason, you can't use SP as a simple word-sized stack :s)
// For details: https://community.arm.com/arm-community-blogs/b/architectures-and-processors-blog/posts/using-the-stack-in-aarch64-implementing-push-and-pop
ccb_target_gen_emit_impl(ccb, line, "\tstr %s, [sp, #-16]", reg);
ccb_target_gen_stack += (ccb_target_wordsize(ccb)/8);
}
else if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_GENERIC) {
ccb_target_gen_emit_impl(ccb, line, "\tpushr %s", reg);
}
else if (ccb_target_asmfmt(ccb) == CCB_TARGET_ASMFMT_FASM) {
ccb_target_gen_emit_impl(ccb, line, "\tpush %s", reg);
}
else if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_X86 && ccb_target_asmfmt(ccb) == CCB_TARGET_ASMFMT_RAW) {
int regcode = ccb_target_regcode(ccb, reg);
if (regcode < 0) {
ccb_target_gen_emit_impl(ccb, line, "\tdata8 0x?? ; TODO: pop %s", reg);
}
else {
ccb_target_gen_emit_impl(ccb, line, "\tdata8 0x%x ; push %s", 0x50 + regcode, reg);
}
}
else {
ccb_target_gen_emit_impl(ccb, line, "\tpush %%%s", reg);
}
ccb_target_gen_stack += (ccb_target_wordsize(ccb)/8);
}
static void ccb_target_gen_pop_(ccb_t* ccb, const char* reg, int line) {
if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_GEN1) {
ccb_target_gen_emit_impl(ccb, line, "\tread32 %s, $rsp, 4", reg);
ccb_target_gen_emit_impl(ccb, line, "\txor $rscratch, $rscratch, $rscratch");
ccb_target_gen_emit_impl(ccb, line, "\taddimm $rscratch, $rscratch, 32");
ccb_target_gen_emit_impl(ccb, line, "\tshl %s, %s, $rscratch", reg, reg);
ccb_target_gen_emit_impl(ccb, line, "\tread32 %rscratch, $rsp, 0");
ccb_target_gen_emit_impl(ccb, line, "\tor %s, %s, %rscratch", reg, reg);
ccb_target_gen_emit_impl(ccb, line, "\taddimm $rsp, $rsp, 8");
}
else if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_RISCV) {
if (ccb_target_wordsize(ccb) == 32) {
ccb_target_gen_emit_impl(ccb, line, "\tlw %s, 0(sp)", reg);
ccb_target_gen_emit_impl(ccb, line, "\taddi sp, sp, 4");
}
else {
ccb_target_gen_emit_impl(ccb, line, "\tld %s, 0(sp)", reg);
ccb_target_gen_emit_impl(ccb, line, "\taddi sp, sp, 8");
}
}
else if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_ARM) {
// TODO: Optimise ARM64 stack operations
// (for some horrible reason, you can't use SP as a simple word-sized stack :s)
ccb_target_gen_emit_impl(ccb, line, "\tldr %s, [sp], #16", reg);
ccb_target_gen_stack -= (ccb_target_wordsize(ccb)/8);
}
else if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_GENERIC) {
ccb_target_gen_emit_impl(ccb, line, "\tpopr %s", reg);
}
else if (ccb_target_asmfmt(ccb) == CCB_TARGET_ASMFMT_FASM) {
ccb_target_gen_emit_impl(ccb, line, "\tpop %s", reg);
}
else if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_X86 && ccb_target_asmfmt(ccb) == CCB_TARGET_ASMFMT_RAW) {
int regcode = ccb_target_regcode(ccb, reg);
if (regcode < 0) {
ccb_target_gen_emit_impl(ccb, line, "\tdata8 0x?? ; TODO: pop %s", reg);
}
else {
ccb_target_gen_emit_impl(ccb, line, "\tdata8 0x%x ; pop %s", 0x58 + regcode, reg);
}
}
else {
ccb_target_gen_emit_impl(ccb, line, "\tpop %%%s", reg);
}
ccb_target_gen_stack -= (ccb_target_wordsize(ccb)/8);
}
static void ccb_target_gen_push_xmm_(ccb_t* ccb, int r, int line) {
if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_GENERIC) {
ccb_target_gen_emit_impl(ccb, line, "\tsubrc r4, 8");
ccb_target_gen_emit_impl(ccb, line, "\tsetrmf r4, f%d", r);
}
else if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_RISCV) {
ccb_target_gen_emit_impl(ccb, line, "\taddi sp, sp, -8");
ccb_target_gen_emit_impl(ccb, line, "\tfsd fa%d, 0(sp)", r);
}
else if (ccb_target_asmfmt(ccb) == CCB_TARGET_ASMFMT_FASM) {
ccb_target_gen_emit_impl(ccb, line, "\tsub rsp, 8");
ccb_target_gen_emit_impl(ccb, line, "\tmovsd [rsp], xmm%d", r);
}
else {
ccb_target_gen_emit_impl(ccb, line, "\tsub $8, %%rsp");
ccb_target_gen_emit_impl(ccb, line, "\tmovsd %%xmm%d, (%%rsp)", r);
}
ccb_target_gen_stack += 8;
}
static void ccb_target_gen_pop_xmm_(ccb_t* ccb, int r, int line) {
if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_GENERIC) {
ccb_target_gen_emit_impl(ccb, line, "\tsetfrm f%d, r4", r);
ccb_target_gen_emit_impl(ccb, line, "\taddrc r4, 8");
}
else if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_RISCV) {
ccb_target_gen_emit_impl(ccb, line, "\tfld fa%d, 0(sp)", r);
ccb_target_gen_emit_impl(ccb, line, "\taddi sp, sp, 8");
}
else if (ccb_target_asmfmt(ccb) == CCB_TARGET_ASMFMT_FASM) {
ccb_target_gen_emit_impl(ccb, line, "\tmovsd xmm%d, [rsp]", r);
ccb_target_gen_emit_impl(ccb, line, "\tadd rsp, 8");
}
else {
ccb_target_gen_emit_impl(ccb, line, "\tmovsd (%%rsp), %%xmm%d", r);
ccb_target_gen_emit_impl(ccb, line, "\tadd $8, %%rsp");
}
ccb_target_gen_stack -= 8;
}
static const char* ccb_target_gen_register_integer(ccb_t* ccb, ccb_data_type_t* type, char r) {
if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_GEN1) { // TODO...
switch (type->size) {
case 1: return (r == 'a') ? "r0x8" : "r1x8";
case 2: return (r == 'a') ? "r0x16" : "r1x16";
case 4: return (r == 'a') ? "v0" : "v1";
case 8: return (r == 'a') ? "v0x64" : "v1x64";
}
}
else if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_GENERIC) {
switch (type->size) {
case 1: return (r == 'a') ? "r0x8" : "r1x8";
case 2: return (r == 'a') ? "r0x16" : "r1x16";
case 4: return (r == 'a') ? "r0x32" : "r1x32";
case 8: return (r == 'a') ? "r0" : "r1";
}
}
else if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_RISCV) {
return (r == 'a') ? "a0" : "a1";
}
else {
switch (type->size) {
case 1: return (r == 'a') ? "al" : "cl";
case 2: return (r == 'a') ? "ax" : "cx";
case 4: return (r == 'a') ? "eax" : "ecx";
case 8: return (r == 'a') ? "rax" : "rcx";
}
}
ccb_compile_error(ccb, "Unexpected operand to ccb_target_gen_register_integer");
return ""; // Unreachable?
}
static const char* ccb_target_gen_loadstorespec(ccb_t* ccb, ccb_data_type_t* type, bool isstore) {
if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_RISCV) {
switch (type->size) {
case 1: return isstore ? "b" : (type->sign ? "b" : "bu");
case 2: return isstore ? "h" : (type->sign ? "h" : "hu");
case 4: return isstore ? "w" : (type->sign ? "w" : "wu");
case 8: return "d"; // isstore ? "d" : (type->sign ? "b" : "bu");
default:
ccb_compile_error(ccb, "Unexpected operand to ccb_target_gen_loadstorespec");
return ""; // Unreachable?
}
}
else {
return "";
}
}
static void ccb_target_gen_load_global(ccb_t* ccb, ccb_data_type_t* type, char* label, int offset) {
if (type->type == CCB_TYPE_ARRAY) {
if (offset) {
if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_GEN1) {
ccb_target_gen_emit("xor $r0, $r0, $r0");
ccb_target_gen_emit("addimm $r0, (%s + %d)", label, offset);
}
else if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_RISCV) {
//ccb_target_gen_emit("addi a0, zero, %s", label); // TODO: Use lui here?
ccb_target_gen_emit("la a0, %s", label);
ccb_target_gen_emit("addi a0, a0, %d", offset);
}
else if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_GENERIC) {
ccb_target_gen_emit("setrcpc r0, %s, %d", label, offset);
}
else if (ccb_target_asmfmt(ccb) == CCB_TARGET_ASMFMT_FASM) {
ccb_target_gen_emit("lea rax, [%s + %d]", label, offset);
}
else {
ccb_target_gen_emit("lea %s+%d(%%rip), %%rax", label, offset);
}
}
else {
if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_GEN1) {
ccb_target_gen_emit("xor $r0, $r0, $r0");
ccb_target_gen_emit("addimm $r0, (%s + %d)", label);
//ccb_target_gen_emit("read32 $r0, $r1, 0");
}
else if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_GENERIC) {
ccb_target_gen_emit("setrc r0, %s", label);
}
else if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_RISCV) {
//ccb_target_gen_emit("addi a0, zero, %s", label); // TODO: Use lui here?
ccb_target_gen_emit("la a0, %s", label); // TODO: Use lui here?
}
else if (ccb_target_asmfmt(ccb) == CCB_TARGET_ASMFMT_FASM) {
ccb_target_gen_emit("lea rax, [%s]", label);
}
else {
ccb_target_gen_emit("lea %s(%%rip), %%rax", label);
}
}
return;
}
if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_GEN1) {
ccb_target_gen_emit("xor $r1, $r1, $r1");
ccb_target_gen_emit("addimm $r1, $r1, (%s + %d)", label, offset);
if (type->size <= 4) {
ccb_target_gen_emit("read32 $r0, $r1, 0");
if (type->size < 4) {
int32_t mask = ((type->size == 1) ? 0xFF : 0xFFFF);
ccb_target_gen_emit("xor $r1, $r1, $r1");
ccb_target_gen_emit("addimm $r1, %d", mask); // TODO: This might not work out so well for 16-bit, must check.
ccb_target_gen_emit("and $r0, $r0, $r1");
}
}
else {
ccb_target_gen_emit("read32 $r0, $r1, 4");
ccb_target_gen_emit("shlz $r0, $r0, 32");
ccb_target_gen_emit("read32 $r1, $r1, 0");
ccb_target_gen_emit("or $r0, $r0, $r1"); // TODO: Sign bit may also interfere here.
}
}
else {
if (type->size < 4) {
if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_GENERIC) {
ccb_target_gen_emit("setrc r0, 0");
}
else if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_RISCV) {
ccb_target_gen_emit("addi a0, zero, 0"); // Probably unneeded?
}
else if (ccb_target_asmfmt(ccb) == CCB_TARGET_ASMFMT_FASM) {
ccb_target_gen_emit("mov eax, 0");
}
else {
ccb_target_gen_emit("mov $0, %%eax");
}
}
const char* reg = ccb_target_gen_register_integer(ccb, type, 'a');
if (offset) {
if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_GENERIC) {
ccb_target_gen_emit("setrcpcm %s, %s, %d", reg, label, offset);
}
if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_RISCV) {
//ccb_target_gen_emit("addi t0, zero, %s", label); // TODO: Use lui? Better temporary register?
ccb_target_gen_emit("la t0, %s", label); // TODO: Use lui? Better temporary register?
//ccb_target_gen_emit("ld %s, t0, %d", reg, offset);
ccb_target_gen_emit("ld %s, %d(t0)", reg, offset);
}
else if (ccb_target_asmfmt(ccb) == CCB_TARGET_ASMFMT_FASM) {
ccb_target_gen_emit("mov %s, [%s + %d]", reg, label, offset);
}
else {
ccb_target_gen_emit("mov %s+%d(%%rip), %%%s", label, offset, reg);
}
}
else {
if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_GENERIC) {
ccb_target_gen_emit("setrcm %s, %s", reg, label);
}
else if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_RISCV) {
//ccb_target_gen_emit("addi t0, zero, %s", label); // TODO: Use lui? Better temporary register?
ccb_target_gen_emit("la t0, %s", label); // TODO: Use lui? Better temporary register?
//ccb_target_gen_emit("ld %s, t0, 0", reg);
ccb_target_gen_emit("ld %s, 0(t0)", reg);
}
else if (ccb_target_asmfmt(ccb) == CCB_TARGET_ASMFMT_FASM) {
ccb_target_gen_emit("mov %s, [%s]", reg, label);
}
else {
ccb_target_gen_emit("mov %s(%%rip), %%%s", label, reg);
}
}
}
}
static void ccb_target_gen_cast_int(ccb_t* ccb, ccb_data_type_t* type) {
if (!ccb_ast_type_floating(ccb, type)) {
if (type->type == CCB_TYPE_INT) {
if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_X86) {
ccb_target_gen_emit("cltq"); // TODO: This is test only for now, needs to handle unsigned/other
} /* TODO: Fix this elsewhere? May not be an issue on RISC-V since I think it auto-extends (bonus TODO: Check that!) */
}
return;
}
if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_GENERIC) {
ccb_target_gen_emit("intf r0, f0");
}
else if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_RISCV) {
ccb_target_gen_emit("fcvt.l.d a0, fa0, rtz");
}
else if (ccb_target_asmfmt(ccb) == CCB_TARGET_ASMFMT_FASM) {
ccb_target_gen_emit("cvttsd2si eax, xmm0");
}
else {
ccb_target_gen_emit("cvttsd2si %%xmm0, %%eax");
}
}
static void ccb_target_gen_cast_float(ccb_t* ccb, ccb_data_type_t* type) {
if (ccb_ast_type_floating(ccb, type)) {
return;
}
if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_GENERIC) {
ccb_target_gen_emit("floati f0, r0");
}
else if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_RISCV) {
ccb_target_gen_emit("fcvt.d.l fa0, a0");
}
else if (ccb_target_asmfmt(ccb) == CCB_TARGET_ASMFMT_FASM) {
ccb_target_gen_emit("cvtsi2sd xmm0, eax");
}
else {
ccb_target_gen_emit("cvtsi2sd %%eax, %%xmm0");
}
}
static void ccb_target_gen_load_local(ccb_t* ccb, ccb_data_type_t* var, const char* base, int offset) {
if (var->type == CCB_TYPE_ARRAY) {
if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_GENERIC) {
ccb_target_gen_emit("setrrpc r0, %s, %d", base, offset); // Set-register-to-register-plus-constant (we only want the address of array variable)
}
else if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_RISCV) {
ccb_target_gen_emit("addi a0, %s, %d", base, offset); // Set-register-to-register-plus-constant (we only want the address of array variable)
}
else if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_GEN1) {
ccb_target_gen_emit("addimm $r0, %s, %d", base, offset);
}
else if (ccb_target_asmfmt(ccb) == CCB_TARGET_ASMFMT_FASM) {
ccb_target_gen_emit("lea rax, [%s + %d]", base, offset);
}
else {
ccb_target_gen_emit("lea %d(%%%s), %%rax", offset, base);
}
}
else if (var->type == CCB_TYPE_FLOAT) {
if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_GENERIC) {
ccb_target_gen_emit("setfrpcmx32 f0, %s, %d", base, offset); // Set-float-to-register-plus-constant's-memory-x32bit
}
else if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_RISCV) {
ccb_target_gen_emit("flw ft0, %d(%s)", offset, base);
ccb_target_gen_emit("fcvt.d.s fa0, ft0");
}
else if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_GEN1) {
ccb_target_gen_emit("todo");
}
else if (ccb_target_asmfmt(ccb) == CCB_TARGET_ASMFMT_FASM) {
ccb_target_gen_emit("cvtps2pd xmm0, [%s + %d]", base, offset);
}
else {
ccb_target_gen_emit("cvtps2pd %d(%%%s), %%xmm0", offset, base);
}
}
else if (var->type == CCB_TYPE_DOUBLE || var->type == CCB_TYPE_LDOUBLE) {
if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_GENERIC) {
ccb_target_gen_emit("setfrpcm f0, %s, %d", base, offset); // Set-float-to-register-plus-constant's-memory
}
else if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_RISCV) {
ccb_target_gen_emit("fld fa0, %d(%s)", offset, base);
}
else if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_GEN1) {
ccb_target_gen_emit("todo");
}
else if (ccb_target_asmfmt(ccb) == CCB_TARGET_ASMFMT_FASM) {
ccb_target_gen_emit("movsd xmm0, [%s + %d]", base, offset);
}
else {
ccb_target_gen_emit("movsd %d(%%%s), %%xmm0", offset, base);
}
}
else {
if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_GEN1) {
ccb_target_gen_emit("xor $r1, $r1, $r1");
ccb_target_gen_emit("addimm $r1, %s, %d", base, offset);
if (var->size <= 4) {
ccb_target_gen_emit("read32 $r0, $r1, 0");
if (var->size < 4) {
int32_t mask = ((var->size == 1) ? 0xFF : 0xFFFF);
ccb_target_gen_emit("xor $r1, $r1, $r1");
ccb_target_gen_emit("addimm $r1, %d", mask); // TODO: This might not work out so well for 16-bit, must check.
ccb_target_gen_emit("and $r0, $r0, $r1");
}
}
else {
ccb_target_gen_emit("read32 $r0, $r1, 4");
ccb_target_gen_emit("shlz $r0, $r0, 32");
ccb_target_gen_emit("read32 $r1, $r1, 0");
ccb_target_gen_emit("or $r0, $r0, $r1"); // TODO: Sign bit may also interfere here.
}
}
else {
const char* reg = ccb_target_gen_register_integer(ccb, var, 'c');
const char* spec = ccb_target_gen_loadstorespec(ccb, var, false);
if (var->size < 4) { // TODO: Should this be 8 (or normal int/pointer size) ??
if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_GENERIC) {
ccb_target_gen_emit("setrc r0, 0");
}
else if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_RISCV) {
// No need to clear top bits, handled in load instruction (??)
}
else if (ccb_target_asmfmt(ccb) == CCB_TARGET_ASMFMT_FASM) {
ccb_target_gen_emit("mov ecx, 0");
}
else {
ccb_target_gen_emit("mov $0, %%ecx");
}
}
if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_GEN1) {
ccb_target_gen_emit("peek32 %s, %s, %d", reg, base, offset);
ccb_target_gen_emit("move v0, v1");
}
else if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_GENERIC) {
ccb_target_gen_emit("setrrpcm %s, %s, %d", reg, base, offset);
ccb_target_gen_emit("setrr r0, r1");
}
else if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_RISCV) {
ccb_target_gen_emit("l%s %s, %d(%s)", spec, reg, offset, base);
ccb_target_gen_emit("addi a0, a1, 0");
}
else if (ccb_target_asmfmt(ccb) == CCB_TARGET_ASMFMT_FASM) {
ccb_target_gen_emit("mov %s, [%s + %d]", reg, base, offset);
ccb_target_gen_emit("mov rax, rcx");
}
else {
ccb_target_gen_emit("mov %d(%%%s), %%%s", offset, base, reg);
ccb_target_gen_emit("mov %%rcx, %%rax");
}
}
}
}