dma + axi memory

[juanma-rm]

Hi Alex! First of all, congrats and thanks for all your great work with verilog_* repositories and corundum.

I have been testing verilog-pcie in an Alveo U25 platform (using AU200 as baseline) successfully communicating host (a workstation running Linux) and card (the AU25 connected via PCIe to the host). In these tests, I configure the pcie dma from the host side via the driver running on the Linux host and move data in both directions (host -> card and card -> host). In particular, the data in the card side is stored in the psdpram (embedded in the fpga). All this using the "standard fpga" version (not the fpga_axi one).

However, I find myself now in the following situation: I need to move data host -> fpga, do some processing on the fpga side and then move the results back to the host, being the size of the data in the order several MBs (> 10 MB). I cannot work with a dma psdpram embedded in the fpga now because of fpga resource limitation. My plan is to use the PS DDR (AXI) as the dma memory instead. Then I wonder:

• Is it the best option for my scenario to use fpga_axi instead? This way the dma could interface the PS DDR directly via its AXI ports (HP0 for instance). I know you mention in some issues that it is legacy and less performant because of AXI working principles (in fact I think it has been removed from the repo), but in my case I have no choice than using AXI interface. Is it still a bad idea to use fpga_axi?
• I also see an axi ram connected to bar2, but I think I cannot use the dma in that case and would have to move data with iowrite/ioread word by word from the host (which does not seem feasible in performance).
• Is there any alternative that you would suggest? I was thinking of building a bridge psdp <-> axi, but I guess I would end up having the same performance than directly using fpga_axi version, right?

Many thanks and best regards!