Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Add sd/sc to allow setting date/time in Click PLC #43

Merged
merged 16 commits into from
Dec 8, 2024

Conversation

ssweber
Copy link
Collaborator

@ssweber ssweber commented Nov 21, 2024

Hello, Thanks for the library!

I wrote a short script to sync all my clicks on the network with my computer's clock. sync_clickplc_datetime.py I then realized that writing SD, and read/writing SC wasn't added yet. I added necessary changes / modeling them after the C and DS corresponding functions. I tested my script, and it did set correctly!

Let me know if it looks OK. Thanks

Makes it more clear that there are a total of X bits, not an additional X bits + the starting one
Modeled after _set_ds

Restricted it to only the writable SD registers
Modeled after C coils.

Restricted writing to only writable SC addresses
@ssweber
Copy link
Collaborator Author

ssweber commented Nov 21, 2024

I'll look into the test_driver.py and see about following up with additional tests for this.

I didn't run ruff format, because it'd be harder to see what changes I made. If you're open for further contributions, maybe you could run 'ruff format . --config "format.quote-style = 'single'" (or omit config style if you like double-quotes).

@ssweber
Copy link
Collaborator Author

ssweber commented Nov 21, 2024

Also I’ll send a commit over to update docs / user-facing on which sc/sd are writable

@alexrudd2
Copy link
Owner

Hello @ssweber

With the Thanksgiving holiday, I'm only seeing this now. Thanks so much for the PR! An initial review looks good, but I want to double check the register value changes.

I'm traveling next week but will be able to check this against real hardware 12/9. Also, I have a local work-in-progress branch adding SD, so I'll cross-check our implementations.

I didn't run ruff format

For now I'm just using ruff check --fix ., which will fix the whitespace but not do other reformatting.

@alexrudd2 alexrudd2 mentioned this pull request Dec 1, 2024
@ssweber
Copy link
Collaborator Author

ssweber commented Dec 1, 2024

@alexrudd2. I added in the tests to this branch and closed that PR. I was covering a coworkers job last week, but I should have time this week to run against a ClickPLC.

@ssweber
Copy link
Collaborator Author

ssweber commented Dec 1, 2024

... getting my bearings on how to use pytest :)

Not sure how physical click would respond to setting all these as 1234. So revert.
@alexrudd2
Copy link
Owner

Nice catch on the SD ranges. (I cherry-picked it as a83d9b1).

I've invited you as collaborator so Github actions will run on this PR. Commit whatever you want in this branch, I'll likely squash-merge when we've got things fully tested.

@alexrudd2
Copy link
Owner

alexrudd2 commented Dec 7, 2024

Finally got a chance to run this against my real PLC. (C2-03CPU-2 with 3.4.3)

============================= test session starts ==============================
platform linux -- Python 3.11.11, pytest-8.3.4, pluggy-1.5.0
rootdir: /home/alex/git/clickplc
configfile: pyproject.toml
plugins: asyncio-0.24.0, cov-5.0.0, xdist-3.5.0
asyncio: mode=Mode.AUTO, default_loop_scope=None
collected 37 items                                                             

clickplc/tests/test_driver.py ......F...............F..............      [100%]

=================================== FAILURES ===================================
______________________________ test_sc_roundtrip _______________________________

plc_driver = <clickplc.driver.ClickPLC object at 0x7c91ae2121d0>

    @pytest.mark.asyncio(loop_scope='session')
    async def test_sc_roundtrip(plc_driver):
        """Confirm writable SC bools are read back correctly after being set."""
        # Test writing to SC50 (_PLC_Mode_Change_to_STOP) to stop PLC mode
        await plc_driver.set('sc50', True)
>       assert await plc_driver.get('sc50') is True
E       assert False is True

clickplc/tests/test_driver.py:104: AssertionError
____________________________ test_sc_error_handling ____________________________

plc_driver = <clickplc.driver.ClickPLC object at 0x7c91ae2121d0>

    @pytest.mark.asyncio(loop_scope='session')
    async def test_sc_error_handling(plc_driver):
        """Ensure errors are handled for invalid requests of SC registers."""
        # Test valid boundary
        await plc_driver.set('sc50', True)  # Valid writable address
>       assert await plc_driver.get('sc50') is True
E       assert False is True

clickplc/tests/test_driver.py:311: AssertionError

@alexrudd2 alexrudd2 merged commit 69f92d5 into alexrudd2:master Dec 8, 2024
36 checks passed
@alexrudd2
Copy link
Owner

Thanks again for the great code.

@alexrudd2
Copy link
Owner

image

@ssweber ssweber deleted the add-sd/sc branch December 8, 2024 13:14
@ssweber
Copy link
Collaborator Author

ssweber commented Dec 8, 2024

Thanks for merging 😄

Great catch on the docs/reality mismatch. Will have to bring up on their support forum.

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

2 participants