Skip to content

Latest commit

 

History

History
43 lines (32 loc) · 1.55 KB

ddr3_test.adoc

File metadata and controls

43 lines (32 loc) · 1.55 KB

ddr3_test

A simple DDR3 SDRAM tester. Performs maximum bandwidth write-then-read tests using Joris van Rantwijk’s Pseudo Random Number Generator "xoshiro128++ 1.0". Also demonstrates how to hack the DDR3 IP core’s MMCM to generate the 200MHz IODELAYCTRL reference clock.

Supported boards: Digilent Nexys Video and QMTECH Wukong.

Building and Programming

Build the Vivado project by running make in the relevant build directory, and program your board from the command line by running make prog. Once the project is built, you may open it in the Vivado IDE.

Operation

Test control and status indication depends on the board being used:

Digilent Nexys Video

  • SW4-0 sets the test size in bytes as a power of 2:

    • 00100 = 4: 2^4 = 16 Bytes (minimum)

    • 01000 = 8: 2^8 = 256 Bytes

    • 11101 = 29: 2^29 = 512MBytes (maximum)

    • OFF = 0, ON = 1

  • SW5 enables slow testing (once per second) when ON

  • SW6 is a run/stop control (ON = run)

  • SW7 switches between pass and error count display - see below

  • LED7 = heartbeat (toggles every time round the test)

  • LED6 = at least one error has occurred

  • LED5-0 = LS 6 bits of test pass count (SW7 = OFF) or total error count (SW7 = ON)

Note that changing the test size during a test can cause an error. Press the CPU_RESET button to restart the test.

QMTECH Wukong

  • D5 = heartbeat (toggles every time round the test)

  • D6 = at least one error has occurred

  • test size is fixed at 256MBytes

.imageblock > .title { text-align: inherit; }