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axi_hpx_interconnect clock name numbering issue #1026

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analog-system-compiler opened this issue Sep 29, 2022 · 1 comment
Open

axi_hpx_interconnect clock name numbering issue #1026

analog-system-compiler opened this issue Sep 29, 2022 · 1 comment
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@analog-system-compiler
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In function proc ad_mem_hpx_interconnect() of script file adi_board.tcl, the variable sys_mem_clk_index is global for all HPx bus types. Under certain circumstances, the clock name numbering can be incorrect (line 876):
ad_connect $p_clk $m_interconnect_cell/ACLK$sys_mem_clk_index

It seems there is no issue with the NOC bus that gets its sys_mem_clk_index value directly from the instance (line 834):
set sys_mem_clk_index [expr [get_property CONFIG.NUM_CLKS [get_bd_cells axi_noc_0]]-1]

This should be generalized to all other HPx bus types.

@gastmaier
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gastmaier commented Sep 17, 2024

Can you check if a solution like bf1b577 fully solves your issue?

  if {[catch {
    set interconnect_index [get_property CONFIG.NUM_MI [get_bd_cells $interconnect_name]]
  } err]} {
    set interconnect_index 0
  }

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