forked from pytorch/pytorch
-
Notifications
You must be signed in to change notification settings - Fork 0
/
Conv.cpp
225 lines (195 loc) · 8 KB
/
Conv.cpp
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
#include <ATen/ATen.h>
#include <ATen/NativeFunctions.h>
#include <ATen/Config.h>
#if !AT_MKLDNN_ENABLED()
namespace at { namespace native {
Tensor mkldnn_convolution(
const Tensor& input, const Tensor& weight, const c10::optional<Tensor>& bias_opt,
IntArrayRef padding, IntArrayRef stride, IntArrayRef dilation, int64_t groups) {
TORCH_CHECK(false, "mkldnn_convolution_forward: ATen not compiled with MKLDNN support");
}
Tensor mkldnn_convolution_backward_input(
IntArrayRef input_size, const Tensor& grad_output, const Tensor& weight,
IntArrayRef padding, IntArrayRef stride, IntArrayRef dilation, int64_t groups, bool bias_defined) {
TORCH_CHECK(false, "mkldnn_convolution_backward_input: ATen not compiled with MKLDNN support");
}
std::tuple<Tensor, Tensor> mkldnn_convolution_backward_weights(
IntArrayRef weight_size, const Tensor& grad_output, const Tensor& input,
IntArrayRef padding, IntArrayRef stride, IntArrayRef dilation, int64_t groups, bool bias_defined) {
TORCH_CHECK(false, "mkldnn_convolution_backward_weights: ATen not compiled with MKLDNN support");
}
std::tuple<Tensor, Tensor, Tensor> mkldnn_convolution_backward(
const Tensor& input, const Tensor& grad_output_t, const Tensor& weight,
IntArrayRef padding, IntArrayRef stride, IntArrayRef dilation, int64_t groups, std::array<bool,3> output_mask) {
TORCH_CHECK(false, "mkldnn_convolution_backward: ATen not compiled with MKLDNN support");
}
}}
#else // AT_MKLDNN_EBABLED
#include <ATen/native/mkldnn/MKLDNNCommon.h>
#include <ATen/native/mkldnn/Utils.h>
#include <ATen/native/ConvUtils.h>
namespace at { namespace native {
ideep::tensor _mkldnn_convolution(
const ideep::tensor& x,
const ideep::tensor& w,
const c10::optional<ideep::tensor>& b,
IntArrayRef padding,
IntArrayRef stride,
IntArrayRef dilation,
int64_t groups) {
auto kernel_size = w.get_dims();
std::vector<int64_t> input_size = x.get_dims();
std::vector<int64_t> output_sizes =
conv_output_size(input_size, kernel_size, padding, stride, dilation);
ideep::tensor y;
if (b.has_value()) {
ideep::convolution_forward::compute(
x,
w,
b.value(),
{output_sizes.cbegin(), output_sizes.cend()},
y,
{stride.begin(), stride.end()},
{dilation.begin(), dilation.end()},
{padding.begin(), padding.end()},
{padding.begin(), padding.end()},
groups);
} else {
ideep::convolution_forward::compute(
x,
w,
{output_sizes.cbegin(), output_sizes.cend()},
y,
{stride.begin(), stride.end()},
{dilation.begin(), dilation.end()},
{padding.begin(), padding.end()},
{padding.begin(), padding.end()},
groups);
}
return y;
}
Tensor mkldnn_convolution(
const Tensor& input,
const Tensor& weight, const c10::optional<Tensor>& bias_opt,
IntArrayRef padding,
IntArrayRef stride,
IntArrayRef dilation,
int64_t groups) {
// See [Note: hacky wrapper removal for optional tensor]
c10::MaybeOwned<Tensor> bias_maybe_owned = at::borrow_from_optional_tensor(bias_opt);
const Tensor& bias = *bias_maybe_owned;
if (input.scalar_type() == ScalarType::BFloat16) {
TORCH_CHECK(mkldnn_bf16_device_check(),
"mkldnn_convolution: bf16 path needs the cpu support avx512bw, avx512vl and avx512dq");
}
const ideep::tensor mkldnn_input = itensor_from_tensor(input);
const ideep::tensor mkldnn_weight = itensor_from_tensor(weight);
c10::optional<ideep::tensor> mkldnn_bias{c10::nullopt};
if (bias.defined()) {
mkldnn_bias = itensor_from_tensor(bias);
}
ideep::tensor mkldnn_output = _mkldnn_convolution(
mkldnn_input,
mkldnn_weight,
mkldnn_bias,
padding,
stride,
dilation,
groups);
if (input.is_mkldnn()) {
return new_with_itensor_mkldnn(std::move(mkldnn_output), optTypeMetaToScalarType(input.options().dtype_opt()),
input.options().device_opt());
} else {
return mkldnn_to_dense(
new_with_itensor_mkldnn(std::move(mkldnn_output), optTypeMetaToScalarType(input.options().dtype_opt()),
input.options().device_opt()));
}
}
Tensor mkldnn_convolution_backward_input(
IntArrayRef input_size, const Tensor& grad_output, const Tensor& weight,
IntArrayRef padding, IntArrayRef stride, IntArrayRef dilation, int64_t groups, bool bias_defined)
{
// for training case, grad_output can be cpu tensor or MKLDNN tensor,
// but weight and bias always cpu tensor.
auto mkldnn_grad_output = itensor_from_tensor(grad_output);
auto mkldnn_weight = itensor_view_from_dense(weight);
ideep::tensor mkldnn_grad_input;
ideep::convolution_backward_data::compute(
mkldnn_grad_output,
mkldnn_weight,
input_size.vec(),
mkldnn_grad_input,
stride.vec(),
dilation.vec(),
padding.vec(),
padding.vec(),
groups);
if (grad_output.is_mkldnn()) {
return new_with_itensor_mkldnn(std::move(mkldnn_grad_input),
optTypeMetaToScalarType(grad_output.options().dtype_opt()),
grad_output.options().device_opt());
} else {
return mkldnn_to_dense(new_with_itensor_mkldnn(std::move(mkldnn_grad_input),
optTypeMetaToScalarType(grad_output.options().dtype_opt()),
grad_output.options().device_opt()));
}
}
std::tuple<Tensor, Tensor> mkldnn_convolution_backward_weights(
IntArrayRef weight_size, const Tensor& grad_output, const Tensor& input,
IntArrayRef padding, IntArrayRef stride, IntArrayRef dilation, int64_t groups, bool bias_defined)
{
// for training case, grad_output and input can be cpu tensor or MKLDNN tensor,
// but weight and bias are always cpu tensor.
const ideep::tensor mkldnn_grad_output = itensor_from_tensor(grad_output);
const ideep::tensor mkldnn_input = itensor_from_tensor(input);
ideep::tensor mkldnn_grad_weight, mkldnn_grad_bias;
if (bias_defined) {
ideep::convolution_backward_weights::compute(
mkldnn_input,
mkldnn_grad_output,
weight_size.vec(),
mkldnn_grad_weight,
mkldnn_grad_bias,
stride.vec(),
dilation.vec(),
padding.vec(),
padding.vec(),
groups);
} else {
ideep::convolution_backward_weights::compute(
mkldnn_input,
mkldnn_grad_output,
weight_size.vec(),
mkldnn_grad_weight,
stride.vec(),
dilation.vec(),
padding.vec(),
padding.vec(),
groups);
}
return std::make_tuple(
mkldnn_to_dense(new_with_itensor_mkldnn(std::move(mkldnn_grad_weight),
optTypeMetaToScalarType(grad_output.options().dtype_opt()),
grad_output.options().device_opt())),
mkldnn_to_dense(new_with_itensor_mkldnn(std::move(mkldnn_grad_bias),
optTypeMetaToScalarType(grad_output.options().dtype_opt()),
grad_output.options().device_opt())));
}
std::tuple<Tensor, Tensor, Tensor> mkldnn_convolution_backward(
const Tensor& input, const Tensor& grad_output_t, const Tensor& weight,
IntArrayRef padding, IntArrayRef stride, IntArrayRef dilation, int64_t groups, std::array<bool,3> output_mask)
{
Tensor grad_output = grad_output_t.is_mkldnn() ? grad_output_t : grad_output_t.contiguous();
Tensor grad_input, grad_weight, grad_bias;
if (output_mask[0]) {
grad_input = at::mkldnn_convolution_backward_input(
input.sizes(), grad_output, weight, padding, stride, dilation, groups, output_mask[2]);
}
if (output_mask[1] || output_mask[2]) {
std::tie(grad_weight, grad_bias) = at::mkldnn_convolution_backward_weights(
weight.sizes(), grad_output, input, padding, stride, dilation, groups, output_mask[2]);
}
return std::make_tuple(grad_input, grad_weight, grad_bias);
}
}} // namespace at::native
#endif