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hw/mcu/stm32f4: Update mcu info command
Clocks are not printed with units instead of compat> /mcu info Clocks: SYSCLK: 168000000 source PLL HSI: off HSE: on PLL: on LSI: on LSE: off Now output would look like this compat> /mcu info Clocks: SYSCLK: 168 MHz source PLL HSI: off HSE: on PLL: on PLLP: 168 MHz PLLQ: 48 MHz LSI: on LSE: off APB1 PCLK1: 42 MHz PWR on APB2 PCLK2: 84 MHz USART1 on SDIO on 1 MHz SYSCFG on TIM9 on 1 MHz Signed-off-by: Jerzy Kasenberg <[email protected]>
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hw/mcu/stm/stm32f4xx/mcu_cli/src/mcu_cli.c

Lines changed: 131 additions & 57 deletions
Original file line numberDiff line numberDiff line change
@@ -23,6 +23,7 @@
2323
#include <stdlib.h>
2424
#include <string.h>
2525
#include <stm32f4xx_hal.h>
26+
#include <mcu/clock_stm32f4xx.h>
2627
#include <shell/shell.h>
2728

2829
extern uint32_t SystemCoreClock;
@@ -35,10 +36,38 @@ on_off_state(uint32_t on)
3536
return on ? "on" : "off";
3637
}
3738

39+
static char *
40+
freq_str(uint32_t freq, char buf[])
41+
{
42+
int freq_m = (int)(freq / 1000000);
43+
int freq_m_rem = (int)(freq % 1000000);
44+
int freq_k = (int)(freq / 1000);
45+
int freq_k_rem = (int)(freq % 1000);
46+
47+
if (freq == 0) {
48+
strcpy(buf, "---");
49+
} else if (freq_m && freq_m_rem == 0) {
50+
sprintf(buf, "%d MHz", freq_m);
51+
} else if (freq_m) {
52+
while (freq_m_rem % 10 == 0) {
53+
freq_m_rem /= 10;
54+
}
55+
sprintf(buf, "%d.%d MHz", freq_m, freq_m_rem);
56+
} else if (freq_k && freq_k_rem == 0) {
57+
sprintf(buf, "%d kHz", freq_k);
58+
} else {
59+
sprintf(buf, "%d Hz", (int)freq);
60+
}
61+
return buf;
62+
}
63+
3864
static void
3965
print_ahb_peripherals(struct streamer *streamer, bool all)
4066
{
41-
streamer_printf(streamer, " AHB HCLK: %u\n", (unsigned int)HAL_RCC_GetHCLKFreq());
67+
char freq_buf[20];
68+
69+
streamer_printf(streamer, " AHB HCLK: %s\n",
70+
freq_str(HAL_RCC_GetHCLKFreq(), freq_buf));
4271

4372
if (all || RCC->AHB1ENR & RCC_AHB1ENR_GPIOAEN) {
4473
streamer_printf(streamer, " GPIOA %s\n", on_off_state(RCC->AHB1ENR & RCC_AHB1ENR_GPIOAEN));
@@ -177,67 +206,85 @@ print_apb1_peripherals(struct streamer *streamer, bool all)
177206
{
178207
uint32_t pckl1 = HAL_RCC_GetPCLK1Freq();
179208
uint32_t timmul = RCC->CFGR & RCC_CFGR_PPRE2_2 ? 2 : 1;
209+
char freq_buf[20];
180210

181-
streamer_printf(streamer, " APB1 PCLK1: %u\n", (unsigned int)pckl1);
211+
streamer_printf(streamer, " APB1 PCLK1: %s\n", freq_str(pckl1, freq_buf));
182212
if (all || RCC->APB1ENR & RCC_APB1ENR_TIM2EN) {
183-
streamer_printf(streamer, " TIM2 %s %u (ARR %u)\n", on_off_state(RCC->APB1ENR & RCC_APB1ENR_TIM2EN),
184-
pckl1 * timmul / (TIM2->PSC + 1), (TIM2->ARR));
213+
streamer_printf(streamer, " TIM2 %s %s (ARR %u)\n",
214+
on_off_state(RCC->APB1ENR & RCC_APB1ENR_TIM2EN),
215+
freq_str(pckl1 * timmul / (TIM2->PSC + 1), freq_buf),
216+
(TIM2->ARR));
185217
}
186218
if (all || RCC->APB1ENR & RCC_APB1ENR_TIM3EN) {
187-
streamer_printf(streamer, " TIM3 %s %u (ARR %u)\n", on_off_state(RCC->APB1ENR & RCC_APB1ENR_TIM3EN),
188-
pckl1 * timmul / (TIM3->PSC + 1), (TIM3->ARR + 1));
219+
streamer_printf(streamer, " TIM3 %s %s (ARR %u)\n",
220+
on_off_state(RCC->APB1ENR & RCC_APB1ENR_TIM3EN),
221+
freq_str(pckl1 * timmul / (TIM3->PSC + 1), freq_buf),
222+
(TIM3->ARR + 1));
189223
}
190224
if (all || RCC->APB1ENR & RCC_APB1ENR_TIM4EN) {
191-
streamer_printf(streamer, " TIM4 %s %u\n", on_off_state(RCC->APB1ENR & RCC_APB1ENR_TIM4EN),
192-
pckl1 * timmul / (TIM4->PSC + 1));
225+
streamer_printf(streamer, " TIM4 %s %s\n",
226+
on_off_state(RCC->APB1ENR & RCC_APB1ENR_TIM4EN),
227+
freq_str(pckl1 * timmul / (TIM4->PSC + 1), freq_buf));
193228
}
194229
#ifdef RCC_APB1ENR_TIM5EN
195230
if (all || RCC->APB1ENR & RCC_APB1ENR_TIM5EN) {
196-
streamer_printf(streamer, " TIM5 %s %u\n", on_off_state(RCC->APB1ENR & RCC_APB1ENR_TIM5EN),
197-
pckl1 * timmul / (TIM5->PSC + 1));
231+
streamer_printf(streamer, " TIM5 %s %s\n",
232+
on_off_state(RCC->APB1ENR & RCC_APB1ENR_TIM5EN),
233+
freq_str(pckl1 * timmul / (TIM5->PSC + 1), freq_buf));
198234
}
199235
#endif
200236
#ifdef RCC_APB1ENR_TIM6EN
201237
if (all || RCC->APB1ENR & RCC_APB1ENR_TIM6EN) {
202-
streamer_printf(streamer, " TIM6 %s %u\n", on_off_state(RCC->APB1ENR & RCC_APB1ENR_TIM6EN),
203-
pckl1 * timmul / (TIM6->PSC + 1));
238+
streamer_printf(streamer, " TIM6 %s %s\n",
239+
on_off_state(RCC->APB1ENR & RCC_APB1ENR_TIM6EN),
240+
freq_str(pckl1 * timmul / (TIM6->PSC + 1), freq_buf));
204241
}
205242
#endif
206243
#ifdef RCC_APB1ENR_TIM7EN
207244
if (all || RCC->APB1ENR & RCC_APB1ENR_TIM7EN) {
208-
streamer_printf(streamer, " TIM7 %s %u\n", on_off_state(RCC->APB1ENR & RCC_APB1ENR_TIM7EN),
209-
pckl1 * timmul / (TIM7->PSC + 1));
245+
streamer_printf(streamer, " TIM7 %s %s\n",
246+
on_off_state(RCC->APB1ENR & RCC_APB1ENR_TIM7EN),
247+
freq_str(pckl1 * timmul / (TIM7->PSC + 1), freq_buf));
210248
}
211249
#endif
212250
#ifdef RCC_APB1ENR_TIM12EN
213251
if (all || RCC->APB1ENR & RCC_APB1ENR_TIM12EN) {
214-
streamer_printf(streamer, " TIM12 %s %u\n", on_off_state(RCC->APB1ENR & RCC_APB1ENR_TIM12EN),
215-
pckl1 * timmul / (TIM12->PSC + 1));
252+
streamer_printf(streamer, " TIM12 %s %s\n",
253+
on_off_state(RCC->APB1ENR & RCC_APB1ENR_TIM12EN),
254+
freq_str(pckl1 * timmul / (TIM12->PSC + 1), freq_buf));
216255
}
217256
#endif
218257
#ifdef RCC_APB1ENR_TIM13EN
219258
if (all || RCC->APB1ENR & RCC_APB1ENR_TIM13EN) {
220-
streamer_printf(streamer, " TIM13 %s %u\n", on_off_state(RCC->APB1ENR & RCC_APB1ENR_TIM13EN),
221-
pckl1 * timmul / (TIM3->PSC + 1));
259+
streamer_printf(streamer, " TIM13 %s %s\n",
260+
on_off_state(RCC->APB1ENR & RCC_APB1ENR_TIM13EN),
261+
freq_str(pckl1 * timmul / (TIM3->PSC + 1), freq_buf));
222262
}
223263
#endif
224264
#ifdef RCC_APB1ENR_TIM14EN
225265
if (all || RCC->APB1ENR & RCC_APB1ENR_TIM14EN) {
226-
streamer_printf(streamer, " TIM14 %s %u\n", on_off_state(RCC->APB1ENR & RCC_APB1ENR_TIM14EN),
227-
pckl1 * timmul / (TIM14->PSC + 1));
266+
streamer_printf(streamer, " TIM14 %s %s\n",
267+
on_off_state(RCC->APB1ENR & RCC_APB1ENR_TIM14EN),
268+
freq_str(pckl1 * timmul / (TIM14->PSC + 1), freq_buf));
228269
}
229270
#endif
230271
if (all || RCC->APB1ENR & RCC_APB1ENR_WWDGEN) {
231272
streamer_printf(streamer, " WWD %s\n", on_off_state(RCC->APB1ENR & RCC_APB1ENR_WWDGEN));
232273
}
233274
if (all || RCC->APB1ENR & RCC_APB1ENR_SPI2EN) {
234-
streamer_printf(streamer, " SPI2 %s\n", on_off_state(RCC->APB1ENR & RCC_APB1ENR_SPI2EN),
235-
pckl1 >> (1 + ((SPI2->CR1 & SPI_CR1_BR_Msk) >> SPI_CR1_BR_Pos)));
275+
streamer_printf(
276+
streamer, " SPI2 %s %s\n",
277+
on_off_state(RCC->APB1ENR & RCC_APB1ENR_SPI2EN),
278+
freq_str(pckl1 >> (1 + ((SPI2->CR1 & SPI_CR1_BR_Msk) >> SPI_CR1_BR_Pos)),
279+
freq_buf));
236280
}
237281
#ifdef RCC_APB1ENR_SPI3EN
238282
if (all || RCC->APB1ENR & RCC_APB1ENR_SPI3EN) {
239-
streamer_printf(streamer, " SPI3 %s %u\n", on_off_state(RCC->APB1ENR & RCC_APB1ENR_SPI3EN),
240-
pckl1 >> (1 + ((SPI3->CR1 & SPI_CR1_BR_Msk) >> SPI_CR1_BR_Pos)));
283+
streamer_printf(
284+
streamer, " SPI3 %s %s\n",
285+
on_off_state(RCC->APB1ENR & RCC_APB1ENR_SPI3EN),
286+
freq_str(pckl1 >> (1 + ((SPI3->CR1 & SPI_CR1_BR_Msk) >> SPI_CR1_BR_Pos)),
287+
freq_buf));
241288
}
242289
#endif
243290
if (all || RCC->APB1ENR & RCC_APB1ENR_USART2EN) {
@@ -293,8 +340,9 @@ print_apb2_peripherals(struct streamer *streamer, bool all)
293340
uint32_t pckl2 = HAL_RCC_GetPCLK2Freq();
294341
uint32_t adcpre = (((ADC->CCR & ADC_CCR_ADCPRE_Msk) >> ADC_CCR_ADCPRE_Pos) + 1) * 2;
295342
uint32_t timmul = RCC->CFGR & RCC_CFGR_PPRE2_2 ? 2 : 1;
343+
char freq_buf[20];
296344

297-
streamer_printf(streamer, " APB2 PCLK2: %u\n", (unsigned int)pckl2);
345+
streamer_printf(streamer, " APB2 PCLK2: %s\n", freq_str(pckl2, freq_buf));
298346

299347
if (all || RCC->APB2ENR & RCC_APB2ENR_USART1EN) {
300348
streamer_printf(streamer, " USART1 %s\n", on_off_state(RCC->APB2ENR & RCC_APB2ENR_USART1EN));
@@ -304,78 +352,93 @@ print_apb2_peripherals(struct streamer *streamer, bool all)
304352
}
305353

306354
if (all || RCC->APB2ENR & RCC_APB2ENR_ADC1EN) {
307-
streamer_printf(streamer, " ADC1 %s %u\n", on_off_state(RCC->APB2ENR & RCC_APB2ENR_ADC1EN),
308-
pckl2 / adcpre);
355+
streamer_printf(streamer, " ADC1 %s %s\n",
356+
on_off_state(RCC->APB2ENR & RCC_APB2ENR_ADC1EN),
357+
freq_str(pckl2 / adcpre, freq_buf));
309358
}
310359
#ifdef RCC_APB2ENR_ADC2EN
311360
if (all || RCC->APB2ENR & RCC_APB2ENR_ADC2EN) {
312-
streamer_printf(streamer, " ADC2 %s %u\n", on_off_state(RCC->APB2ENR & RCC_APB2ENR_ADC2EN),
313-
pckl2 / adcpre);
361+
streamer_printf(streamer, " ADC2 %s %s\n",
362+
on_off_state(RCC->APB2ENR & RCC_APB2ENR_ADC2EN),
363+
freq_str(pckl2 / adcpre, freq_buf));
314364
}
315365
#endif
316366
#if defined(RCC_APB2ENR_ADC3EN)
317367
if (all || RCC->APB2ENR & RCC_APB2ENR_ADC3EN) {
318-
streamer_printf(streamer, " ADC3 %s %u\n", on_off_state(RCC->APB2ENR & RCC_APB2ENR_ADC3EN),
319-
pckl2 / adcpre);
320-
}
321-
#endif
322-
#if defined(RCC_APB2ENR_ADC3EN)
323-
if (all || RCC->APB2ENR & RCC_APB2ENR_ADC3EN) {
324-
streamer_printf(streamer, " SDIO %s\n", on_off_state(RCC->APB2ENR & RCC_APB2ENR_ADC3EN));
368+
streamer_printf(streamer, " ADC3 %s %s\n",
369+
on_off_state(RCC->APB2ENR & RCC_APB2ENR_ADC3EN),
370+
freq_str(pckl2 / adcpre, freq_buf));
325371
}
326372
#endif
327373
if (all || RCC->APB2ENR & RCC_APB2ENR_SDIOEN) {
328-
streamer_printf(streamer, " SDIO %s %u\n", on_off_state(RCC->APB2ENR & RCC_APB2ENR_SDIOEN),
329-
pckl2 / (2 + (SDIO->CLKCR & SDIO_CLKCR_CLKDIV_Msk)));
374+
streamer_printf(streamer, " SDIO %s %s\n",
375+
on_off_state(RCC->APB2ENR & RCC_APB2ENR_SDIOEN),
376+
freq_str(stm32f4xx_pll_q_freq() /
377+
(2 + (SDIO->CLKCR & SDIO_CLKCR_CLKDIV_Msk)),
378+
freq_buf));
330379
}
331380
if (all || RCC->APB2ENR & RCC_APB2ENR_SPI1EN) {
332-
streamer_printf(streamer, " SPI1 %s %u\n", on_off_state(RCC->APB2ENR & RCC_APB2ENR_SPI1EN),
333-
pckl2 >> (1 + ((SPI1->CR1 & SPI_CR1_BR_Msk) >> SPI_CR1_BR_Pos)));
381+
streamer_printf(
382+
streamer, " SPI1 %s %s\n",
383+
on_off_state(RCC->APB2ENR & RCC_APB2ENR_SPI1EN),
384+
freq_str(pckl2 >> (1 + ((SPI1->CR1 & SPI_CR1_BR_Msk) >> SPI_CR1_BR_Pos)),
385+
freq_buf));
334386
}
335387
#if defined(RCC_APB2ENR_SPI4EN)
336388
if (all || RCC->APB2ENR & RCC_APB2ENR_SPI4EN) {
337-
streamer_printf(streamer, " SPI4 %s %u%s\n", on_off_state(RCC->APB2ENR & RCC_APB2ENR_SPI4EN),
338-
pckl2 >> (1 + ((SPI4->CR1 & SPI_CR1_BR_Msk) >> SPI_CR1_BR_Pos)),
339-
(SPI4->I2SCFGR & SPI_I2SCFGR_I2SMOD) ? " (I2S)" : "");
389+
streamer_printf(
390+
streamer, " SPI4 %s %s%s\n",
391+
on_off_state(RCC->APB2ENR & RCC_APB2ENR_SPI4EN),
392+
freq_str(pckl2 >> (1 + ((SPI4->CR1 & SPI_CR1_BR_Msk) >> SPI_CR1_BR_Pos)),
393+
freq_buf),
394+
(SPI4->I2SCFGR & SPI_I2SCFGR_I2SMOD) ? " (I2S)" : "");
340395
}
341396
#endif
342397
#if defined(RCC_APB2ENR_SPI5EN)
343398
if (all || RCC->APB2ENR & RCC_APB2ENR_SPI5EN) {
344-
streamer_printf(streamer, " SPI5 %s %u%s\n", on_off_state(RCC->APB2ENR & RCC_APB2ENR_SPI5EN),
345-
pckl2 >> (1 + ((SPI5->CR1 & SPI_CR1_BR_Msk) >> SPI_CR1_BR_Pos)),
346-
(SPI5->I2SCFGR & SPI_I2SCFGR_I2SMOD) ? " (I2S)" : "");
399+
streamer_printf(
400+
streamer, " SPI5 %s %s%s\n",
401+
on_off_state(RCC->APB2ENR & RCC_APB2ENR_SPI5EN),
402+
freq_str(pckl2 >> (1 + ((SPI5->CR1 & SPI_CR1_BR_Msk) >> SPI_CR1_BR_Pos)),
403+
freq_buf),
404+
(SPI5->I2SCFGR & SPI_I2SCFGR_I2SMOD) ? " (I2S)" : "");
347405
}
348406
#endif
349407
if (all || RCC->APB2ENR & RCC_APB2ENR_SYSCFGEN) {
350408
streamer_printf(streamer, " SYSCFG %s\n", on_off_state(RCC->APB2ENR & RCC_APB2ENR_SYSCFGEN));
351409
}
352410

353411
if (all || RCC->APB2ENR & RCC_APB2ENR_TIM1EN) {
354-
streamer_printf(streamer, " TIM1 %s %u\n", on_off_state(RCC->APB2ENR & RCC_APB2ENR_TIM1EN),
355-
pckl2 * timmul / (TIM1->PSC + 1));
412+
streamer_printf(streamer, " TIM1 %s %s\n",
413+
on_off_state(RCC->APB2ENR & RCC_APB2ENR_TIM1EN),
414+
freq_str(pckl2 * timmul / (TIM1->PSC + 1), freq_buf));
356415
}
357416
#ifdef RCC_APB2ENR_TIM8EN
358417
if (all || RCC->APB2ENR & RCC_APB2ENR_TIM8EN) {
359-
streamer_printf(streamer, " TIM8 %s %u\n", on_off_state(RCC->APB2ENR & RCC_APB2ENR_TIM8EN),
360-
pckl2 * timmul / (TIM8->PSC + 1));
418+
streamer_printf(streamer, " TIM8 %s %s\n",
419+
on_off_state(RCC->APB2ENR & RCC_APB2ENR_TIM8EN),
420+
freq_str(pckl2 * timmul / (TIM8->PSC + 1), freq_buf));
361421
}
362422
#endif
363423
#ifdef RCC_APB2ENR_TIM9EN
364424
if (all || RCC->APB2ENR & RCC_APB2ENR_TIM9EN) {
365-
streamer_printf(streamer, " TIM9 %s\n", on_off_state(RCC->APB2ENR & RCC_APB2ENR_TIM9EN),
366-
pckl2 * timmul / (TIM9->PSC + 1));
425+
streamer_printf(streamer, " TIM9 %s %s\n",
426+
on_off_state(RCC->APB2ENR & RCC_APB2ENR_TIM9EN),
427+
freq_str(pckl2 * timmul / (TIM9->PSC + 1), freq_buf));
367428
}
368429
#endif
369430
#ifdef RCC_APB2ENR_TIM10EN
370431
if (all || RCC->APB2ENR & RCC_APB2ENR_TIM10EN) {
371-
streamer_printf(streamer, " TIM10 %s\n", on_off_state(RCC->APB2ENR & RCC_APB2ENR_TIM10EN),
372-
pckl2 * timmul / (TIM10->PSC + 1));
432+
streamer_printf(streamer, " TIM10 %s %s\n",
433+
on_off_state(RCC->APB2ENR & RCC_APB2ENR_TIM10EN),
434+
freq_str(pckl2 * timmul / (TIM10->PSC + 1), freq_buf));
373435
}
374436
#endif
375437
#ifdef RCC_APB2ENR_TIM11EN
376438
if (all || RCC->APB2ENR & RCC_APB2ENR_TIM11EN) {
377-
streamer_printf(streamer, " TIM11 %s\n", on_off_state(RCC->APB2ENR & RCC_APB2ENR_TIM11EN),
378-
pckl2 * timmul / (TIM11->PSC + 1));
439+
streamer_printf(streamer, " TIM11 %s %s\n",
440+
on_off_state(RCC->APB2ENR & RCC_APB2ENR_TIM11EN),
441+
freq_str(pckl2 * timmul / (TIM11->PSC + 1), freq_buf));
379442
}
380443
#endif
381444
}
@@ -385,16 +448,27 @@ mcu_cli_info_cmd(const struct shell_cmd *cmd, int argc, char **argv,
385448
struct streamer *streamer)
386449
{
387450
bool all;
451+
char freq_buf[20];
388452
int sw = ((RCC->CFGR & RCC_CFGR_SWS) >> RCC_CFGR_SWS_Pos);
389453

390454
all = argc > 1 && strcmp(argv[1], "all") == 0;
391455

392456
streamer_printf(streamer, "Clocks:\n");
393-
streamer_printf(streamer, " SYSCLK: %u\n", (unsigned int)SystemCoreClock);
457+
streamer_printf(streamer, " SYSCLK: %s\n", freq_str(SystemCoreClock, freq_buf));
394458
streamer_printf(streamer, " source %s\n", system_clock_source[sw]);
395459
streamer_printf(streamer, " HSI: %s\n", on_off_state(RCC->CR & RCC_CR_HSION));
396460
streamer_printf(streamer, " HSE: %s\n", on_off_state(RCC->CR & RCC_CR_HSEON));
397461
streamer_printf(streamer, " PLL: %s\n", on_off_state(RCC->CR & RCC_CR_PLLON));
462+
if (RCC->CR & RCC_CR_PLLON) {
463+
streamer_printf(streamer, " PLLP: %s\n",
464+
freq_str(stm32f4xx_pll_p_freq(), freq_buf));
465+
streamer_printf(streamer, " PLLQ: %s\n",
466+
freq_str(stm32f4xx_pll_q_freq(), freq_buf));
467+
#ifdef RCC_PLLCFGR_PLLR
468+
streamer_printf(streamer, " PLLR: %s\n",
469+
freq_str(stm32f4xx_pll_q_freq(), freq_buf));
470+
#endif
471+
}
398472
streamer_printf(streamer, " LSI: %s\n", on_off_state(RCC->CSR & RCC_CSR_LSION));
399473
streamer_printf(streamer, " LSE: %s\n", on_off_state(RCC->BDCR & RCC_BDCR_LSEON));
400474
streamer_printf(streamer, "Peripherals:\n");

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