bone_fpga_4l_pg1.sch

v 20110115 2
C 1000 1000 0 0 0 EMBEDDEDtitle-bordered-C.sym
[
T 22000 17900 15 8 1 0 0 4 1
11
T 20000 17900 15 8 1 0 0 4 1
10
T 18000 17900 15 8 1 0 0 4 1
9
T 16000 17900 15 8 1 0 0 4 1
8
T 14000 17900 15 8 1 0 0 4 1
7
T 12000 17900 15 8 1 0 0 4 1
6
T 10000 17900 15 8 1 0 0 4 1
5
T 8000 17900 15 8 1 0 0 4 1
4
T 6000 17900 15 8 1 0 0 4 1
3
T 4000 17900 15 8 1 0 0 4 1
2
T 2000 17900 15 8 1 0 0 4 1
1
L 21000 18000 21000 17800 15 0 0 0 -1 -1
L 19000 18000 19000 17800 15 0 0 0 -1 -1
L 17000 18000 17000 17800 15 0 0 0 -1 -1
L 15000 18000 15000 17800 15 0 0 0 -1 -1
L 13000 18000 13000 17800 15 0 0 0 -1 -1
L 11000 18000 11000 17800 15 0 0 0 -1 -1
L 9000 18000 9000 17800 15 0 0 0 -1 -1
L 7000 18000 7000 17800 15 0 0 0 -1 -1
L 5000 18000 5000 17800 15 0 0 0 -1 -1
L 3000 18000 3000 17800 15 0 0 0 -1 -1
T 18000 1100 15 8 1 0 0 4 1
9
T 20000 1100 15 8 1 0 0 4 1
10
T 22000 1100 15 8 1 0 0 4 1
11
L 19000 1200 19000 1000 15 0 0 0 -1 -1
L 21000 1200 21000 1000 15 0 0 0 -1 -1
T 22900 2000 15 8 1 0 0 4 1
A
T 22900 4000 15 8 1 0 0 4 1
B
T 22900 6000 15 8 1 0 0 4 1
C
T 22900 8000 15 8 1 0 0 4 1
D
T 22900 10000 15 8 1 0 0 4 1
E
T 22900 12000 15 8 1 0 0 4 1
F
T 22900 14000 15 8 1 0 0 4 1
G
T 22900 16000 15 8 1 0 0 4 1
H
T 22900 17500 15 8 1 0 0 4 1
I
L 23000 3000 22800 3000 15 0 0 0 -1 -1
L 23000 5000 22800 5000 15 0 0 0 -1 -1
L 23000 7000 22800 7000 15 0 0 0 -1 -1
L 23000 9000 22800 9000 15 0 0 0 -1 -1
L 23000 11000 22800 11000 15 0 0 0 -1 -1
L 23000 13000 22800 13000 15 0 0 0 -1 -1
L 23000 15000 22800 15000 15 0 0 0 -1 -1
L 23000 17000 22800 17000 15 0 0 0 -1 -1
T 1100 17500 15 8 1 0 0 4 1
I
T 1100 16000 15 8 1 0 0 4 1
H
T 1100 14000 15 8 1 0 0 4 1
G
T 1100 12000 15 8 1 0 0 4 1
F
L 1200 17000 1000 17000 15 0 0 0 -1 -1
L 1200 15000 1000 15000 15 0 0 0 -1 -1
L 1200 13000 1000 13000 15 0 0 0 -1 -1
T 16000 1100 15 8 1 0 0 4 1
8
T 14000 1100 15 8 1 0 0 4 1
7
T 12000 1100 15 8 1 0 0 4 1
6
T 10000 1100 15 8 1 0 0 4 1
5
T 8000 1100 15 8 1 0 0 4 1
4
T 6000 1100 15 8 1 0 0 4 1
3
T 4000 1100 15 8 1 0 0 4 1
2
T 2000 1100 15 8 1 0 0 4 1
1
T 1100 2000 15 8 1 0 0 4 1
A
T 1100 4000 15 8 1 0 0 4 1
B
T 1100 6000 15 8 1 0 0 4 1
C
T 1100 8000 15 8 1 0 0 4 1
D
T 1100 10000 15 8 1 0 0 4 1
E
B 1200 1200 21600 16600 15 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
L 17000 1200 17000 1000 15 0 0 0 -1 -1
L 15000 1200 15000 1000 15 0 0 0 -1 -1
L 13000 1200 13000 1000 15 0 0 0 -1 -1
L 11000 1200 11000 1000 15 0 0 0 -1 -1
L 9000 1200 9000 1000 15 0 0 0 -1 -1
L 7000 1200 7000 1000 15 0 0 0 -1 -1
L 5000 1200 5000 1000 15 0 0 0 -1 -1
L 3000 1200 3000 1000 15 0 0 0 -1 -1
L 1200 3000 1000 3000 15 0 0 0 -1 -1
L 1200 5000 1000 5000 15 0 0 0 -1 -1
L 1200 7000 1000 7000 15 0 0 0 -1 -1
L 1200 9000 1000 9000 15 0 0 0 -1 -1
L 1200 11000 1000 11000 15 0 0 0 -1 -1
L 15200 1800 22800 1800 15 0 0 0 -1 -1
B 15200 1200 7600 1400 15 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 15300 1900 15 8 1 0 0 0 1
TITLE
T 17000 1300 15 8 1 0 0 0 1
OF
T 15300 1300 15 8 1 0 0 0 1
PAGE
T 18800 1300 15 8 1 0 0 0 1
DRAWN BY: 
T 18800 1600 15 8 1 0 0 0 1
REVISION:
T 15300 1600 15 8 1 0 0 0 1
FILE:
L 18700 1800 18700 1200 15 0 0 0 -1 -1
T 15400 2500 5 10 0 0 0 0 1
graphical=1
B 1000 1000 22000 17000 15 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
]
{
T 19800 1300 5 10 1 1 0 0 1
author=Eric Brombaugh
T 15900 1600 5 10 1 1 0 0 1
file=bone_fpga_4l_pg1.sch
}
T 15900 1300 9 10 1 0 0 0 1
1
T 17400 1300 9 10 1 0 0 0 1
3
T 19800 1600 9 10 1 0 0 0 1
-
T 16000 2000 9 10 1 0 0 0 1
Beaglebone FPGA board V1.5: Beaglebone Interface
C 5700 4100 1 0 0 EMBEDDED3.3V-plus-1.sym
[
P 5900 4100 5900 4300 1 0 0
{
T 5950 4150 5 6 0 1 0 0 1
pinnumber=1
T 5950 4150 5 6 0 0 0 0 1
pinseq=1
T 5950 4150 5 6 0 1 0 0 1
pinlabel=1
T 5950 4150 5 6 0 1 0 0 1
pintype=pwr
}
L 5750 4300 6050 4300 3 0 0 0 -1 -1
T 5775 4350 9 8 1 0 0 0 1
+3.3V
T 6000 4100 8 8 0 0 0 0 1
net=+3.3V:1
]
C 2300 2900 1 270 0 EMBEDDEDcapacitor-2.sym
[
P 2500 2900 2500 2700 1 0 0
{
T 2550 2750 5 8 1 1 270 6 1
pinnumber=1
T 2450 2700 5 8 0 1 270 8 1
pinseq=1
T 2500 2650 9 8 0 1 270 0 1
pinlabel=+
T 2500 2650 5 8 0 1 270 2 1
pintype=pas
}
P 2500 2000 2500 2200 1 0 0
{
T 2550 2150 5 8 1 1 270 0 1
pinnumber=2
T 2450 2200 5 8 0 1 270 2 1
pinseq=2
T 2500 2250 9 8 0 1 270 6 1
pinlabel=-
T 2500 2250 5 8 0 1 270 8 1
pintype=pas
}
L 2700 2500 2300 2500 3 0 0 0 -1 -1
L 2500 2200 2500 2400 3 0 0 0 -1 -1
L 2500 2500 2500 2700 3 0 0 0 -1 -1
A 2500 1700 700 75 30 3 0 0 0 -1 -1
L 2700 2611 2600 2611 3 0 0 0 -1 -1
L 2649 2560 2649 2660 3 0 0 0 -1 -1
T 3000 2700 5 10 0 0 270 0 1
device=POLARIZED_CAPACITOR
T 2800 2700 8 10 0 1 270 0 1
refdes=C?
T 3600 2700 5 10 0 0 270 0 1
description=polarized capacitor
T 3400 2700 5 10 0 0 270 0 1
numslots=0
T 3200 2700 5 10 0 0 270 0 1
symversion=0.1
]
{
T 3000 2700 5 10 0 0 270 0 1
device=POLARIZED_CAPACITOR
T 1700 2600 5 10 1 1 0 0 1
refdes=C101
T 3200 2700 5 10 0 0 270 0 1
symversion=0.1
T 1400 2400 5 10 1 1 0 0 1
value=10uF 10V
T 2300 2900 5 10 0 0 0 0 1
footprint=1206_pol
}
C 2300 6400 1 0 0 EMBEDDED5V-plus-1.sym
[
P 2500 6400 2500 6600 1 0 0
{
T 2550 6450 5 6 0 1 0 0 1
pinnumber=1
T 2550 6450 5 6 0 0 0 0 1
pinseq=1
T 2550 6450 5 6 0 1 0 0 1
pinlabel=1
T 2550 6450 5 6 0 1 0 0 1
pintype=pwr
}
L 2350 6600 2650 6600 3 0 0 0 -1 -1
T 2375 6650 9 8 1 0 0 0 1
+5V
T 2600 6400 8 8 0 0 0 0 1
net=+5V:1
]
C 2400 1700 1 0 0 EMBEDDEDgnd-1.sym
[
P 2500 1800 2500 2000 1 0 1
{
T 2558 1861 5 4 0 1 0 0 1
pinnumber=1
T 2558 1861 5 4 0 0 0 0 1
pinseq=1
T 2558 1861 5 4 0 1 0 0 1
pinlabel=1
T 2558 1861 5 4 0 1 0 0 1
pintype=pwr
}
L 2400 1800 2600 1800 3 0 0 0 -1 -1
L 2455 1750 2545 1750 3 0 0 0 -1 -1
L 2480 1710 2520 1710 3 0 0 0 -1 -1
T 2700 1750 8 10 0 0 0 0 1
net=GND:1
]
N 2500 2900 2500 6400 4
N 2500 2000 5900 2000 4
N 3800 3700 2500 3700 4
N 5900 2900 5900 4100 4
N 4600 2000 4600 3100 4
N 5400 3700 5900 3700 4
N 3800 5900 2500 5900 4
N 2500 5900 2500 3700 4
C 5700 5900 1 270 0 EMBEDDEDcapacitor-2.sym
[
P 5900 5900 5900 5700 1 0 0
{
T 5950 5750 5 8 1 1 270 6 1
pinnumber=1
T 5850 5700 5 8 0 1 270 8 1
pinseq=1
T 5900 5650 9 8 0 1 270 0 1
pinlabel=+
T 5900 5650 5 8 0 1 270 2 1
pintype=pas
}
P 5900 5000 5900 5200 1 0 0
{
T 5950 5150 5 8 1 1 270 0 1
pinnumber=2
T 5850 5200 5 8 0 1 270 2 1
pinseq=2
T 5900 5250 9 8 0 1 270 6 1
pinlabel=-
T 5900 5250 5 8 0 1 270 8 1
pintype=pas
}
L 6100 5500 5700 5500 3 0 0 0 -1 -1
L 5900 5200 5900 5400 3 0 0 0 -1 -1
L 5900 5500 5900 5700 3 0 0 0 -1 -1
A 5900 4700 700 75 30 3 0 0 0 -1 -1
L 6100 5611 6000 5611 3 0 0 0 -1 -1
L 6049 5560 6049 5660 3 0 0 0 -1 -1
T 6400 5700 5 10 0 0 270 0 1
device=POLARIZED_CAPACITOR
T 6200 5700 8 10 0 1 270 0 1
refdes=C?
T 7000 5700 5 10 0 0 270 0 1
description=polarized capacitor
T 6800 5700 5 10 0 0 270 0 1
numslots=0
T 6600 5700 5 10 0 0 270 0 1
symversion=0.1
]
{
T 6400 5700 5 10 0 0 270 0 1
device=POLARIZED_CAPACITOR
T 6200 5500 5 10 1 1 0 0 1
refdes=C103
T 6200 5300 5 10 1 1 0 0 1
value=10uF 10V
T 5700 5900 5 10 0 0 0 0 1
footprint=1206_pol
}
C 4500 4700 1 0 0 EMBEDDEDgnd-1.sym
[
P 4600 4800 4600 5000 1 0 1
{
T 4658 4861 5 4 0 1 0 0 1
pinnumber=1
T 4658 4861 5 4 0 0 0 0 1
pinseq=1
T 4658 4861 5 4 0 1 0 0 1
pinlabel=1
T 4658 4861 5 4 0 1 0 0 1
pintype=pwr
}
L 4500 4800 4700 4800 3 0 0 0 -1 -1
L 4555 4750 4645 4750 3 0 0 0 -1 -1
L 4580 4710 4620 4710 3 0 0 0 -1 -1
T 4800 4750 8 10 0 0 0 0 1
net=GND:1
]
N 4600 5300 4600 5000 4
N 5900 5000 4600 5000 4
C 7700 5800 1 0 1 EMBEDDEDinput-1.sym
[
P 7100 5900 6900 5900 1 0 1
{
T 7250 5850 5 6 0 1 0 6 1
pinnumber=1
T 7250 5850 5 6 0 0 0 6 1
pinseq=1
}
L 7700 6000 7700 5800 3 0 0 0 -1 -1
L 7700 6000 7200 6000 3 0 0 0 -1 -1
L 7200 6000 7100 5900 3 0 0 0 -1 -1
L 7100 5900 7200 5800 3 0 0 0 -1 -1
L 7200 5800 7700 5800 3 0 0 0 -1 -1
T 7700 6100 5 10 0 0 0 6 1
device=INPUT
]
{
T 7700 6100 5 10 0 0 0 6 1
device=INPUT
T 7200 6200 5 10 1 1 180 6 1
value=VCCINT
T 7700 5800 5 10 0 0 90 2 1
net=VCCINT:1
}
N 5400 5900 6900 5900 4
C 3800 5300 1 0 0 EMBEDDEDlm1117-1.sym
[
B 4100 5600 1000 600 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
P 4100 5900 3800 5900 1 0 1
{
T 3900 5950 5 8 1 1 0 0 1
pinnumber=3
T 3900 5950 5 8 0 0 0 0 1
pinseq=3
T 4100 5900 5 10 1 1 0 0 1
value=IN
}
P 4600 5300 4600 5600 1 0 0
{
T 4500 5400 5 8 1 1 0 0 1
pinnumber=1
T 4500 5400 5 8 0 0 0 0 1
pinseq=1
T 4400 5700 5 10 1 1 0 0 1
value=GND
}
P 5100 5900 5400 5900 1 0 1
{
T 5230 5950 5 8 1 1 0 0 1
pinnumber=2
T 5230 5950 5 8 0 0 0 0 1
pinseq=2
T 4700 5900 5 10 1 1 0 0 1
value=OUT
}
T 5400 6600 5 10 0 0 0 0 1
device=1117
T 5200 6300 8 10 0 1 0 6 1
refdes=U?
T 5400 6400 5 10 0 0 0 0 1
pins=3
T 3795 5295 8 10 0 1 0 0 1
footprint=TO220
]
{
T 4700 6300 5 10 1 1 0 0 1
device=ZLDO1117
T 4500 6300 5 10 1 1 0 6 1
refdes=U103
T 3795 5295 5 10 0 1 0 0 1
footprint=SOT223
T 5600 6300 5 10 1 1 0 0 1
value=1.2V
}
C 3800 3100 1 0 0 EMBEDDEDlm1117-1.sym
[
B 4100 3400 1000 600 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
P 4100 3700 3800 3700 1 0 1
{
T 3900 3750 5 8 1 1 0 0 1
pinnumber=3
T 3900 3750 5 8 0 0 0 0 1
pinseq=3
T 4100 3700 5 10 1 1 0 0 1
value=IN
}
P 4600 3100 4600 3400 1 0 0
{
T 4500 3200 5 8 1 1 0 0 1
pinnumber=1
T 4500 3200 5 8 0 0 0 0 1
pinseq=1
T 4400 3500 5 10 1 1 0 0 1
value=GND
}
P 5100 3700 5400 3700 1 0 1
{
T 5230 3750 5 8 1 1 0 0 1
pinnumber=2
T 5230 3750 5 8 0 0 0 0 1
pinseq=2
T 4700 3700 5 10 1 1 0 0 1
value=OUT
}
T 5400 4400 5 10 0 0 0 0 1
device=1117
T 5200 4100 8 10 0 1 0 6 1
refdes=U?
T 5400 4200 5 10 0 0 0 0 1
pins=3
T 3795 3095 8 10 0 1 0 0 1
footprint=TO220
]
{
T 4600 4100 5 10 1 1 0 0 1
device=LM1117
T 4500 4100 5 10 1 1 0 6 1
refdes=U101
T 3795 3095 5 10 0 1 0 0 1
footprint=SOT223
T 5300 4100 5 10 1 1 0 0 1
value=3.3V
}
T 6000 6000 9 10 1 0 0 0 1
+1.2V
T 4600 17000 9 10 1 0 0 0 2
BeagleBone Expansion
Connector P8
C 14700 15400 1 0 0 EMBEDDED5V-plus-1.sym
[
T 15000 15400 8 8 0 0 0 0 1
net=+5V:1
T 14775 15650 9 8 1 0 0 0 1
+5V
L 14750 15600 15050 15600 3 0 0 0 -1 -1
P 14900 15400 14900 15600 1 0 0
{
T 14950 15450 5 6 0 1 0 0 1
pinnumber=1
T 14950 15450 5 6 0 0 0 0 1
pinseq=1
T 14950 15450 5 6 0 1 0 0 1
pinlabel=1
T 14950 15450 5 6 0 1 0 0 1
pintype=pwr
}
]
N 12900 2700 15000 2700 4
{
T 14100 2700 5 10 1 1 0 0 1
netname=I2C2_SCL
}
N 13400 2700 13400 3400 4
N 12900 2500 15000 2500 4
{
T 14100 2500 5 10 1 1 0 0 1
netname=I2C2_SDA
}
N 13900 2500 13900 3400 4
N 8800 4300 13900 4300 4
C 10500 1500 1 0 0 EMBEDDEDgnd-1.sym
[
L 10580 1510 10620 1510 3 0 0 0 -1 -1
L 10555 1550 10645 1550 3 0 0 0 -1 -1
L 10500 1600 10700 1600 3 0 0 0 -1 -1
P 10600 1600 10600 1800 1 0 1
{
T 10658 1661 5 4 0 1 0 0 1
pinnumber=1
T 10658 1661 5 4 0 0 0 0 1
pinseq=1
T 10658 1661 5 4 0 1 0 0 1
pinlabel=1
T 10658 1661 5 4 0 1 0 0 1
pintype=pwr
}
T 10800 1550 8 10 0 0 0 0 1
net=GND:1
]
N 10600 1800 10600 3400 4
C 10800 3400 1 90 0 EMBEDDEDcapacitor-1.sym
[
L 10600 3800 10600 3600 3 0 0 0 -1 -1
L 10600 4100 10600 3900 3 0 0 0 -1 -1
L 10400 3900 10800 3900 3 0 0 0 -1 -1
L 10400 3800 10800 3800 3 0 0 0 -1 -1
P 10600 4300 10600 4100 1 0 0
{
T 10600 4100 5 8 0 1 90 8 1
pintype=pas
T 10600 4100 9 8 0 1 90 6 1
pinlabel=2
T 10650 4150 5 8 0 1 90 2 1
pinseq=2
T 10550 4150 5 8 0 1 90 0 1
pinnumber=2
}
P 10600 3400 10600 3600 1 0 0
{
T 10600 3600 5 8 0 1 90 2 1
pintype=pas
T 10600 3600 9 8 0 1 90 0 1
pinlabel=1
T 10650 3550 5 8 0 1 90 8 1
pinseq=1
T 10550 3550 5 8 0 1 90 6 1
pinnumber=1
}
T 9900 3600 5 10 0 0 90 0 1
symversion=0.1
T 9700 3600 5 10 0 0 90 0 1
numslots=0
T 9500 3600 5 10 0 0 90 0 1
description=capacitor
T 10300 3600 8 10 0 1 90 0 1
refdes=C?
T 10100 3600 5 10 0 0 90 0 1
device=CAPACITOR
]
{
T 10100 3600 5 10 0 0 90 0 1
device=CAPACITOR
T 10400 4000 5 10 1 1 180 0 1
refdes=C104
T 9900 3600 5 10 1 1 0 0 1
value=0.1uf
T 10800 3400 5 10 0 0 0 0 1
footprint=0603
}
N 12900 3100 12900 4300 4
C 10900 2400 1 0 0 EMBEDDED24AA256.sym
[
T 11895 3400 8 10 0 1 0 0 1
device=24AA256
T 11195 3400 8 10 0 1 0 0 1
refdes=U?
T 10895 2400 8 10 0 1 0 0 1
footprint=TSSOP-65P-640L1-8N
P 12900 2500 12600 2500 1 0 0
{
T 13000 2500 5 10 0 0 0 6 1
pintype=pas
T 12545 2495 5 10 1 1 0 6 1
pinlabel=SDA
T 12695 2545 5 10 1 1 0 0 1
pinnumber=5
T 13000 2500 5 10 0 0 0 6 1
pinseq=5
}
P 10900 2500 11200 2500 1 0 0
{
T 10800 2500 5 10 0 0 0 0 1
pintype=pas
T 11255 2495 5 10 1 1 0 0 1
pinlabel=VSS
T 11105 2545 5 10 1 1 0 6 1
pinnumber=4
T 10800 2500 5 10 0 0 0 0 1
pinseq=4
}
P 10900 2700 11200 2700 1 0 0
{
T 10800 2700 5 10 0 0 0 0 1
pintype=pas
T 11255 2695 5 10 1 1 0 0 1
pinlabel=A2
T 11105 2745 5 10 1 1 0 6 1
pinnumber=3
T 10800 2700 5 10 0 0 0 0 1
pinseq=3
}
P 10900 2900 11200 2900 1 0 0
{
T 10800 2900 5 10 0 0 0 0 1
pintype=pas
T 11255 2895 5 10 1 1 0 0 1
pinlabel=A1
T 11105 2945 5 10 1 1 0 6 1
pinnumber=2
T 10800 2900 5 10 0 0 0 0 1
pinseq=2
}
P 10900 3100 11200 3100 1 0 0
{
T 10800 3100 5 10 0 0 0 0 1
pintype=pas
T 11255 3095 5 10 1 1 0 0 1
pinlabel=A0
T 11105 3145 5 10 1 1 0 6 1
pinnumber=1
T 10800 3100 5 10 0 0 0 0 1
pinseq=1
}
P 12600 2700 12900 2700 1 0 1
{
T 12750 2750 5 10 1 1 0 0 1
pinnumber=6
T 12750 2750 5 10 0 0 0 0 1
pinseq=6
T 12550 2650 5 10 1 1 0 6 1
pinlabel=SCL
T 12750 2750 5 10 0 1 0 0 1
pintype=pas
}
P 12600 2900 12900 2900 1 0 1
{
T 12750 2950 5 10 1 1 0 0 1
pinnumber=7
T 12750 2950 5 10 0 0 0 0 1
pinseq=7
T 12550 2850 5 10 1 1 0 6 1
pinlabel=WP
T 12750 2950 5 10 0 1 0 0 1
pintype=pas
}
B 11200 2400 1400 900 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
P 12600 3100 12900 3100 1 0 1
{
T 12750 3150 5 10 1 1 0 0 1
pinnumber=8
T 12750 3150 5 10 0 0 0 0 1
pinseq=8
T 12550 3050 5 10 1 1 0 6 1
pinlabel=VDD
T 12750 3150 5 10 0 1 0 0 1
pintype=pas
}
]
{
T 10895 2400 5 10 0 1 0 0 1
footprint=SO8
T 11195 3400 5 10 1 1 0 0 1
refdes=U104
T 11895 3400 5 10 1 1 0 0 1
device=24C256W
}
T 11200 2200 9 10 1 0 0 0 1
I2C Address 0x50
C 18600 4800 1 0 0 EMBEDDEDoutput-1.sym
[
P 18600 4900 18800 4900 1 0 0
{
T 18850 4850 5 6 0 1 0 0 1
pinnumber=1
T 18850 4850 5 6 0 0 0 0 1
pinseq=1
}
L 18800 5000 18800 4800 3 0 0 0 -1 -1
L 18800 5000 19300 5000 3 0 0 0 -1 -1
L 19300 5000 19400 4900 3 0 0 0 -1 -1
L 19400 4900 19300 4800 3 0 0 0 -1 -1
L 19300 4800 18800 4800 3 0 0 0 -1 -1
T 18700 5100 5 10 0 0 0 0 1
device=OUTPUT
]
{
T 18700 5100 5 10 0 0 0 0 1
device=OUTPUT
T 19500 4800 5 10 1 1 0 0 1
value=I2C2_SCL
T 18600 4800 5 10 0 1 180 0 1
net=I2C2_SCL:1
}
C 18600 5200 1 0 0 EMBEDDEDoutput-1.sym
[
P 18600 5300 18800 5300 1 0 0
{
T 18850 5250 5 6 0 1 0 0 1
pinnumber=1
T 18850 5250 5 6 0 0 0 0 1
pinseq=1
}
L 18800 5400 18800 5200 3 0 0 0 -1 -1
L 18800 5400 19300 5400 3 0 0 0 -1 -1
L 19300 5400 19400 5300 3 0 0 0 -1 -1
L 19400 5300 19300 5200 3 0 0 0 -1 -1
L 19300 5200 18800 5200 3 0 0 0 -1 -1
T 18700 5500 5 10 0 0 0 0 1
device=OUTPUT
]
{
T 18700 5500 5 10 0 0 0 0 1
device=OUTPUT
T 19500 5200 5 10 1 1 0 0 1
value=I2C2_SDA
T 18600 5200 5 10 0 1 180 0 1
net=I2C2_SDA:1
}
C 6200 16800 1 180 0 EMBEDDEDheader46-1.sym
[
T 4600 12200 8 10 0 0 180 0 1
device=HEADER46
T 4600 12000 8 10 0 0 180 0 1
class=IO
T 4600 11800 8 10 0 0 180 0 1
pins=34
P 5100 16600 4800 16600 1 0 1
{
T 4950 16550 5 8 1 1 180 0 1
pinnumber=1
T 4950 16550 5 8 0 0 180 0 1
pinseq=1
T 4950 16550 5 8 0 1 180 0 1
pinlabel=1
T 4950 16550 5 8 0 1 180 0 1
pintype=pas
}
P 6200 16600 5900 16600 1 0 0
{
T 6000 16550 5 8 1 1 180 6 1
pinnumber=2
T 6000 16550 5 8 0 0 180 6 1
pinseq=2
T 6000 16550 5 8 0 1 180 6 1
pinlabel=2
T 6000 16550 5 8 0 1 180 6 1
pintype=pas
}
P 5100 16200 4800 16200 1 0 1
{
T 4950 16150 5 8 1 1 180 0 1
pinnumber=3
T 4950 16150 5 8 0 0 180 0 1
pinseq=3
T 4950 16150 5 8 0 1 180 0 1
pinlabel=3
T 4950 16150 5 8 0 1 180 0 1
pintype=pas
}
P 6200 16200 5900 16200 1 0 0
{
T 6000 16150 5 8 1 1 180 6 1
pinnumber=4
T 6000 16150 5 8 0 0 180 6 1
pinseq=4
T 6000 16150 5 8 0 1 180 6 1
pinlabel=4
T 6000 16150 5 8 0 1 180 6 1
pintype=pas
}
P 5100 15800 4800 15800 1 0 1
{
T 4950 15750 5 8 1 1 180 0 1
pinnumber=5
T 4950 15750 5 8 0 0 180 0 1
pinseq=5
T 4950 15750 5 8 0 1 180 0 1
pinlabel=5
T 4950 15750 5 8 0 1 180 0 1
pintype=pas
}
P 6200 15800 5900 15800 1 0 0
{
T 6000 15750 5 8 1 1 180 6 1
pinnumber=6
T 6000 15750 5 8 0 0 180 6 1
pinseq=6
T 6000 15750 5 8 0 1 180 6 1
pinlabel=6
T 6000 15750 5 8 0 1 180 6 1
pintype=pas
}
P 5100 15400 4800 15400 1 0 1
{
T 4950 15350 5 8 1 1 180 0 1
pinnumber=7
T 4950 15350 5 8 0 0 180 0 1
pinseq=7
T 4950 15350 5 8 0 1 180 0 1
pinlabel=7
T 4950 15350 5 8 0 1 180 0 1
pintype=pas
}
P 6200 15400 5900 15400 1 0 0
{
T 6000 15350 5 8 1 1 180 6 1
pinnumber=8
T 6000 15350 5 8 0 0 180 6 1
pinseq=8
T 6000 15350 5 8 0 1 180 6 1
pinlabel=8
T 6000 15350 5 8 0 1 180 6 1
pintype=pas
}
P 5100 15000 4800 15000 1 0 1
{
T 4950 14950 5 8 1 1 180 0 1
pinnumber=9
T 4950 14950 5 8 0 0 180 0 1
pinseq=9
T 4950 14950 5 8 0 1 180 0 1
pinlabel=9
T 4950 14950 5 8 0 1 180 0 1
pintype=pas
}
P 6200 15000 5900 15000 1 0 0
{
T 6000 14950 5 8 1 1 180 6 1
pinnumber=10
T 6000 14950 5 8 0 0 180 6 1
pinseq=10
T 6000 14950 5 8 0 1 180 6 1
pinlabel=10
T 6000 14950 5 8 0 1 180 6 1
pintype=pas
}
P 5100 14600 4800 14600 1 0 1
{
T 4950 14550 5 8 1 1 180 0 1
pinnumber=11
T 4950 14550 5 8 0 0 180 0 1
pinseq=11
T 4950 14550 5 8 0 1 180 0 1
pinlabel=11
T 4950 14550 5 8 0 1 180 0 1
pintype=pas
}
P 6200 14600 5900 14600 1 0 0
{
T 6000 14550 5 8 1 1 180 6 1
pinnumber=12
T 6000 14550 5 8 0 0 180 6 1
pinseq=12
T 6000 14550 5 8 0 1 180 6 1
pinlabel=12
T 6000 14550 5 8 0 1 180 6 1
pintype=pas
}
P 5100 14200 4800 14200 1 0 1
{
T 4950 14150 5 8 1 1 180 0 1
pinnumber=13
T 4950 14150 5 8 0 0 180 0 1
pinseq=13
T 4950 14150 5 8 0 1 180 0 1
pinlabel=13
T 4950 14150 5 8 0 1 180 0 1
pintype=pas
}
P 6200 14200 5900 14200 1 0 0
{
T 6000 14150 5 8 1 1 180 6 1
pinnumber=14
T 6000 14150 5 8 0 0 180 6 1
pinseq=14
T 6000 14150 5 8 0 1 180 6 1
pinlabel=14
T 6000 14150 5 8 0 1 180 6 1
pintype=pas
}
P 5100 13800 4800 13800 1 0 1
{
T 4950 13750 5 8 1 1 180 0 1
pinnumber=15
T 4950 13750 5 8 0 0 180 0 1
pinseq=15
T 4950 13750 5 8 0 1 180 0 1
pinlabel=15
T 4950 13750 5 8 0 1 180 0 1
pintype=pas
}
P 6200 13800 5900 13800 1 0 0
{
T 6000 13750 5 8 1 1 180 6 1
pinnumber=16
T 6000 13750 5 8 0 0 180 6 1
pinseq=16
T 6000 13750 5 8 0 1 180 6 1
pinlabel=16
T 6000 13750 5 8 0 1 180 6 1
pintype=pas
}
P 5100 13400 4800 13400 1 0 1
{
T 4950 13350 5 8 1 1 180 0 1
pinnumber=17
T 4950 13350 5 8 0 0 180 0 1
pinseq=17
T 4950 13350 5 8 0 1 180 0 1
pinlabel=17
T 4950 13350 5 8 0 1 180 0 1
pintype=pas
}
P 6200 13400 5900 13400 1 0 0
{
T 6000 13350 5 8 1 1 180 6 1
pinnumber=18
T 6000 13350 5 8 0 0 180 6 1
pinseq=18
T 6000 13350 5 8 0 1 180 6 1
pinlabel=18
T 6000 13350 5 8 0 1 180 6 1
pintype=pas
}
P 5100 13000 4800 13000 1 0 1
{
T 4950 12950 5 8 1 1 180 0 1
pinnumber=19
T 4950 12950 5 8 0 0 180 0 1
pinseq=19
T 4950 12950 5 8 0 1 180 0 1
pinlabel=19
T 4950 12950 5 8 0 1 180 0 1
pintype=pas
}
P 6200 13000 5900 13000 1 0 0
{
T 6000 12950 5 8 1 1 180 6 1
pinnumber=20
T 6000 12950 5 8 0 0 180 6 1
pinseq=20
T 6000 12950 5 8 0 1 180 6 1
pinlabel=20
T 6000 12950 5 8 0 1 180 6 1
pintype=pas
}
P 5100 12600 4800 12600 1 0 1
{
T 4950 12550 5 8 1 1 180 0 1
pinnumber=21
T 4950 12550 5 8 0 0 180 0 1
pinseq=21
T 4950 12550 5 8 0 1 180 0 1
pinlabel=21
T 4950 12550 5 8 0 1 180 0 1
pintype=pas
}
P 6200 12600 5900 12600 1 0 0
{
T 6000 12550 5 8 1 1 180 6 1
pinnumber=22
T 6000 12550 5 8 0 0 180 6 1
pinseq=22
T 6000 12550 5 8 0 1 180 6 1
pinlabel=22
T 6000 12550 5 8 0 1 180 6 1
pintype=pas
}
P 5100 12200 4800 12200 1 0 1
{
T 4950 12150 5 8 1 1 180 0 1
pinnumber=23
T 4950 12150 5 8 0 0 180 0 1
pinseq=23
T 4950 12150 5 8 0 1 180 0 1
pinlabel=23
T 4950 12150 5 8 0 1 180 0 1
pintype=pas
}
P 6200 12200 5900 12200 1 0 0
{
T 6000 12150 5 8 1 1 180 6 1
pinnumber=24
T 6000 12150 5 8 0 0 180 6 1
pinseq=24
T 6000 12150 5 8 0 1 180 6 1
pinlabel=24
T 6000 12150 5 8 0 1 180 6 1
pintype=pas
}
P 5100 11800 4800 11800 1 0 1
{
T 4950 11750 5 8 1 1 180 0 1
pinnumber=25
T 4950 11750 5 8 0 0 180 0 1
pinseq=25
T 4950 11750 5 8 0 1 180 0 1
pinlabel=25
T 4950 11750 5 8 0 1 180 0 1
pintype=pas
}
P 6200 11800 5900 11800 1 0 0
{
T 6000 11750 5 8 1 1 180 6 1
pinnumber=26
T 6000 11750 5 8 0 0 180 6 1
pinseq=26
T 6000 11750 5 8 0 1 180 6 1
pinlabel=26
T 6000 11750 5 8 0 1 180 6 1
pintype=pas
}
B 5100 7600 800 9200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
L 5900 14400 5100 14400 3 0 0 0 -1 -1
L 5500 7600 5500 16800 3 0 0 0 -1 -1
L 5900 16400 5100 16400 3 0 0 0 -1 -1
L 5900 15200 5100 15200 3 0 0 0 -1 -1
L 5900 15600 5100 15600 3 0 0 0 -1 -1
L 5900 14800 5100 14800 3 0 0 0 -1 -1
L 5900 16000 5100 16000 3 0 0 0 -1 -1
L 5900 13200 5100 13200 3 0 0 0 -1 -1
L 5900 13600 5100 13600 3 0 0 0 -1 -1
L 5900 12800 5100 12800 3 0 0 0 -1 -1
L 5900 12000 5100 12000 3 0 0 0 -1 -1
L 5900 12400 5100 12400 3 0 0 0 -1 -1
L 5900 14000 5100 14000 3 0 0 0 -1 -1
P 5100 11400 4800 11400 1 0 1
{
T 4950 11350 5 8 1 1 180 0 1
pinnumber=27
T 4950 11350 5 8 0 0 180 0 1
pinseq=27
T 4950 11350 5 8 0 1 180 0 1
pinlabel=27
T 4950 11350 5 8 0 1 180 0 1
pintype=pas
}
L 5900 11200 5100 11200 3 0 0 0 -1 -1
P 6200 11400 5900 11400 1 0 0
{
T 6000 11350 5 8 1 1 180 6 1
pinnumber=28
T 6000 11350 5 8 0 0 180 6 1
pinseq=28
T 6000 11350 5 8 0 1 180 6 1
pinlabel=28
T 6000 11350 5 8 0 1 180 6 1
pintype=pas
}
L 5900 11600 5100 11600 3 0 0 0 -1 -1
L 5900 11600 5100 11600 3 0 0 0 -1 -1
P 5100 11000 4800 11000 1 0 1
{
T 4950 10950 5 8 1 1 180 0 1
pinnumber=29
T 4950 10950 5 8 0 0 180 0 1
pinseq=29
T 4950 10950 5 8 0 1 180 0 1
pinlabel=29
T 4950 10950 5 8 0 1 180 0 1
pintype=pas
}
P 6200 11000 5900 11000 1 0 0
{
T 6000 10950 5 8 1 1 180 6 1
pinnumber=30
T 6000 10950 5 8 0 0 180 6 1
pinseq=30
T 6000 10950 5 8 0 1 180 6 1
pinlabel=30
T 6000 10950 5 8 0 1 180 6 1
pintype=pas
}
P 5100 10600 4800 10600 1 0 1
{
T 4950 10550 5 8 1 1 180 0 1
pinnumber=31
T 4950 10550 5 8 0 0 180 0 1
pinseq=31
T 4950 10550 5 8 0 1 180 0 1
pinlabel=31
T 4950 10550 5 8 0 1 180 0 1
pintype=pas
}
P 6200 10600 5900 10600 1 0 0
{
T 6000 10550 5 8 1 1 180 6 1
pinnumber=32
T 6000 10550 5 8 0 0 180 6 1
pinseq=32
T 6000 10550 5 8 0 1 180 6 1
pinlabel=32
T 6000 10550 5 8 0 1 180 6 1
pintype=pas
}
P 5100 10200 4800 10200 1 0 1
{
T 4950 10150 5 8 1 1 180 0 1
pinnumber=33
T 4950 10150 5 8 0 0 180 0 1
pinseq=33
T 4950 10150 5 8 0 1 180 0 1
pinlabel=33
T 4950 10150 5 8 0 1 180 0 1
pintype=pas
}
P 6200 10200 5900 10200 1 0 0
{
T 6000 10150 5 8 1 1 180 6 1
pinnumber=34
T 6000 10150 5 8 0 0 180 6 1
pinseq=16
T 6000 10150 5 8 0 1 180 6 1
pinlabel=16
T 6000 10150 5 8 0 1 180 6 1
pintype=pas
}
P 5100 9800 4800 9800 1 0 1
{
T 4950 9750 5 8 1 1 180 0 1
pinnumber=35
T 4950 9750 5 8 0 0 180 0 1
pinseq=35
T 4950 9750 5 8 0 1 180 0 1
pinlabel=35
T 4950 9750 5 8 0 1 180 0 1
pintype=pas
}
P 6200 9800 5900 9800 1 0 0
{
T 6000 9750 5 8 1 1 180 6 1
pinnumber=36
T 6000 9750 5 8 0 0 180 6 1
pinseq=36
T 6000 9750 5 8 0 1 180 6 1
pinlabel=36
T 6000 9750 5 8 0 1 180 6 1
pintype=pas
}
P 5100 9400 4800 9400 1 0 1
{
T 4950 9350 5 8 1 1 180 0 1
pinnumber=37
T 4950 9350 5 8 0 0 180 0 1
pinseq=37
T 4950 9350 5 8 0 1 180 0 1
pinlabel=37
T 4950 9350 5 8 0 1 180 0 1
pintype=pas
}
P 6200 9400 5900 9400 1 0 0
{
T 6000 9350 5 8 1 1 180 6 1
pinnumber=38
T 6000 9350 5 8 0 0 180 6 1
pinseq=38
T 6000 9350 5 8 0 1 180 6 1
pinlabel=38
T 6000 9350 5 8 0 1 180 6 1
pintype=pas
}
P 5100 9000 4800 9000 1 0 1
{
T 4950 8950 5 8 1 1 180 0 1
pinnumber=39
T 4950 8950 5 8 0 0 180 0 1
pinseq=39
T 4950 8950 5 8 0 1 180 0 1
pinlabel=39
T 4950 8950 5 8 0 1 180 0 1
pintype=pas
}
P 6200 9000 5900 9000 1 0 0
{
T 6000 8950 5 8 1 1 180 6 1
pinnumber=40
T 6000 8950 5 8 0 0 180 6 1
pinseq=40
T 6000 8950 5 8 0 1 180 6 1
pinlabel=40
T 6000 8950 5 8 0 1 180 6 1
pintype=pas
}
P 5100 8600 4800 8600 1 0 1
{
T 4950 8550 5 8 1 1 180 0 1
pinnumber=41
T 4950 8550 5 8 0 0 180 0 1
pinseq=23
T 4950 8550 5 8 0 1 180 0 1
pinlabel=23
T 4950 8550 5 8 0 1 180 0 1
pintype=pas
}
P 6200 8600 5900 8600 1 0 0
{
T 6000 8550 5 8 1 1 180 6 1
pinnumber=42
T 6000 8550 5 8 0 0 180 6 1
pinseq=42
T 6000 8550 5 8 0 1 180 6 1
pinlabel=42
T 6000 8550 5 8 0 1 180 6 1
pintype=pas
}
P 5100 8200 4800 8200 1 0 1
{
T 4950 8150 5 8 1 1 180 0 1
pinnumber=43
T 4950 8150 5 8 0 0 180 0 1
pinseq=43
T 4950 8150 5 8 0 1 180 0 1
pinlabel=43
T 4950 8150 5 8 0 1 180 0 1
pintype=pas
}
P 6200 8200 5900 8200 1 0 0
{
T 6000 8150 5 8 1 1 180 6 1
pinnumber=44
T 6000 8150 5 8 0 0 180 6 1
pinseq=44
T 6000 8150 5 8 0 1 180 6 1
pinlabel=44
T 6000 8150 5 8 0 1 180 6 1
pintype=pas
}
L 5900 10800 5100 10800 3 0 0 0 -1 -1
L 5900 9600 5100 9600 3 0 0 0 -1 -1
L 5900 10000 5100 10000 3 0 0 0 -1 -1
L 5900 9200 5100 9200 3 0 0 0 -1 -1
L 5900 8400 5100 8400 3 0 0 0 -1 -1
L 5900 8800 5100 8800 3 0 0 0 -1 -1
L 5900 10400 5100 10400 3 0 0 0 -1 -1
P 5100 7800 4800 7800 1 0 1
{
T 4950 7750 5 8 1 1 180 0 1
pinnumber=45
T 4950 7750 5 8 0 0 180 0 1
pinseq=45
T 4950 7750 5 8 0 1 180 0 1
pinlabel=45
T 4950 7750 5 8 0 1 180 0 1
pintype=pas
}
L 5900 7600 5100 7600 3 0 0 0 -1 -1
P 6200 7800 5900 7800 1 0 0
{
T 6000 7750 5 8 1 1 180 6 1
pinnumber=46
T 6000 7750 5 8 0 0 180 6 1
pinseq=46
T 6000 7750 5 8 0 1 180 6 1
pinlabel=46
T 6000 7750 5 8 0 1 180 6 1
pintype=pas
}
L 5900 8000 5100 8000 3 0 0 0 -1 -1
L 5900 8000 5100 8000 3 0 0 0 -1 -1
T 5600 7500 8 10 0 1 180 0 1
refdes=J?
]
{
T 4600 12200 5 10 0 0 180 0 1
device=HEADER46
T 5600 7500 5 10 1 1 180 0 1
refdes=J102
T 6200 16800 5 10 0 0 0 0 1
footprint=HEADER46_2
}
C 16600 16800 1 180 0 EMBEDDEDheader46-1.sym
[
T 15000 12200 8 10 0 0 180 0 1
device=HEADER46
T 15000 12000 8 10 0 0 180 0 1
class=IO
T 15000 11800 8 10 0 0 180 0 1
pins=34
P 15500 16600 15200 16600 1 0 1
{
T 15350 16550 5 8 1 1 180 0 1
pinnumber=1
T 15350 16550 5 8 0 0 180 0 1
pinseq=1
T 15350 16550 5 8 0 1 180 0 1
pinlabel=1
T 15350 16550 5 8 0 1 180 0 1
pintype=pas
}
P 16600 16600 16300 16600 1 0 0
{
T 16400 16550 5 8 1 1 180 6 1
pinnumber=2
T 16400 16550 5 8 0 0 180 6 1
pinseq=2
T 16400 16550 5 8 0 1 180 6 1
pinlabel=2
T 16400 16550 5 8 0 1 180 6 1
pintype=pas
}
P 15500 16200 15200 16200 1 0 1
{
T 15350 16150 5 8 1 1 180 0 1
pinnumber=3
T 15350 16150 5 8 0 0 180 0 1
pinseq=3
T 15350 16150 5 8 0 1 180 0 1
pinlabel=3
T 15350 16150 5 8 0 1 180 0 1
pintype=pas
}
P 16600 16200 16300 16200 1 0 0
{
T 16400 16150 5 8 1 1 180 6 1
pinnumber=4
T 16400 16150 5 8 0 0 180 6 1
pinseq=4
T 16400 16150 5 8 0 1 180 6 1
pinlabel=4
T 16400 16150 5 8 0 1 180 6 1
pintype=pas
}
P 15500 15800 15200 15800 1 0 1
{
T 15350 15750 5 8 1 1 180 0 1
pinnumber=5
T 15350 15750 5 8 0 0 180 0 1
pinseq=5
T 15350 15750 5 8 0 1 180 0 1
pinlabel=5
T 15350 15750 5 8 0 1 180 0 1
pintype=pas
}
P 16600 15800 16300 15800 1 0 0
{
T 16400 15750 5 8 1 1 180 6 1
pinnumber=6
T 16400 15750 5 8 0 0 180 6 1
pinseq=6
T 16400 15750 5 8 0 1 180 6 1
pinlabel=6
T 16400 15750 5 8 0 1 180 6 1
pintype=pas
}
P 15500 15400 15200 15400 1 0 1
{
T 15350 15350 5 8 1 1 180 0 1
pinnumber=7
T 15350 15350 5 8 0 0 180 0 1
pinseq=7
T 15350 15350 5 8 0 1 180 0 1
pinlabel=7
T 15350 15350 5 8 0 1 180 0 1
pintype=pas
}
P 16600 15400 16300 15400 1 0 0
{
T 16400 15350 5 8 1 1 180 6 1
pinnumber=8
T 16400 15350 5 8 0 0 180 6 1
pinseq=8
T 16400 15350 5 8 0 1 180 6 1
pinlabel=8
T 16400 15350 5 8 0 1 180 6 1
pintype=pas
}
P 15500 15000 15200 15000 1 0 1
{
T 15350 14950 5 8 1 1 180 0 1
pinnumber=9
T 15350 14950 5 8 0 0 180 0 1
pinseq=9
T 15350 14950 5 8 0 1 180 0 1
pinlabel=9
T 15350 14950 5 8 0 1 180 0 1
pintype=pas
}
P 16600 15000 16300 15000 1 0 0
{
T 16400 14950 5 8 1 1 180 6 1
pinnumber=10
T 16400 14950 5 8 0 0 180 6 1
pinseq=10
T 16400 14950 5 8 0 1 180 6 1
pinlabel=10
T 16400 14950 5 8 0 1 180 6 1
pintype=pas
}
P 15500 14600 15200 14600 1 0 1
{
T 15350 14550 5 8 1 1 180 0 1
pinnumber=11
T 15350 14550 5 8 0 0 180 0 1
pinseq=11
T 15350 14550 5 8 0 1 180 0 1
pinlabel=11
T 15350 14550 5 8 0 1 180 0 1
pintype=pas
}
P 16600 14600 16300 14600 1 0 0
{
T 16400 14550 5 8 1 1 180 6 1
pinnumber=12
T 16400 14550 5 8 0 0 180 6 1
pinseq=12
T 16400 14550 5 8 0 1 180 6 1
pinlabel=12
T 16400 14550 5 8 0 1 180 6 1
pintype=pas
}
P 15500 14200 15200 14200 1 0 1
{
T 15350 14150 5 8 1 1 180 0 1
pinnumber=13
T 15350 14150 5 8 0 0 180 0 1
pinseq=13
T 15350 14150 5 8 0 1 180 0 1
pinlabel=13
T 15350 14150 5 8 0 1 180 0 1
pintype=pas
}
P 16600 14200 16300 14200 1 0 0
{
T 16400 14150 5 8 1 1 180 6 1
pinnumber=14
T 16400 14150 5 8 0 0 180 6 1
pinseq=14
T 16400 14150 5 8 0 1 180 6 1
pinlabel=14
T 16400 14150 5 8 0 1 180 6 1
pintype=pas
}
P 15500 13800 15200 13800 1 0 1
{
T 15350 13750 5 8 1 1 180 0 1
pinnumber=15
T 15350 13750 5 8 0 0 180 0 1
pinseq=15
T 15350 13750 5 8 0 1 180 0 1
pinlabel=15
T 15350 13750 5 8 0 1 180 0 1
pintype=pas
}
P 16600 13800 16300 13800 1 0 0
{
T 16400 13750 5 8 1 1 180 6 1
pinnumber=16
T 16400 13750 5 8 0 0 180 6 1
pinseq=16
T 16400 13750 5 8 0 1 180 6 1
pinlabel=16
T 16400 13750 5 8 0 1 180 6 1
pintype=pas
}
P 15500 13400 15200 13400 1 0 1
{
T 15350 13350 5 8 1 1 180 0 1
pinnumber=17
T 15350 13350 5 8 0 0 180 0 1
pinseq=17
T 15350 13350 5 8 0 1 180 0 1
pinlabel=17
T 15350 13350 5 8 0 1 180 0 1
pintype=pas
}
P 16600 13400 16300 13400 1 0 0
{
T 16400 13350 5 8 1 1 180 6 1
pinnumber=18
T 16400 13350 5 8 0 0 180 6 1
pinseq=18
T 16400 13350 5 8 0 1 180 6 1
pinlabel=18
T 16400 13350 5 8 0 1 180 6 1
pintype=pas
}
P 15500 13000 15200 13000 1 0 1
{
T 15350 12950 5 8 1 1 180 0 1
pinnumber=19
T 15350 12950 5 8 0 0 180 0 1
pinseq=19
T 15350 12950 5 8 0 1 180 0 1
pinlabel=19
T 15350 12950 5 8 0 1 180 0 1
pintype=pas
}
P 16600 13000 16300 13000 1 0 0
{
T 16400 12950 5 8 1 1 180 6 1
pinnumber=20
T 16400 12950 5 8 0 0 180 6 1
pinseq=20
T 16400 12950 5 8 0 1 180 6 1
pinlabel=20
T 16400 12950 5 8 0 1 180 6 1
pintype=pas
}
P 15500 12600 15200 12600 1 0 1
{
T 15350 12550 5 8 1 1 180 0 1
pinnumber=21
T 15350 12550 5 8 0 0 180 0 1
pinseq=21
T 15350 12550 5 8 0 1 180 0 1
pinlabel=21
T 15350 12550 5 8 0 1 180 0 1
pintype=pas
}
P 16600 12600 16300 12600 1 0 0
{
T 16400 12550 5 8 1 1 180 6 1
pinnumber=22
T 16400 12550 5 8 0 0 180 6 1
pinseq=22
T 16400 12550 5 8 0 1 180 6 1
pinlabel=22
T 16400 12550 5 8 0 1 180 6 1
pintype=pas
}
P 15500 12200 15200 12200 1 0 1
{
T 15350 12150 5 8 1 1 180 0 1
pinnumber=23
T 15350 12150 5 8 0 0 180 0 1
pinseq=23
T 15350 12150 5 8 0 1 180 0 1
pinlabel=23
T 15350 12150 5 8 0 1 180 0 1
pintype=pas
}
P 16600 12200 16300 12200 1 0 0
{
T 16400 12150 5 8 1 1 180 6 1
pinnumber=24
T 16400 12150 5 8 0 0 180 6 1
pinseq=24
T 16400 12150 5 8 0 1 180 6 1
pinlabel=24
T 16400 12150 5 8 0 1 180 6 1
pintype=pas
}
P 15500 11800 15200 11800 1 0 1
{
T 15350 11750 5 8 1 1 180 0 1
pinnumber=25
T 15350 11750 5 8 0 0 180 0 1
pinseq=25
T 15350 11750 5 8 0 1 180 0 1
pinlabel=25
T 15350 11750 5 8 0 1 180 0 1
pintype=pas
}
P 16600 11800 16300 11800 1 0 0
{
T 16400 11750 5 8 1 1 180 6 1
pinnumber=26
T 16400 11750 5 8 0 0 180 6 1
pinseq=26
T 16400 11750 5 8 0 1 180 6 1
pinlabel=26
T 16400 11750 5 8 0 1 180 6 1
pintype=pas
}
B 15500 7600 800 9200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
L 16300 14400 15500 14400 3 0 0 0 -1 -1
L 15900 7600 15900 16800 3 0 0 0 -1 -1
L 16300 16400 15500 16400 3 0 0 0 -1 -1
L 16300 15200 15500 15200 3 0 0 0 -1 -1
L 16300 15600 15500 15600 3 0 0 0 -1 -1
L 16300 14800 15500 14800 3 0 0 0 -1 -1
L 16300 16000 15500 16000 3 0 0 0 -1 -1
L 16300 13200 15500 13200 3 0 0 0 -1 -1
L 16300 13600 15500 13600 3 0 0 0 -1 -1
L 16300 12800 15500 12800 3 0 0 0 -1 -1
L 16300 12000 15500 12000 3 0 0 0 -1 -1
L 16300 12400 15500 12400 3 0 0 0 -1 -1
L 16300 14000 15500 14000 3 0 0 0 -1 -1
P 15500 11400 15200 11400 1 0 1
{
T 15350 11350 5 8 1 1 180 0 1
pinnumber=27
T 15350 11350 5 8 0 0 180 0 1
pinseq=27
T 15350 11350 5 8 0 1 180 0 1
pinlabel=27
T 15350 11350 5 8 0 1 180 0 1
pintype=pas
}
L 16300 11200 15500 11200 3 0 0 0 -1 -1
P 16600 11400 16300 11400 1 0 0
{
T 16400 11350 5 8 1 1 180 6 1
pinnumber=28
T 16400 11350 5 8 0 0 180 6 1
pinseq=28
T 16400 11350 5 8 0 1 180 6 1
pinlabel=28
T 16400 11350 5 8 0 1 180 6 1
pintype=pas
}
L 16300 11600 15500 11600 3 0 0 0 -1 -1
L 16300 11600 15500 11600 3 0 0 0 -1 -1
P 15500 11000 15200 11000 1 0 1
{
T 15350 10950 5 8 1 1 180 0 1
pinnumber=29
T 15350 10950 5 8 0 0 180 0 1
pinseq=29
T 15350 10950 5 8 0 1 180 0 1
pinlabel=29
T 15350 10950 5 8 0 1 180 0 1
pintype=pas
}
P 16600 11000 16300 11000 1 0 0
{
T 16400 10950 5 8 1 1 180 6 1
pinnumber=30
T 16400 10950 5 8 0 0 180 6 1
pinseq=30
T 16400 10950 5 8 0 1 180 6 1
pinlabel=30
T 16400 10950 5 8 0 1 180 6 1
pintype=pas
}
P 15500 10600 15200 10600 1 0 1
{
T 15350 10550 5 8 1 1 180 0 1
pinnumber=31
T 15350 10550 5 8 0 0 180 0 1
pinseq=31
T 15350 10550 5 8 0 1 180 0 1
pinlabel=31
T 15350 10550 5 8 0 1 180 0 1
pintype=pas
}
P 16600 10600 16300 10600 1 0 0
{
T 16400 10550 5 8 1 1 180 6 1
pinnumber=32
T 16400 10550 5 8 0 0 180 6 1
pinseq=32
T 16400 10550 5 8 0 1 180 6 1
pinlabel=32
T 16400 10550 5 8 0 1 180 6 1
pintype=pas
}
P 15500 10200 15200 10200 1 0 1
{
T 15350 10150 5 8 1 1 180 0 1
pinnumber=33
T 15350 10150 5 8 0 0 180 0 1
pinseq=33
T 15350 10150 5 8 0 1 180 0 1
pinlabel=33
T 15350 10150 5 8 0 1 180 0 1
pintype=pas
}
P 16600 10200 16300 10200 1 0 0
{
T 16400 10150 5 8 1 1 180 6 1
pinnumber=34
T 16400 10150 5 8 0 0 180 6 1
pinseq=16
T 16400 10150 5 8 0 1 180 6 1
pinlabel=16
T 16400 10150 5 8 0 1 180 6 1
pintype=pas
}
P 15500 9800 15200 9800 1 0 1
{
T 15350 9750 5 8 1 1 180 0 1
pinnumber=35
T 15350 9750 5 8 0 0 180 0 1
pinseq=35
T 15350 9750 5 8 0 1 180 0 1
pinlabel=35
T 15350 9750 5 8 0 1 180 0 1
pintype=pas
}
P 16600 9800 16300 9800 1 0 0
{
T 16400 9750 5 8 1 1 180 6 1
pinnumber=36
T 16400 9750 5 8 0 0 180 6 1
pinseq=36
T 16400 9750 5 8 0 1 180 6 1
pinlabel=36
T 16400 9750 5 8 0 1 180 6 1
pintype=pas
}
P 15500 9400 15200 9400 1 0 1
{
T 15350 9350 5 8 1 1 180 0 1
pinnumber=37
T 15350 9350 5 8 0 0 180 0 1
pinseq=37
T 15350 9350 5 8 0 1 180 0 1
pinlabel=37
T 15350 9350 5 8 0 1 180 0 1
pintype=pas
}
P 16600 9400 16300 9400 1 0 0
{
T 16400 9350 5 8 1 1 180 6 1
pinnumber=38
T 16400 9350 5 8 0 0 180 6 1
pinseq=38
T 16400 9350 5 8 0 1 180 6 1
pinlabel=38
T 16400 9350 5 8 0 1 180 6 1
pintype=pas
}
P 15500 9000 15200 9000 1 0 1
{
T 15350 8950 5 8 1 1 180 0 1
pinnumber=39
T 15350 8950 5 8 0 0 180 0 1
pinseq=39
T 15350 8950 5 8 0 1 180 0 1
pinlabel=39
T 15350 8950 5 8 0 1 180 0 1
pintype=pas
}
P 16600 9000 16300 9000 1 0 0
{
T 16400 8950 5 8 1 1 180 6 1
pinnumber=40
T 16400 8950 5 8 0 0 180 6 1
pinseq=40
T 16400 8950 5 8 0 1 180 6 1
pinlabel=40
T 16400 8950 5 8 0 1 180 6 1
pintype=pas
}
P 15500 8600 15200 8600 1 0 1
{
T 15350 8550 5 8 1 1 180 0 1
pinnumber=41
T 15350 8550 5 8 0 0 180 0 1
pinseq=23
T 15350 8550 5 8 0 1 180 0 1
pinlabel=23
T 15350 8550 5 8 0 1 180 0 1
pintype=pas
}
P 16600 8600 16300 8600 1 0 0
{
T 16400 8550 5 8 1 1 180 6 1
pinnumber=42
T 16400 8550 5 8 0 0 180 6 1
pinseq=42
T 16400 8550 5 8 0 1 180 6 1
pinlabel=42
T 16400 8550 5 8 0 1 180 6 1
pintype=pas
}
P 15500 8200 15200 8200 1 0 1
{
T 15350 8150 5 8 1 1 180 0 1
pinnumber=43
T 15350 8150 5 8 0 0 180 0 1
pinseq=43
T 15350 8150 5 8 0 1 180 0 1
pinlabel=43
T 15350 8150 5 8 0 1 180 0 1
pintype=pas
}
P 16600 8200 16300 8200 1 0 0
{
T 16400 8150 5 8 1 1 180 6 1
pinnumber=44
T 16400 8150 5 8 0 0 180 6 1
pinseq=44
T 16400 8150 5 8 0 1 180 6 1
pinlabel=44
T 16400 8150 5 8 0 1 180 6 1
pintype=pas
}
L 16300 10800 15500 10800 3 0 0 0 -1 -1
L 16300 9600 15500 9600 3 0 0 0 -1 -1
L 16300 10000 15500 10000 3 0 0 0 -1 -1
L 16300 9200 15500 9200 3 0 0 0 -1 -1
L 16300 8400 15500 8400 3 0 0 0 -1 -1
L 16300 8800 15500 8800 3 0 0 0 -1 -1
L 16300 10400 15500 10400 3 0 0 0 -1 -1
P 15500 7800 15200 7800 1 0 1
{
T 15350 7750 5 8 1 1 180 0 1
pinnumber=45
T 15350 7750 5 8 0 0 180 0 1
pinseq=45
T 15350 7750 5 8 0 1 180 0 1
pinlabel=45
T 15350 7750 5 8 0 1 180 0 1
pintype=pas
}
L 16300 7600 15500 7600 3 0 0 0 -1 -1
P 16600 7800 16300 7800 1 0 0
{
T 16400 7750 5 8 1 1 180 6 1
pinnumber=46
T 16400 7750 5 8 0 0 180 6 1
pinseq=46
T 16400 7750 5 8 0 1 180 6 1
pinlabel=46
T 16400 7750 5 8 0 1 180 6 1
pintype=pas
}
L 16300 8000 15500 8000 3 0 0 0 -1 -1
L 16300 8000 15500 8000 3 0 0 0 -1 -1
T 16000 7500 8 10 0 1 180 0 1
refdes=J?
]
{
T 15000 12200 5 10 0 0 180 0 1
device=HEADER46
T 16000 7500 5 10 1 1 180 0 1
refdes=J103
T 16600 16800 5 10 0 0 0 0 1
footprint=HEADER46_2
}
T 15000 17000 9 10 1 0 0 0 2
BeagleBone Expansion
Connector P9
C 4400 16300 1 0 0 EMBEDDEDgnd-1.sym
[
L 4480 16310 4520 16310 3 0 0 0 -1 -1
L 4455 16350 4545 16350 3 0 0 0 -1 -1
L 4400 16400 4600 16400 3 0 0 0 -1 -1
P 4500 16400 4500 16600 1 0 1
{
T 4558 16461 5 4 0 1 0 0 1
pinnumber=1
T 4558 16461 5 4 0 0 0 0 1
pinseq=1
T 4558 16461 5 4 0 1 0 0 1
pinlabel=1
T 4558 16461 5 4 0 1 0 0 1
pintype=pwr
}
T 4700 16350 8 10 0 0 0 0 1
net=GND:1
]
N 4500 16600 4800 16600 4
C 6400 16300 1 0 0 EMBEDDEDgnd-1.sym
[
P 6500 16400 6500 16600 1 0 1
{
T 6558 16461 5 4 0 1 0 0 1
pintype=pwr
T 6558 16461 5 4 0 1 0 0 1
pinlabel=1
T 6558 16461 5 4 0 0 0 0 1
pinseq=1
T 6558 16461 5 4 0 1 0 0 1
pinnumber=1
}
L 6400 16400 6600 16400 3 0 0 0 -1 -1
L 6455 16350 6545 16350 3 0 0 0 -1 -1
L 6480 16310 6520 16310 3 0 0 0 -1 -1
T 6700 16350 8 10 0 0 0 0 1
net=GND:1
]
N 6200 16600 6500 16600 4
C 4500 16100 1 0 1 EMBEDDEDoutput-1.sym
[
L 3800 16100 4300 16100 3 0 0 0 -1 -1
L 3700 16200 3800 16100 3 0 0 0 -1 -1
L 3800 16300 3700 16200 3 0 0 0 -1 -1
L 4300 16300 3800 16300 3 0 0 0 -1 -1
L 4300 16300 4300 16100 3 0 0 0 -1 -1
P 4500 16200 4300 16200 1 0 0
{
T 4250 16150 5 6 0 1 0 6 1
pinnumber=1
T 4250 16150 5 6 0 0 0 6 1
pinseq=1
}
T 4400 16400 5 10 0 0 0 6 1
device=OUTPUT
]
{
T 4400 16400 5 10 0 0 0 6 1
device=OUTPUT
T 3600 16100 5 10 1 1 0 6 1
value=GPMC_AD6
T 4500 16100 5 10 0 1 180 6 1
net=GPMC_AD6:1
}
C 4500 15700 1 0 1 EMBEDDEDoutput-1.sym
[
P 4500 15800 4300 15800 1 0 0
{
T 4250 15750 5 6 0 0 0 6 1
pinseq=1
T 4250 15750 5 6 0 1 0 6 1
pinnumber=1
}
L 4300 15900 4300 15700 3 0 0 0 -1 -1
L 4300 15900 3800 15900 3 0 0 0 -1 -1
L 3800 15900 3700 15800 3 0 0 0 -1 -1
L 3700 15800 3800 15700 3 0 0 0 -1 -1
L 3800 15700 4300 15700 3 0 0 0 -1 -1
T 4400 16000 5 10 0 0 0 6 1
device=OUTPUT
]
{
T 4400 16000 5 10 0 0 0 6 1
device=OUTPUT
T 3600 15700 5 10 1 1 0 6 1
value=GPMC_AD2
T 4500 15700 5 10 0 1 180 6 1
net=GPMC_AD2:1
}
C 4500 15300 1 0 1 EMBEDDEDoutput-1.sym
[
L 3800 15300 4300 15300 3 0 0 0 -1 -1
L 3700 15400 3800 15300 3 0 0 0 -1 -1
L 3800 15500 3700 15400 3 0 0 0 -1 -1
L 4300 15500 3800 15500 3 0 0 0 -1 -1
L 4300 15500 4300 15300 3 0 0 0 -1 -1
P 4500 15400 4300 15400 1 0 0
{
T 4250 15350 5 6 0 1 0 6 1
pinnumber=1
T 4250 15350 5 6 0 0 0 6 1
pinseq=1
}
T 4400 15600 5 10 0 0 0 6 1
device=OUTPUT
]
{
T 4400 15600 5 10 0 0 0 6 1
device=OUTPUT
T 3600 15300 5 10 1 1 0 6 1
value=GPMC_ADVN_ALE
T 4500 15300 5 10 0 1 180 6 1
net=GPMC_ADVN_ALE:1
}
C 4500 14100 1 0 1 EMBEDDEDoutput-1.sym
[
P 4500 14200 4300 14200 1 0 0
{
T 4250 14150 5 6 0 0 0 6 1
pinseq=1
T 4250 14150 5 6 0 1 0 6 1
pinnumber=1
}
L 4300 14300 4300 14100 3 0 0 0 -1 -1
L 4300 14300 3800 14300 3 0 0 0 -1 -1
L 3800 14300 3700 14200 3 0 0 0 -1 -1
L 3700 14200 3800 14100 3 0 0 0 -1 -1
L 3800 14100 4300 14100 3 0 0 0 -1 -1
T 4400 14400 5 10 0 0 0 6 1
device=OUTPUT
]
{
T 4400 14400 5 10 0 0 0 6 1
device=OUTPUT
T 3600 14100 5 10 1 1 0 6 1
value=GPMC_AD9
T 4500 14100 5 10 0 1 180 6 1
net=GPMC_AD9:1
}
C 4500 14900 1 0 1 EMBEDDEDoutput-1.sym
[
L 3800 14900 4300 14900 3 0 0 0 -1 -1
L 3700 15000 3800 14900 3 0 0 0 -1 -1
L 3800 15100 3700 15000 3 0 0 0 -1 -1
L 4300 15100 3800 15100 3 0 0 0 -1 -1
L 4300 15100 4300 14900 3 0 0 0 -1 -1
P 4500 15000 4300 15000 1 0 0
{
T 4250 14950 5 6 0 1 0 6 1
pinnumber=1
T 4250 14950 5 6 0 0 0 6 1
pinseq=1
}
T 4400 15200 5 10 0 0 0 6 1
device=OUTPUT
]
{
T 4400 15200 5 10 0 0 0 6 1
device=OUTPUT
T 3600 14900 5 10 1 1 0 6 1
value=GPMC_BE0N_CLE
T 4500 14900 5 10 0 1 180 6 1
net=GPMC_BE0N_CLE:1
}
C 4500 14500 1 0 1 EMBEDDEDoutput-1.sym
[
P 4500 14600 4300 14600 1 0 0
{
T 4250 14550 5 6 0 0 0 6 1
pinseq=1
T 4250 14550 5 6 0 1 0 6 1
pinnumber=1
}
L 4300 14700 4300 14500 3 0 0 0 -1 -1
L 4300 14700 3800 14700 3 0 0 0 -1 -1
L 3800 14700 3700 14600 3 0 0 0 -1 -1
L 3700 14600 3800 14500 3 0 0 0 -1 -1
L 3800 14500 4300 14500 3 0 0 0 -1 -1
T 4400 14800 5 10 0 0 0 6 1
device=OUTPUT
]
{
T 4400 14800 5 10 0 0 0 6 1
device=OUTPUT
T 3600 14500 5 10 1 1 0 6 1
value=GPMC_AD13
T 4500 14500 5 10 0 1 180 6 1
net=GPMC_AD13:1
}
C 4500 13700 1 0 1 EMBEDDEDoutput-1.sym
[
L 3800 13700 4300 13700 3 0 0 0 -1 -1
L 3700 13800 3800 13700 3 0 0 0 -1 -1
L 3800 13900 3700 13800 3 0 0 0 -1 -1
L 4300 13900 3800 13900 3 0 0 0 -1 -1
L 4300 13900 4300 13700 3 0 0 0 -1 -1
P 4500 13800 4300 13800 1 0 0
{
T 4250 13750 5 6 0 1 0 6 1
pinnumber=1
T 4250 13750 5 6 0 0 0 6 1
pinseq=1
}
T 4400 14000 5 10 0 0 0 6 1
device=OUTPUT
]
{
T 4400 14000 5 10 0 0 0 6 1
device=OUTPUT
T 3600 13700 5 10 1 1 0 6 1
value=GPMC_AD15
T 4500 13700 5 10 0 1 180 6 1
net=GPMC_AD15:1
}
C 4500 13300 1 0 1 EMBEDDEDoutput-1.sym
[
P 4500 13400 4300 13400 1 0 0
{
T 4250 13350 5 6 0 0 0 6 1
pinseq=1
T 4250 13350 5 6 0 1 0 6 1
pinnumber=1
}
L 4300 13500 4300 13300 3 0 0 0 -1 -1
L 4300 13500 3800 13500 3 0 0 0 -1 -1
L 3800 13500 3700 13400 3 0 0 0 -1 -1
L 3700 13400 3800 13300 3 0 0 0 -1 -1
L 3800 13300 4300 13300 3 0 0 0 -1 -1
T 4400 13600 5 10 0 0 0 6 1
device=OUTPUT
]
{
T 4400 13600 5 10 0 0 0 6 1
device=OUTPUT
T 3600 13300 5 10 1 1 0 6 1
value=GPMC_AD11
T 4500 13300 5 10 0 1 180 6 1
net=GPMC_AD11:1
}
C 4500 12900 1 0 1 EMBEDDEDoutput-1.sym
[
P 4500 13000 4300 13000 1 0 0
{
T 4250 12950 5 6 0 0 0 6 1
pinseq=1
T 4250 12950 5 6 0 1 0 6 1
pinnumber=1
}
L 4300 13100 4300 12900 3 0 0 0 -1 -1
L 4300 13100 3800 13100 3 0 0 0 -1 -1
L 3800 13100 3700 13000 3 0 0 0 -1 -1
L 3700 13000 3800 12900 3 0 0 0 -1 -1
L 3800 12900 4300 12900 3 0 0 0 -1 -1
T 4400 13200 5 10 0 0 0 6 1
device=OUTPUT
]
{
T 4400 13200 5 10 0 0 0 6 1
device=OUTPUT
T 3600 12900 5 10 1 1 0 6 1
value=GPMC_AD8
T 4500 12900 5 10 0 1 180 6 1
net=GPMC_AD8:1
}
C 6500 16100 1 0 0 EMBEDDEDoutput-1.sym
[
P 6500 16200 6700 16200 1 0 0
{
T 6750 16150 5 6 0 0 0 0 1
pinseq=1
T 6750 16150 5 6 0 1 0 0 1
pinnumber=1
}
L 6700 16300 6700 16100 3 0 0 0 -1 -1
L 6700 16300 7200 16300 3 0 0 0 -1 -1
L 7200 16300 7300 16200 3 0 0 0 -1 -1
L 7300 16200 7200 16100 3 0 0 0 -1 -1
L 7200 16100 6700 16100 3 0 0 0 -1 -1
T 6600 16400 5 10 0 0 0 0 1
device=OUTPUT
]
{
T 6600 16400 5 10 0 0 0 0 1
device=OUTPUT
T 7400 16100 5 10 1 1 0 0 1
value=GPMC_AD7
T 6500 16100 5 10 0 1 180 0 1
net=GPMC_AD7:1
}
C 6500 15700 1 0 0 EMBEDDEDoutput-1.sym
[
P 6500 15800 6700 15800 1 0 0
{
T 6750 15750 5 6 0 0 0 0 1
pinseq=1
T 6750 15750 5 6 0 1 0 0 1
pinnumber=1
}
L 6700 15900 6700 15700 3 0 0 0 -1 -1
L 6700 15900 7200 15900 3 0 0 0 -1 -1
L 7200 15900 7300 15800 3 0 0 0 -1 -1
L 7300 15800 7200 15700 3 0 0 0 -1 -1
L 7200 15700 6700 15700 3 0 0 0 -1 -1
T 6600 16000 5 10 0 0 0 0 1
device=OUTPUT
]
{
T 6600 16000 5 10 0 0 0 0 1
device=OUTPUT
T 7400 15700 5 10 1 1 0 0 1
value=GPMC_AD3
T 6500 15700 5 10 0 1 180 0 1
net=GPMC_AD3:1
}
C 6500 15300 1 0 0 EMBEDDEDoutput-1.sym
[
L 7200 15300 6700 15300 3 0 0 0 -1 -1
L 7300 15400 7200 15300 3 0 0 0 -1 -1
L 7200 15500 7300 15400 3 0 0 0 -1 -1
L 6700 15500 7200 15500 3 0 0 0 -1 -1
L 6700 15500 6700 15300 3 0 0 0 -1 -1
P 6500 15400 6700 15400 1 0 0
{
T 6750 15350 5 6 0 1 0 0 1
pinnumber=1
T 6750 15350 5 6 0 0 0 0 1
pinseq=1
}
T 6600 15600 5 10 0 0 0 0 1
device=OUTPUT
]
{
T 6600 15600 5 10 0 0 0 0 1
device=OUTPUT
T 7400 15300 5 10 1 1 0 0 1
value=GPMC_OEN
T 6500 15300 5 10 0 1 180 0 1
net=GPMC_OEN:1
}
C 6500 14900 1 0 0 EMBEDDEDoutput-1.sym
[
L 7200 14900 6700 14900 3 0 0 0 -1 -1
L 7300 15000 7200 14900 3 0 0 0 -1 -1
L 7200 15100 7300 15000 3 0 0 0 -1 -1
L 6700 15100 7200 15100 3 0 0 0 -1 -1
L 6700 15100 6700 14900 3 0 0 0 -1 -1
P 6500 15000 6700 15000 1 0 0
{
T 6750 14950 5 6 0 1 0 0 1
pinnumber=1
T 6750 14950 5 6 0 0 0 0 1
pinseq=1
}
T 6600 15200 5 10 0 0 0 0 1
device=OUTPUT
]
{
T 6600 15200 5 10 0 0 0 0 1
device=OUTPUT
T 7400 14900 5 10 1 1 0 0 1
value=GPMC_WEN
T 6500 14900 5 10 0 1 180 0 1
net=GPMC_WEN:1
}
C 6500 14500 1 0 0 EMBEDDEDoutput-1.sym
[
L 7200 14500 6700 14500 3 0 0 0 -1 -1
L 7300 14600 7200 14500 3 0 0 0 -1 -1
L 7200 14700 7300 14600 3 0 0 0 -1 -1
L 6700 14700 7200 14700 3 0 0 0 -1 -1
L 6700 14700 6700 14500 3 0 0 0 -1 -1
P 6500 14600 6700 14600 1 0 0
{
T 6750 14550 5 6 0 1 0 0 1
pinnumber=1
T 6750 14550 5 6 0 0 0 0 1
pinseq=1
}
T 6600 14800 5 10 0 0 0 0 1
device=OUTPUT
]
{
T 6600 14800 5 10 0 0 0 0 1
device=OUTPUT
T 7400 14500 5 10 1 1 0 0 1
value=GPMC_AD12
T 6500 14500 5 10 0 1 180 0 1
net=GPMC_AD12:1
}
C 6500 14100 1 0 0 EMBEDDEDoutput-1.sym
[
L 7200 14100 6700 14100 3 0 0 0 -1 -1
L 7300 14200 7200 14100 3 0 0 0 -1 -1
L 7200 14300 7300 14200 3 0 0 0 -1 -1
L 6700 14300 7200 14300 3 0 0 0 -1 -1
L 6700 14300 6700 14100 3 0 0 0 -1 -1
P 6500 14200 6700 14200 1 0 0
{
T 6750 14150 5 6 0 1 0 0 1
pinnumber=1
T 6750 14150 5 6 0 0 0 0 1
pinseq=1
}
T 6600 14400 5 10 0 0 0 0 1
device=OUTPUT
]
{
T 6600 14400 5 10 0 0 0 0 1
device=OUTPUT
T 7400 14100 5 10 1 1 0 0 1
value=GPMC_AD10
T 6500 14100 5 10 0 1 180 0 1
net=GPMC_AD10:1
}
C 6500 13700 1 0 0 EMBEDDEDoutput-1.sym
[
L 7200 13700 6700 13700 3 0 0 0 -1 -1
L 7300 13800 7200 13700 3 0 0 0 -1 -1
L 7200 13900 7300 13800 3 0 0 0 -1 -1
L 6700 13900 7200 13900 3 0 0 0 -1 -1
L 6700 13900 6700 13700 3 0 0 0 -1 -1
P 6500 13800 6700 13800 1 0 0
{
T 6750 13750 5 6 0 1 0 0 1
pinnumber=1
T 6750 13750 5 6 0 0 0 0 1
pinseq=1
}
T 6600 14000 5 10 0 0 0 0 1
device=OUTPUT
]
{
T 6600 14000 5 10 0 0 0 0 1
device=OUTPUT
T 7400 13700 5 10 1 1 0 0 1
value=GPMC_AD14
T 6500 13700 5 10 0 1 180 0 1
net=GPMC_AD14:1
}
C 6500 13300 1 0 0 EMBEDDEDoutput-1.sym
[
L 7200 13300 6700 13300 3 0 0 0 -1 -1
L 7300 13400 7200 13300 3 0 0 0 -1 -1
L 7200 13500 7300 13400 3 0 0 0 -1 -1
L 6700 13500 7200 13500 3 0 0 0 -1 -1
L 6700 13500 6700 13300 3 0 0 0 -1 -1
P 6500 13400 6700 13400 1 0 0
{
T 6750 13350 5 6 0 1 0 0 1
pinnumber=1
T 6750 13350 5 6 0 0 0 0 1
pinseq=1
}
T 6600 13600 5 10 0 0 0 0 1
device=OUTPUT
]
{
T 6600 13600 5 10 0 0 0 0 1
device=OUTPUT
T 7400 13300 5 10 1 1 0 0 1
value=GPMC_CLK
T 6500 13300 5 10 0 1 180 0 1
net=GPMC_CLK:1
}
C 6500 12900 1 0 0 EMBEDDEDoutput-1.sym
[
L 7200 12900 6700 12900 3 0 0 0 -1 -1
L 7300 13000 7200 12900 3 0 0 0 -1 -1
L 7200 13100 7300 13000 3 0 0 0 -1 -1
L 6700 13100 7200 13100 3 0 0 0 -1 -1
L 6700 13100 6700 12900 3 0 0 0 -1 -1
P 6500 13000 6700 13000 1 0 0
{
T 6750 12950 5 6 0 1 0 0 1
pinnumber=1
T 6750 12950 5 6 0 0 0 0 1
pinseq=1
}
T 6600 13200 5 10 0 0 0 0 1
device=OUTPUT
]
{
T 6600 13200 5 10 0 0 0 0 1
device=OUTPUT
T 7400 12900 5 10 1 1 0 0 1
value=GPMC_CSN2
T 6500 12900 5 10 0 1 180 0 1
net=GPMC_CSN2:1
}
C 6500 12500 1 0 0 EMBEDDEDoutput-1.sym
[
L 7200 12500 6700 12500 3 0 0 0 -1 -1
L 7300 12600 7200 12500 3 0 0 0 -1 -1
L 7200 12700 7300 12600 3 0 0 0 -1 -1
L 6700 12700 7200 12700 3 0 0 0 -1 -1
L 6700 12700 6700 12500 3 0 0 0 -1 -1
P 6500 12600 6700 12600 1 0 0
{
T 6750 12550 5 6 0 1 0 0 1
pinnumber=1
T 6750 12550 5 6 0 0 0 0 1
pinseq=1
}
T 6600 12800 5 10 0 0 0 0 1
device=OUTPUT
]
{
T 6600 12800 5 10 0 0 0 0 1
device=OUTPUT
T 7400 12500 5 10 1 1 0 0 1
value=GPMC_AD5
T 6500 12500 5 10 0 1 180 0 1
net=GPMC_AD5:1
}
C 6500 12100 1 0 0 EMBEDDEDoutput-1.sym
[
L 7200 12100 6700 12100 3 0 0 0 -1 -1
L 7300 12200 7200 12100 3 0 0 0 -1 -1
L 7200 12300 7300 12200 3 0 0 0 -1 -1
L 6700 12300 7200 12300 3 0 0 0 -1 -1
L 6700 12300 6700 12100 3 0 0 0 -1 -1
P 6500 12200 6700 12200 1 0 0
{
T 6750 12150 5 6 0 1 0 0 1
pinnumber=1
T 6750 12150 5 6 0 0 0 0 1
pinseq=1
}
T 6600 12400 5 10 0 0 0 0 1
device=OUTPUT
]
{
T 6600 12400 5 10 0 0 0 0 1
device=OUTPUT
T 7400 12100 5 10 1 1 0 0 1
value=GPMC_AD1
T 6500 12100 5 10 0 1 180 0 1
net=GPMC_AD1:1
}
C 6500 11700 1 0 0 EMBEDDEDoutput-1.sym
[
L 7200 11700 6700 11700 3 0 0 0 -1 -1
L 7300 11800 7200 11700 3 0 0 0 -1 -1
L 7200 11900 7300 11800 3 0 0 0 -1 -1
L 6700 11900 7200 11900 3 0 0 0 -1 -1
L 6700 11900 6700 11700 3 0 0 0 -1 -1
P 6500 11800 6700 11800 1 0 0
{
T 6750 11750 5 6 0 1 0 0 1
pinnumber=1
T 6750 11750 5 6 0 0 0 0 1
pinseq=1
}
T 6600 12000 5 10 0 0 0 0 1
device=OUTPUT
]
{
T 6600 12000 5 10 0 0 0 0 1
device=OUTPUT
T 7400 11700 5 10 1 1 0 0 1
value=GPMC_CSN0
T 6500 11700 5 10 0 1 180 0 1
net=GPMC_CSN0:1
}
C 4500 12500 1 0 1 EMBEDDEDoutput-1.sym
[
L 3800 12500 4300 12500 3 0 0 0 -1 -1
L 3700 12600 3800 12500 3 0 0 0 -1 -1
L 3800 12700 3700 12600 3 0 0 0 -1 -1
L 4300 12700 3800 12700 3 0 0 0 -1 -1
L 4300 12700 4300 12500 3 0 0 0 -1 -1
P 4500 12600 4300 12600 1 0 0
{
T 4250 12550 5 6 0 1 0 6 1
pinnumber=1
T 4250 12550 5 6 0 0 0 6 1
pinseq=1
}
T 4400 12800 5 10 0 0 0 6 1
device=OUTPUT
]
{
T 4400 12800 5 10 0 0 0 6 1
device=OUTPUT
T 3600 12500 5 10 1 1 0 6 1
value=GPMC_CSN1
T 4500 12500 5 10 0 1 180 6 1
net=GPMC_CSN1:1
}
C 4500 12100 1 0 1 EMBEDDEDoutput-1.sym
[
L 3800 12100 4300 12100 3 0 0 0 -1 -1
L 3700 12200 3800 12100 3 0 0 0 -1 -1
L 3800 12300 3700 12200 3 0 0 0 -1 -1
L 4300 12300 3800 12300 3 0 0 0 -1 -1
L 4300 12300 4300 12100 3 0 0 0 -1 -1
P 4500 12200 4300 12200 1 0 0
{
T 4250 12150 5 6 0 1 0 6 1
pinnumber=1
T 4250 12150 5 6 0 0 0 6 1
pinseq=1
}
T 4400 12400 5 10 0 0 0 6 1
device=OUTPUT
]
{
T 4400 12400 5 10 0 0 0 6 1
device=OUTPUT
T 3600 12100 5 10 1 1 0 6 1
value=GPMC_AD4
T 4500 12100 5 10 0 1 180 6 1
net=GPMC_AD4:1
}
C 4500 11700 1 0 1 EMBEDDEDoutput-1.sym
[
L 3800 11700 4300 11700 3 0 0 0 -1 -1
L 3700 11800 3800 11700 3 0 0 0 -1 -1
L 3800 11900 3700 11800 3 0 0 0 -1 -1
L 4300 11900 3800 11900 3 0 0 0 -1 -1
L 4300 11900 4300 11700 3 0 0 0 -1 -1
P 4500 11800 4300 11800 1 0 0
{
T 4250 11750 5 6 0 1 0 6 1
pinnumber=1
T 4250 11750 5 6 0 0 0 6 1
pinseq=1
}
T 4400 12000 5 10 0 0 0 6 1
device=OUTPUT
]
{
T 4400 12000 5 10 0 0 0 6 1
device=OUTPUT
T 3600 11700 5 10 1 1 0 6 1
value=GPMC_AD0
T 4500 11700 5 10 0 1 180 6 1
net=GPMC_AD0:1
}
N 4500 16200 4800 16200 4
N 4500 15800 4800 15800 4
N 4500 15400 4800 15400 4
N 4500 15000 4800 15000 4
N 4500 14600 4800 14600 4
N 4500 14200 4800 14200 4
N 4500 13800 4800 13800 4
N 4500 13400 4800 13400 4
N 4500 13000 4800 13000 4
N 4500 12600 4800 12600 4
N 4500 12200 4800 12200 4
N 4500 11800 4800 11800 4
N 6200 16200 6500 16200 4
N 6200 15800 6500 15800 4
N 6200 15400 6500 15400 4
N 6200 15000 6500 15000 4
N 6200 14600 6500 14600 4
N 6200 14200 6500 14200 4
N 6200 13800 6500 13800 4
N 6200 13400 6500 13400 4
N 6200 13000 6500 13000 4
N 6200 12600 6500 12600 4
N 6200 12200 6500 12200 4
N 6200 11800 6500 11800 4
N 14900 15400 15200 15400 4
N 16600 15400 16900 15400 4
C 16700 15400 1 0 0 EMBEDDED5V-plus-1.sym
[
T 16775 15650 9 8 1 0 0 0 1
+5V
T 17000 15400 8 8 0 0 0 0 1
net=+5V:1
P 16900 15400 16900 15600 1 0 0
{
T 16950 15450 5 6 0 1 0 0 1
pinnumber=1
T 16950 15450 5 6 0 0 0 0 1
pinseq=1
T 16950 15450 5 6 0 1 0 0 1
pinlabel=1
T 16950 15450 5 6 0 1 0 0 1
pintype=pwr
}
L 16750 15600 17050 15600 3 0 0 0 -1 -1
]
C 14800 16300 1 0 0 EMBEDDEDgnd-1.sym
[
T 15100 16350 8 10 0 0 0 0 1
net=GND:1
L 14880 16310 14920 16310 3 0 0 0 -1 -1
L 14855 16350 14945 16350 3 0 0 0 -1 -1
L 14800 16400 15000 16400 3 0 0 0 -1 -1
P 14900 16400 14900 16600 1 0 1
{
T 14958 16461 5 4 0 1 0 0 1
pintype=pwr
T 14958 16461 5 4 0 1 0 0 1
pinlabel=1
T 14958 16461 5 4 0 0 0 0 1
pinseq=1
T 14958 16461 5 4 0 1 0 0 1
pinnumber=1
}
]
C 16800 16300 1 0 0 EMBEDDEDgnd-1.sym
[
T 17100 16350 8 10 0 0 0 0 1
net=GND:1
L 16880 16310 16920 16310 3 0 0 0 -1 -1
L 16855 16350 16945 16350 3 0 0 0 -1 -1
L 16800 16400 17000 16400 3 0 0 0 -1 -1
P 16900 16400 16900 16600 1 0 1
{
T 16958 16461 5 4 0 1 0 0 1
pintype=pwr
T 16958 16461 5 4 0 1 0 0 1
pinlabel=1
T 16958 16461 5 4 0 0 0 0 1
pinseq=1
T 16958 16461 5 4 0 1 0 0 1
pinnumber=1
}
]
N 14900 16600 15200 16600 4
N 16600 16600 16900 16600 4
C 14800 7500 1 0 0 EMBEDDEDgnd-1.sym
[
T 15100 7550 8 10 0 0 0 0 1
net=GND:1
P 14900 7600 14900 7800 1 0 1
{
T 14958 7661 5 4 0 1 0 0 1
pinnumber=1
T 14958 7661 5 4 0 0 0 0 1
pinseq=1
T 14958 7661 5 4 0 1 0 0 1
pinlabel=1
T 14958 7661 5 4 0 1 0 0 1
pintype=pwr
}
L 14800 7600 15000 7600 3 0 0 0 -1 -1
L 14855 7550 14945 7550 3 0 0 0 -1 -1
L 14880 7510 14920 7510 3 0 0 0 -1 -1
]
C 16800 7500 1 0 0 EMBEDDEDgnd-1.sym
[
T 17100 7550 8 10 0 0 0 0 1
net=GND:1
L 16880 7510 16920 7510 3 0 0 0 -1 -1
L 16855 7550 16945 7550 3 0 0 0 -1 -1
L 16800 7600 17000 7600 3 0 0 0 -1 -1
P 16900 7600 16900 7800 1 0 1
{
T 16958 7661 5 4 0 1 0 0 1
pintype=pwr
T 16958 7661 5 4 0 1 0 0 1
pinlabel=1
T 16958 7661 5 4 0 0 0 0 1
pinseq=1
T 16958 7661 5 4 0 1 0 0 1
pinnumber=1
}
]
N 15200 8200 14900 8200 4
N 14900 8200 14900 7800 4
N 16600 8200 16900 8200 4
N 16900 8200 16900 7800 4
N 15200 7800 14900 7800 4
N 16900 7800 16600 7800 4
C 12700 4300 1 0 0 EMBEDDED3.3V-plus-1.sym
[
L 12750 4500 13050 4500 3 0 0 0 -1 -1
P 12900 4300 12900 4500 1 0 0
{
T 12950 4350 5 6 0 1 0 0 1
pinnumber=1
T 12950 4350 5 6 0 0 0 0 1
pinseq=1
T 12950 4350 5 6 0 1 0 0 1
pinlabel=1
T 12950 4350 5 6 0 1 0 0 1
pintype=pwr
}
T 13000 4300 8 8 0 0 0 0 1
net=+3.3V:1
T 12775 4550 9 8 1 0 0 0 1
+3.3V
]
N 10900 2500 10600 2500 4
C 13500 4300 1 90 1 EMBEDDEDresistor-1.sym
[
L 13300 3700 13500 3800 3 0 0 0 -1 -1
L 13500 3800 13300 3900 3 0 0 0 -1 -1
L 13300 3900 13500 4000 3 0 0 0 -1 -1
L 13500 4000 13300 4100 3 0 0 0 -1 -1
L 13300 3700 13500 3600 3 0 0 0 -1 -1
L 13500 3600 13400 3550 3 0 0 0 -1 -1
P 13400 3400 13400 3550 1 0 0
{
T 13350 3500 5 8 0 1 90 6 1
pinnumber=2
T 13350 3500 5 8 0 0 90 6 1
pinseq=2
T 13350 3500 5 8 0 1 90 6 1
pinlabel=2
T 13350 3500 5 8 0 1 90 6 1
pintype=pas
}
P 13400 4300 13400 4148 1 0 0
{
T 13350 4200 5 8 0 1 90 6 1
pinnumber=1
T 13350 4200 5 8 0 0 90 6 1
pinseq=1
T 13350 4200 5 8 0 1 90 6 1
pinlabel=1
T 13350 4200 5 8 0 1 90 6 1
pintype=pas
}
L 13300 4099 13400 4150 3 0 0 0 -1 -1
T 13100 4000 5 10 0 0 90 6 1
device=RESISTOR
T 13200 4100 8 10 0 1 90 6 1
refdes=R?
T 13500 4300 8 10 0 1 90 6 1
pins=2
T 13500 4300 8 10 0 1 90 6 1
class=DISCRETE
]
{
T 13100 4000 5 10 0 0 90 6 1
device=RESISTOR
T 13100 3800 5 10 1 1 270 6 1
refdes=R102
T 13100 3400 5 10 1 1 270 6 1
value=5.6k
T 13500 4300 5 10 0 0 180 2 1
footprint=0805
}
C 14000 4300 1 90 1 EMBEDDEDresistor-1.sym
[
L 13800 4099 13900 4150 3 0 0 0 -1 -1
P 13900 4300 13900 4148 1 0 0
{
T 13850 4200 5 8 0 1 90 6 1
pintype=pas
T 13850 4200 5 8 0 1 90 6 1
pinlabel=1
T 13850 4200 5 8 0 0 90 6 1
pinseq=1
T 13850 4200 5 8 0 1 90 6 1
pinnumber=1
}
P 13900 3400 13900 3550 1 0 0
{
T 13850 3500 5 8 0 1 90 6 1
pintype=pas
T 13850 3500 5 8 0 1 90 6 1
pinlabel=2
T 13850 3500 5 8 0 0 90 6 1
pinseq=2
T 13850 3500 5 8 0 1 90 6 1
pinnumber=2
}
L 14000 3600 13900 3550 3 0 0 0 -1 -1
L 13800 3700 14000 3600 3 0 0 0 -1 -1
L 14000 4000 13800 4100 3 0 0 0 -1 -1
L 13800 3900 14000 4000 3 0 0 0 -1 -1
L 14000 3800 13800 3900 3 0 0 0 -1 -1
L 13800 3700 14000 3800 3 0 0 0 -1 -1
T 14000 4300 8 10 0 1 90 6 1
class=DISCRETE
T 14000 4300 8 10 0 1 90 6 1
pins=2
T 13700 4100 8 10 0 1 90 6 1
refdes=R?
T 13600 4000 5 10 0 0 90 6 1
device=RESISTOR
]
{
T 13600 4000 5 10 0 0 90 6 1
device=RESISTOR
T 13600 3800 5 10 1 1 270 6 1
refdes=R101
T 13600 3400 5 10 1 1 270 6 1
value=5.6k
T 14000 4300 5 10 0 0 180 2 1
footprint=0805
}
C 9900 4300 1 90 1 EMBEDDEDresistor-1.sym
[
L 9700 3700 9900 3800 3 0 0 0 -1 -1
L 9900 3800 9700 3900 3 0 0 0 -1 -1
L 9700 3900 9900 4000 3 0 0 0 -1 -1
L 9900 4000 9700 4100 3 0 0 0 -1 -1
L 9700 3700 9900 3600 3 0 0 0 -1 -1
L 9900 3600 9800 3550 3 0 0 0 -1 -1
P 9800 3400 9800 3550 1 0 0
{
T 9750 3500 5 8 0 1 90 6 1
pinnumber=2
T 9750 3500 5 8 0 0 90 6 1
pinseq=2
T 9750 3500 5 8 0 1 90 6 1
pinlabel=2
T 9750 3500 5 8 0 1 90 6 1
pintype=pas
}
P 9800 4300 9800 4148 1 0 0
{
T 9750 4200 5 8 0 1 90 6 1
pinnumber=1
T 9750 4200 5 8 0 0 90 6 1
pinseq=1
T 9750 4200 5 8 0 1 90 6 1
pinlabel=1
T 9750 4200 5 8 0 1 90 6 1
pintype=pas
}
L 9700 4099 9800 4150 3 0 0 0 -1 -1
T 9500 4000 5 10 0 0 90 6 1
device=RESISTOR
T 9600 4100 8 10 0 1 90 6 1
refdes=R?
T 9900 4300 8 10 0 1 90 6 1
pins=2
T 9900 4300 8 10 0 1 90 6 1
class=DISCRETE
]
{
T 9500 4000 5 10 0 0 90 6 1
device=RESISTOR
T 9500 3800 5 10 1 1 270 6 1
refdes=R103
T 9500 3400 5 10 1 1 270 6 1
value=4.7k
T 9900 4300 5 10 0 0 180 2 1
footprint=0805
}
C 9400 4300 1 90 1 EMBEDDEDresistor-1.sym
[
L 9200 3700 9400 3800 3 0 0 0 -1 -1
L 9400 3800 9200 3900 3 0 0 0 -1 -1
L 9200 3900 9400 4000 3 0 0 0 -1 -1
L 9400 4000 9200 4100 3 0 0 0 -1 -1
L 9200 3700 9400 3600 3 0 0 0 -1 -1
L 9400 3600 9300 3550 3 0 0 0 -1 -1
P 9300 3400 9300 3550 1 0 0
{
T 9250 3500 5 8 0 1 90 6 1
pinnumber=2
T 9250 3500 5 8 0 0 90 6 1
pinseq=2
T 9250 3500 5 8 0 1 90 6 1
pinlabel=2
T 9250 3500 5 8 0 1 90 6 1
pintype=pas
}
P 9300 4300 9300 4148 1 0 0
{
T 9250 4200 5 8 0 1 90 6 1
pinnumber=1
T 9250 4200 5 8 0 0 90 6 1
pinseq=1
T 9250 4200 5 8 0 1 90 6 1
pinlabel=1
T 9250 4200 5 8 0 1 90 6 1
pintype=pas
}
L 9200 4099 9300 4150 3 0 0 0 -1 -1
T 9000 4000 5 10 0 0 90 6 1
device=RESISTOR
T 9100 4100 8 10 0 1 90 6 1
refdes=R?
T 9400 4300 8 10 0 1 90 6 1
pins=2
T 9400 4300 8 10 0 1 90 6 1
class=DISCRETE
]
{
T 9000 4000 5 10 0 0 90 6 1
device=RESISTOR
T 9000 3800 5 10 1 1 270 6 1
refdes=R104
T 9000 3400 5 10 1 1 270 6 1
value=4.7k
T 9400 4300 5 10 0 0 180 2 1
footprint=0805
}
C 8900 4300 1 90 1 EMBEDDEDresistor-1.sym
[
L 8700 3700 8900 3800 3 0 0 0 -1 -1
L 8900 3800 8700 3900 3 0 0 0 -1 -1
L 8700 3900 8900 4000 3 0 0 0 -1 -1
L 8900 4000 8700 4100 3 0 0 0 -1 -1
L 8700 3700 8900 3600 3 0 0 0 -1 -1
L 8900 3600 8800 3550 3 0 0 0 -1 -1
P 8800 3400 8800 3550 1 0 0
{
T 8750 3500 5 8 0 1 90 6 1
pinnumber=2
T 8750 3500 5 8 0 0 90 6 1
pinseq=2
T 8750 3500 5 8 0 1 90 6 1
pinlabel=2
T 8750 3500 5 8 0 1 90 6 1
pintype=pas
}
P 8800 4300 8800 4148 1 0 0
{
T 8750 4200 5 8 0 1 90 6 1
pinnumber=1
T 8750 4200 5 8 0 0 90 6 1
pinseq=1
T 8750 4200 5 8 0 1 90 6 1
pinlabel=1
T 8750 4200 5 8 0 1 90 6 1
pintype=pas
}
L 8700 4099 8800 4150 3 0 0 0 -1 -1
T 8500 4000 5 10 0 0 90 6 1
device=RESISTOR
T 8600 4100 8 10 0 1 90 6 1
refdes=R?
T 8900 4300 8 10 0 1 90 6 1
pins=2
T 8900 4300 8 10 0 1 90 6 1
class=DISCRETE
]
{
T 8500 4000 5 10 0 0 90 6 1
device=RESISTOR
T 8500 3800 5 10 1 1 270 6 1
refdes=R105
T 8500 3400 5 10 1 1 270 6 1
value=4.7k
T 8900 4300 5 10 0 0 180 2 1
footprint=0805
}
N 10900 3100 9800 3100 4
N 9800 3100 9800 3400 4
N 8500 2900 10900 2900 4
N 9300 2900 9300 3400 4
N 10900 2700 8800 2700 4
N 8800 2700 8800 3400 4
C 7100 1600 1 0 0 EMBEDDEDgnd-1.sym
[
P 7200 1700 7200 1900 1 0 1
{
T 7258 1761 5 4 0 1 0 0 1
pinnumber=1
T 7258 1761 5 4 0 0 0 0 1
pinseq=1
T 7258 1761 5 4 0 1 0 0 1
pinlabel=1
T 7258 1761 5 4 0 1 0 0 1
pintype=pwr
}
L 7100 1700 7300 1700 3 0 0 0 -1 -1
L 7155 1650 7245 1650 3 0 0 0 -1 -1
L 7180 1610 7220 1610 3 0 0 0 -1 -1
T 7400 1650 8 10 0 0 0 0 1
net=GND:1
]
N 7200 3200 7200 1900 4
N 8500 3200 9800 3200 4
N 16100 5300 18600 5300 4
{
T 16200 5300 5 10 1 1 0 0 1
netname=I2C2_SDA
}
N 16100 4900 18600 4900 4
{
T 16200 4900 5 10 1 1 0 0 1
netname=I2C2_SCL
}
N 16600 13000 17500 13000 4
{
T 16600 13000 5 10 1 1 0 0 1
netname=I2C2_SDA
}
N 14300 13000 15200 13000 4
{
T 14300 13000 5 10 1 1 0 0 1
netname=I2C2_SCL
}
N 14300 13400 15200 13400 4
N 16600 13400 17500 13400 4
N 14300 12600 15200 12600 4
N 16600 12600 17500 12600 4
C 17500 13300 1 0 0 EMBEDDEDoutput-1.sym
[
T 17600 13600 5 10 0 0 0 0 1
device=OUTPUT
P 17500 13400 17700 13400 1 0 0
{
T 17750 13350 5 6 0 1 0 0 1
pinnumber=1
T 17750 13350 5 6 0 0 0 0 1
pinseq=1
}
L 17700 13500 17700 13300 3 0 0 0 -1 -1
L 17700 13500 18200 13500 3 0 0 0 -1 -1
L 18200 13500 18300 13400 3 0 0 0 -1 -1
L 18300 13400 18200 13300 3 0 0 0 -1 -1
L 18200 13300 17700 13300 3 0 0 0 -1 -1
]
{
T 17600 13600 5 10 0 0 0 0 1
device=OUTPUT
T 18400 13300 5 10 1 1 0 0 1
value=SPI0_D1
T 17500 13300 5 10 0 1 180 0 1
net=SPI0_D1:1
}
C 17500 12500 1 0 0 EMBEDDEDoutput-1.sym
[
T 17600 12800 5 10 0 0 0 0 1
device=OUTPUT
L 18200 12500 17700 12500 3 0 0 0 -1 -1
L 18300 12600 18200 12500 3 0 0 0 -1 -1
L 18200 12700 18300 12600 3 0 0 0 -1 -1
L 17700 12700 18200 12700 3 0 0 0 -1 -1
L 17700 12700 17700 12500 3 0 0 0 -1 -1
P 17500 12600 17700 12600 1 0 0
{
T 17750 12550 5 6 0 0 0 0 1
pinseq=1
T 17750 12550 5 6 0 1 0 0 1
pinnumber=1
}
]
{
T 17600 12800 5 10 0 0 0 0 1
device=OUTPUT
T 18400 12500 5 10 1 1 0 0 1
value=SPI0_SCLK
T 17500 12500 5 10 0 1 180 0 1
net=SPI0_SCLK:1
}
C 14300 13300 1 0 1 EMBEDDEDoutput-1.sym
[
T 14200 13600 5 10 0 0 0 6 1
device=OUTPUT
L 13600 13300 14100 13300 3 0 0 0 -1 -1
L 13500 13400 13600 13300 3 0 0 0 -1 -1
L 13600 13500 13500 13400 3 0 0 0 -1 -1
L 14100 13500 13600 13500 3 0 0 0 -1 -1
L 14100 13500 14100 13300 3 0 0 0 -1 -1
P 14300 13400 14100 13400 1 0 0
{
T 14050 13350 5 6 0 0 0 6 1
pinseq=1
T 14050 13350 5 6 0 1 0 6 1
pinnumber=1
}
]
{
T 14200 13600 5 10 0 0 0 6 1
device=OUTPUT
T 13400 13300 5 10 1 1 0 6 1
value=SPI0_CS0
T 14300 13300 5 10 0 1 180 6 1
net=SPI0_CS0:1
}
C 14300 12500 1 0 1 EMBEDDEDoutput-1.sym
[
T 14200 12800 5 10 0 0 0 6 1
device=OUTPUT
P 14300 12600 14100 12600 1 0 0
{
T 14050 12550 5 6 0 1 0 6 1
pinnumber=1
T 14050 12550 5 6 0 0 0 6 1
pinseq=1
}
L 14100 12700 14100 12500 3 0 0 0 -1 -1
L 14100 12700 13600 12700 3 0 0 0 -1 -1
L 13600 12700 13500 12600 3 0 0 0 -1 -1
L 13500 12600 13600 12500 3 0 0 0 -1 -1
L 13600 12500 14100 12500 3 0 0 0 -1 -1
]
{
T 14200 12800 5 10 0 0 0 6 1
device=OUTPUT
T 13400 12500 5 10 1 1 0 6 1
value=SPI0_D0
T 14300 12500 5 10 0 1 180 6 1
net=SPI0_D0:1
}
N 14300 8600 15200 8600 4
C 14300 8500 1 0 1 EMBEDDEDoutput-1.sym
[
T 14200 8800 5 10 0 0 0 6 1
device=OUTPUT
L 13600 8500 14100 8500 3 0 0 0 -1 -1
L 13500 8600 13600 8500 3 0 0 0 -1 -1
L 13600 8700 13500 8600 3 0 0 0 -1 -1
L 14100 8700 13600 8700 3 0 0 0 -1 -1
L 14100 8700 14100 8500 3 0 0 0 -1 -1
P 14300 8600 14100 8600 1 0 0
{
T 14050 8550 5 6 0 0 0 6 1
pinseq=1
T 14050 8550 5 6 0 1 0 6 1
pinnumber=1
}
]
{
T 14200 8800 5 10 0 0 0 6 1
device=OUTPUT
T 13400 8500 5 10 1 1 0 6 1
value=CLKOUT2
T 14300 8500 5 10 0 1 180 6 1
net=CLKOUT2:1
}
C 5700 2900 1 270 0 EMBEDDEDcapacitor-2.sym
[
L 6049 2560 6049 2660 3 0 0 0 -1 -1
L 6100 2611 6000 2611 3 0 0 0 -1 -1
A 5900 1700 700 75 30 3 0 0 0 -1 -1
L 5900 2500 5900 2700 3 0 0 0 -1 -1
L 5900 2200 5900 2400 3 0 0 0 -1 -1
L 6100 2500 5700 2500 3 0 0 0 -1 -1
P 5900 2000 5900 2200 1 0 0
{
T 5950 2150 5 8 1 1 270 0 1
pinnumber=2
T 5850 2200 5 8 0 1 270 2 1
pinseq=2
T 5900 2250 9 8 0 1 270 6 1
pinlabel=-
T 5900 2250 5 8 0 1 270 8 1
pintype=pas
}
P 5900 2900 5900 2700 1 0 0
{
T 5950 2750 5 8 1 1 270 6 1
pinnumber=1
T 5850 2700 5 8 0 1 270 8 1
pinseq=1
T 5900 2650 9 8 0 1 270 0 1
pinlabel=+
T 5900 2650 5 8 0 1 270 2 1
pintype=pas
}
T 6600 2700 5 10 0 0 270 0 1
symversion=0.1
T 6800 2700 5 10 0 0 270 0 1
numslots=0
T 7000 2700 5 10 0 0 270 0 1
description=polarized capacitor
T 6200 2700 8 10 0 1 270 0 1
refdes=C?
T 6400 2700 5 10 0 0 270 0 1
device=POLARIZED_CAPACITOR
]
{
T 6400 2700 5 10 0 0 270 0 1
device=POLARIZED_CAPACITOR
T 6200 2500 5 10 1 1 0 0 1
refdes=C102
T 6200 2300 5 10 1 1 0 0 1
value=10uF 10V
T 5700 2900 5 10 0 0 0 0 1
footprint=1206_pol
}
C 17500 14500 1 0 0 EMBEDDEDoutput-1.sym
[
P 17500 14600 17700 14600 1 0 0
{
T 17750 14550 5 6 0 1 0 0 1
pinnumber=1
T 17750 14550 5 6 0 0 0 0 1
pinseq=1
}
L 17700 14700 17700 14500 3 0 0 0 -1 -1
L 17700 14700 18200 14700 3 0 0 0 -1 -1
L 18200 14700 18300 14600 3 0 0 0 -1 -1
L 18300 14600 18200 14500 3 0 0 0 -1 -1
L 18200 14500 17700 14500 3 0 0 0 -1 -1
T 17600 14800 5 10 0 0 0 0 1
device=OUTPUT
]
{
T 17600 14800 5 10 0 0 0 0 1
device=OUTPUT
T 18400 14500 5 10 1 1 0 0 1
value=GPMC_BE1N
T 17500 14500 5 10 0 1 180 0 1
net=GPMC_BE1N:1
}
N 16600 14600 17500 14600 4
C 7200 2500 1 0 0 switch-dip2-1.sym
{
T 8600 3275 5 8 0 0 0 0 1
device=SWITCH_DIP2
T 7500 3450 5 10 1 1 0 0 1
refdes=SW101
T 7200 2500 5 10 0 0 0 0 1
footprint=cts_218_2
}