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Does RISC-V support guest interrupt pass-through, and how can MSI interrupts be directly sent to a guest?
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At the moment, KVM RISC-V doesn't support MSI pass-through but it is work-in-progress.
@jones-drew has a working implementation but his patches depend upon RISC-V IOMMU driver which is not yet upstreamed.
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Does RISC-V support guest interrupt pass-through, and how can MSI interrupts be directly sent to a guest?
The text was updated successfully, but these errors were encountered: