From 5840a6525a8b1f35d659fef409f4dd1891e9b474 Mon Sep 17 00:00:00 2001
From: Diogo Costa <diogoandreveigacosta@gmail.com>
Date: Thu, 12 Oct 2023 09:21:12 +0100
Subject: [PATCH] feat(verbose) improve error handling for interrupt
 reservation

Signed-off-by: Diogo Costa <diogoandreveigacosta@gmail.com>
---
 src/arch/armv8/gic.c   | 6 ++++--
 src/arch/riscv/iommu.c | 5 ++++-
 src/arch/riscv/sbi.c   | 4 +++-
 src/core/interrupts.c  | 4 +++-
 src/core/vm.c          | 4 +++-
 5 files changed, 17 insertions(+), 6 deletions(-)

diff --git a/src/arch/armv8/gic.c b/src/arch/armv8/gic.c
index e95075dbd..f2027a6af 100644
--- a/src/arch/armv8/gic.c
+++ b/src/arch/armv8/gic.c
@@ -68,8 +68,10 @@ void gicd_init()
 
     /* No need to setup gicd->NSACR as all interrupts are  setup to group 1 */
 
-    interrupts_reserve(platform.arch.gic.maintenance_id,
-                       gic_maintenance_handler);
+    if(!interrupts_reserve(platform.arch.gic.maintenance_id,
+                       gic_maintenance_handler)) {
+        ERROR("Failed to reserve GIC maintenance interrupt");
+    }
 }
 
 void gic_map_mmio();
diff --git a/src/arch/riscv/iommu.c b/src/arch/riscv/iommu.c
index d901ad344..494fa9c9c 100644
--- a/src/arch/riscv/iommu.c
+++ b/src/arch/riscv/iommu.c
@@ -334,7 +334,10 @@ void rv_iommu_init(void)
     rv_iommu.hw.reg_ptr->fqh = 0;
 
     // Allocate IRQ for FQ
-    interrupts_reserve(platform.arch.iommu.fq_irq_id, rv_iommu_fq_irq_handler);
+    if(!interrupts_reserve(platform.arch.iommu.fq_irq_id, rv_iommu_fq_irq_handler)) {
+        ERROR("Failed to reserve IOMMU FQ interrupt");
+    }
+    
     interrupts_cpu_enable(platform.arch.iommu.fq_irq_id, true);
 
     // Enable FQ (fqcsr)
diff --git a/src/arch/riscv/sbi.c b/src/arch/riscv/sbi.c
index 101b9bdae..96522cae0 100644
--- a/src/arch/riscv/sbi.c
+++ b/src/arch/riscv/sbi.c
@@ -476,5 +476,7 @@ void sbi_init()
         }
     }
 
-    interrupts_reserve(TIMR_INT_ID, sbi_timer_irq_handler);
+    if(!interrupts_reserve(TIMR_INT_ID, sbi_timer_irq_handler)) {
+        ERROR("Failed to reserve SBI TIMR_INT_ID interrupt");
+    }
 }
diff --git a/src/core/interrupts.c b/src/core/interrupts.c
index a6e901869..96f381126 100644
--- a/src/core/interrupts.c
+++ b/src/core/interrupts.c
@@ -41,7 +41,9 @@ inline void interrupts_init()
     interrupts_arch_init();
 
     if (cpu()->id == CPU_MASTER) {
-        interrupts_reserve(IPI_CPU_MSG, cpu_msg_handler);
+        if(!interrupts_reserve(IPI_CPU_MSG, cpu_msg_handler)) {
+            ERROR("Failed to reserve IPI_CPU_MSG interrupt");
+        }
     }
 
     interrupts_cpu_enable(IPI_CPU_MSG, true);
diff --git a/src/core/vm.c b/src/core/vm.c
index d5d105035..a4c853bab 100644
--- a/src/core/vm.c
+++ b/src/core/vm.c
@@ -207,7 +207,9 @@ static void vm_init_dev(struct vm* vm, const struct vm_config* config)
         }
 
         for (size_t j = 0; j < dev->interrupt_num; j++) {
-            interrupts_vm_assign(vm, dev->interrupts[j]);
+            if(!interrupts_vm_assign(vm, dev->interrupts[j])) {
+                ERROR("Failed to assign interrupt id %d", dev->interrupts[j]);
+            }
         }
     }