Performance issue when trap ARM GIC-R

[riturbo]

I noticed that the function vgic_emul_generic_access will update gicr register by bit. This means that when writing a register, it will loop 32 times. Itwill take a lot of time. Is there any other special consideration for this design

[josecm]

The idea of that function is being as generic as possible to handle per-interrupt bitwise registers. Otherwise, the code for this kind of operation would be repeated for each of the registers. The main rationale for maintaining this possible inneficiency is that these configuration registers are not used in any critical path that would affect interrupt latency, or for that matter, interrupt handling. Do you know of any reason why we should optimize these accesses or dDo you have other ideas about this or suggestions on how to improve it? It would be much appreciated.

PS: I'm moving this to discussions