diff --git a/rtl/core/core_pipe_decode.sv b/rtl/core/core_pipe_decode.sv
index f62b411..6c18fed 100644
--- a/rtl/core/core_pipe_decode.sv
+++ b/rtl/core/core_pipe_decode.sv
@@ -5,6 +5,8 @@
 //  Pipeline decode / operand gather stage.
 //
 module core_pipe_decode #(
+// Inital address of the program counter post reset.
+parameter   PC_RESET_ADDRESS      = 'h10000000,
 parameter F_ZKB  = 1, // Turn on Bitmanip-borrowed crypto instructions
 parameter F_ZKG  = 1, // Turn on CLMUL/CLMULH
 parameter F_ZKNE = 1, // Turn on NIST AES encrypt
@@ -171,8 +173,6 @@ assign s2_instr     = {s1_i32bit ? s1_instr[31:16] : 16'b0, s1_instr[15:0]};
 // Program Counter Tracking
 // ------------------------------------------------------------
 
-// Inital address of the program counter post reset.
-parameter   PC_RESET_ADDRESS      = 'h10000000;
 
 // Only use as many register bits for the PC as there are physical
 // memory address bits.
diff --git a/rtl/core/core_top.sv b/rtl/core/core_top.sv
index 23011be..fb5b696 100644
--- a/rtl/core/core_top.sv
+++ b/rtl/core/core_top.sv
@@ -403,7 +403,6 @@ core_pipe_fetch #(
 //
 core_pipe_decode #(
 .PC_RESET_ADDRESS(PC_RESET_ADDRESS),
-.MEM_ADDR_W      (MEM_ADDR_W      ),
 .F_ZKB           (F_ZKB  ), // Turn on Bitmanip-borrowed crypto instructions
 .F_ZKG           (F_ZKG  ), // Turn on CLMUL/CLMULH
 .F_ZKNE          (F_ZKNE ), // Turn on NIST AES encrypt
@@ -542,7 +541,6 @@ core_pipe_decode #(
 //  Top level for the execute stage of the pipeline.
 //
 core_pipe_exec #(
-.MEM_ADDR_W     (MEM_ADDR_W     ),
 .F_ZKB           (F_ZKB  ), // Turn on Bitmanip-borrowed crypto instructions
 .F_ZKG           (F_ZKG  ), // Turn on CLMUL/CLMULH
 .F_ZKNE          (F_ZKNE ), // Turn on NIST AES encrypt
@@ -713,7 +711,6 @@ core_pipe_exec #(
 //  Load data processing, trap raising.
 //
 core_pipe_wb #(
-.MEM_ADDR_W     (MEM_ADDR_W     )
 ) i_core_pipe_wb (
 .g_clk           (g_clk           ), // Global clock
 .g_resetn        (g_resetn        ), // Global active low sync reset.