diff --git a/bittide-instances/src/Bittide/Instances/Hitl/SwCcTopologies.hs b/bittide-instances/src/Bittide/Instances/Hitl/SwCcTopologies.hs
index c09aaf389..bf69363a3 100644
--- a/bittide-instances/src/Bittide/Instances/Hitl/SwCcTopologies.hs
+++ b/bittide-instances/src/Bittide/Instances/Hitl/SwCcTopologies.hs
@@ -212,6 +212,7 @@ topologyTest ::
   "GTH_RX_PS" ::: TransceiverWires GthRxS LinkCount ->
   "MISO" ::: Signal Basic125 Bit ->
   "TEST_CFG" ::: Signal Basic125 TestConfig ->
+  "CALIBRATED_SHIFT" ::: Signal Basic125 FincFdecCount ->
   ( "GTH_TX_NS" ::: TransceiverWires GthTxS LinkCount
   , "GTH_TX_PS" ::: TransceiverWires GthTxS LinkCount
   , "FINC_FDEC" ::: Signal Basic125 (FINC, FDEC)
@@ -228,11 +229,10 @@ topologyTest ::
   , "transceiversFailedAfterUp" ::: Signal Basic125 Bool
   , "ALL_READY" ::: Signal Basic125 Bool
   , "ALL_STABLE" ::: Signal Basic125 Bool
-  , "CALIB_I" ::: Signal Basic125 FincFdecCount
-  , "CALIB_E" ::: Signal Basic125 FincFdecCount
+  , "CLOCK_SHIFT" ::: Signal Basic125 FincFdecCount
   , "ugnsStable" ::: Vec LinkCount (Signal Basic125 Bool)
   )
-topologyTest refClk sysClk sysRst IlaControl{syncRst = rst, ..} rxNs rxPs miso cfg =
+topologyTest refClk sysClk sysRst IlaControl{syncRst = rst, ..} rxNs rxPs miso cfg ccs =
   hwSeqX
     fincFdecIla
     ( transceivers.txNs
@@ -247,8 +247,7 @@ topologyTest refClk sysClk sysRst IlaControl{syncRst = rst, ..} rxNs rxPs miso c
     , transceiversFailedAfterUp
     , allReady
     , allStable0
-    , calibratedClockShift
-    , validationClockShift
+    , clockShift
 --  , ugnsStable
     , repeat $ pure True
     )
@@ -417,7 +416,6 @@ topologyTest refClk sysClk sysRst IlaControl{syncRst = rst, ..} rxNs rxPs miso c
           :> "probe_adjustCount"
           :> "probe_initialAdjust"
           :> "probe_adjustRst"
-          :> "probe_calibratedClockShift"
           :> "probe_clockShift"
           :> "probe_initialClockShift"
           :> "probe_calibrate"
@@ -490,7 +488,6 @@ topologyTest refClk sysClk sysRst IlaControl{syncRst = rst, ..} rxNs rxPs miso c
       adjustCount
       initialAdjust
       (unsafeFromReset adjustRst)
-      calibratedClockShift
       clockShift
       (fromMaybe 0 . initialClockShift <$> cfg)
       (pack . calibrate <$> cfg)
@@ -570,31 +567,6 @@ topologyTest refClk sysClk sysRst IlaControl{syncRst = rst, ..} rxNs rxPs miso c
       )
       (clockShiftUpd <$> clockMod <*> clockShift)
 
-  calibratedClockShift =
-    register sysClk sysRst enableGen 0
-      $ mux
-        ( isFalling sysClk sysRst enableGen False
-            $ (== CCCalibrate)
-            . calibrate
-            <$> cfg
-        )
-        clockShift
-        calibratedClockShift
-
-  validationClockShift =
-    regEn
-      sysClk
-      sysRst
-      enableGen
-      (0 :: FincFdecCount)
-      ( callistoEnteredPulse
-          .&&. notInCCReset
-          .&&. (== CCCalibrationValidation)
-          . calibrate
-          <$> cfg
-      )
-      (clockShiftUpd <$> clockMod <*> validationClockShift)
-
   -- Initial Clock adjustment
 
   -- without the additional delay of 1 second here, some of the
@@ -612,7 +584,7 @@ topologyTest refClk sysClk sysRst IlaControl{syncRst = rst, ..} rxNs rxPs miso c
   adjusting = adjustStart .&&. (not <$> clocksAdjusted)
   adjustRst = unsafeFromActiveLow adjustStart
 
-  initialAdjust = (+) <$> calibratedClockShift <*> (fromMaybe 0 . initialClockShift <$> cfg)
+  initialAdjust = (+) <$> ccs <*> (fromMaybe 0 . initialClockShift <$> cfg)
 
   adjustCountEnable = mux ((== minBound) <$> adjustCount) (pure True) setupEnteredPulse
 
@@ -956,7 +928,6 @@ swCcTopologyTest refClkDiff sysClkDiff syncIn rxns rxps miso =
       (satSucc SatBound <$> testCounter)
 
   cfg = fromMaybe disabled <$> testConfig
-  cfg' = mux testSuccessSticky (pure disabled) cfg
 
   ( txns
     , txps
@@ -970,8 +941,7 @@ swCcTopologyTest refClkDiff sysClkDiff syncIn rxns rxps miso =
     , transceiversFailedAfterUp
     , allReady
     , allStable
-    , calibI
-    , calibE
+    , clockShift
     , _ugnsStable
     ) =
       topologyTest
@@ -982,7 +952,8 @@ swCcTopologyTest refClkDiff sysClkDiff syncIn rxns rxps miso =
         rxns
         rxps
         miso
-        cfg'
+        cfg
+        calibratedClockShift
 
   captureFlag =
     riseEvery
@@ -1024,8 +995,7 @@ swCcTopologyTest refClkDiff sysClkDiff syncIn rxns rxps miso =
           :> "probe_startTest"
           :> "probe_skip"
           :> "probe_allStable"
-          :> "probe_calibI"
-          :> "probe_calibE"
+          :> "probe_tle_clockShift"
           :> "probe_endSuccess"
           :> "probe_startBeforeAllReady"
           :> "probe_tle_transceiversFailedAfterUp"
@@ -1058,8 +1028,7 @@ swCcTopologyTest refClkDiff sysClkDiff syncIn rxns rxps miso =
       startTest
       skip
       allStable
-      calibI
-      calibE
+      clockShift
       endSuccess
       startBeforeAllReady
       transceiversFailedAfterUp
@@ -1083,6 +1052,19 @@ swCcTopologyTest refClkDiff sysClkDiff syncIn rxns rxps miso =
       (syncStart .&&. ((not <$> allReady) .||. transceiversFailedAfterUp))
       -- (syncStart .&&. (not <$> allReady))
 
+  calibratedClockShift =
+    regEn
+      sysClk
+      sysRst
+      enableGen
+      0
+      enableCond
+      clockShift
+   where
+    testSuccessRising = isRising sysClk sysRst enableGen False testSuccess
+    cfgIsCalibrate = (\c -> c.calibrate == CCCalibrate) <$> cfg
+    enableCond = testSuccessRising .&&. cfgIsCalibrate
+
   endSuccess :: Signal Basic125 Bool
   endSuccess =
     trueFor (SNat @(Seconds 5)) sysClk syncRst allStable
@@ -1090,8 +1072,8 @@ swCcTopologyTest refClkDiff sysClkDiff syncIn rxns rxps miso =
               . calibrate
               <$> cfg
               .||. (\i e -> abs (i - e) < acceptableNoiseLevel)
-              <$> calibI
-              <*> calibE
+              <$> calibratedClockShift
+              <*> clockShift
            )
 
   skip = maybe False (not . fpgaEnabled) <$> testConfig
@@ -1103,7 +1085,6 @@ swCcTopologyTest refClkDiff sysClkDiff syncIn rxns rxps miso =
               .||. transceiversFailedAfterUp
               .||. startBeforeAllReady
            )
-  testDoneSticky = sticky sysClk testReset (isRising sysClk testReset enableGen False testDone)
 
   testSuccess =
     skip
@@ -1111,10 +1092,9 @@ swCcTopologyTest refClkDiff sysClkDiff syncIn rxns rxps miso =
               .&&. (not <$> (transceiversFailedAfterUp .||. startBeforeAllReady))
               -- .&&. (not <$> startBeforeAllReady)
            )
-  testSuccessSticky = sticky sysClk testReset (isRising sysClk testReset enableGen False testSuccess)
 
   testConfig :: Signal Basic125 (Maybe TestConfig)
-  testConfig = hitlVio disabled sysClk testDoneSticky testSuccessSticky
+  testConfig = hitlVio disabled sysClk testDone testSuccess
 
 makeTopEntity 'swCcTopologyTest