Fix: Treat GD32E508 in JTAG transport as ADIv5 #2053
Merged
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Detailed description
A temporary patch "like LPC43xx errata" may not be ideal, because this is not mentioned in GD32E5 errata, but likely ends up an actual Cortex-M33 DAP ("TEALDAP") that is SWJ-DP MINDP. But I leave DPv0/v1 and ADIv6 DPv3 distinction details to maintainers. It works with JLink and with OpenOCD, and it used to work with BMD, it's not new.
Note: the other in-tree CM33 chips, STM32H5, identify as 0xba00 which corresponds to CoreSight SoC-400 JTAG-DP, and ST is known to have used CoreSight SoC-400 IP in STM32H7/MP15 (SWO and TPIU at least). And RP2350 (ADIv6) relies on SW-DP.
Tested using BMDA v2.0.0-rc1 driving JLink V9, also driving
blackpill-f411ce
around v1.10.0-1200 (as remote v0 adapter without HL).Your checklist for this pull request
Closing issues