diff --git a/src/target/adiv5.h b/src/target/adiv5.h
index 3bca6ac4876..c28dcb699a8 100644
--- a/src/target/adiv5.h
+++ b/src/target/adiv5.h
@@ -218,6 +218,14 @@
  * for the second and third JTAG-DPs which are still JTAG-DPv0.
  */
 #define JTAG_IDCODE_PARTNO_SOC400_4BIT_ERRATA 0xba01U
+
+/*
+ * ARM JTAG PARTNO values from Cortex-M33 TRM (ARM document ID 100230, issue 0100)
+ * A.4.2.2 Identification Code register, IDCODE, Table A-13 pg98
+ * (for TEALDAP/CM33DAP MINDP SWJ-DP/JTAG-DP)
+ */
+#define JTAG_IDCODE_PARTNO_SOC400_4BIT_CM33 0xba04U
+
 /*
  * ARM JTAG PARTNO values from CoreSight SoC-600 TRM (ARM document ID 101883, issue 0101-00)
  * §10.2.2 css600_dp register descriptions, Table 10-2 pg90
diff --git a/src/target/adiv5_jtag.c b/src/target/adiv5_jtag.c
index 5af007b42b1..9be38aaaa6b 100644
--- a/src/target/adiv5_jtag.c
+++ b/src/target/adiv5_jtag.c
@@ -83,6 +83,9 @@ void adiv5_jtag_dp_handler(const uint8_t dev_index)
 		/* Correct the LPC43xx errata PARTNO values */
 		if (dp->partno == JTAG_IDCODE_PARTNO_SOC400_4BIT_ERRATA)
 			dp->partno = JTAG_IDCODE_PARTNO_SOC400_4BIT;
+		/* Correct the GD32E50x PARTNO value */
+		else if (dp->partno == JTAG_IDCODE_PARTNO_SOC400_4BIT_CM33)
+			dp->partno = JTAG_IDCODE_PARTNO_SOC400_4BIT;
 
 		if (dp->partno == JTAG_IDCODE_PARTNO_SOC400_4BIT || dp->partno == JTAG_IDCODE_PARTNO_SOC400_8BIT)
 			dp->version = 0U;